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scsi: megaraid_sas: use adapter_type for all gen controllers
[thirdparty/linux.git] / drivers / scsi / megaraid / megaraid_sas_base.c
CommitLineData
c4a3e0a5 1/*
3f1530c1 2 * Linux MegaRAID driver for SAS based RAID controllers
c4a3e0a5 3 *
e399065b
SS		 4 * Copyright (c) 2003-2013 LSI Corporation
5 * Copyright (c) 2013-2014 Avago Technologies
c4a3e0a5 6 *
3f1530c1
AR		 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
c4a3e0a5 11 *
3f1530c1
AR		 12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
c4a3e0a5 16 *
3f1530c1 17 * You should have received a copy of the GNU General Public License
e399065b 18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
c4a3e0a5 19 *
e399065b 20 * Authors: Avago Technologies
3f1530c1
AR		 21 * Sreenivas Bagalkote
22 * Sumant Patro
23 * Bo Yang
e399065b
SS		 24 * Adam Radford
25 * Kashyap Desai <kashyap.desai@avagotech.com>
26 * Sumit Saxena <sumit.saxena@avagotech.com>
c4a3e0a5 27 *
e399065b 28 * Send feedback to: megaraidlinux.pdl@avagotech.com
3f1530c1 29 *
e399065b
SS		 30 * Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
31 * San Jose, California 95131
c4a3e0a5
BS		 32 */
33
34#include <linux/kernel.h>
35#include <linux/types.h>
36#include <linux/pci.h>
37#include <linux/list.h>
c4a3e0a5
BS		 38#include <linux/moduleparam.h>
39#include <linux/module.h>
40#include <linux/spinlock.h>
41#include <linux/interrupt.h>
42#include <linux/delay.h>
43#include <linux/uio.h>
5a0e3ad6 44#include <linux/slab.h>
7c0f6ba6 45#include <linux/uaccess.h>
318aaef8 46#include <asm/unaligned.h>
43399236 47#include <linux/fs.h>
c4a3e0a5 48#include <linux/compat.h>
cf62a0a5 49#include <linux/blkdev.h>
0b950672 50#include <linux/mutex.h>
c3518837 51#include <linux/poll.h>
def3e8df 52#include <linux/vmalloc.h>
c4a3e0a5
BS		 53
54#include <scsi/scsi.h>
55#include <scsi/scsi_cmnd.h>
56#include <scsi/scsi_device.h>
57#include <scsi/scsi_host.h>
4bcde509 58#include <scsi/scsi_tcq.h>
9c915a8c 59#include "megaraid_sas_fusion.h"
c4a3e0a5
BS		 60#include "megaraid_sas.h"
61
1fd10685
YB		 62/*
63 * Number of sectors per IO command
64 * Will be set in megasas_init_mfi if user does not provide
65 */
66static unsigned int max_sectors;
67module_param_named(max_sectors, max_sectors, int, 0);
68MODULE_PARM_DESC(max_sectors,
69 "Maximum number of sectors per IO command");
70
80d9da98
AR		 71static int msix_disable;
72module_param(msix_disable, int, S_IRUGO);
73MODULE_PARM_DESC(msix_disable, "Disable MSI-X interrupt handling. Default: 0");
74
079eaddf
AR		 75static unsigned int msix_vectors;
76module_param(msix_vectors, int, S_IRUGO);
77MODULE_PARM_DESC(msix_vectors, "MSI-X max vector count. Default: Set by FW");
78
229fe47c
AR		 79static int allow_vf_ioctls;
80module_param(allow_vf_ioctls, int, S_IRUGO);
81MODULE_PARM_DESC(allow_vf_ioctls, "Allow ioctls in SR-IOV VF mode. Default: 0");
82
ae09a6c1 83static unsigned int throttlequeuedepth = MEGASAS_THROTTLE_QUEUE_DEPTH;
c5daa6a9
AR		 84module_param(throttlequeuedepth, int, S_IRUGO);
85MODULE_PARM_DESC(throttlequeuedepth,
86 "Adapter queue depth when throttled due to I/O timeout. Default: 16");
87
e3d178ca 88unsigned int resetwaittime = MEGASAS_RESET_WAIT_TIME;
c007b8b2
AR		 89module_param(resetwaittime, int, S_IRUGO);
90MODULE_PARM_DESC(resetwaittime, "Wait time in seconds after I/O timeout "
91 "before resetting adapter. Default: 180");
92
ac95136a
SS		 93int smp_affinity_enable = 1;
94module_param(smp_affinity_enable, int, S_IRUGO);
95MODULE_PARM_DESC(smp_affinity_enable, "SMP affinity feature enable/disbale Default: enable(1)");
96
179ac142
SS		 97int rdpq_enable = 1;
98module_param(rdpq_enable, int, S_IRUGO);
99MODULE_PARM_DESC(rdpq_enable, " Allocate reply queue in chunks for large queue depth enable/disable Default: disable(0)");
100
308ec459
SS		 101unsigned int dual_qdepth_disable;
102module_param(dual_qdepth_disable, int, S_IRUGO);
103MODULE_PARM_DESC(dual_qdepth_disable, "Disable dual queue depth feature. Default: 0");
104
e3d178ca
SS		 105unsigned int scmd_timeout = MEGASAS_DEFAULT_CMD_TIMEOUT;
106module_param(scmd_timeout, int, S_IRUGO);
107MODULE_PARM_DESC(scmd_timeout, "scsi command timeout (10-90s), default 90s. See megasas_reset_timer.");
108
c4a3e0a5
BS		 109MODULE_LICENSE("GPL");
110MODULE_VERSION(MEGASAS_VERSION);
43cd7fe4
SS		 111MODULE_AUTHOR("megaraidlinux.pdl@avagotech.com");
112MODULE_DESCRIPTION("Avago MegaRAID SAS Driver");
c4a3e0a5 113
058a8fac 114int megasas_transition_to_ready(struct megasas_instance *instance, int ocr);
39a98554 115static int megasas_get_pd_list(struct megasas_instance *instance);
21c9e160
AR		 116static int megasas_ld_list_query(struct megasas_instance *instance,
117 u8 query_type);
39a98554 118static int megasas_issue_init_mfi(struct megasas_instance *instance);
119static int megasas_register_aen(struct megasas_instance *instance,
120 u32 seq_num, u32 class_locale_word);
15dd0381
S		 121static void megasas_get_pd_info(struct megasas_instance *instance,
122 struct scsi_device *sdev);
96188a89
S		 123static int megasas_get_target_prop(struct megasas_instance *instance,
124 struct scsi_device *sdev);
c4a3e0a5
BS		 125/*
126 * PCI ID table for all supported controllers
127 */
128static struct pci_device_id megasas_pci_table[] = {
129
f3d7271c
HK		 130 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1064R)},
131 /* xscale IOP */
132 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078R)},
133 /* ppc IOP */
af7a5647 134 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078DE)},
135 /* ppc IOP */
6610a6b3
YB		 136 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078GEN2)},
137 /* gen2*/
138 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0079GEN2)},
139 /* gen2*/
87911122
YB		 140 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0073SKINNY)},
141 /* skinny*/
142 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0071SKINNY)},
143 /* skinny*/
f3d7271c
HK		 144 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VERDE_ZCR)},
145 /* xscale IOP, vega */
146 {PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)},
147 /* xscale IOP */
9c915a8c
AR		 148 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FUSION)},
149 /* Fusion */
229fe47c
AR		 150 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_PLASMA)},
151 /* Plasma */
36807e67
AR		 152 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INVADER)},
153 /* Invader */
21d3c710
SS		 154 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FURY)},
155 /* Fury */
90c204bc 156 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INTRUDER)},
157 /* Intruder */
158 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INTRUDER_24)},
159 /* Intruder 24 port*/
7364d34b 160 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CUTLASS_52)},
161 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CUTLASS_53)},
45f4f2eb
SC		 162 /* VENTURA */
163 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VENTURA)},
164 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_HARPOON)},
165 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_TOMCAT)},
166 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VENTURA_4PORT)},
167 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CRUSADER_4PORT)},
f3d7271c 168 {}
c4a3e0a5
BS		 169};
170
171MODULE_DEVICE_TABLE(pci, megasas_pci_table);
172
173static int megasas_mgmt_majorno;
229fe47c 174struct megasas_mgmt_info megasas_mgmt_info;
c4a3e0a5 175static struct fasync_struct *megasas_async_queue;
0b950672 176static DEFINE_MUTEX(megasas_async_queue_mutex);
c4a3e0a5 177
c3518837
YB		 178static int megasas_poll_wait_aen;
179static DECLARE_WAIT_QUEUE_HEAD(megasas_poll_wait);
72c4fd36 180static u32 support_poll_for_event;
9c915a8c 181u32 megasas_dbg_lvl;
837f5fe8 182static u32 support_device_change;
658dcedb 183
c3518837
YB		 184/* define lock for aen poll */
185spinlock_t poll_aen_lock;
186
9c915a8c 187void
7343eb65 188megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
189 u8 alt_status);
ebf054b0
AR		 190static u32
191megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs);
192static int
193megasas_adp_reset_gen2(struct megasas_instance *instance,
194 struct megasas_register_set __iomem *reg_set);
cd50ba8e
AR		 195static irqreturn_t megasas_isr(int irq, void *devp);
196static u32
197megasas_init_adapter_mfi(struct megasas_instance *instance);
198u32
199megasas_build_and_issue_cmd(struct megasas_instance *instance,
200 struct scsi_cmnd *scmd);
201static void megasas_complete_cmd_dpc(unsigned long instance_addr);
9c915a8c 202int
229fe47c
AR		 203wait_and_poll(struct megasas_instance *instance, struct megasas_cmd *cmd,
204 int seconds);
9c915a8c 205void megasas_fusion_ocr_wq(struct work_struct *work);
229fe47c
AR		 206static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
207 int initial);
cd50ba8e 208
f4fc2093 209void
cd50ba8e
AR		 210megasas_issue_dcmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
211{
212 instance->instancet->fire_cmd(instance,
213 cmd->frame_phys_addr, 0, instance->reg_set);
f4fc2093 214 return;
cd50ba8e 215}
7343eb65 216
c4a3e0a5
BS		 217/**
218 * megasas_get_cmd - Get a command from the free pool
219 * @instance: Adapter soft state
220 *
221 * Returns a free command from the pool
222 */
9c915a8c 223struct megasas_cmd *megasas_get_cmd(struct megasas_instance
c4a3e0a5
BS		 224 *instance)
225{
226 unsigned long flags;
227 struct megasas_cmd *cmd = NULL;
228
90dc9d98 229 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 230
231 if (!list_empty(&instance->cmd_pool)) {
232 cmd = list_entry((&instance->cmd_pool)->next,
233 struct megasas_cmd, list);
234 list_del_init(&cmd->list);
235 } else {
1be18254 236 dev_err(&instance->pdev->dev, "Command pool empty!\n");
c4a3e0a5
BS		 237 }
238
90dc9d98 239 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 240 return cmd;
241}
242
243/**
4026e9aa 244 * megasas_return_cmd - Return a cmd to free command pool
c4a3e0a5
BS		 245 * @instance: Adapter soft state
246 * @cmd: Command packet to be returned to free command pool
247 */
68b43744 248void
4026e9aa 249megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
c4a3e0a5 250{
4026e9aa
SS		 251 unsigned long flags;
252 u32 blk_tags;
253 struct megasas_cmd_fusion *cmd_fusion;
254 struct fusion_context *fusion = instance->ctrl_context;
255
256 /* This flag is used only for fusion adapter.
257 * Wait for Interrupt for Polled mode DCMD
90dc9d98 258 */
4026e9aa 259 if (cmd->flags & DRV_DCMD_POLLED_MODE)
90dc9d98 260 return;
c4a3e0a5 261
4026e9aa
SS		 262 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
263
264 if (fusion) {
265 blk_tags = instance->max_scsi_cmds + cmd->index;
266 cmd_fusion = fusion->cmd_list[blk_tags];
267 megasas_return_cmd_fusion(instance, cmd_fusion);
268 }
c4a3e0a5 269 cmd->scmd = NULL;
9c915a8c 270 cmd->frame_count = 0;
4026e9aa 271 cmd->flags = 0;
21c34006
S		 272 memset(cmd->frame, 0, instance->mfi_frame_size);
273 cmd->frame->io.context = cpu_to_le32(cmd->index);
4026e9aa 274 if (!fusion && reset_devices)
e5f93a36 275 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
90dc9d98 276 list_add(&cmd->list, (&instance->cmd_pool)->next);
90dc9d98 277
90dc9d98 278 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5 279
4026e9aa 280}
1341c939 281
714f5177 282static const char *
283format_timestamp(uint32_t timestamp)
284{
285 static char buffer[32];
286
287 if ((timestamp & 0xff000000) == 0xff000000)
288 snprintf(buffer, sizeof(buffer), "boot + %us", timestamp &
289 0x00ffffff);
290 else
291 snprintf(buffer, sizeof(buffer), "%us", timestamp);
292 return buffer;
293}
294
295static const char *
296format_class(int8_t class)
297{
298 static char buffer[6];
299
300 switch (class) {
301 case MFI_EVT_CLASS_DEBUG:
302 return "debug";
303 case MFI_EVT_CLASS_PROGRESS:
304 return "progress";
305 case MFI_EVT_CLASS_INFO:
306 return "info";
307 case MFI_EVT_CLASS_WARNING:
308 return "WARN";
309 case MFI_EVT_CLASS_CRITICAL:
310 return "CRIT";
311 case MFI_EVT_CLASS_FATAL:
312 return "FATAL";
313 case MFI_EVT_CLASS_DEAD:
314 return "DEAD";
315 default:
316 snprintf(buffer, sizeof(buffer), "%d", class);
317 return buffer;
318 }
319}
320
321/**
322 * megasas_decode_evt: Decode FW AEN event and print critical event
323 * for information.
324 * @instance: Adapter soft state
325 */
326static void
327megasas_decode_evt(struct megasas_instance *instance)
328{
329 struct megasas_evt_detail *evt_detail = instance->evt_detail;
330 union megasas_evt_class_locale class_locale;
331 class_locale.word = le32_to_cpu(evt_detail->cl.word);
332
333 if (class_locale.members.class >= MFI_EVT_CLASS_CRITICAL)
334 dev_info(&instance->pdev->dev, "%d (%s/0x%04x/%s) - %s\n",
335 le32_to_cpu(evt_detail->seq_num),
336 format_timestamp(le32_to_cpu(evt_detail->time_stamp)),
337 (class_locale.members.locale),
338 format_class(class_locale.members.class),
339 evt_detail->description);
340}
341
1341c939 342/**
0d49016b 343* The following functions are defined for xscale
1341c939
SP		 344* (deviceid : 1064R, PERC5) controllers
345*/
346
c4a3e0a5 347/**
1341c939 348 * megasas_enable_intr_xscale - Enables interrupts
c4a3e0a5
BS		 349 * @regs: MFI register set
350 */
351static inline void
d46a3ad6 352megasas_enable_intr_xscale(struct megasas_instance *instance)
c4a3e0a5 353{
d46a3ad6 354 struct megasas_register_set __iomem *regs;
da0dc9fb 355
d46a3ad6 356 regs = instance->reg_set;
39a98554 357 writel(0, &(regs)->outbound_intr_mask);
c4a3e0a5
BS		 358
359 /* Dummy readl to force pci flush */
360 readl(&regs->outbound_intr_mask);
361}
362
b274cab7
SP		 363/**
364 * megasas_disable_intr_xscale -Disables interrupt
365 * @regs: MFI register set
366 */
367static inline void
d46a3ad6 368megasas_disable_intr_xscale(struct megasas_instance *instance)
b274cab7 369{
d46a3ad6 370 struct megasas_register_set __iomem *regs;
b274cab7 371 u32 mask = 0x1f;
da0dc9fb 372
d46a3ad6 373 regs = instance->reg_set;
b274cab7
SP		 374 writel(mask, &regs->outbound_intr_mask);
375 /* Dummy readl to force pci flush */
376 readl(&regs->outbound_intr_mask);
377}
378
1341c939
SP		 379/**
380 * megasas_read_fw_status_reg_xscale - returns the current FW status value
381 * @regs: MFI register set
382 */
383static u32
384megasas_read_fw_status_reg_xscale(struct megasas_register_set __iomem * regs)
385{
386 return readl(&(regs)->outbound_msg_0);
387}
388/**
389 * megasas_clear_interrupt_xscale - Check & clear interrupt
390 * @regs: MFI register set
391 */
0d49016b 392static int
1341c939
SP		 393megasas_clear_intr_xscale(struct megasas_register_set __iomem * regs)
394{
395 u32 status;
39a98554 396 u32 mfiStatus = 0;
da0dc9fb 397
1341c939
SP		 398 /*
399 * Check if it is our interrupt
400 */
401 status = readl(&regs->outbound_intr_status);
402
39a98554 403 if (status & MFI_OB_INTR_STATUS_MASK)
404 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
405 if (status & MFI_XSCALE_OMR0_CHANGE_INTERRUPT)
406 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
1341c939
SP		 407
408 /*
409 * Clear the interrupt by writing back the same value
410 */
39a98554 411 if (mfiStatus)
412 writel(status, &regs->outbound_intr_status);
1341c939 413
06f579de
YB		 414 /* Dummy readl to force pci flush */
415 readl(&regs->outbound_intr_status);
416
39a98554 417 return mfiStatus;
1341c939
SP		 418}
419
420/**
421 * megasas_fire_cmd_xscale - Sends command to the FW
422 * @frame_phys_addr : Physical address of cmd
423 * @frame_count : Number of frames for the command
424 * @regs : MFI register set
425 */
0d49016b 426static inline void
0c79e681
YB		 427megasas_fire_cmd_xscale(struct megasas_instance *instance,
428 dma_addr_t frame_phys_addr,
429 u32 frame_count,
430 struct megasas_register_set __iomem *regs)
1341c939 431{
39a98554 432 unsigned long flags;
da0dc9fb 433
39a98554 434 spin_lock_irqsave(&instance->hba_lock, flags);
1341c939
SP		 435 writel((frame_phys_addr >> 3)|(frame_count),
436 &(regs)->inbound_queue_port);
39a98554 437 spin_unlock_irqrestore(&instance->hba_lock, flags);
438}
439
440/**
441 * megasas_adp_reset_xscale - For controller reset
442 * @regs: MFI register set
443 */
444static int
445megasas_adp_reset_xscale(struct megasas_instance *instance,
446 struct megasas_register_set __iomem *regs)
447{
448 u32 i;
449 u32 pcidata;
da0dc9fb 450
39a98554 451 writel(MFI_ADP_RESET, &regs->inbound_doorbell);
452
453 for (i = 0; i < 3; i++)
454 msleep(1000); /* sleep for 3 secs */
455 pcidata = 0;
456 pci_read_config_dword(instance->pdev, MFI_1068_PCSR_OFFSET, &pcidata);
1be18254 457 dev_notice(&instance->pdev->dev, "pcidata = %x\n", pcidata);
39a98554 458 if (pcidata & 0x2) {
1be18254 459 dev_notice(&instance->pdev->dev, "mfi 1068 offset read=%x\n", pcidata);
39a98554 460 pcidata &= ~0x2;
461 pci_write_config_dword(instance->pdev,
462 MFI_1068_PCSR_OFFSET, pcidata);
463
464 for (i = 0; i < 2; i++)
465 msleep(1000); /* need to wait 2 secs again */
466
467 pcidata = 0;
468 pci_read_config_dword(instance->pdev,
469 MFI_1068_FW_HANDSHAKE_OFFSET, &pcidata);
1be18254 470 dev_notice(&instance->pdev->dev, "1068 offset handshake read=%x\n", pcidata);
39a98554 471 if ((pcidata & 0xffff0000) == MFI_1068_FW_READY) {
1be18254 472 dev_notice(&instance->pdev->dev, "1068 offset pcidt=%x\n", pcidata);
39a98554 473 pcidata = 0;
474 pci_write_config_dword(instance->pdev,
475 MFI_1068_FW_HANDSHAKE_OFFSET, pcidata);
476 }
477 }
478 return 0;
479}
480
481/**
482 * megasas_check_reset_xscale - For controller reset check
483 * @regs: MFI register set
484 */
485static int
486megasas_check_reset_xscale(struct megasas_instance *instance,
487 struct megasas_register_set __iomem *regs)
488{
8a01a41d 489 if ((atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) &&
94cd65dd
SS		 490 (le32_to_cpu(*instance->consumer) ==
491 MEGASAS_ADPRESET_INPROG_SIGN))
39a98554 492 return 1;
39a98554 493 return 0;
1341c939
SP		 494}
495
496static struct megasas_instance_template megasas_instance_template_xscale = {
497
498 .fire_cmd = megasas_fire_cmd_xscale,
499 .enable_intr = megasas_enable_intr_xscale,
b274cab7 500 .disable_intr = megasas_disable_intr_xscale,
1341c939
SP		 501 .clear_intr = megasas_clear_intr_xscale,
502 .read_fw_status_reg = megasas_read_fw_status_reg_xscale,
39a98554 503 .adp_reset = megasas_adp_reset_xscale,
504 .check_reset = megasas_check_reset_xscale,
cd50ba8e
AR		 505 .service_isr = megasas_isr,
506 .tasklet = megasas_complete_cmd_dpc,
507 .init_adapter = megasas_init_adapter_mfi,
508 .build_and_issue_cmd = megasas_build_and_issue_cmd,
509 .issue_dcmd = megasas_issue_dcmd,
1341c939
SP		 510};
511
512/**
0d49016b 513* This is the end of set of functions & definitions specific
1341c939
SP		 514* to xscale (deviceid : 1064R, PERC5) controllers
515*/
516
f9876f0b 517/**
0d49016b 518* The following functions are defined for ppc (deviceid : 0x60)
da0dc9fb 519* controllers
f9876f0b
SP		 520*/
521
522/**
523 * megasas_enable_intr_ppc - Enables interrupts
524 * @regs: MFI register set
525 */
526static inline void
d46a3ad6 527megasas_enable_intr_ppc(struct megasas_instance *instance)
f9876f0b 528{
d46a3ad6 529 struct megasas_register_set __iomem *regs;
da0dc9fb 530
d46a3ad6 531 regs = instance->reg_set;
f9876f0b 532 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
0d49016b 533
39a98554 534 writel(~0x80000000, &(regs)->outbound_intr_mask);
f9876f0b
SP		 535
536 /* Dummy readl to force pci flush */
537 readl(&regs->outbound_intr_mask);
538}
539
b274cab7
SP		 540/**
541 * megasas_disable_intr_ppc - Disable interrupt
542 * @regs: MFI register set
543 */
544static inline void
d46a3ad6 545megasas_disable_intr_ppc(struct megasas_instance *instance)
b274cab7 546{
d46a3ad6 547 struct megasas_register_set __iomem *regs;
b274cab7 548 u32 mask = 0xFFFFFFFF;
da0dc9fb 549
d46a3ad6 550 regs = instance->reg_set;
b274cab7
SP		 551 writel(mask, &regs->outbound_intr_mask);
552 /* Dummy readl to force pci flush */
553 readl(&regs->outbound_intr_mask);
554}
555
f9876f0b
SP		 556/**
557 * megasas_read_fw_status_reg_ppc - returns the current FW status value
558 * @regs: MFI register set
559 */
560static u32
561megasas_read_fw_status_reg_ppc(struct megasas_register_set __iomem * regs)
562{
563 return readl(&(regs)->outbound_scratch_pad);
564}
565
566/**
567 * megasas_clear_interrupt_ppc - Check & clear interrupt
568 * @regs: MFI register set
569 */
0d49016b 570static int
f9876f0b
SP		 571megasas_clear_intr_ppc(struct megasas_register_set __iomem * regs)
572{
3cc6851f
AR		 573 u32 status, mfiStatus = 0;
574
f9876f0b
SP		 575 /*
576 * Check if it is our interrupt
577 */
578 status = readl(&regs->outbound_intr_status);
579
3cc6851f
AR		 580 if (status & MFI_REPLY_1078_MESSAGE_INTERRUPT)
581 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
582
583 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT)
584 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
f9876f0b
SP		 585
586 /*
587 * Clear the interrupt by writing back the same value
588 */
589 writel(status, &regs->outbound_doorbell_clear);
590
06f579de
YB		 591 /* Dummy readl to force pci flush */
592 readl(&regs->outbound_doorbell_clear);
593
3cc6851f 594 return mfiStatus;
f9876f0b 595}
3cc6851f 596
f9876f0b
SP		 597/**
598 * megasas_fire_cmd_ppc - Sends command to the FW
599 * @frame_phys_addr : Physical address of cmd
600 * @frame_count : Number of frames for the command
601 * @regs : MFI register set
602 */
0d49016b 603static inline void
0c79e681
YB		 604megasas_fire_cmd_ppc(struct megasas_instance *instance,
605 dma_addr_t frame_phys_addr,
606 u32 frame_count,
607 struct megasas_register_set __iomem *regs)
f9876f0b 608{
39a98554 609 unsigned long flags;
da0dc9fb 610
39a98554 611 spin_lock_irqsave(&instance->hba_lock, flags);
0d49016b 612 writel((frame_phys_addr | (frame_count<<1))|1,
f9876f0b 613 &(regs)->inbound_queue_port);
39a98554 614 spin_unlock_irqrestore(&instance->hba_lock, flags);
f9876f0b
SP		 615}
616
39a98554 617/**
618 * megasas_check_reset_ppc - For controller reset check
619 * @regs: MFI register set
620 */
621static int
622megasas_check_reset_ppc(struct megasas_instance *instance,
623 struct megasas_register_set __iomem *regs)
624{
8a01a41d 625 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
3cc6851f
AR		 626 return 1;
627
39a98554 628 return 0;
629}
3cc6851f 630
f9876f0b 631static struct megasas_instance_template megasas_instance_template_ppc = {
0d49016b 632
f9876f0b
SP		 633 .fire_cmd = megasas_fire_cmd_ppc,
634 .enable_intr = megasas_enable_intr_ppc,
b274cab7 635 .disable_intr = megasas_disable_intr_ppc,
f9876f0b
SP		 636 .clear_intr = megasas_clear_intr_ppc,
637 .read_fw_status_reg = megasas_read_fw_status_reg_ppc,
3cc6851f 638 .adp_reset = megasas_adp_reset_xscale,
39a98554 639 .check_reset = megasas_check_reset_ppc,
cd50ba8e
AR		 640 .service_isr = megasas_isr,
641 .tasklet = megasas_complete_cmd_dpc,
642 .init_adapter = megasas_init_adapter_mfi,
643 .build_and_issue_cmd = megasas_build_and_issue_cmd,
644 .issue_dcmd = megasas_issue_dcmd,
f9876f0b
SP		 645};
646
87911122
YB		 647/**
648 * megasas_enable_intr_skinny - Enables interrupts
649 * @regs: MFI register set
650 */
651static inline void
d46a3ad6 652megasas_enable_intr_skinny(struct megasas_instance *instance)
87911122 653{
d46a3ad6 654 struct megasas_register_set __iomem *regs;
da0dc9fb 655
d46a3ad6 656 regs = instance->reg_set;
87911122
YB		 657 writel(0xFFFFFFFF, &(regs)->outbound_intr_mask);
658
659 writel(~MFI_SKINNY_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
660
661 /* Dummy readl to force pci flush */
662 readl(&regs->outbound_intr_mask);
663}
664
665/**
666 * megasas_disable_intr_skinny - Disables interrupt
667 * @regs: MFI register set
668 */
669static inline void
d46a3ad6 670megasas_disable_intr_skinny(struct megasas_instance *instance)
87911122 671{
d46a3ad6 672 struct megasas_register_set __iomem *regs;
87911122 673 u32 mask = 0xFFFFFFFF;
da0dc9fb 674
d46a3ad6 675 regs = instance->reg_set;
87911122
YB		 676 writel(mask, &regs->outbound_intr_mask);
677 /* Dummy readl to force pci flush */
678 readl(&regs->outbound_intr_mask);
679}
680
681/**
682 * megasas_read_fw_status_reg_skinny - returns the current FW status value
683 * @regs: MFI register set
684 */
685static u32
686megasas_read_fw_status_reg_skinny(struct megasas_register_set __iomem *regs)
687{
688 return readl(&(regs)->outbound_scratch_pad);
689}
690
691/**
692 * megasas_clear_interrupt_skinny - Check & clear interrupt
693 * @regs: MFI register set
694 */
695static int
696megasas_clear_intr_skinny(struct megasas_register_set __iomem *regs)
697{
698 u32 status;
ebf054b0
AR		 699 u32 mfiStatus = 0;
700
87911122
YB		 701 /*
702 * Check if it is our interrupt
703 */
704 status = readl(&regs->outbound_intr_status);
705
706 if (!(status & MFI_SKINNY_ENABLE_INTERRUPT_MASK)) {
39a98554 707 return 0;
87911122
YB		 708 }
709
ebf054b0
AR		 710 /*
711 * Check if it is our interrupt
712 */
a3fda7dd 713 if ((megasas_read_fw_status_reg_skinny(regs) & MFI_STATE_MASK) ==
ebf054b0
AR		 714 MFI_STATE_FAULT) {
715 mfiStatus = MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
716 } else
717 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
718
87911122
YB		 719 /*
720 * Clear the interrupt by writing back the same value
721 */
722 writel(status, &regs->outbound_intr_status);
723
724 /*
da0dc9fb
BH		 725 * dummy read to flush PCI
726 */
87911122
YB		 727 readl(&regs->outbound_intr_status);
728
ebf054b0 729 return mfiStatus;
87911122
YB		 730}
731
732/**
733 * megasas_fire_cmd_skinny - Sends command to the FW
734 * @frame_phys_addr : Physical address of cmd
735 * @frame_count : Number of frames for the command
736 * @regs : MFI register set
737 */
738static inline void
0c79e681
YB		 739megasas_fire_cmd_skinny(struct megasas_instance *instance,
740 dma_addr_t frame_phys_addr,
741 u32 frame_count,
87911122
YB		 742 struct megasas_register_set __iomem *regs)
743{
0c79e681 744 unsigned long flags;
da0dc9fb 745
39a98554 746 spin_lock_irqsave(&instance->hba_lock, flags);
94cd65dd
SS		 747 writel(upper_32_bits(frame_phys_addr),
748 &(regs)->inbound_high_queue_port);
749 writel((lower_32_bits(frame_phys_addr) | (frame_count<<1))|1,
750 &(regs)->inbound_low_queue_port);
b99dbe56 751 mmiowb();
39a98554 752 spin_unlock_irqrestore(&instance->hba_lock, flags);
753}
754
39a98554 755/**
756 * megasas_check_reset_skinny - For controller reset check
757 * @regs: MFI register set
758 */
759static int
760megasas_check_reset_skinny(struct megasas_instance *instance,
761 struct megasas_register_set __iomem *regs)
762{
8a01a41d 763 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
3cc6851f
AR		 764 return 1;
765
39a98554 766 return 0;
87911122
YB		 767}
768
769static struct megasas_instance_template megasas_instance_template_skinny = {
770
771 .fire_cmd = megasas_fire_cmd_skinny,
772 .enable_intr = megasas_enable_intr_skinny,
773 .disable_intr = megasas_disable_intr_skinny,
774 .clear_intr = megasas_clear_intr_skinny,
775 .read_fw_status_reg = megasas_read_fw_status_reg_skinny,
ebf054b0 776 .adp_reset = megasas_adp_reset_gen2,
39a98554 777 .check_reset = megasas_check_reset_skinny,
cd50ba8e
AR		 778 .service_isr = megasas_isr,
779 .tasklet = megasas_complete_cmd_dpc,
780 .init_adapter = megasas_init_adapter_mfi,
781 .build_and_issue_cmd = megasas_build_and_issue_cmd,
782 .issue_dcmd = megasas_issue_dcmd,
87911122
YB		 783};
784
785
6610a6b3
YB		 786/**
787* The following functions are defined for gen2 (deviceid : 0x78 0x79)
788* controllers
789*/
790
791/**
792 * megasas_enable_intr_gen2 - Enables interrupts
793 * @regs: MFI register set
794 */
795static inline void
d46a3ad6 796megasas_enable_intr_gen2(struct megasas_instance *instance)
6610a6b3 797{
d46a3ad6 798 struct megasas_register_set __iomem *regs;
da0dc9fb 799
d46a3ad6 800 regs = instance->reg_set;
6610a6b3
YB		 801 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
802
803 /* write ~0x00000005 (4 & 1) to the intr mask*/
804 writel(~MFI_GEN2_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
805
806 /* Dummy readl to force pci flush */
807 readl(&regs->outbound_intr_mask);
808}
809
810/**
811 * megasas_disable_intr_gen2 - Disables interrupt
812 * @regs: MFI register set
813 */
814static inline void
d46a3ad6 815megasas_disable_intr_gen2(struct megasas_instance *instance)
6610a6b3 816{
d46a3ad6 817 struct megasas_register_set __iomem *regs;
6610a6b3 818 u32 mask = 0xFFFFFFFF;
da0dc9fb 819
d46a3ad6 820 regs = instance->reg_set;
6610a6b3
YB		 821 writel(mask, &regs->outbound_intr_mask);
822 /* Dummy readl to force pci flush */
823 readl(&regs->outbound_intr_mask);
824}
825
826/**
827 * megasas_read_fw_status_reg_gen2 - returns the current FW status value
828 * @regs: MFI register set
829 */
830static u32
831megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs)
832{
833 return readl(&(regs)->outbound_scratch_pad);
834}
835
836/**
837 * megasas_clear_interrupt_gen2 - Check & clear interrupt
838 * @regs: MFI register set
839 */
840static int
841megasas_clear_intr_gen2(struct megasas_register_set __iomem *regs)
842{
843 u32 status;
39a98554 844 u32 mfiStatus = 0;
da0dc9fb 845
6610a6b3
YB		 846 /*
847 * Check if it is our interrupt
848 */
849 status = readl(&regs->outbound_intr_status);
850
b5bccadd 851 if (status & MFI_INTR_FLAG_REPLY_MESSAGE) {
39a98554 852 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
853 }
854 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT) {
855 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
856 }
6610a6b3
YB		 857
858 /*
859 * Clear the interrupt by writing back the same value
860 */
39a98554 861 if (mfiStatus)
862 writel(status, &regs->outbound_doorbell_clear);
6610a6b3
YB		 863
864 /* Dummy readl to force pci flush */
865 readl(&regs->outbound_intr_status);
866
39a98554 867 return mfiStatus;
6610a6b3
YB		 868}
869/**
870 * megasas_fire_cmd_gen2 - Sends command to the FW
871 * @frame_phys_addr : Physical address of cmd
872 * @frame_count : Number of frames for the command
873 * @regs : MFI register set
874 */
875static inline void
0c79e681
YB		 876megasas_fire_cmd_gen2(struct megasas_instance *instance,
877 dma_addr_t frame_phys_addr,
878 u32 frame_count,
6610a6b3
YB		 879 struct megasas_register_set __iomem *regs)
880{
39a98554 881 unsigned long flags;
da0dc9fb 882
39a98554 883 spin_lock_irqsave(&instance->hba_lock, flags);
6610a6b3
YB		 884 writel((frame_phys_addr | (frame_count<<1))|1,
885 &(regs)->inbound_queue_port);
39a98554 886 spin_unlock_irqrestore(&instance->hba_lock, flags);
887}
888
889/**
890 * megasas_adp_reset_gen2 - For controller reset
891 * @regs: MFI register set
892 */
893static int
894megasas_adp_reset_gen2(struct megasas_instance *instance,
895 struct megasas_register_set __iomem *reg_set)
896{
da0dc9fb
BH		 897 u32 retry = 0 ;
898 u32 HostDiag;
899 u32 __iomem *seq_offset = &reg_set->seq_offset;
900 u32 __iomem *hostdiag_offset = &reg_set->host_diag;
ebf054b0
AR		 901
902 if (instance->instancet == &megasas_instance_template_skinny) {
903 seq_offset = &reg_set->fusion_seq_offset;
904 hostdiag_offset = &reg_set->fusion_host_diag;
905 }
906
907 writel(0, seq_offset);
908 writel(4, seq_offset);
909 writel(0xb, seq_offset);
910 writel(2, seq_offset);
911 writel(7, seq_offset);
912 writel(0xd, seq_offset);
39a98554 913
39a98554 914 msleep(1000);
915
ebf054b0 916 HostDiag = (u32)readl(hostdiag_offset);
39a98554 917
da0dc9fb 918 while (!(HostDiag & DIAG_WRITE_ENABLE)) {
39a98554 919 msleep(100);
ebf054b0 920 HostDiag = (u32)readl(hostdiag_offset);
1be18254 921 dev_notice(&instance->pdev->dev, "RESETGEN2: retry=%x, hostdiag=%x\n",
39a98554 922 retry, HostDiag);
923
924 if (retry++ >= 100)
925 return 1;
926
927 }
928
1be18254 929 dev_notice(&instance->pdev->dev, "ADP_RESET_GEN2: HostDiag=%x\n", HostDiag);
39a98554 930
ebf054b0 931 writel((HostDiag | DIAG_RESET_ADAPTER), hostdiag_offset);
39a98554 932
933 ssleep(10);
934
ebf054b0 935 HostDiag = (u32)readl(hostdiag_offset);
da0dc9fb 936 while (HostDiag & DIAG_RESET_ADAPTER) {
39a98554 937 msleep(100);
ebf054b0 938 HostDiag = (u32)readl(hostdiag_offset);
1be18254 939 dev_notice(&instance->pdev->dev, "RESET_GEN2: retry=%x, hostdiag=%x\n",
39a98554 940 retry, HostDiag);
941
942 if (retry++ >= 1000)
943 return 1;
944
945 }
946 return 0;
947}
948
949/**
950 * megasas_check_reset_gen2 - For controller reset check
951 * @regs: MFI register set
952 */
953static int
954megasas_check_reset_gen2(struct megasas_instance *instance,
955 struct megasas_register_set __iomem *regs)
956{
8a01a41d 957 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
707e09bd 958 return 1;
707e09bd 959
39a98554 960 return 0;
6610a6b3
YB		 961}
962
963static struct megasas_instance_template megasas_instance_template_gen2 = {
964
965 .fire_cmd = megasas_fire_cmd_gen2,
966 .enable_intr = megasas_enable_intr_gen2,
967 .disable_intr = megasas_disable_intr_gen2,
968 .clear_intr = megasas_clear_intr_gen2,
969 .read_fw_status_reg = megasas_read_fw_status_reg_gen2,
39a98554 970 .adp_reset = megasas_adp_reset_gen2,
971 .check_reset = megasas_check_reset_gen2,
cd50ba8e
AR		 972 .service_isr = megasas_isr,
973 .tasklet = megasas_complete_cmd_dpc,
974 .init_adapter = megasas_init_adapter_mfi,
975 .build_and_issue_cmd = megasas_build_and_issue_cmd,
976 .issue_dcmd = megasas_issue_dcmd,
6610a6b3
YB		 977};
978
f9876f0b
SP		 979/**
980* This is the end of set of functions & definitions
39a98554 981* specific to gen2 (deviceid : 0x78, 0x79) controllers
f9876f0b
SP		 982*/
983
9c915a8c
AR		 984/*
985 * Template added for TB (Fusion)
986 */
987extern struct megasas_instance_template megasas_instance_template_fusion;
988
c4a3e0a5
BS		 989/**
990 * megasas_issue_polled - Issues a polling command
991 * @instance: Adapter soft state
0d49016b 992 * @cmd: Command packet to be issued
c4a3e0a5 993 *
2be2a988 994 * For polling, MFI requires the cmd_status to be set to MFI_STAT_INVALID_STATUS before posting.
c4a3e0a5 995 */
9c915a8c 996int
c4a3e0a5
BS		 997megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd)
998{
c4a3e0a5
BS		 999 struct megasas_header *frame_hdr = &cmd->frame->hdr;
1000
6d40afbc 1001 frame_hdr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd 1002 frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE);
c4a3e0a5 1003
f4fc2093 1004 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
6d40afbc
SS		 1005 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1006 __func__, __LINE__);
1007 return DCMD_NOT_FIRED;
1008 }
c4a3e0a5 1009
f4fc2093
S		 1010 instance->instancet->issue_dcmd(instance, cmd);
1011
6d40afbc
SS		 1012 return wait_and_poll(instance, cmd, instance->requestorId ?
1013 MEGASAS_ROUTINE_WAIT_TIME_VF : MFI_IO_TIMEOUT_SECS);
c4a3e0a5
BS		 1014}
1015
1016/**
1017 * megasas_issue_blocked_cmd - Synchronous wrapper around regular FW cmds
1018 * @instance: Adapter soft state
1019 * @cmd: Command to be issued
cfbe7554 1020 * @timeout: Timeout in seconds
c4a3e0a5
BS		 1021 *
1022 * This function waits on an event for the command to be returned from ISR.
2a3681e5 1023 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 1024 * Used to issue ioctl commands.
1025 */
90dc9d98 1026int
c4a3e0a5 1027megasas_issue_blocked_cmd(struct megasas_instance *instance,
cfbe7554 1028 struct megasas_cmd *cmd, int timeout)
c4a3e0a5 1029{
cfbe7554 1030 int ret = 0;
2be2a988 1031 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1032
f4fc2093 1033 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
6d40afbc
SS		 1034 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1035 __func__, __LINE__);
1036 return DCMD_NOT_FIRED;
1037 }
1038
f4fc2093
S		 1039 instance->instancet->issue_dcmd(instance, cmd);
1040
cfbe7554
SS		 1041 if (timeout) {
1042 ret = wait_event_timeout(instance->int_cmd_wait_q,
2be2a988 1043 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
6d40afbc
SS		 1044 if (!ret) {
1045 dev_err(&instance->pdev->dev, "Failed from %s %d DCMD Timed out\n",
1046 __func__, __LINE__);
1047 return DCMD_TIMEOUT;
1048 }
cfbe7554
SS		 1049 } else
1050 wait_event(instance->int_cmd_wait_q,
2be2a988 1051 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
c4a3e0a5 1052
2be2a988 1053 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
6d40afbc 1054 DCMD_SUCCESS : DCMD_FAILED;
c4a3e0a5
BS		 1055}
1056
1057/**
1058 * megasas_issue_blocked_abort_cmd - Aborts previously issued cmd
1059 * @instance: Adapter soft state
1060 * @cmd_to_abort: Previously issued cmd to be aborted
cfbe7554 1061 * @timeout: Timeout in seconds
c4a3e0a5 1062 *
cfbe7554 1063 * MFI firmware can abort previously issued AEN comamnd (automatic event
c4a3e0a5 1064 * notification). The megasas_issue_blocked_abort_cmd() issues such abort
2a3681e5
SP		 1065 * cmd and waits for return status.
1066 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 1067 */
1068static int
1069megasas_issue_blocked_abort_cmd(struct megasas_instance *instance,
cfbe7554 1070 struct megasas_cmd *cmd_to_abort, int timeout)
c4a3e0a5
BS		 1071{
1072 struct megasas_cmd *cmd;
1073 struct megasas_abort_frame *abort_fr;
cfbe7554 1074 int ret = 0;
c4a3e0a5
BS		 1075
1076 cmd = megasas_get_cmd(instance);
1077
1078 if (!cmd)
1079 return -1;
1080
1081 abort_fr = &cmd->frame->abort;
1082
1083 /*
1084 * Prepare and issue the abort frame
1085 */
1086 abort_fr->cmd = MFI_CMD_ABORT;
2be2a988 1087 abort_fr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 1088 abort_fr->flags = cpu_to_le16(0);
1089 abort_fr->abort_context = cpu_to_le32(cmd_to_abort->index);
1090 abort_fr->abort_mfi_phys_addr_lo =
1091 cpu_to_le32(lower_32_bits(cmd_to_abort->frame_phys_addr));
1092 abort_fr->abort_mfi_phys_addr_hi =
1093 cpu_to_le32(upper_32_bits(cmd_to_abort->frame_phys_addr));
c4a3e0a5
BS		 1094
1095 cmd->sync_cmd = 1;
2be2a988 1096 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1097
f4fc2093 1098 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
6d40afbc
SS		 1099 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1100 __func__, __LINE__);
1101 return DCMD_NOT_FIRED;
1102 }
c4a3e0a5 1103
f4fc2093
S		 1104 instance->instancet->issue_dcmd(instance, cmd);
1105
cfbe7554
SS		 1106 if (timeout) {
1107 ret = wait_event_timeout(instance->abort_cmd_wait_q,
2be2a988 1108 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
cfbe7554 1109 if (!ret) {
6d40afbc
SS		 1110 dev_err(&instance->pdev->dev, "Failed from %s %d Abort Timed out\n",
1111 __func__, __LINE__);
1112 return DCMD_TIMEOUT;
cfbe7554
SS		 1113 }
1114 } else
1115 wait_event(instance->abort_cmd_wait_q,
2be2a988 1116 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
cfbe7554 1117
39a98554 1118 cmd->sync_cmd = 0;
c4a3e0a5
BS		 1119
1120 megasas_return_cmd(instance, cmd);
6d40afbc
SS		 1121 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
1122 DCMD_SUCCESS : DCMD_FAILED;
c4a3e0a5
BS		 1123}
1124
1125/**
1126 * megasas_make_sgl32 - Prepares 32-bit SGL
1127 * @instance: Adapter soft state
1128 * @scp: SCSI command from the mid-layer
1129 * @mfi_sgl: SGL to be filled in
1130 *
1131 * If successful, this function returns the number of SG elements. Otherwise,
1132 * it returnes -1.
1133 */
858119e1 1134static int
c4a3e0a5
BS		 1135megasas_make_sgl32(struct megasas_instance *instance, struct scsi_cmnd *scp,
1136 union megasas_sgl *mfi_sgl)
1137{
1138 int i;
1139 int sge_count;
1140 struct scatterlist *os_sgl;
1141
155d98f0
FT		 1142 sge_count = scsi_dma_map(scp);
1143 BUG_ON(sge_count < 0);
c4a3e0a5 1144
155d98f0
FT		 1145 if (sge_count) {
1146 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1147 mfi_sgl->sge32[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1148 mfi_sgl->sge32[i].phys_addr = cpu_to_le32(sg_dma_address(os_sgl));
155d98f0 1149 }
c4a3e0a5 1150 }
c4a3e0a5
BS		 1151 return sge_count;
1152}
1153
1154/**
1155 * megasas_make_sgl64 - Prepares 64-bit SGL
1156 * @instance: Adapter soft state
1157 * @scp: SCSI command from the mid-layer
1158 * @mfi_sgl: SGL to be filled in
1159 *
1160 * If successful, this function returns the number of SG elements. Otherwise,
1161 * it returnes -1.
1162 */
858119e1 1163static int
c4a3e0a5
BS		 1164megasas_make_sgl64(struct megasas_instance *instance, struct scsi_cmnd *scp,
1165 union megasas_sgl *mfi_sgl)
1166{
1167 int i;
1168 int sge_count;
1169 struct scatterlist *os_sgl;
1170
155d98f0
FT		 1171 sge_count = scsi_dma_map(scp);
1172 BUG_ON(sge_count < 0);
c4a3e0a5 1173
155d98f0
FT		 1174 if (sge_count) {
1175 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1176 mfi_sgl->sge64[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1177 mfi_sgl->sge64[i].phys_addr = cpu_to_le64(sg_dma_address(os_sgl));
155d98f0 1178 }
c4a3e0a5 1179 }
c4a3e0a5
BS		 1180 return sge_count;
1181}
1182
f4c9a131
YB		 1183/**
1184 * megasas_make_sgl_skinny - Prepares IEEE SGL
1185 * @instance: Adapter soft state
1186 * @scp: SCSI command from the mid-layer
1187 * @mfi_sgl: SGL to be filled in
1188 *
1189 * If successful, this function returns the number of SG elements. Otherwise,
1190 * it returnes -1.
1191 */
1192static int
1193megasas_make_sgl_skinny(struct megasas_instance *instance,
1194 struct scsi_cmnd *scp, union megasas_sgl *mfi_sgl)
1195{
1196 int i;
1197 int sge_count;
1198 struct scatterlist *os_sgl;
1199
1200 sge_count = scsi_dma_map(scp);
1201
1202 if (sge_count) {
1203 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1204 mfi_sgl->sge_skinny[i].length =
1205 cpu_to_le32(sg_dma_len(os_sgl));
f4c9a131 1206 mfi_sgl->sge_skinny[i].phys_addr =
94cd65dd
SS		 1207 cpu_to_le64(sg_dma_address(os_sgl));
1208 mfi_sgl->sge_skinny[i].flag = cpu_to_le32(0);
f4c9a131
YB		 1209 }
1210 }
1211 return sge_count;
1212}
1213
b1df99d9
SP		 1214 /**
1215 * megasas_get_frame_count - Computes the number of frames
d532dbe2 1216 * @frame_type : type of frame- io or pthru frame
b1df99d9
SP		 1217 * @sge_count : number of sg elements
1218 *
1219 * Returns the number of frames required for numnber of sge's (sge_count)
1220 */
1221
f4c9a131
YB		 1222static u32 megasas_get_frame_count(struct megasas_instance *instance,
1223 u8 sge_count, u8 frame_type)
b1df99d9
SP		 1224{
1225 int num_cnt;
1226 int sge_bytes;
1227 u32 sge_sz;
da0dc9fb 1228 u32 frame_count = 0;
b1df99d9
SP		 1229
1230 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
1231 sizeof(struct megasas_sge32);
1232
f4c9a131
YB		 1233 if (instance->flag_ieee) {
1234 sge_sz = sizeof(struct megasas_sge_skinny);
1235 }
1236
b1df99d9 1237 /*
d532dbe2 1238 * Main frame can contain 2 SGEs for 64-bit SGLs and
1239 * 3 SGEs for 32-bit SGLs for ldio &
1240 * 1 SGEs for 64-bit SGLs and
1241 * 2 SGEs for 32-bit SGLs for pthru frame
1242 */
1243 if (unlikely(frame_type == PTHRU_FRAME)) {
f4c9a131
YB		 1244 if (instance->flag_ieee == 1) {
1245 num_cnt = sge_count - 1;
1246 } else if (IS_DMA64)
d532dbe2 1247 num_cnt = sge_count - 1;
1248 else
1249 num_cnt = sge_count - 2;
1250 } else {
f4c9a131
YB		 1251 if (instance->flag_ieee == 1) {
1252 num_cnt = sge_count - 1;
1253 } else if (IS_DMA64)
d532dbe2 1254 num_cnt = sge_count - 2;
1255 else
1256 num_cnt = sge_count - 3;
1257 }
b1df99d9 1258
da0dc9fb 1259 if (num_cnt > 0) {
b1df99d9
SP		 1260 sge_bytes = sge_sz * num_cnt;
1261
1262 frame_count = (sge_bytes / MEGAMFI_FRAME_SIZE) +
1263 ((sge_bytes % MEGAMFI_FRAME_SIZE) ? 1 : 0) ;
1264 }
1265 /* Main frame */
da0dc9fb 1266 frame_count += 1;
b1df99d9
SP		 1267
1268 if (frame_count > 7)
1269 frame_count = 8;
1270 return frame_count;
1271}
1272
c4a3e0a5
BS		 1273/**
1274 * megasas_build_dcdb - Prepares a direct cdb (DCDB) command
1275 * @instance: Adapter soft state
1276 * @scp: SCSI command
1277 * @cmd: Command to be prepared in
1278 *
1279 * This function prepares CDB commands. These are typcially pass-through
1280 * commands to the devices.
1281 */
858119e1 1282static int
c4a3e0a5
BS		 1283megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp,
1284 struct megasas_cmd *cmd)
1285{
c4a3e0a5
BS		 1286 u32 is_logical;
1287 u32 device_id;
1288 u16 flags = 0;
1289 struct megasas_pthru_frame *pthru;
1290
3cabd162 1291 is_logical = MEGASAS_IS_LOGICAL(scp->device);
4a5c814d 1292 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1293 pthru = (struct megasas_pthru_frame *)cmd->frame;
1294
1295 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1296 flags = MFI_FRAME_DIR_WRITE;
1297 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1298 flags = MFI_FRAME_DIR_READ;
1299 else if (scp->sc_data_direction == PCI_DMA_NONE)
1300 flags = MFI_FRAME_DIR_NONE;
1301
f4c9a131
YB		 1302 if (instance->flag_ieee == 1) {
1303 flags |= MFI_FRAME_IEEE;
1304 }
1305
c4a3e0a5
BS		 1306 /*
1307 * Prepare the DCDB frame
1308 */
1309 pthru->cmd = (is_logical) ? MFI_CMD_LD_SCSI_IO : MFI_CMD_PD_SCSI_IO;
1310 pthru->cmd_status = 0x0;
1311 pthru->scsi_status = 0x0;
1312 pthru->target_id = device_id;
1313 pthru->lun = scp->device->lun;
1314 pthru->cdb_len = scp->cmd_len;
1315 pthru->timeout = 0;
780a3762 1316 pthru->pad_0 = 0;
94cd65dd
SS		 1317 pthru->flags = cpu_to_le16(flags);
1318 pthru->data_xfer_len = cpu_to_le32(scsi_bufflen(scp));
c4a3e0a5
BS		 1319
1320 memcpy(pthru->cdb, scp->cmnd, scp->cmd_len);
1321
8d568253 1322 /*
da0dc9fb
BH		 1323 * If the command is for the tape device, set the
1324 * pthru timeout to the os layer timeout value.
1325 */
8d568253
YB		 1326 if (scp->device->type == TYPE_TAPE) {
1327 if ((scp->request->timeout / HZ) > 0xFFFF)
c6f5bf81 1328 pthru->timeout = cpu_to_le16(0xFFFF);
8d568253 1329 else
94cd65dd 1330 pthru->timeout = cpu_to_le16(scp->request->timeout / HZ);
8d568253
YB		 1331 }
1332
c4a3e0a5
BS		 1333 /*
1334 * Construct SGL
1335 */
f4c9a131 1336 if (instance->flag_ieee == 1) {
94cd65dd 1337 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1338 pthru->sge_count = megasas_make_sgl_skinny(instance, scp,
1339 &pthru->sgl);
1340 } else if (IS_DMA64) {
94cd65dd 1341 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1342 pthru->sge_count = megasas_make_sgl64(instance, scp,
1343 &pthru->sgl);
1344 } else
1345 pthru->sge_count = megasas_make_sgl32(instance, scp,
1346 &pthru->sgl);
1347
bdc6fb8d 1348 if (pthru->sge_count > instance->max_num_sge) {
1be18254 1349 dev_err(&instance->pdev->dev, "DCDB too many SGE NUM=%x\n",
bdc6fb8d
YB		 1350 pthru->sge_count);
1351 return 0;
1352 }
1353
c4a3e0a5
BS		 1354 /*
1355 * Sense info specific
1356 */
1357 pthru->sense_len = SCSI_SENSE_BUFFERSIZE;
94cd65dd
SS		 1358 pthru->sense_buf_phys_addr_hi =
1359 cpu_to_le32(upper_32_bits(cmd->sense_phys_addr));
1360 pthru->sense_buf_phys_addr_lo =
1361 cpu_to_le32(lower_32_bits(cmd->sense_phys_addr));
c4a3e0a5 1362
c4a3e0a5
BS		 1363 /*
1364 * Compute the total number of frames this command consumes. FW uses
1365 * this number to pull sufficient number of frames from host memory.
1366 */
f4c9a131 1367 cmd->frame_count = megasas_get_frame_count(instance, pthru->sge_count,
d532dbe2 1368 PTHRU_FRAME);
c4a3e0a5
BS		 1369
1370 return cmd->frame_count;
1371}
1372
1373/**
1374 * megasas_build_ldio - Prepares IOs to logical devices
1375 * @instance: Adapter soft state
1376 * @scp: SCSI command
fd589a8f 1377 * @cmd: Command to be prepared
c4a3e0a5
BS		 1378 *
1379 * Frames (and accompanying SGLs) for regular SCSI IOs use this function.
1380 */
858119e1 1381static int
c4a3e0a5
BS		 1382megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp,
1383 struct megasas_cmd *cmd)
1384{
c4a3e0a5
BS		 1385 u32 device_id;
1386 u8 sc = scp->cmnd[0];
1387 u16 flags = 0;
1388 struct megasas_io_frame *ldio;
1389
4a5c814d 1390 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1391 ldio = (struct megasas_io_frame *)cmd->frame;
1392
1393 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1394 flags = MFI_FRAME_DIR_WRITE;
1395 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1396 flags = MFI_FRAME_DIR_READ;
1397
f4c9a131
YB		 1398 if (instance->flag_ieee == 1) {
1399 flags |= MFI_FRAME_IEEE;
1400 }
1401
c4a3e0a5 1402 /*
b1df99d9 1403 * Prepare the Logical IO frame: 2nd bit is zero for all read cmds
c4a3e0a5
BS		 1404 */
1405 ldio->cmd = (sc & 0x02) ? MFI_CMD_LD_WRITE : MFI_CMD_LD_READ;
1406 ldio->cmd_status = 0x0;
1407 ldio->scsi_status = 0x0;
1408 ldio->target_id = device_id;
1409 ldio->timeout = 0;
1410 ldio->reserved_0 = 0;
1411 ldio->pad_0 = 0;
94cd65dd 1412 ldio->flags = cpu_to_le16(flags);
c4a3e0a5
BS		 1413 ldio->start_lba_hi = 0;
1414 ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0;
1415
1416 /*
1417 * 6-byte READ(0x08) or WRITE(0x0A) cdb
1418 */
1419 if (scp->cmd_len == 6) {
94cd65dd
SS		 1420 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[4]);
1421 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[1] << 16) |
1422 ((u32) scp->cmnd[2] << 8) |
1423 (u32) scp->cmnd[3]);
c4a3e0a5 1424
94cd65dd 1425 ldio->start_lba_lo &= cpu_to_le32(0x1FFFFF);
c4a3e0a5
BS		 1426 }
1427
1428 /*
1429 * 10-byte READ(0x28) or WRITE(0x2A) cdb
1430 */
1431 else if (scp->cmd_len == 10) {
94cd65dd
SS		 1432 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[8] |
1433 ((u32) scp->cmnd[7] << 8));
1434 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1435 ((u32) scp->cmnd[3] << 16) |
1436 ((u32) scp->cmnd[4] << 8) |
1437 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1438 }
1439
1440 /*
1441 * 12-byte READ(0xA8) or WRITE(0xAA) cdb
1442 */
1443 else if (scp->cmd_len == 12) {
94cd65dd
SS		 1444 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1445 ((u32) scp->cmnd[7] << 16) |
1446 ((u32) scp->cmnd[8] << 8) |
1447 (u32) scp->cmnd[9]);
c4a3e0a5 1448
94cd65dd
SS		 1449 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1450 ((u32) scp->cmnd[3] << 16) |
1451 ((u32) scp->cmnd[4] << 8) |
1452 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1453 }
1454
1455 /*
1456 * 16-byte READ(0x88) or WRITE(0x8A) cdb
1457 */
1458 else if (scp->cmd_len == 16) {
94cd65dd
SS		 1459 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[10] << 24) |
1460 ((u32) scp->cmnd[11] << 16) |
1461 ((u32) scp->cmnd[12] << 8) |
1462 (u32) scp->cmnd[13]);
c4a3e0a5 1463
94cd65dd
SS		 1464 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1465 ((u32) scp->cmnd[7] << 16) |
1466 ((u32) scp->cmnd[8] << 8) |
1467 (u32) scp->cmnd[9]);
c4a3e0a5 1468
94cd65dd
SS		 1469 ldio->start_lba_hi = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1470 ((u32) scp->cmnd[3] << 16) |
1471 ((u32) scp->cmnd[4] << 8) |
1472 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1473
1474 }
1475
1476 /*
1477 * Construct SGL
1478 */
f4c9a131 1479 if (instance->flag_ieee) {
94cd65dd 1480 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1481 ldio->sge_count = megasas_make_sgl_skinny(instance, scp,
1482 &ldio->sgl);
1483 } else if (IS_DMA64) {
94cd65dd 1484 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1485 ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl);
1486 } else
1487 ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl);
1488
bdc6fb8d 1489 if (ldio->sge_count > instance->max_num_sge) {
1be18254 1490 dev_err(&instance->pdev->dev, "build_ld_io: sge_count = %x\n",
bdc6fb8d
YB		 1491 ldio->sge_count);
1492 return 0;
1493 }
1494
c4a3e0a5
BS		 1495 /*
1496 * Sense info specific
1497 */
1498 ldio->sense_len = SCSI_SENSE_BUFFERSIZE;
1499 ldio->sense_buf_phys_addr_hi = 0;
94cd65dd 1500 ldio->sense_buf_phys_addr_lo = cpu_to_le32(cmd->sense_phys_addr);
c4a3e0a5 1501
b1df99d9
SP		 1502 /*
1503 * Compute the total number of frames this command consumes. FW uses
1504 * this number to pull sufficient number of frames from host memory.
1505 */
f4c9a131
YB		 1506 cmd->frame_count = megasas_get_frame_count(instance,
1507 ldio->sge_count, IO_FRAME);
c4a3e0a5
BS		 1508
1509 return cmd->frame_count;
1510}
1511
1512/**
7497cde8
SS		 1513 * megasas_cmd_type - Checks if the cmd is for logical drive/sysPD
1514 * and whether it's RW or non RW
cb59aa6a 1515 * @scmd: SCSI command
0d49016b 1516 *
c4a3e0a5 1517 */
7497cde8 1518inline int megasas_cmd_type(struct scsi_cmnd *cmd)
c4a3e0a5 1519{
7497cde8
SS		 1520 int ret;
1521
cb59aa6a
SP		 1522 switch (cmd->cmnd[0]) {
1523 case READ_10:
1524 case WRITE_10:
1525 case READ_12:
1526 case WRITE_12:
1527 case READ_6:
1528 case WRITE_6:
1529 case READ_16:
1530 case WRITE_16:
3cabd162 1531 ret = (MEGASAS_IS_LOGICAL(cmd->device)) ?
7497cde8
SS		 1532 READ_WRITE_LDIO : READ_WRITE_SYSPDIO;
1533 break;
cb59aa6a 1534 default:
3cabd162 1535 ret = (MEGASAS_IS_LOGICAL(cmd->device)) ?
7497cde8 1536 NON_READ_WRITE_LDIO : NON_READ_WRITE_SYSPDIO;
c4a3e0a5 1537 }
7497cde8 1538 return ret;
c4a3e0a5
BS		 1539}
1540
658dcedb
SP		 1541 /**
1542 * megasas_dump_pending_frames - Dumps the frame address of all pending cmds
da0dc9fb 1543 * in FW
658dcedb
SP		 1544 * @instance: Adapter soft state
1545 */
1546static inline void
1547megasas_dump_pending_frames(struct megasas_instance *instance)
1548{
1549 struct megasas_cmd *cmd;
1550 int i,n;
1551 union megasas_sgl *mfi_sgl;
1552 struct megasas_io_frame *ldio;
1553 struct megasas_pthru_frame *pthru;
1554 u32 sgcount;
50b7f5a2 1555 u16 max_cmd = instance->max_fw_cmds;
658dcedb 1556
1be18254
BH		 1557 dev_err(&instance->pdev->dev, "[%d]: Dumping Frame Phys Address of all pending cmds in FW\n",instance->host->host_no);
1558 dev_err(&instance->pdev->dev, "[%d]: Total OS Pending cmds : %d\n",instance->host->host_no,atomic_read(&instance->fw_outstanding));
658dcedb 1559 if (IS_DMA64)
1be18254 1560 dev_err(&instance->pdev->dev, "[%d]: 64 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1561 else
1be18254 1562 dev_err(&instance->pdev->dev, "[%d]: 32 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1563
1be18254 1564 dev_err(&instance->pdev->dev, "[%d]: Pending OS cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1565 for (i = 0; i < max_cmd; i++) {
1566 cmd = instance->cmd_list[i];
da0dc9fb 1567 if (!cmd->scmd)
658dcedb 1568 continue;
1be18254 1569 dev_err(&instance->pdev->dev, "[%d]: Frame addr :0x%08lx : ",instance->host->host_no,(unsigned long)cmd->frame_phys_addr);
7497cde8 1570 if (megasas_cmd_type(cmd->scmd) == READ_WRITE_LDIO) {
658dcedb
SP		 1571 ldio = (struct megasas_io_frame *)cmd->frame;
1572 mfi_sgl = &ldio->sgl;
1573 sgcount = ldio->sge_count;
1be18254 1574 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x,"
94cd65dd
SS		 1575 " lba lo : 0x%x, lba_hi : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1576 instance->host->host_no, cmd->frame_count, ldio->cmd, ldio->target_id,
1577 le32_to_cpu(ldio->start_lba_lo), le32_to_cpu(ldio->start_lba_hi),
1578 le32_to_cpu(ldio->sense_buf_phys_addr_lo), sgcount);
da0dc9fb 1579 } else {
658dcedb
SP		 1580 pthru = (struct megasas_pthru_frame *) cmd->frame;
1581 mfi_sgl = &pthru->sgl;
1582 sgcount = pthru->sge_count;
1be18254 1583 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, "
94cd65dd
SS		 1584 "lun : 0x%x, cdb_len : 0x%x, data xfer len : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1585 instance->host->host_no, cmd->frame_count, pthru->cmd, pthru->target_id,
1586 pthru->lun, pthru->cdb_len, le32_to_cpu(pthru->data_xfer_len),
1587 le32_to_cpu(pthru->sense_buf_phys_addr_lo), sgcount);
658dcedb 1588 }
da0dc9fb
BH		 1589 if (megasas_dbg_lvl & MEGASAS_DBG_LVL) {
1590 for (n = 0; n < sgcount; n++) {
1591 if (IS_DMA64)
1592 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%llx\n",
1593 le32_to_cpu(mfi_sgl->sge64[n].length),
1594 le64_to_cpu(mfi_sgl->sge64[n].phys_addr));
1595 else
1596 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%x\n",
1597 le32_to_cpu(mfi_sgl->sge32[n].length),
1598 le32_to_cpu(mfi_sgl->sge32[n].phys_addr));
658dcedb
SP		 1599 }
1600 }
658dcedb 1601 } /*for max_cmd*/
1be18254 1602 dev_err(&instance->pdev->dev, "[%d]: Pending Internal cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1603 for (i = 0; i < max_cmd; i++) {
1604
1605 cmd = instance->cmd_list[i];
1606
da0dc9fb 1607 if (cmd->sync_cmd == 1)
1be18254 1608 dev_err(&instance->pdev->dev, "0x%08lx : ", (unsigned long)cmd->frame_phys_addr);
658dcedb 1609 }
1be18254 1610 dev_err(&instance->pdev->dev, "[%d]: Dumping Done\n\n",instance->host->host_no);
658dcedb
SP		 1611}
1612
cd50ba8e
AR		 1613u32
1614megasas_build_and_issue_cmd(struct megasas_instance *instance,
1615 struct scsi_cmnd *scmd)
1616{
1617 struct megasas_cmd *cmd;
1618 u32 frame_count;
1619
1620 cmd = megasas_get_cmd(instance);
1621 if (!cmd)
1622 return SCSI_MLQUEUE_HOST_BUSY;
1623
1624 /*
1625 * Logical drive command
1626 */
7497cde8 1627 if (megasas_cmd_type(scmd) == READ_WRITE_LDIO)
cd50ba8e
AR		 1628 frame_count = megasas_build_ldio(instance, scmd, cmd);
1629 else
1630 frame_count = megasas_build_dcdb(instance, scmd, cmd);
1631
1632 if (!frame_count)
1633 goto out_return_cmd;
1634
1635 cmd->scmd = scmd;
1636 scmd->SCp.ptr = (char *)cmd;
1637
1638 /*
1639 * Issue the command to the FW
1640 */
1641 atomic_inc(&instance->fw_outstanding);
1642
1643 instance->instancet->fire_cmd(instance, cmd->frame_phys_addr,
1644 cmd->frame_count-1, instance->reg_set);
cd50ba8e
AR		 1645
1646 return 0;
1647out_return_cmd:
1648 megasas_return_cmd(instance, cmd);
f9a9dee6 1649 return SCSI_MLQUEUE_HOST_BUSY;
cd50ba8e
AR		 1650}
1651
1652
c4a3e0a5
BS		 1653/**
1654 * megasas_queue_command - Queue entry point
1655 * @scmd: SCSI command to be queued
1656 * @done: Callback entry point
1657 */
1658static int
fb1a24ff 1659megasas_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd)
c4a3e0a5 1660{
c4a3e0a5 1661 struct megasas_instance *instance;
18365b13 1662 struct MR_PRIV_DEVICE *mr_device_priv_data;
c4a3e0a5
BS		 1663
1664 instance = (struct megasas_instance *)
1665 scmd->device->host->hostdata;
af37acfb 1666
aa00832b
SS		 1667 if (instance->unload == 1) {
1668 scmd->result = DID_NO_CONNECT << 16;
1669 scmd->scsi_done(scmd);
1670 return 0;
1671 }
1672
39a98554 1673 if (instance->issuepend_done == 0)
af37acfb
SP		 1674 return SCSI_MLQUEUE_HOST_BUSY;
1675
b09e66da 1676
229fe47c 1677 /* Check for an mpio path and adjust behavior */
8a01a41d 1678 if (atomic_read(&instance->adprecovery) == MEGASAS_ADPRESET_SM_INFAULT) {
229fe47c 1679 if (megasas_check_mpio_paths(instance, scmd) ==
f55cf47d 1680 (DID_REQUEUE << 16)) {
229fe47c
AR		 1681 return SCSI_MLQUEUE_HOST_BUSY;
1682 } else {
229fe47c 1683 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1684 scmd->scsi_done(scmd);
229fe47c
AR		 1685 return 0;
1686 }
1687 }
1688
8a01a41d 1689 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
229fe47c 1690 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1691 scmd->scsi_done(scmd);
b09e66da
SS		 1692 return 0;
1693 }
1694
18365b13
SS		 1695 mr_device_priv_data = scmd->device->hostdata;
1696 if (!mr_device_priv_data) {
18365b13
SS		 1697 scmd->result = DID_NO_CONNECT << 16;
1698 scmd->scsi_done(scmd);
1699 return 0;
1700 }
1701
8a01a41d 1702 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
39a98554 1703 return SCSI_MLQUEUE_HOST_BUSY;
39a98554 1704
8a01a41d 1705 if (mr_device_priv_data->tm_busy)
18365b13 1706 return SCSI_MLQUEUE_DEVICE_BUSY;
18365b13 1707
39a98554 1708
c4a3e0a5
BS		 1709 scmd->result = 0;
1710
3cabd162 1711 if (MEGASAS_IS_LOGICAL(scmd->device) &&
51087a86
SS		 1712 (scmd->device->id >= instance->fw_supported_vd_count ||
1713 scmd->device->lun)) {
cb59aa6a
SP		 1714 scmd->result = DID_BAD_TARGET << 16;
1715 goto out_done;
c4a3e0a5
BS		 1716 }
1717
3cabd162
S		 1718 if ((scmd->cmnd[0] == SYNCHRONIZE_CACHE) &&
1719 MEGASAS_IS_LOGICAL(scmd->device) &&
1720 (!instance->fw_sync_cache_support)) {
02b01e01
SP		 1721 scmd->result = DID_OK << 16;
1722 goto out_done;
02b01e01
SP		 1723 }
1724
f9a9dee6 1725 return instance->instancet->build_and_issue_cmd(instance, scmd);
cb59aa6a 1726
cb59aa6a 1727 out_done:
fb1a24ff 1728 scmd->scsi_done(scmd);
cb59aa6a 1729 return 0;
c4a3e0a5
BS		 1730}
1731
044833b5
YB		 1732static struct megasas_instance *megasas_lookup_instance(u16 host_no)
1733{
1734 int i;
1735
1736 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
1737
1738 if ((megasas_mgmt_info.instance[i]) &&
1739 (megasas_mgmt_info.instance[i]->host->host_no == host_no))
1740 return megasas_mgmt_info.instance[i];
1741 }
1742
1743 return NULL;
1744}
1745
0b48d12d 1746/*
15dd0381
S		 1747* megasas_set_dynamic_target_properties -
1748* Device property set by driver may not be static and it is required to be
1749* updated after OCR
1750*
1751* set tm_capable.
1752* set dma alignment (only for eedp protection enable vd).
0b48d12d 1753*
1754* @sdev: OS provided scsi device
1755*
1756* Returns void
1757*/
15dd0381 1758void megasas_set_dynamic_target_properties(struct scsi_device *sdev)
0b48d12d 1759{
15dd0381
S		 1760 u16 pd_index = 0, ld;
1761 u32 device_id;
0b48d12d 1762 struct megasas_instance *instance;
1763 struct fusion_context *fusion;
18365b13
SS		 1764 struct MR_PRIV_DEVICE *mr_device_priv_data;
1765 struct MR_PD_CFG_SEQ_NUM_SYNC *pd_sync;
0b48d12d 1766 struct MR_LD_RAID *raid;
1767 struct MR_DRV_RAID_MAP_ALL *local_map_ptr;
1768
1769 instance = megasas_lookup_instance(sdev->host->host_no);
1770 fusion = instance->ctrl_context;
18365b13 1771 mr_device_priv_data = sdev->hostdata;
0b48d12d 1772
ed981b81 1773 if (!fusion || !mr_device_priv_data)
0b48d12d 1774 return;
1775
ed981b81 1776 if (MEGASAS_IS_LOGICAL(sdev)) {
0b48d12d 1777 device_id = ((sdev->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL)
1778 + sdev->id;
1779 local_map_ptr = fusion->ld_drv_map[(instance->map_id & 1)];
1780 ld = MR_TargetIdToLdGet(device_id, local_map_ptr);
ed981b81
S		 1781 if (ld >= instance->fw_supported_vd_count)
1782 return;
0b48d12d 1783 raid = MR_LdRaidGet(ld, local_map_ptr);
1784
1785 if (raid->capability.ldPiMode == MR_PROT_INFO_TYPE_CONTROLLER)
15dd0381 1786 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
ed981b81 1787
18365b13
SS		 1788 mr_device_priv_data->is_tm_capable =
1789 raid->capability.tmCapable;
ed981b81
S		 1790 } else if (instance->use_seqnum_jbod_fp) {
1791 pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
15dd0381 1792 sdev->id;
ed981b81
S		 1793 pd_sync = (void *)fusion->pd_seq_sync
1794 [(instance->pd_seq_map_id - 1) & 1];
1795 mr_device_priv_data->is_tm_capable =
15dd0381 1796 pd_sync->seq[pd_index].capability.tmCapable;
0b48d12d 1797 }
1798}
1799
15dd0381
S		 1800/*
1801 * megasas_set_nvme_device_properties -
1802 * set nomerges=2
1803 * set virtual page boundary = 4K (current mr_nvme_pg_size is 4K).
1804 * set maximum io transfer = MDTS of NVME device provided by MR firmware.
1805 *
1806 * MR firmware provides value in KB. Caller of this function converts
1807 * kb into bytes.
1808 *
1809 * e.a MDTS=5 means 2^5 * nvme page size. (In case of 4K page size,
1810 * MR firmware provides value 128 as (32 * 4K) = 128K.
1811 *
1812 * @sdev: scsi device
1813 * @max_io_size: maximum io transfer size
1814 *
1815 */
1816static inline void
1817megasas_set_nvme_device_properties(struct scsi_device *sdev, u32 max_io_size)
2216c305 1818{
2216c305 1819 struct megasas_instance *instance;
15dd0381 1820 u32 mr_nvme_pg_size;
2216c305 1821
15dd0381
S		 1822 instance = (struct megasas_instance *)sdev->host->hostdata;
1823 mr_nvme_pg_size = max_t(u32, instance->nvme_page_size,
1824 MR_DEFAULT_NVME_PAGE_SIZE);
2216c305 1825
15dd0381 1826 blk_queue_max_hw_sectors(sdev->request_queue, (max_io_size / 512));
2216c305 1827
15dd0381
S		 1828 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, sdev->request_queue);
1829 blk_queue_virt_boundary(sdev->request_queue, mr_nvme_pg_size - 1);
1830}
2216c305 1831
2216c305 1832
15dd0381
S		 1833/*
1834 * megasas_set_static_target_properties -
1835 * Device property set by driver are static and it is not required to be
1836 * updated after OCR.
1837 *
1838 * set io timeout
1839 * set device queue depth
1840 * set nvme device properties. see - megasas_set_nvme_device_properties
1841 *
1842 * @sdev: scsi device
96188a89 1843 * @is_target_prop true, if fw provided target properties.
15dd0381 1844 */
96188a89
S		 1845static void megasas_set_static_target_properties(struct scsi_device *sdev,
1846 bool is_target_prop)
15dd0381
S		 1847{
1848 u16 target_index = 0;
1849 u8 interface_type;
1850 u32 device_qd = MEGASAS_DEFAULT_CMD_PER_LUN;
1851 u32 max_io_size_kb = MR_DEFAULT_NVME_MDTS_KB;
96188a89 1852 u32 tgt_device_qd;
15dd0381
S		 1853 struct megasas_instance *instance;
1854 struct MR_PRIV_DEVICE *mr_device_priv_data;
2216c305 1855
15dd0381
S		 1856 instance = megasas_lookup_instance(sdev->host->host_no);
1857 mr_device_priv_data = sdev->hostdata;
1858 interface_type = mr_device_priv_data->interface_type;
2216c305 1859
15dd0381
S		 1860 /*
1861 * The RAID firmware may require extended timeouts.
1862 */
1863 blk_queue_rq_timeout(sdev->request_queue, scmd_timeout * HZ);
2216c305 1864
15dd0381
S		 1865 target_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) + sdev->id;
1866
1867 switch (interface_type) {
1868 case SAS_PD:
1869 device_qd = MEGASAS_SAS_QD;
1870 break;
1871 case SATA_PD:
1872 device_qd = MEGASAS_SATA_QD;
1873 break;
1874 case NVME_PD:
1875 device_qd = MEGASAS_NVME_QD;
1876 break;
2216c305 1877 }
15dd0381 1878
96188a89
S		 1879 if (is_target_prop) {
1880 tgt_device_qd = le32_to_cpu(instance->tgt_prop->device_qdepth);
1881 if (tgt_device_qd &&
1882 (tgt_device_qd <= instance->host->can_queue))
1883 device_qd = tgt_device_qd;
1884
1885 /* max_io_size_kb will be set to non zero for
1886 * nvme based vd and syspd.
1887 */
1888 max_io_size_kb = le32_to_cpu(instance->tgt_prop->max_io_size_kb);
1889 }
1890
15dd0381
S		 1891 if (instance->nvme_page_size && max_io_size_kb)
1892 megasas_set_nvme_device_properties(sdev, (max_io_size_kb << 10));
1893
1894 scsi_change_queue_depth(sdev, device_qd);
1895
2216c305
SS		 1896}
1897
18365b13 1898
147aab6a
CH		 1899static int megasas_slave_configure(struct scsi_device *sdev)
1900{
aed335ee
SS		 1901 u16 pd_index = 0;
1902 struct megasas_instance *instance;
96188a89
S		 1903 int ret_target_prop = DCMD_FAILED;
1904 bool is_target_prop = false;
aed335ee
SS		 1905
1906 instance = megasas_lookup_instance(sdev->host->host_no);
30845586 1907 if (instance->pd_list_not_supported) {
3cabd162 1908 if (!MEGASAS_IS_LOGICAL(sdev) && sdev->type == TYPE_DISK) {
aed335ee
SS		 1909 pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1910 sdev->id;
1911 if (instance->pd_list[pd_index].driveState !=
1912 MR_PD_STATE_SYSTEM)
1913 return -ENXIO;
1914 }
1915 }
18365b13 1916
15dd0381
S		 1917 mutex_lock(&instance->hba_mutex);
1918 /* Send DCMD to Firmware and cache the information */
1919 if ((instance->pd_info) && !MEGASAS_IS_LOGICAL(sdev))
1920 megasas_get_pd_info(instance, sdev);
1921
96188a89
S		 1922 /* Some ventura firmware may not have instance->nvme_page_size set.
1923 * Do not send MR_DCMD_DRV_GET_TARGET_PROP
1924 */
1925 if ((instance->tgt_prop) && (instance->nvme_page_size))
1926 ret_target_prop = megasas_get_target_prop(instance, sdev);
1927
1928 is_target_prop = (ret_target_prop == DCMD_SUCCESS) ? true : false;
1929 megasas_set_static_target_properties(sdev, is_target_prop);
15dd0381
S		 1930
1931 mutex_unlock(&instance->hba_mutex);
1932
1933 /* This sdev property may change post OCR */
1934 megasas_set_dynamic_target_properties(sdev);
07e38d94 1935
044833b5
YB		 1936 return 0;
1937}
1938
1939static int megasas_slave_alloc(struct scsi_device *sdev)
1940{
da0dc9fb 1941 u16 pd_index = 0;
044833b5 1942 struct megasas_instance *instance ;
18365b13 1943 struct MR_PRIV_DEVICE *mr_device_priv_data;
da0dc9fb 1944
044833b5 1945 instance = megasas_lookup_instance(sdev->host->host_no);
3cabd162 1946 if (!MEGASAS_IS_LOGICAL(sdev)) {
044833b5
YB		 1947 /*
1948 * Open the OS scan to the SYSTEM PD
1949 */
1950 pd_index =
1951 (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1952 sdev->id;
30845586
SS		 1953 if ((instance->pd_list_not_supported ||
1954 instance->pd_list[pd_index].driveState ==
aed335ee 1955 MR_PD_STATE_SYSTEM)) {
18365b13 1956 goto scan_target;
044833b5
YB		 1957 }
1958 return -ENXIO;
1959 }
18365b13
SS		 1960
1961scan_target:
1962 mr_device_priv_data = kzalloc(sizeof(*mr_device_priv_data),
1963 GFP_KERNEL);
1964 if (!mr_device_priv_data)
1965 return -ENOMEM;
1966 sdev->hostdata = mr_device_priv_data;
49524b3c
S		 1967
1968 atomic_set(&mr_device_priv_data->r1_ldio_hint,
1969 instance->r1_ldio_hint_default);
147aab6a
CH		 1970 return 0;
1971}
1972
18365b13
SS		 1973static void megasas_slave_destroy(struct scsi_device *sdev)
1974{
1975 kfree(sdev->hostdata);
1976 sdev->hostdata = NULL;
1977}
1978
c8dd61ef
SS		 1979/*
1980* megasas_complete_outstanding_ioctls - Complete outstanding ioctls after a
1981* kill adapter
1982* @instance: Adapter soft state
1983*
1984*/
6a6981fe 1985static void megasas_complete_outstanding_ioctls(struct megasas_instance *instance)
c8dd61ef
SS		 1986{
1987 int i;
1988 struct megasas_cmd *cmd_mfi;
1989 struct megasas_cmd_fusion *cmd_fusion;
1990 struct fusion_context *fusion = instance->ctrl_context;
1991
1992 /* Find all outstanding ioctls */
1993 if (fusion) {
1994 for (i = 0; i < instance->max_fw_cmds; i++) {
1995 cmd_fusion = fusion->cmd_list[i];
1996 if (cmd_fusion->sync_cmd_idx != (u32)ULONG_MAX) {
1997 cmd_mfi = instance->cmd_list[cmd_fusion->sync_cmd_idx];
1998 if (cmd_mfi->sync_cmd &&
eb3fe263
S		 1999 (cmd_mfi->frame->hdr.cmd != MFI_CMD_ABORT)) {
2000 cmd_mfi->frame->hdr.cmd_status =
2001 MFI_STAT_WRONG_STATE;
c8dd61ef
SS		 2002 megasas_complete_cmd(instance,
2003 cmd_mfi, DID_OK);
eb3fe263 2004 }
c8dd61ef
SS		 2005 }
2006 }
2007 } else {
2008 for (i = 0; i < instance->max_fw_cmds; i++) {
2009 cmd_mfi = instance->cmd_list[i];
2010 if (cmd_mfi->sync_cmd && cmd_mfi->frame->hdr.cmd !=
2011 MFI_CMD_ABORT)
2012 megasas_complete_cmd(instance, cmd_mfi, DID_OK);
2013 }
2014 }
2015}
2016
2017
9c915a8c 2018void megaraid_sas_kill_hba(struct megasas_instance *instance)
39a98554 2019{
c8dd61ef 2020 /* Set critical error to block I/O & ioctls in case caller didn't */
8a01a41d 2021 atomic_set(&instance->adprecovery, MEGASAS_HW_CRITICAL_ERROR);
c8dd61ef
SS		 2022 /* Wait 1 second to ensure IO or ioctls in build have posted */
2023 msleep(1000);
39a98554 2024 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
c8dd61ef 2025 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 2026 (instance->ctrl_context)) {
da0dc9fb 2027 writel(MFI_STOP_ADP, &instance->reg_set->doorbell);
229fe47c
AR		 2028 /* Flush */
2029 readl(&instance->reg_set->doorbell);
8f67c8c5 2030 if (instance->requestorId && instance->peerIsPresent)
229fe47c 2031 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
39a98554 2032 } else {
c8dd61ef
SS		 2033 writel(MFI_STOP_ADP,
2034 &instance->reg_set->inbound_doorbell);
9c915a8c 2035 }
c8dd61ef
SS		 2036 /* Complete outstanding ioctls when adapter is killed */
2037 megasas_complete_outstanding_ioctls(instance);
9c915a8c
AR		 2038}
2039
2040 /**
2041 * megasas_check_and_restore_queue_depth - Check if queue depth needs to be
2042 * restored to max value
2043 * @instance: Adapter soft state
2044 *
2045 */
2046void
2047megasas_check_and_restore_queue_depth(struct megasas_instance *instance)
2048{
2049 unsigned long flags;
ae09a6c1 2050
9c915a8c 2051 if (instance->flag & MEGASAS_FW_BUSY
c5daa6a9
AR		 2052 && time_after(jiffies, instance->last_time + 5 * HZ)
2053 && atomic_read(&instance->fw_outstanding) <
2054 instance->throttlequeuedepth + 1) {
9c915a8c
AR		 2055
2056 spin_lock_irqsave(instance->host->host_lock, flags);
2057 instance->flag &= ~MEGASAS_FW_BUSY;
9c915a8c 2058
308ec459 2059 instance->host->can_queue = instance->cur_can_queue;
9c915a8c 2060 spin_unlock_irqrestore(instance->host->host_lock, flags);
39a98554 2061 }
2062}
2063
7343eb65 2064/**
2065 * megasas_complete_cmd_dpc - Returns FW's controller structure
2066 * @instance_addr: Address of adapter soft state
2067 *
2068 * Tasklet to complete cmds
2069 */
2070static void megasas_complete_cmd_dpc(unsigned long instance_addr)
2071{
2072 u32 producer;
2073 u32 consumer;
2074 u32 context;
2075 struct megasas_cmd *cmd;
2076 struct megasas_instance *instance =
2077 (struct megasas_instance *)instance_addr;
2078 unsigned long flags;
2079
2080 /* If we have already declared adapter dead, donot complete cmds */
8a01a41d 2081 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
7343eb65 2082 return;
2083
2084 spin_lock_irqsave(&instance->completion_lock, flags);
2085
94cd65dd
SS		 2086 producer = le32_to_cpu(*instance->producer);
2087 consumer = le32_to_cpu(*instance->consumer);
7343eb65 2088
2089 while (consumer != producer) {
94cd65dd 2090 context = le32_to_cpu(instance->reply_queue[consumer]);
39a98554 2091 if (context >= instance->max_fw_cmds) {
1be18254 2092 dev_err(&instance->pdev->dev, "Unexpected context value %x\n",
39a98554 2093 context);
2094 BUG();
2095 }
7343eb65 2096
2097 cmd = instance->cmd_list[context];
2098
2099 megasas_complete_cmd(instance, cmd, DID_OK);
2100
2101 consumer++;
2102 if (consumer == (instance->max_fw_cmds + 1)) {
2103 consumer = 0;
2104 }
2105 }
2106
94cd65dd 2107 *instance->consumer = cpu_to_le32(producer);
7343eb65 2108
2109 spin_unlock_irqrestore(&instance->completion_lock, flags);
2110
2111 /*
2112 * Check if we can restore can_queue
2113 */
9c915a8c 2114 megasas_check_and_restore_queue_depth(instance);
7343eb65 2115}
2116
229fe47c
AR		 2117/**
2118 * megasas_start_timer - Initializes a timer object
2119 * @instance: Adapter soft state
2120 * @timer: timer object to be initialized
2121 * @fn: timer function
2122 * @interval: time interval between timer function call
2123 *
2124 */
2125void megasas_start_timer(struct megasas_instance *instance,
2126 struct timer_list *timer,
2127 void *fn, unsigned long interval)
2128{
2129 init_timer(timer);
2130 timer->expires = jiffies + interval;
2131 timer->data = (unsigned long)instance;
2132 timer->function = fn;
2133 add_timer(timer);
2134}
2135
707e09bd
YB		 2136static void
2137megasas_internal_reset_defer_cmds(struct megasas_instance *instance);
2138
2139static void
2140process_fw_state_change_wq(struct work_struct *work);
2141
2142void megasas_do_ocr(struct megasas_instance *instance)
2143{
2144 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
2145 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
2146 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
94cd65dd 2147 *instance->consumer = cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
707e09bd 2148 }
d46a3ad6 2149 instance->instancet->disable_intr(instance);
8a01a41d 2150 atomic_set(&instance->adprecovery, MEGASAS_ADPRESET_SM_INFAULT);
707e09bd
YB		 2151 instance->issuepend_done = 0;
2152
2153 atomic_set(&instance->fw_outstanding, 0);
2154 megasas_internal_reset_defer_cmds(instance);
2155 process_fw_state_change_wq(&instance->work_init);
2156}
2157
4cbfea88
AR		 2158static int megasas_get_ld_vf_affiliation_111(struct megasas_instance *instance,
2159 int initial)
229fe47c
AR		 2160{
2161 struct megasas_cmd *cmd;
2162 struct megasas_dcmd_frame *dcmd;
229fe47c 2163 struct MR_LD_VF_AFFILIATION_111 *new_affiliation_111 = NULL;
229fe47c
AR		 2164 dma_addr_t new_affiliation_111_h;
2165 int ld, retval = 0;
2166 u8 thisVf;
2167
2168 cmd = megasas_get_cmd(instance);
2169
2170 if (!cmd) {
1be18254
BH		 2171 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation_111:"
2172 "Failed to get cmd for scsi%d\n",
229fe47c
AR		 2173 instance->host->host_no);
2174 return -ENOMEM;
2175 }
2176
2177 dcmd = &cmd->frame->dcmd;
2178
4cbfea88 2179 if (!instance->vf_affiliation_111) {
1be18254
BH		 2180 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2181 "affiliation for scsi%d\n", instance->host->host_no);
229fe47c
AR		 2182 megasas_return_cmd(instance, cmd);
2183 return -ENOMEM;
2184 }
2185
2186 if (initial)
229fe47c
AR		 2187 memset(instance->vf_affiliation_111, 0,
2188 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2189 else {
4cbfea88
AR		 2190 new_affiliation_111 =
2191 pci_alloc_consistent(instance->pdev,
2192 sizeof(struct MR_LD_VF_AFFILIATION_111),
2193 &new_affiliation_111_h);
2194 if (!new_affiliation_111) {
1be18254
BH		 2195 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2196 "memory for new affiliation for scsi%d\n",
4cbfea88 2197 instance->host->host_no);
229fe47c
AR		 2198 megasas_return_cmd(instance, cmd);
2199 return -ENOMEM;
2200 }
4cbfea88
AR		 2201 memset(new_affiliation_111, 0,
2202 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c
AR		 2203 }
2204
2205 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2206
2207 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2208 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2209 dcmd->sge_count = 1;
2213a467 2210 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c
AR		 2211 dcmd->timeout = 0;
2212 dcmd->pad_0 = 0;
2213a467
CH		 2213 dcmd->data_xfer_len =
2214 cpu_to_le32(sizeof(struct MR_LD_VF_AFFILIATION_111));
2215 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS_111);
229fe47c 2216
4cbfea88
AR		 2217 if (initial)
2218 dcmd->sgl.sge32[0].phys_addr =
2213a467 2219 cpu_to_le32(instance->vf_affiliation_111_h);
229fe47c 2220 else
2213a467
CH		 2221 dcmd->sgl.sge32[0].phys_addr =
2222 cpu_to_le32(new_affiliation_111_h);
4cbfea88 2223
2213a467
CH		 2224 dcmd->sgl.sge32[0].length = cpu_to_le32(
2225 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2226
1be18254 2227 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
229fe47c
AR		 2228 "scsi%d\n", instance->host->host_no);
2229
6d40afbc 2230 if (megasas_issue_blocked_cmd(instance, cmd, 0) != DCMD_SUCCESS) {
1be18254
BH		 2231 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2232 " failed with status 0x%x for scsi%d\n",
229fe47c
AR		 2233 dcmd->cmd_status, instance->host->host_no);
2234 retval = 1; /* Do a scan if we couldn't get affiliation */
2235 goto out;
2236 }
2237
2238 if (!initial) {
4cbfea88
AR		 2239 thisVf = new_affiliation_111->thisVf;
2240 for (ld = 0 ; ld < new_affiliation_111->vdCount; ld++)
2241 if (instance->vf_affiliation_111->map[ld].policy[thisVf] !=
2242 new_affiliation_111->map[ld].policy[thisVf]) {
1be18254
BH		 2243 dev_warn(&instance->pdev->dev, "SR-IOV: "
2244 "Got new LD/VF affiliation for scsi%d\n",
229fe47c 2245 instance->host->host_no);
4cbfea88
AR		 2246 memcpy(instance->vf_affiliation_111,
2247 new_affiliation_111,
2248 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c
AR		 2249 retval = 1;
2250 goto out;
2251 }
4cbfea88
AR		 2252 }
2253out:
2254 if (new_affiliation_111) {
2255 pci_free_consistent(instance->pdev,
2256 sizeof(struct MR_LD_VF_AFFILIATION_111),
2257 new_affiliation_111,
2258 new_affiliation_111_h);
2259 }
90dc9d98 2260
4026e9aa 2261 megasas_return_cmd(instance, cmd);
4cbfea88
AR		 2262
2263 return retval;
2264}
2265
2266static int megasas_get_ld_vf_affiliation_12(struct megasas_instance *instance,
2267 int initial)
2268{
2269 struct megasas_cmd *cmd;
2270 struct megasas_dcmd_frame *dcmd;
2271 struct MR_LD_VF_AFFILIATION *new_affiliation = NULL;
2272 struct MR_LD_VF_MAP *newmap = NULL, *savedmap = NULL;
2273 dma_addr_t new_affiliation_h;
2274 int i, j, retval = 0, found = 0, doscan = 0;
2275 u8 thisVf;
2276
2277 cmd = megasas_get_cmd(instance);
2278
2279 if (!cmd) {
1be18254
BH		 2280 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation12: "
2281 "Failed to get cmd for scsi%d\n",
4cbfea88
AR		 2282 instance->host->host_no);
2283 return -ENOMEM;
2284 }
2285
2286 dcmd = &cmd->frame->dcmd;
2287
2288 if (!instance->vf_affiliation) {
1be18254
BH		 2289 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2290 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2291 megasas_return_cmd(instance, cmd);
2292 return -ENOMEM;
2293 }
2294
2295 if (initial)
2296 memset(instance->vf_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2297 sizeof(struct MR_LD_VF_AFFILIATION));
2298 else {
2299 new_affiliation =
2300 pci_alloc_consistent(instance->pdev,
2301 (MAX_LOGICAL_DRIVES + 1) *
2302 sizeof(struct MR_LD_VF_AFFILIATION),
2303 &new_affiliation_h);
2304 if (!new_affiliation) {
1be18254
BH		 2305 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2306 "memory for new affiliation for scsi%d\n",
4cbfea88
AR		 2307 instance->host->host_no);
2308 megasas_return_cmd(instance, cmd);
2309 return -ENOMEM;
2310 }
2311 memset(new_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2312 sizeof(struct MR_LD_VF_AFFILIATION));
2313 }
2314
2315 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2316
2317 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2318 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
4cbfea88 2319 dcmd->sge_count = 1;
2213a467 2320 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
4cbfea88
AR		 2321 dcmd->timeout = 0;
2322 dcmd->pad_0 = 0;
2213a467
CH		 2323 dcmd->data_xfer_len = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2324 sizeof(struct MR_LD_VF_AFFILIATION));
2325 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS);
4cbfea88
AR		 2326
2327 if (initial)
2213a467
CH		 2328 dcmd->sgl.sge32[0].phys_addr =
2329 cpu_to_le32(instance->vf_affiliation_h);
4cbfea88 2330 else
2213a467
CH		 2331 dcmd->sgl.sge32[0].phys_addr =
2332 cpu_to_le32(new_affiliation_h);
4cbfea88 2333
2213a467
CH		 2334 dcmd->sgl.sge32[0].length = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2335 sizeof(struct MR_LD_VF_AFFILIATION));
4cbfea88 2336
1be18254 2337 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
4cbfea88
AR		 2338 "scsi%d\n", instance->host->host_no);
2339
4cbfea88 2340
6d40afbc 2341 if (megasas_issue_blocked_cmd(instance, cmd, 0) != DCMD_SUCCESS) {
1be18254
BH		 2342 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2343 " failed with status 0x%x for scsi%d\n",
4cbfea88
AR		 2344 dcmd->cmd_status, instance->host->host_no);
2345 retval = 1; /* Do a scan if we couldn't get affiliation */
2346 goto out;
2347 }
2348
2349 if (!initial) {
2350 if (!new_affiliation->ldCount) {
1be18254
BH		 2351 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2352 "affiliation for passive path for scsi%d\n",
4cbfea88
AR		 2353 instance->host->host_no);
2354 retval = 1;
2355 goto out;
2356 }
2357 newmap = new_affiliation->map;
2358 savedmap = instance->vf_affiliation->map;
2359 thisVf = new_affiliation->thisVf;
2360 for (i = 0 ; i < new_affiliation->ldCount; i++) {
2361 found = 0;
2362 for (j = 0; j < instance->vf_affiliation->ldCount;
2363 j++) {
2364 if (newmap->ref.targetId ==
2365 savedmap->ref.targetId) {
2366 found = 1;
2367 if (newmap->policy[thisVf] !=
2368 savedmap->policy[thisVf]) {
2369 doscan = 1;
2370 goto out;
2371 }
229fe47c
AR		 2372 }
2373 savedmap = (struct MR_LD_VF_MAP *)
2374 ((unsigned char *)savedmap +
2375 savedmap->size);
4cbfea88
AR		 2376 }
2377 if (!found && newmap->policy[thisVf] !=
2378 MR_LD_ACCESS_HIDDEN) {
2379 doscan = 1;
2380 goto out;
2381 }
2382 newmap = (struct MR_LD_VF_MAP *)
2383 ((unsigned char *)newmap + newmap->size);
2384 }
2385
2386 newmap = new_affiliation->map;
2387 savedmap = instance->vf_affiliation->map;
2388
2389 for (i = 0 ; i < instance->vf_affiliation->ldCount; i++) {
2390 found = 0;
2391 for (j = 0 ; j < new_affiliation->ldCount; j++) {
2392 if (savedmap->ref.targetId ==
2393 newmap->ref.targetId) {
2394 found = 1;
2395 if (savedmap->policy[thisVf] !=
2396 newmap->policy[thisVf]) {
2397 doscan = 1;
2398 goto out;
2399 }
2400 }
229fe47c
AR		 2401 newmap = (struct MR_LD_VF_MAP *)
2402 ((unsigned char *)newmap +
2403 newmap->size);
2404 }
4cbfea88
AR		 2405 if (!found && savedmap->policy[thisVf] !=
2406 MR_LD_ACCESS_HIDDEN) {
2407 doscan = 1;
2408 goto out;
2409 }
2410 savedmap = (struct MR_LD_VF_MAP *)
2411 ((unsigned char *)savedmap +
2412 savedmap->size);
229fe47c
AR		 2413 }
2414 }
2415out:
4cbfea88 2416 if (doscan) {
1be18254
BH		 2417 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2418 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2419 memcpy(instance->vf_affiliation, new_affiliation,
2420 new_affiliation->size);
2421 retval = 1;
229fe47c 2422 }
4cbfea88
AR		 2423
2424 if (new_affiliation)
2425 pci_free_consistent(instance->pdev,
2426 (MAX_LOGICAL_DRIVES + 1) *
2427 sizeof(struct MR_LD_VF_AFFILIATION),
2428 new_affiliation, new_affiliation_h);
4026e9aa 2429 megasas_return_cmd(instance, cmd);
229fe47c
AR		 2430
2431 return retval;
2432}
2433
4cbfea88
AR		 2434/* This function will get the current SR-IOV LD/VF affiliation */
2435static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
2436 int initial)
2437{
2438 int retval;
2439
2440 if (instance->PlasmaFW111)
2441 retval = megasas_get_ld_vf_affiliation_111(instance, initial);
2442 else
2443 retval = megasas_get_ld_vf_affiliation_12(instance, initial);
2444 return retval;
2445}
2446
229fe47c
AR		 2447/* This function will tell FW to start the SR-IOV heartbeat */
2448int megasas_sriov_start_heartbeat(struct megasas_instance *instance,
2449 int initial)
2450{
2451 struct megasas_cmd *cmd;
2452 struct megasas_dcmd_frame *dcmd;
2453 int retval = 0;
2454
2455 cmd = megasas_get_cmd(instance);
2456
2457 if (!cmd) {
1be18254
BH		 2458 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_sriov_start_heartbeat: "
2459 "Failed to get cmd for scsi%d\n",
229fe47c
AR		 2460 instance->host->host_no);
2461 return -ENOMEM;
2462 }
2463
2464 dcmd = &cmd->frame->dcmd;
2465
2466 if (initial) {
2467 instance->hb_host_mem =
7c845eb5
JP		 2468 pci_zalloc_consistent(instance->pdev,
2469 sizeof(struct MR_CTRL_HB_HOST_MEM),
2470 &instance->hb_host_mem_h);
229fe47c 2471 if (!instance->hb_host_mem) {
1be18254
BH		 2472 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate"
2473 " memory for heartbeat host memory for scsi%d\n",
2474 instance->host->host_no);
229fe47c
AR		 2475 retval = -ENOMEM;
2476 goto out;
2477 }
229fe47c
AR		 2478 }
2479
2480 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2481
2213a467 2482 dcmd->mbox.s[0] = cpu_to_le16(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2483 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2484 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2485 dcmd->sge_count = 1;
2213a467 2486 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c
AR		 2487 dcmd->timeout = 0;
2488 dcmd->pad_0 = 0;
2213a467
CH		 2489 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
2490 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SHARED_HOST_MEM_ALLOC);
2491 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->hb_host_mem_h);
2492 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2493
1be18254 2494 dev_warn(&instance->pdev->dev, "SR-IOV: Starting heartbeat for scsi%d\n",
229fe47c
AR		 2495 instance->host->host_no);
2496
4026e9aa
SS		 2497 if (instance->ctrl_context && !instance->mask_interrupts)
2498 retval = megasas_issue_blocked_cmd(instance, cmd,
2499 MEGASAS_ROUTINE_WAIT_TIME_VF);
2500 else
2501 retval = megasas_issue_polled(instance, cmd);
229fe47c 2502
4026e9aa 2503 if (retval) {
2be2a988
SS		 2504 dev_warn(&instance->pdev->dev, "SR-IOV: MR_DCMD_CTRL_SHARED_HOST"
2505 "_MEM_ALLOC DCMD %s for scsi%d\n",
2506 (dcmd->cmd_status == MFI_STAT_INVALID_STATUS) ?
2507 "timed out" : "failed", instance->host->host_no);
229fe47c 2508 retval = 1;
229fe47c
AR		 2509 }
2510
2511out:
2512 megasas_return_cmd(instance, cmd);
2513
2514 return retval;
2515}
2516
2517/* Handler for SR-IOV heartbeat */
2518void megasas_sriov_heartbeat_handler(unsigned long instance_addr)
2519{
2520 struct megasas_instance *instance =
2521 (struct megasas_instance *)instance_addr;
2522
2523 if (instance->hb_host_mem->HB.fwCounter !=
2524 instance->hb_host_mem->HB.driverCounter) {
2525 instance->hb_host_mem->HB.driverCounter =
2526 instance->hb_host_mem->HB.fwCounter;
2527 mod_timer(&instance->sriov_heartbeat_timer,
2528 jiffies + MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
2529 } else {
1be18254 2530 dev_warn(&instance->pdev->dev, "SR-IOV: Heartbeat never "
229fe47c
AR		 2531 "completed for scsi%d\n", instance->host->host_no);
2532 schedule_work(&instance->work_init);
2533 }
2534}
2535
c4a3e0a5
BS		 2536/**
2537 * megasas_wait_for_outstanding - Wait for all outstanding cmds
2538 * @instance: Adapter soft state
2539 *
25985edc 2540 * This function waits for up to MEGASAS_RESET_WAIT_TIME seconds for FW to
c4a3e0a5
BS		 2541 * complete all its outstanding commands. Returns error if one or more IOs
2542 * are pending after this time period. It also marks the controller dead.
2543 */
2544static int megasas_wait_for_outstanding(struct megasas_instance *instance)
2545{
ccc7507d 2546 int i, sl, outstanding;
39a98554 2547 u32 reset_index;
c4a3e0a5 2548 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
39a98554 2549 unsigned long flags;
2550 struct list_head clist_local;
2551 struct megasas_cmd *reset_cmd;
707e09bd 2552 u32 fw_state;
39a98554 2553
ccc7507d
SS		 2554 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
2555 dev_info(&instance->pdev->dev, "%s:%d HBA is killed.\n",
2556 __func__, __LINE__);
2557 return FAILED;
2558 }
39a98554 2559
8a01a41d 2560 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 2561
2562 INIT_LIST_HEAD(&clist_local);
2563 spin_lock_irqsave(&instance->hba_lock, flags);
2564 list_splice_init(&instance->internal_reset_pending_q,
2565 &clist_local);
2566 spin_unlock_irqrestore(&instance->hba_lock, flags);
2567
1be18254 2568 dev_notice(&instance->pdev->dev, "HBA reset wait ...\n");
39a98554 2569 for (i = 0; i < wait_time; i++) {
2570 msleep(1000);
8a01a41d 2571 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL)
39a98554 2572 break;
2573 }
2574
8a01a41d 2575 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
1be18254 2576 dev_notice(&instance->pdev->dev, "reset: Stopping HBA.\n");
8a01a41d 2577 atomic_set(&instance->adprecovery, MEGASAS_HW_CRITICAL_ERROR);
39a98554 2578 return FAILED;
2579 }
2580
da0dc9fb 2581 reset_index = 0;
39a98554 2582 while (!list_empty(&clist_local)) {
da0dc9fb 2583 reset_cmd = list_entry((&clist_local)->next,
39a98554 2584 struct megasas_cmd, list);
2585 list_del_init(&reset_cmd->list);
2586 if (reset_cmd->scmd) {
f55cf47d 2587 reset_cmd->scmd->result = DID_REQUEUE << 16;
1be18254 2588 dev_notice(&instance->pdev->dev, "%d:%p reset [%02x]\n",
39a98554 2589 reset_index, reset_cmd,
5cd049a5 2590 reset_cmd->scmd->cmnd[0]);
39a98554 2591
2592 reset_cmd->scmd->scsi_done(reset_cmd->scmd);
2593 megasas_return_cmd(instance, reset_cmd);
2594 } else if (reset_cmd->sync_cmd) {
1be18254 2595 dev_notice(&instance->pdev->dev, "%p synch cmds"
39a98554 2596 "reset queue\n",
2597 reset_cmd);
2598
2be2a988 2599 reset_cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 2600 instance->instancet->fire_cmd(instance,
2601 reset_cmd->frame_phys_addr,
2602 0, instance->reg_set);
2603 } else {
1be18254 2604 dev_notice(&instance->pdev->dev, "%p unexpected"
39a98554 2605 "cmds lst\n",
2606 reset_cmd);
2607 }
2608 reset_index++;
2609 }
2610
2611 return SUCCESS;
2612 }
c4a3e0a5 2613
c007b8b2 2614 for (i = 0; i < resetwaittime; i++) {
ccc7507d 2615 outstanding = atomic_read(&instance->fw_outstanding);
e4a082c7
SP		 2616
2617 if (!outstanding)
c4a3e0a5
BS		 2618 break;
2619
2620 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 2621 dev_notice(&instance->pdev->dev, "[%2d]waiting for %d "
e4a082c7 2622 "commands to complete\n",i,outstanding);
7343eb65 2623 /*
2624 * Call cmd completion routine. Cmd to be
2625 * be completed directly without depending on isr.
2626 */
2627 megasas_complete_cmd_dpc((unsigned long)instance);
c4a3e0a5
BS		 2628 }
2629
2630 msleep(1000);
2631 }
2632
707e09bd 2633 i = 0;
ccc7507d
SS		 2634 outstanding = atomic_read(&instance->fw_outstanding);
2635 fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & MFI_STATE_MASK;
2636
2637 if ((!outstanding && (fw_state == MFI_STATE_OPERATIONAL)))
2638 goto no_outstanding;
2639
2640 if (instance->disableOnlineCtrlReset)
2641 goto kill_hba_and_failed;
707e09bd 2642 do {
ccc7507d
SS		 2643 if ((fw_state == MFI_STATE_FAULT) || atomic_read(&instance->fw_outstanding)) {
2644 dev_info(&instance->pdev->dev,
2645 "%s:%d waiting_for_outstanding: before issue OCR. FW state = 0x%x, oustanding 0x%x\n",
2646 __func__, __LINE__, fw_state, atomic_read(&instance->fw_outstanding));
2647 if (i == 3)
2648 goto kill_hba_and_failed;
707e09bd 2649 megasas_do_ocr(instance);
707e09bd 2650
ccc7507d
SS		 2651 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
2652 dev_info(&instance->pdev->dev, "%s:%d OCR failed and HBA is killed.\n",
2653 __func__, __LINE__);
2654 return FAILED;
2655 }
2656 dev_info(&instance->pdev->dev, "%s:%d waiting_for_outstanding: after issue OCR.\n",
2657 __func__, __LINE__);
2658
2659 for (sl = 0; sl < 10; sl++)
2660 msleep(500);
2661
2662 outstanding = atomic_read(&instance->fw_outstanding);
2663
2664 fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & MFI_STATE_MASK;
2665 if ((!outstanding && (fw_state == MFI_STATE_OPERATIONAL)))
2666 goto no_outstanding;
707e09bd
YB		 2667 }
2668 i++;
2669 } while (i <= 3);
2670
ccc7507d 2671no_outstanding:
707e09bd 2672
ccc7507d
SS		 2673 dev_info(&instance->pdev->dev, "%s:%d no more pending commands remain after reset handling.\n",
2674 __func__, __LINE__);
2675 return SUCCESS;
707e09bd 2676
ccc7507d 2677kill_hba_and_failed:
c4a3e0a5 2678
ccc7507d
SS		 2679 /* Reset not supported, kill adapter */
2680 dev_info(&instance->pdev->dev, "%s:%d killing adapter scsi%d"
2681 " disableOnlineCtrlReset %d fw_outstanding %d \n",
2682 __func__, __LINE__, instance->host->host_no, instance->disableOnlineCtrlReset,
2683 atomic_read(&instance->fw_outstanding));
2684 megasas_dump_pending_frames(instance);
2685 megaraid_sas_kill_hba(instance);
39a98554 2686
ccc7507d 2687 return FAILED;
c4a3e0a5
BS		 2688}
2689
2690/**
2691 * megasas_generic_reset - Generic reset routine
2692 * @scmd: Mid-layer SCSI command
2693 *
2694 * This routine implements a generic reset handler for device, bus and host
2695 * reset requests. Device, bus and host specific reset handlers can use this
2696 * function after they do their specific tasks.
2697 */
2698static int megasas_generic_reset(struct scsi_cmnd *scmd)
2699{
2700 int ret_val;
2701 struct megasas_instance *instance;
2702
2703 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2704
5cd049a5
CH		 2705 scmd_printk(KERN_NOTICE, scmd, "megasas: RESET cmd=%x retries=%x\n",
2706 scmd->cmnd[0], scmd->retries);
c4a3e0a5 2707
8a01a41d 2708 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 2709 dev_err(&instance->pdev->dev, "cannot recover from previous reset failures\n");
c4a3e0a5
BS		 2710 return FAILED;
2711 }
2712
c4a3e0a5 2713 ret_val = megasas_wait_for_outstanding(instance);
c4a3e0a5 2714 if (ret_val == SUCCESS)
1be18254 2715 dev_notice(&instance->pdev->dev, "reset successful\n");
c4a3e0a5 2716 else
1be18254 2717 dev_err(&instance->pdev->dev, "failed to do reset\n");
c4a3e0a5 2718
c4a3e0a5
BS		 2719 return ret_val;
2720}
2721
05e9ebbe
SP		 2722/**
2723 * megasas_reset_timer - quiesce the adapter if required
2724 * @scmd: scsi cmnd
2725 *
2726 * Sets the FW busy flag and reduces the host->can_queue if the
2727 * cmd has not been completed within the timeout period.
2728 */
2729static enum
242f9dcb 2730blk_eh_timer_return megasas_reset_timer(struct scsi_cmnd *scmd)
05e9ebbe 2731{
05e9ebbe
SP		 2732 struct megasas_instance *instance;
2733 unsigned long flags;
2734
2735 if (time_after(jiffies, scmd->jiffies_at_alloc +
e3d178ca 2736 (scmd_timeout * 2) * HZ)) {
242f9dcb 2737 return BLK_EH_NOT_HANDLED;
05e9ebbe
SP		 2738 }
2739
f575c5d3 2740 instance = (struct megasas_instance *)scmd->device->host->hostdata;
05e9ebbe
SP		 2741 if (!(instance->flag & MEGASAS_FW_BUSY)) {
2742 /* FW is busy, throttle IO */
2743 spin_lock_irqsave(instance->host->host_lock, flags);
2744
c5daa6a9 2745 instance->host->can_queue = instance->throttlequeuedepth;
05e9ebbe
SP		 2746 instance->last_time = jiffies;
2747 instance->flag |= MEGASAS_FW_BUSY;
2748
2749 spin_unlock_irqrestore(instance->host->host_lock, flags);
2750 }
242f9dcb 2751 return BLK_EH_RESET_TIMER;
05e9ebbe
SP		 2752}
2753
def0eab3
S		 2754/**
2755 * megasas_dump_frame - This function will dump MPT/MFI frame
2756 */
2757static inline void
2758megasas_dump_frame(void *mpi_request, int sz)
2759{
2760 int i;
2761 __le32 *mfp = (__le32 *)mpi_request;
2762
2763 printk(KERN_INFO "IO request frame:\n\t");
40a4c2c3 2764 for (i = 0; i < sz / sizeof(__le32); i++) {
def0eab3
S		 2765 if (i && ((i % 8) == 0))
2766 printk("\n\t");
2767 printk("%08x ", le32_to_cpu(mfp[i]));
2768 }
2769 printk("\n");
2770}
2771
c4a3e0a5
BS		 2772/**
2773 * megasas_reset_bus_host - Bus & host reset handler entry point
2774 */
2775static int megasas_reset_bus_host(struct scsi_cmnd *scmd)
2776{
2777 int ret;
9c915a8c 2778 struct megasas_instance *instance;
da0dc9fb 2779
9c915a8c 2780 instance = (struct megasas_instance *)scmd->device->host->hostdata;
c4a3e0a5 2781
def0eab3
S		 2782 scmd_printk(KERN_INFO, scmd,
2783 "Controller reset is requested due to IO timeout\n"
2784 "SCSI command pointer: (%p)\t SCSI host state: %d\t"
2785 " SCSI host busy: %d\t FW outstanding: %d\n",
2786 scmd, scmd->device->host->shost_state,
2787 atomic_read((atomic_t *)&scmd->device->host->host_busy),
2788 atomic_read(&instance->fw_outstanding));
2789
c4a3e0a5 2790 /*
80682fa9 2791 * First wait for all commands to complete
c4a3e0a5 2792 */
def0eab3
S		 2793 if (instance->ctrl_context) {
2794 struct megasas_cmd_fusion *cmd;
2795 cmd = (struct megasas_cmd_fusion *)scmd->SCp.ptr;
2796 if (cmd)
2797 megasas_dump_frame(cmd->io_request,
5dd977e3 2798 MEGA_MPI2_RAID_DEFAULT_IO_FRAME_SIZE);
def0eab3
S		 2799 ret = megasas_reset_fusion(scmd->device->host,
2800 SCSIIO_TIMEOUT_OCR);
2801 } else
9c915a8c 2802 ret = megasas_generic_reset(scmd);
c4a3e0a5
BS		 2803
2804 return ret;
2805}
2806
bd23d4ab
SS		 2807/**
2808 * megasas_task_abort - Issues task abort request to firmware
2809 * (supported only for fusion adapters)
2810 * @scmd: SCSI command pointer
2811 */
2812static int megasas_task_abort(struct scsi_cmnd *scmd)
2813{
2814 int ret;
2815 struct megasas_instance *instance;
2816
2817 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2818
2819 if (instance->ctrl_context)
2820 ret = megasas_task_abort_fusion(scmd);
2821 else {
2822 sdev_printk(KERN_NOTICE, scmd->device, "TASK ABORT not supported\n");
2823 ret = FAILED;
2824 }
2825
2826 return ret;
2827}
2828
2829/**
2830 * megasas_reset_target: Issues target reset request to firmware
2831 * (supported only for fusion adapters)
2832 * @scmd: SCSI command pointer
2833 */
2834static int megasas_reset_target(struct scsi_cmnd *scmd)
2835{
2836 int ret;
2837 struct megasas_instance *instance;
2838
2839 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2840
2841 if (instance->ctrl_context)
2842 ret = megasas_reset_target_fusion(scmd);
2843 else {
2844 sdev_printk(KERN_NOTICE, scmd->device, "TARGET RESET not supported\n");
2845 ret = FAILED;
2846 }
2847
2848 return ret;
2849}
2850
cf62a0a5
SP		 2851/**
2852 * megasas_bios_param - Returns disk geometry for a disk
da0dc9fb 2853 * @sdev: device handle
cf62a0a5
SP		 2854 * @bdev: block device
2855 * @capacity: drive capacity
2856 * @geom: geometry parameters
2857 */
2858static int
2859megasas_bios_param(struct scsi_device *sdev, struct block_device *bdev,
2860 sector_t capacity, int geom[])
2861{
2862 int heads;
2863 int sectors;
2864 sector_t cylinders;
2865 unsigned long tmp;
da0dc9fb 2866
cf62a0a5
SP		 2867 /* Default heads (64) & sectors (32) */
2868 heads = 64;
2869 sectors = 32;
2870
2871 tmp = heads * sectors;
2872 cylinders = capacity;
2873
2874 sector_div(cylinders, tmp);
2875
2876 /*
2877 * Handle extended translation size for logical drives > 1Gb
2878 */
2879
2880 if (capacity >= 0x200000) {
2881 heads = 255;
2882 sectors = 63;
2883 tmp = heads*sectors;
2884 cylinders = capacity;
2885 sector_div(cylinders, tmp);
2886 }
2887
2888 geom[0] = heads;
2889 geom[1] = sectors;
2890 geom[2] = cylinders;
2891
2892 return 0;
2893}
2894
7e8a75f4
YB		 2895static void megasas_aen_polling(struct work_struct *work);
2896
c4a3e0a5
BS		 2897/**
2898 * megasas_service_aen - Processes an event notification
2899 * @instance: Adapter soft state
2900 * @cmd: AEN command completed by the ISR
2901 *
2902 * For AEN, driver sends a command down to FW that is held by the FW till an
2903 * event occurs. When an event of interest occurs, FW completes the command
2904 * that it was previously holding.
2905 *
2906 * This routines sends SIGIO signal to processes that have registered with the
2907 * driver for AEN.
2908 */
2909static void
2910megasas_service_aen(struct megasas_instance *instance, struct megasas_cmd *cmd)
2911{
c3518837 2912 unsigned long flags;
da0dc9fb 2913
c4a3e0a5
BS		 2914 /*
2915 * Don't signal app if it is just an aborted previously registered aen
2916 */
c3518837
YB		 2917 if ((!cmd->abort_aen) && (instance->unload == 0)) {
2918 spin_lock_irqsave(&poll_aen_lock, flags);
2919 megasas_poll_wait_aen = 1;
2920 spin_unlock_irqrestore(&poll_aen_lock, flags);
2921 wake_up(&megasas_poll_wait);
c4a3e0a5 2922 kill_fasync(&megasas_async_queue, SIGIO, POLL_IN);
c3518837 2923 }
c4a3e0a5
BS		 2924 else
2925 cmd->abort_aen = 0;
2926
2927 instance->aen_cmd = NULL;
90dc9d98 2928
4026e9aa 2929 megasas_return_cmd(instance, cmd);
7e8a75f4 2930
39a98554 2931 if ((instance->unload == 0) &&
2932 ((instance->issuepend_done == 1))) {
7e8a75f4 2933 struct megasas_aen_event *ev;
da0dc9fb 2934
7e8a75f4
YB		 2935 ev = kzalloc(sizeof(*ev), GFP_ATOMIC);
2936 if (!ev) {
1be18254 2937 dev_err(&instance->pdev->dev, "megasas_service_aen: out of memory\n");
7e8a75f4
YB		 2938 } else {
2939 ev->instance = instance;
2940 instance->ev = ev;
c1d390d8
XF		 2941 INIT_DELAYED_WORK(&ev->hotplug_work,
2942 megasas_aen_polling);
2943 schedule_delayed_work(&ev->hotplug_work, 0);
7e8a75f4
YB		 2944 }
2945 }
c4a3e0a5
BS		 2946}
2947
fc62b3fc
SS		 2948static ssize_t
2949megasas_fw_crash_buffer_store(struct device *cdev,
2950 struct device_attribute *attr, const char *buf, size_t count)
2951{
2952 struct Scsi_Host *shost = class_to_shost(cdev);
2953 struct megasas_instance *instance =
2954 (struct megasas_instance *) shost->hostdata;
2955 int val = 0;
2956 unsigned long flags;
2957
2958 if (kstrtoint(buf, 0, &val) != 0)
2959 return -EINVAL;
2960
2961 spin_lock_irqsave(&instance->crashdump_lock, flags);
2962 instance->fw_crash_buffer_offset = val;
2963 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2964 return strlen(buf);
2965}
2966
2967static ssize_t
2968megasas_fw_crash_buffer_show(struct device *cdev,
2969 struct device_attribute *attr, char *buf)
2970{
2971 struct Scsi_Host *shost = class_to_shost(cdev);
2972 struct megasas_instance *instance =
2973 (struct megasas_instance *) shost->hostdata;
2974 u32 size;
2975 unsigned long buff_addr;
2976 unsigned long dmachunk = CRASH_DMA_BUF_SIZE;
2977 unsigned long src_addr;
2978 unsigned long flags;
2979 u32 buff_offset;
2980
2981 spin_lock_irqsave(&instance->crashdump_lock, flags);
2982 buff_offset = instance->fw_crash_buffer_offset;
2983 if (!instance->crash_dump_buf &&
2984 !((instance->fw_crash_state == AVAILABLE) ||
2985 (instance->fw_crash_state == COPYING))) {
2986 dev_err(&instance->pdev->dev,
2987 "Firmware crash dump is not available\n");
2988 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2989 return -EINVAL;
2990 }
2991
2992 buff_addr = (unsigned long) buf;
2993
da0dc9fb 2994 if (buff_offset > (instance->fw_crash_buffer_size * dmachunk)) {
fc62b3fc
SS		 2995 dev_err(&instance->pdev->dev,
2996 "Firmware crash dump offset is out of range\n");
2997 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2998 return 0;
2999 }
3000
3001 size = (instance->fw_crash_buffer_size * dmachunk) - buff_offset;
3002 size = (size >= PAGE_SIZE) ? (PAGE_SIZE - 1) : size;
3003
3004 src_addr = (unsigned long)instance->crash_buf[buff_offset / dmachunk] +
3005 (buff_offset % dmachunk);
da0dc9fb 3006 memcpy(buf, (void *)src_addr, size);
fc62b3fc
SS		 3007 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
3008
3009 return size;
3010}
3011
3012static ssize_t
3013megasas_fw_crash_buffer_size_show(struct device *cdev,
3014 struct device_attribute *attr, char *buf)
3015{
3016 struct Scsi_Host *shost = class_to_shost(cdev);
3017 struct megasas_instance *instance =
3018 (struct megasas_instance *) shost->hostdata;
3019
3020 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)
3021 ((instance->fw_crash_buffer_size) * 1024 * 1024)/PAGE_SIZE);
3022}
3023
3024static ssize_t
3025megasas_fw_crash_state_store(struct device *cdev,
3026 struct device_attribute *attr, const char *buf, size_t count)
3027{
3028 struct Scsi_Host *shost = class_to_shost(cdev);
3029 struct megasas_instance *instance =
3030 (struct megasas_instance *) shost->hostdata;
3031 int val = 0;
3032 unsigned long flags;
3033
3034 if (kstrtoint(buf, 0, &val) != 0)
3035 return -EINVAL;
3036
3037 if ((val <= AVAILABLE || val > COPY_ERROR)) {
3038 dev_err(&instance->pdev->dev, "application updates invalid "
3039 "firmware crash state\n");
3040 return -EINVAL;
3041 }
3042
3043 instance->fw_crash_state = val;
3044
3045 if ((val == COPIED) || (val == COPY_ERROR)) {
3046 spin_lock_irqsave(&instance->crashdump_lock, flags);
3047 megasas_free_host_crash_buffer(instance);
3048 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
3049 if (val == COPY_ERROR)
3050 dev_info(&instance->pdev->dev, "application failed to "
3051 "copy Firmware crash dump\n");
3052 else
3053 dev_info(&instance->pdev->dev, "Firmware crash dump "
3054 "copied successfully\n");
3055 }
3056 return strlen(buf);
3057}
3058
3059static ssize_t
3060megasas_fw_crash_state_show(struct device *cdev,
3061 struct device_attribute *attr, char *buf)
3062{
3063 struct Scsi_Host *shost = class_to_shost(cdev);
3064 struct megasas_instance *instance =
3065 (struct megasas_instance *) shost->hostdata;
da0dc9fb 3066
fc62b3fc
SS		 3067 return snprintf(buf, PAGE_SIZE, "%d\n", instance->fw_crash_state);
3068}
3069
3070static ssize_t
3071megasas_page_size_show(struct device *cdev,
3072 struct device_attribute *attr, char *buf)
3073{
3074 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)PAGE_SIZE - 1);
3075}
3076
308ec459
SS		 3077static ssize_t
3078megasas_ldio_outstanding_show(struct device *cdev, struct device_attribute *attr,
3079 char *buf)
3080{
3081 struct Scsi_Host *shost = class_to_shost(cdev);
3082 struct megasas_instance *instance = (struct megasas_instance *)shost->hostdata;
3083
3084 return snprintf(buf, PAGE_SIZE, "%d\n", atomic_read(&instance->ldio_outstanding));
3085}
3086
fc62b3fc
SS		 3087static DEVICE_ATTR(fw_crash_buffer, S_IRUGO | S_IWUSR,
3088 megasas_fw_crash_buffer_show, megasas_fw_crash_buffer_store);
3089static DEVICE_ATTR(fw_crash_buffer_size, S_IRUGO,
3090 megasas_fw_crash_buffer_size_show, NULL);
3091static DEVICE_ATTR(fw_crash_state, S_IRUGO | S_IWUSR,
3092 megasas_fw_crash_state_show, megasas_fw_crash_state_store);
3093static DEVICE_ATTR(page_size, S_IRUGO,
3094 megasas_page_size_show, NULL);
308ec459
SS		 3095static DEVICE_ATTR(ldio_outstanding, S_IRUGO,
3096 megasas_ldio_outstanding_show, NULL);
fc62b3fc
SS		 3097
3098struct device_attribute *megaraid_host_attrs[] = {
3099 &dev_attr_fw_crash_buffer_size,
3100 &dev_attr_fw_crash_buffer,
3101 &dev_attr_fw_crash_state,
3102 &dev_attr_page_size,
308ec459 3103 &dev_attr_ldio_outstanding,
fc62b3fc
SS		 3104 NULL,
3105};
3106
c4a3e0a5
BS		 3107/*
3108 * Scsi host template for megaraid_sas driver
3109 */
3110static struct scsi_host_template megasas_template = {
3111
3112 .module = THIS_MODULE,
43cd7fe4 3113 .name = "Avago SAS based MegaRAID driver",
c4a3e0a5 3114 .proc_name = "megaraid_sas",
147aab6a 3115 .slave_configure = megasas_slave_configure,
044833b5 3116 .slave_alloc = megasas_slave_alloc,
18365b13 3117 .slave_destroy = megasas_slave_destroy,
c4a3e0a5 3118 .queuecommand = megasas_queue_command,
bd23d4ab
SS		 3119 .eh_target_reset_handler = megasas_reset_target,
3120 .eh_abort_handler = megasas_task_abort,
c4a3e0a5 3121 .eh_host_reset_handler = megasas_reset_bus_host,
05e9ebbe 3122 .eh_timed_out = megasas_reset_timer,
fc62b3fc 3123 .shost_attrs = megaraid_host_attrs,
cf62a0a5 3124 .bios_param = megasas_bios_param,
c4a3e0a5 3125 .use_clustering = ENABLE_CLUSTERING,
db5ed4df 3126 .change_queue_depth = scsi_change_queue_depth,
54b2b50c 3127 .no_write_same = 1,
c4a3e0a5
BS		 3128};
3129
3130/**
3131 * megasas_complete_int_cmd - Completes an internal command
3132 * @instance: Adapter soft state
3133 * @cmd: Command to be completed
3134 *
3135 * The megasas_issue_blocked_cmd() function waits for a command to complete
3136 * after it issues a command. This function wakes up that waiting routine by
3137 * calling wake_up() on the wait queue.
3138 */
3139static void
3140megasas_complete_int_cmd(struct megasas_instance *instance,
3141 struct megasas_cmd *cmd)
3142{
2be2a988 3143 cmd->cmd_status_drv = cmd->frame->io.cmd_status;
c4a3e0a5
BS		 3144 wake_up(&instance->int_cmd_wait_q);
3145}
3146
3147/**
3148 * megasas_complete_abort - Completes aborting a command
3149 * @instance: Adapter soft state
3150 * @cmd: Cmd that was issued to abort another cmd
3151 *
0d49016b
AR		 3152 * The megasas_issue_blocked_abort_cmd() function waits on abort_cmd_wait_q
3153 * after it issues an abort on a previously issued command. This function
c4a3e0a5
BS		 3154 * wakes up all functions waiting on the same wait queue.
3155 */
3156static void
3157megasas_complete_abort(struct megasas_instance *instance,
3158 struct megasas_cmd *cmd)
3159{
3160 if (cmd->sync_cmd) {
3161 cmd->sync_cmd = 0;
2be2a988 3162 cmd->cmd_status_drv = 0;
c4a3e0a5
BS		 3163 wake_up(&instance->abort_cmd_wait_q);
3164 }
c4a3e0a5
BS		 3165}
3166
c4a3e0a5
BS		 3167/**
3168 * megasas_complete_cmd - Completes a command
3169 * @instance: Adapter soft state
3170 * @cmd: Command to be completed
0d49016b 3171 * @alt_status: If non-zero, use this value as status to
da0dc9fb
BH		 3172 * SCSI mid-layer instead of the value returned
3173 * by the FW. This should be used if caller wants
3174 * an alternate status (as in the case of aborted
3175 * commands)
c4a3e0a5 3176 */
9c915a8c 3177void
c4a3e0a5
BS		 3178megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
3179 u8 alt_status)
3180{
3181 int exception = 0;
3182 struct megasas_header *hdr = &cmd->frame->hdr;
c3518837 3183 unsigned long flags;
9c915a8c 3184 struct fusion_context *fusion = instance->ctrl_context;
3761cb4c 3185 u32 opcode, status;
c4a3e0a5 3186
39a98554 3187 /* flag for the retry reset */
3188 cmd->retry_for_fw_reset = 0;
3189
05e9ebbe
SP		 3190 if (cmd->scmd)
3191 cmd->scmd->SCp.ptr = NULL;
c4a3e0a5
BS		 3192
3193 switch (hdr->cmd) {
e5f93a36
AR		 3194 case MFI_CMD_INVALID:
3195 /* Some older 1068 controller FW may keep a pended
3196 MR_DCMD_CTRL_EVENT_GET_INFO left over from the main kernel
3197 when booting the kdump kernel. Ignore this command to
3198 prevent a kernel panic on shutdown of the kdump kernel. */
1be18254
BH		 3199 dev_warn(&instance->pdev->dev, "MFI_CMD_INVALID command "
3200 "completed\n");
3201 dev_warn(&instance->pdev->dev, "If you have a controller "
3202 "other than PERC5, please upgrade your firmware\n");
e5f93a36 3203 break;
c4a3e0a5
BS		 3204 case MFI_CMD_PD_SCSI_IO:
3205 case MFI_CMD_LD_SCSI_IO:
3206
3207 /*
3208 * MFI_CMD_PD_SCSI_IO and MFI_CMD_LD_SCSI_IO could have been
3209 * issued either through an IO path or an IOCTL path. If it
3210 * was via IOCTL, we will send it to internal completion.
3211 */
3212 if (cmd->sync_cmd) {
3213 cmd->sync_cmd = 0;
3214 megasas_complete_int_cmd(instance, cmd);
3215 break;
3216 }
3217
c4a3e0a5
BS		 3218 case MFI_CMD_LD_READ:
3219 case MFI_CMD_LD_WRITE:
3220
3221 if (alt_status) {
3222 cmd->scmd->result = alt_status << 16;
3223 exception = 1;
3224 }
3225
3226 if (exception) {
3227
e4a082c7 3228 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 3229
155d98f0 3230 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 3231 cmd->scmd->scsi_done(cmd->scmd);
3232 megasas_return_cmd(instance, cmd);
3233
3234 break;
3235 }
3236
3237 switch (hdr->cmd_status) {
3238
3239 case MFI_STAT_OK:
3240 cmd->scmd->result = DID_OK << 16;
3241 break;
3242
3243 case MFI_STAT_SCSI_IO_FAILED:
3244 case MFI_STAT_LD_INIT_IN_PROGRESS:
3245 cmd->scmd->result =
3246 (DID_ERROR << 16) | hdr->scsi_status;
3247 break;
3248
3249 case MFI_STAT_SCSI_DONE_WITH_ERROR:
3250
3251 cmd->scmd->result = (DID_OK << 16) | hdr->scsi_status;
3252
3253 if (hdr->scsi_status == SAM_STAT_CHECK_CONDITION) {
3254 memset(cmd->scmd->sense_buffer, 0,
3255 SCSI_SENSE_BUFFERSIZE);
3256 memcpy(cmd->scmd->sense_buffer, cmd->sense,
3257 hdr->sense_len);
3258
3259 cmd->scmd->result |= DRIVER_SENSE << 24;
3260 }
3261
3262 break;
3263
3264 case MFI_STAT_LD_OFFLINE:
3265 case MFI_STAT_DEVICE_NOT_FOUND:
3266 cmd->scmd->result = DID_BAD_TARGET << 16;
3267 break;
3268
3269 default:
1be18254 3270 dev_printk(KERN_DEBUG, &instance->pdev->dev, "MFI FW status %#x\n",
c4a3e0a5
BS		 3271 hdr->cmd_status);
3272 cmd->scmd->result = DID_ERROR << 16;
3273 break;
3274 }
3275
e4a082c7 3276 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 3277
155d98f0 3278 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 3279 cmd->scmd->scsi_done(cmd->scmd);
3280 megasas_return_cmd(instance, cmd);
3281
3282 break;
3283
3284 case MFI_CMD_SMP:
3285 case MFI_CMD_STP:
3286 case MFI_CMD_DCMD:
94cd65dd 3287 opcode = le32_to_cpu(cmd->frame->dcmd.opcode);
9c915a8c 3288 /* Check for LD map update */
94cd65dd
SS		 3289 if ((opcode == MR_DCMD_LD_MAP_GET_INFO)
3290 && (cmd->frame->dcmd.mbox.b[1] == 1)) {
bc93d425 3291 fusion->fast_path_io = 0;
9c915a8c 3292 spin_lock_irqsave(instance->host->host_lock, flags);
3761cb4c 3293 instance->map_update_cmd = NULL;
9c915a8c
AR		 3294 if (cmd->frame->hdr.cmd_status != 0) {
3295 if (cmd->frame->hdr.cmd_status !=
3296 MFI_STAT_NOT_FOUND)
1be18254 3297 dev_warn(&instance->pdev->dev, "map syncfailed, status = 0x%x\n",
9c915a8c
AR		 3298 cmd->frame->hdr.cmd_status);
3299 else {
4026e9aa 3300 megasas_return_cmd(instance, cmd);
9c915a8c
AR		 3301 spin_unlock_irqrestore(
3302 instance->host->host_lock,
3303 flags);
3304 break;
3305 }
3306 } else
3307 instance->map_id++;
4026e9aa 3308 megasas_return_cmd(instance, cmd);
bc93d425
SS		 3309
3310 /*
3311 * Set fast path IO to ZERO.
3312 * Validate Map will set proper value.
3313 * Meanwhile all IOs will go as LD IO.
3314 */
3315 if (MR_ValidateMapInfo(instance))
9c915a8c
AR		 3316 fusion->fast_path_io = 1;
3317 else
3318 fusion->fast_path_io = 0;
3319 megasas_sync_map_info(instance);
3320 spin_unlock_irqrestore(instance->host->host_lock,
3321 flags);
3322 break;
3323 }
94cd65dd
SS		 3324 if (opcode == MR_DCMD_CTRL_EVENT_GET_INFO ||
3325 opcode == MR_DCMD_CTRL_EVENT_GET) {
c3518837
YB		 3326 spin_lock_irqsave(&poll_aen_lock, flags);
3327 megasas_poll_wait_aen = 0;
3328 spin_unlock_irqrestore(&poll_aen_lock, flags);
3329 }
c4a3e0a5 3330
3761cb4c 3331 /* FW has an updated PD sequence */
3332 if ((opcode == MR_DCMD_SYSTEM_PD_MAP_GET_INFO) &&
3333 (cmd->frame->dcmd.mbox.b[0] == 1)) {
3334
3335 spin_lock_irqsave(instance->host->host_lock, flags);
3336 status = cmd->frame->hdr.cmd_status;
3337 instance->jbod_seq_cmd = NULL;
3338 megasas_return_cmd(instance, cmd);
3339
3340 if (status == MFI_STAT_OK) {
3341 instance->pd_seq_map_id++;
3342 /* Re-register a pd sync seq num cmd */
3343 if (megasas_sync_pd_seq_num(instance, true))
3344 instance->use_seqnum_jbod_fp = false;
3345 } else
3346 instance->use_seqnum_jbod_fp = false;
3347
3348 spin_unlock_irqrestore(instance->host->host_lock, flags);
3349 break;
3350 }
3351
c4a3e0a5
BS		 3352 /*
3353 * See if got an event notification
3354 */
94cd65dd 3355 if (opcode == MR_DCMD_CTRL_EVENT_WAIT)
c4a3e0a5
BS		 3356 megasas_service_aen(instance, cmd);
3357 else
3358 megasas_complete_int_cmd(instance, cmd);
3359
3360 break;
3361
3362 case MFI_CMD_ABORT:
3363 /*
3364 * Cmd issued to abort another cmd returned
3365 */
3366 megasas_complete_abort(instance, cmd);
3367 break;
3368
3369 default:
1be18254 3370 dev_info(&instance->pdev->dev, "Unknown command completed! [0x%X]\n",
c4a3e0a5
BS		 3371 hdr->cmd);
3372 break;
3373 }
3374}
3375
39a98554 3376/**
3377 * megasas_issue_pending_cmds_again - issue all pending cmds
da0dc9fb 3378 * in FW again because of the fw reset
39a98554 3379 * @instance: Adapter soft state
3380 */
3381static inline void
3382megasas_issue_pending_cmds_again(struct megasas_instance *instance)
3383{
3384 struct megasas_cmd *cmd;
3385 struct list_head clist_local;
3386 union megasas_evt_class_locale class_locale;
3387 unsigned long flags;
3388 u32 seq_num;
3389
3390 INIT_LIST_HEAD(&clist_local);
3391 spin_lock_irqsave(&instance->hba_lock, flags);
3392 list_splice_init(&instance->internal_reset_pending_q, &clist_local);
3393 spin_unlock_irqrestore(&instance->hba_lock, flags);
3394
3395 while (!list_empty(&clist_local)) {
da0dc9fb 3396 cmd = list_entry((&clist_local)->next,
39a98554 3397 struct megasas_cmd, list);
3398 list_del_init(&cmd->list);
3399
3400 if (cmd->sync_cmd || cmd->scmd) {
1be18254
BH		 3401 dev_notice(&instance->pdev->dev, "command %p, %p:%d"
3402 "detected to be pending while HBA reset\n",
39a98554 3403 cmd, cmd->scmd, cmd->sync_cmd);
3404
3405 cmd->retry_for_fw_reset++;
3406
3407 if (cmd->retry_for_fw_reset == 3) {
1be18254 3408 dev_notice(&instance->pdev->dev, "cmd %p, %p:%d"
39a98554 3409 "was tried multiple times during reset."
3410 "Shutting down the HBA\n",
3411 cmd, cmd->scmd, cmd->sync_cmd);
c8dd61ef
SS		 3412 instance->instancet->disable_intr(instance);
3413 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3414 megaraid_sas_kill_hba(instance);
39a98554 3415 return;
3416 }
3417 }
3418
3419 if (cmd->sync_cmd == 1) {
3420 if (cmd->scmd) {
1be18254 3421 dev_notice(&instance->pdev->dev, "unexpected"
39a98554 3422 "cmd attached to internal command!\n");
3423 }
1be18254 3424 dev_notice(&instance->pdev->dev, "%p synchronous cmd"
39a98554 3425 "on the internal reset queue,"
3426 "issue it again.\n", cmd);
2be2a988 3427 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 3428 instance->instancet->fire_cmd(instance,
da0dc9fb 3429 cmd->frame_phys_addr,
39a98554 3430 0, instance->reg_set);
3431 } else if (cmd->scmd) {
1be18254 3432 dev_notice(&instance->pdev->dev, "%p scsi cmd [%02x]"
39a98554 3433 "detected on the internal queue, issue again.\n",
5cd049a5 3434 cmd, cmd->scmd->cmnd[0]);
39a98554 3435
3436 atomic_inc(&instance->fw_outstanding);
3437 instance->instancet->fire_cmd(instance,
3438 cmd->frame_phys_addr,
3439 cmd->frame_count-1, instance->reg_set);
3440 } else {
1be18254 3441 dev_notice(&instance->pdev->dev, "%p unexpected cmd on the"
39a98554 3442 "internal reset defer list while re-issue!!\n",
3443 cmd);
3444 }
3445 }
3446
3447 if (instance->aen_cmd) {
1be18254 3448 dev_notice(&instance->pdev->dev, "aen_cmd in def process\n");
39a98554 3449 megasas_return_cmd(instance, instance->aen_cmd);
3450
da0dc9fb 3451 instance->aen_cmd = NULL;
39a98554 3452 }
3453
3454 /*
da0dc9fb
BH		 3455 * Initiate AEN (Asynchronous Event Notification)
3456 */
39a98554 3457 seq_num = instance->last_seq_num;
3458 class_locale.members.reserved = 0;
3459 class_locale.members.locale = MR_EVT_LOCALE_ALL;
3460 class_locale.members.class = MR_EVT_CLASS_DEBUG;
3461
3462 megasas_register_aen(instance, seq_num, class_locale.word);
3463}
3464
3465/**
3466 * Move the internal reset pending commands to a deferred queue.
3467 *
3468 * We move the commands pending at internal reset time to a
3469 * pending queue. This queue would be flushed after successful
3470 * completion of the internal reset sequence. if the internal reset
3471 * did not complete in time, the kernel reset handler would flush
3472 * these commands.
3473 **/
3474static void
3475megasas_internal_reset_defer_cmds(struct megasas_instance *instance)
3476{
3477 struct megasas_cmd *cmd;
3478 int i;
50b7f5a2 3479 u16 max_cmd = instance->max_fw_cmds;
39a98554 3480 u32 defer_index;
3481 unsigned long flags;
3482
da0dc9fb 3483 defer_index = 0;
90dc9d98 3484 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
39a98554 3485 for (i = 0; i < max_cmd; i++) {
3486 cmd = instance->cmd_list[i];
3487 if (cmd->sync_cmd == 1 || cmd->scmd) {
1be18254 3488 dev_notice(&instance->pdev->dev, "moving cmd[%d]:%p:%d:%p"
39a98554 3489 "on the defer queue as internal\n",
3490 defer_index, cmd, cmd->sync_cmd, cmd->scmd);
3491
3492 if (!list_empty(&cmd->list)) {
1be18254 3493 dev_notice(&instance->pdev->dev, "ERROR while"
39a98554 3494 " moving this cmd:%p, %d %p, it was"
3495 "discovered on some list?\n",
3496 cmd, cmd->sync_cmd, cmd->scmd);
3497
3498 list_del_init(&cmd->list);
3499 }
3500 defer_index++;
3501 list_add_tail(&cmd->list,
3502 &instance->internal_reset_pending_q);
3503 }
3504 }
90dc9d98 3505 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
39a98554 3506}
3507
3508
3509static void
3510process_fw_state_change_wq(struct work_struct *work)
3511{
3512 struct megasas_instance *instance =
3513 container_of(work, struct megasas_instance, work_init);
3514 u32 wait;
3515 unsigned long flags;
3516
8a01a41d 3517 if (atomic_read(&instance->adprecovery) != MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3518 dev_notice(&instance->pdev->dev, "error, recovery st %x\n",
8a01a41d 3519 atomic_read(&instance->adprecovery));
39a98554 3520 return ;
3521 }
3522
8a01a41d 3523 if (atomic_read(&instance->adprecovery) == MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3524 dev_notice(&instance->pdev->dev, "FW detected to be in fault"
39a98554 3525 "state, restarting it...\n");
3526
d46a3ad6 3527 instance->instancet->disable_intr(instance);
39a98554 3528 atomic_set(&instance->fw_outstanding, 0);
3529
3530 atomic_set(&instance->fw_reset_no_pci_access, 1);
3531 instance->instancet->adp_reset(instance, instance->reg_set);
da0dc9fb 3532 atomic_set(&instance->fw_reset_no_pci_access, 0);
39a98554 3533
1be18254 3534 dev_notice(&instance->pdev->dev, "FW restarted successfully,"
39a98554 3535 "initiating next stage...\n");
3536
1be18254 3537 dev_notice(&instance->pdev->dev, "HBA recovery state machine,"
39a98554 3538 "state 2 starting...\n");
3539
da0dc9fb 3540 /* waiting for about 20 second before start the second init */
39a98554 3541 for (wait = 0; wait < 30; wait++) {
3542 msleep(1000);
3543 }
3544
058a8fac 3545 if (megasas_transition_to_ready(instance, 1)) {
1be18254 3546 dev_notice(&instance->pdev->dev, "adapter not ready\n");
39a98554 3547
c8dd61ef 3548 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3549 megaraid_sas_kill_hba(instance);
39a98554 3550 return ;
3551 }
3552
3553 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
3554 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
3555 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)
3556 ) {
3557 *instance->consumer = *instance->producer;
3558 } else {
3559 *instance->consumer = 0;
3560 *instance->producer = 0;
3561 }
3562
3563 megasas_issue_init_mfi(instance);
3564
3565 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 3566 atomic_set(&instance->adprecovery, MEGASAS_HBA_OPERATIONAL);
39a98554 3567 spin_unlock_irqrestore(&instance->hba_lock, flags);
d46a3ad6 3568 instance->instancet->enable_intr(instance);
39a98554 3569
3570 megasas_issue_pending_cmds_again(instance);
3571 instance->issuepend_done = 1;
3572 }
39a98554 3573}
3574
c4a3e0a5
BS		 3575/**
3576 * megasas_deplete_reply_queue - Processes all completed commands
3577 * @instance: Adapter soft state
3578 * @alt_status: Alternate status to be returned to
da0dc9fb
BH		 3579 * SCSI mid-layer instead of the status
3580 * returned by the FW
39a98554 3581 * Note: this must be called with hba lock held
c4a3e0a5 3582 */
858119e1 3583static int
39a98554 3584megasas_deplete_reply_queue(struct megasas_instance *instance,
3585 u8 alt_status)
c4a3e0a5 3586{
39a98554 3587 u32 mfiStatus;
3588 u32 fw_state;
3589
3590 if ((mfiStatus = instance->instancet->check_reset(instance,
3591 instance->reg_set)) == 1) {
3592 return IRQ_HANDLED;
3593 }
3594
3595 if ((mfiStatus = instance->instancet->clear_intr(
3596 instance->reg_set)
3597 ) == 0) {
e1419191 3598 /* Hardware may not set outbound_intr_status in MSI-X mode */
c8e858fe 3599 if (!instance->msix_vectors)
e1419191 3600 return IRQ_NONE;
39a98554 3601 }
3602
3603 instance->mfiStatus = mfiStatus;
3604
3605 if ((mfiStatus & MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE)) {
3606 fw_state = instance->instancet->read_fw_status_reg(
3607 instance->reg_set) & MFI_STATE_MASK;
3608
3609 if (fw_state != MFI_STATE_FAULT) {
1be18254 3610 dev_notice(&instance->pdev->dev, "fw state:%x\n",
39a98554 3611 fw_state);
3612 }
3613
3614 if ((fw_state == MFI_STATE_FAULT) &&
3615 (instance->disableOnlineCtrlReset == 0)) {
1be18254 3616 dev_notice(&instance->pdev->dev, "wait adp restart\n");
39a98554 3617
3618 if ((instance->pdev->device ==
3619 PCI_DEVICE_ID_LSI_SAS1064R) ||
3620 (instance->pdev->device ==
3621 PCI_DEVICE_ID_DELL_PERC5) ||
3622 (instance->pdev->device ==
3623 PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
3624
3625 *instance->consumer =
94cd65dd 3626 cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
39a98554 3627 }
3628
3629
d46a3ad6 3630 instance->instancet->disable_intr(instance);
8a01a41d 3631 atomic_set(&instance->adprecovery, MEGASAS_ADPRESET_SM_INFAULT);
39a98554 3632 instance->issuepend_done = 0;
3633
3634 atomic_set(&instance->fw_outstanding, 0);
3635 megasas_internal_reset_defer_cmds(instance);
3636
1be18254 3637 dev_notice(&instance->pdev->dev, "fwState=%x, stage:%d\n",
8a01a41d 3638 fw_state, atomic_read(&instance->adprecovery));
39a98554 3639
3640 schedule_work(&instance->work_init);
3641 return IRQ_HANDLED;
3642
3643 } else {
1be18254 3644 dev_notice(&instance->pdev->dev, "fwstate:%x, dis_OCR=%x\n",
39a98554 3645 fw_state, instance->disableOnlineCtrlReset);
3646 }
3647 }
c4a3e0a5 3648
5d018ad0 3649 tasklet_schedule(&instance->isr_tasklet);
c4a3e0a5
BS		 3650 return IRQ_HANDLED;
3651}
c4a3e0a5
BS		 3652/**
3653 * megasas_isr - isr entry point
3654 */
7d12e780 3655static irqreturn_t megasas_isr(int irq, void *devp)
c4a3e0a5 3656{
c8e858fe
AR		 3657 struct megasas_irq_context *irq_context = devp;
3658 struct megasas_instance *instance = irq_context->instance;
39a98554 3659 unsigned long flags;
da0dc9fb 3660 irqreturn_t rc;
39a98554 3661
c8e858fe 3662 if (atomic_read(&instance->fw_reset_no_pci_access))
39a98554 3663 return IRQ_HANDLED;
3664
39a98554 3665 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 3666 rc = megasas_deplete_reply_queue(instance, DID_OK);
39a98554 3667 spin_unlock_irqrestore(&instance->hba_lock, flags);
3668
3669 return rc;
c4a3e0a5
BS		 3670}
3671
3672/**
3673 * megasas_transition_to_ready - Move the FW to READY state
1341c939 3674 * @instance: Adapter soft state
c4a3e0a5
BS		 3675 *
3676 * During the initialization, FW passes can potentially be in any one of
3677 * several possible states. If the FW in operational, waiting-for-handshake
3678 * states, driver must take steps to bring it to ready state. Otherwise, it
3679 * has to wait for the ready state.
3680 */
9c915a8c 3681int
058a8fac 3682megasas_transition_to_ready(struct megasas_instance *instance, int ocr)
c4a3e0a5
BS		 3683{
3684 int i;
3685 u8 max_wait;
3686 u32 fw_state;
3687 u32 cur_state;
7218df69 3688 u32 abs_state, curr_abs_state;
c4a3e0a5 3689
bc6ac5e8
TH		 3690 abs_state = instance->instancet->read_fw_status_reg(instance->reg_set);
3691 fw_state = abs_state & MFI_STATE_MASK;
c4a3e0a5 3692
e3bbff9f 3693 if (fw_state != MFI_STATE_READY)
1be18254 3694 dev_info(&instance->pdev->dev, "Waiting for FW to come to ready"
0d49016b 3695 " state\n");
e3bbff9f 3696
c4a3e0a5
BS		 3697 while (fw_state != MFI_STATE_READY) {
3698
c4a3e0a5
BS		 3699 switch (fw_state) {
3700
3701 case MFI_STATE_FAULT:
1be18254 3702 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW in FAULT state!!\n");
058a8fac
AR		 3703 if (ocr) {
3704 max_wait = MEGASAS_RESET_WAIT_TIME;
3705 cur_state = MFI_STATE_FAULT;
3706 break;
3707 } else
3708 return -ENODEV;
c4a3e0a5
BS		 3709
3710 case MFI_STATE_WAIT_HANDSHAKE:
3711 /*
3712 * Set the CLR bit in inbound doorbell
3713 */
0c79e681 3714 if ((instance->pdev->device ==
87911122
YB		 3715 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3716 (instance->pdev->device ==
9c915a8c 3717 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3718 (instance->ctrl_context))
87911122
YB		 3719 writel(
3720 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
9c915a8c 3721 &instance->reg_set->doorbell);
5a8cb85b 3722 else
87911122
YB		 3723 writel(
3724 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
3725 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3726
7218df69 3727 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3728 cur_state = MFI_STATE_WAIT_HANDSHAKE;
3729 break;
3730
e3bbff9f 3731 case MFI_STATE_BOOT_MESSAGE_PENDING:
87911122 3732 if ((instance->pdev->device ==
9c915a8c
AR		 3733 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3734 (instance->pdev->device ==
3735 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3736 (instance->ctrl_context))
87911122 3737 writel(MFI_INIT_HOTPLUG,
9c915a8c 3738 &instance->reg_set->doorbell);
5a8cb85b 3739 else
87911122
YB		 3740 writel(MFI_INIT_HOTPLUG,
3741 &instance->reg_set->inbound_doorbell);
e3bbff9f 3742
7218df69 3743 max_wait = MEGASAS_RESET_WAIT_TIME;
e3bbff9f
SP		 3744 cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
3745 break;
3746
c4a3e0a5
BS		 3747 case MFI_STATE_OPERATIONAL:
3748 /*
e3bbff9f 3749 * Bring it to READY state; assuming max wait 10 secs
c4a3e0a5 3750 */
d46a3ad6 3751 instance->instancet->disable_intr(instance);
87911122
YB		 3752 if ((instance->pdev->device ==
3753 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3754 (instance->pdev->device ==
9c915a8c 3755 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3756 (instance->ctrl_context)) {
87911122 3757 writel(MFI_RESET_FLAGS,
9c915a8c 3758 &instance->reg_set->doorbell);
5a8cb85b 3759
3760 if (instance->ctrl_context) {
9c915a8c
AR		 3761 for (i = 0; i < (10 * 1000); i += 20) {
3762 if (readl(
3763 &instance->
3764 reg_set->
3765 doorbell) & 1)
3766 msleep(20);
3767 else
3768 break;
3769 }
3770 }
87911122
YB		 3771 } else
3772 writel(MFI_RESET_FLAGS,
3773 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3774
7218df69 3775 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3776 cur_state = MFI_STATE_OPERATIONAL;
3777 break;
3778
3779 case MFI_STATE_UNDEFINED:
3780 /*
3781 * This state should not last for more than 2 seconds
3782 */
7218df69 3783 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3784 cur_state = MFI_STATE_UNDEFINED;
3785 break;
3786
3787 case MFI_STATE_BB_INIT:
7218df69 3788 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3789 cur_state = MFI_STATE_BB_INIT;
3790 break;
3791
3792 case MFI_STATE_FW_INIT:
7218df69 3793 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3794 cur_state = MFI_STATE_FW_INIT;
3795 break;
3796
3797 case MFI_STATE_FW_INIT_2:
7218df69 3798 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3799 cur_state = MFI_STATE_FW_INIT_2;
3800 break;
3801
3802 case MFI_STATE_DEVICE_SCAN:
7218df69 3803 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3804 cur_state = MFI_STATE_DEVICE_SCAN;
3805 break;
3806
3807 case MFI_STATE_FLUSH_CACHE:
7218df69 3808 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3809 cur_state = MFI_STATE_FLUSH_CACHE;
3810 break;
3811
3812 default:
1be18254 3813 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Unknown state 0x%x\n",
c4a3e0a5
BS		 3814 fw_state);
3815 return -ENODEV;
3816 }
3817
3818 /*
3819 * The cur_state should not last for more than max_wait secs
3820 */
3821 for (i = 0; i < (max_wait * 1000); i++) {
bc6ac5e8
TH		 3822 curr_abs_state = instance->instancet->
3823 read_fw_status_reg(instance->reg_set);
c4a3e0a5 3824
7218df69 3825 if (abs_state == curr_abs_state) {
c4a3e0a5
BS		 3826 msleep(1);
3827 } else
3828 break;
3829 }
3830
3831 /*
3832 * Return error if fw_state hasn't changed after max_wait
3833 */
7218df69 3834 if (curr_abs_state == abs_state) {
1be18254 3835 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW state [%d] hasn't changed "
c4a3e0a5
BS		 3836 "in %d secs\n", fw_state, max_wait);
3837 return -ENODEV;
3838 }
bc6ac5e8
TH		 3839
3840 abs_state = curr_abs_state;
3841 fw_state = curr_abs_state & MFI_STATE_MASK;
39a98554 3842 }
1be18254 3843 dev_info(&instance->pdev->dev, "FW now in Ready state\n");
c4a3e0a5
BS		 3844
3845 return 0;
3846}
3847
3848/**
3849 * megasas_teardown_frame_pool - Destroy the cmd frame DMA pool
3850 * @instance: Adapter soft state
3851 */
3852static void megasas_teardown_frame_pool(struct megasas_instance *instance)
3853{
3854 int i;
50b7f5a2 3855 u16 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3856 struct megasas_cmd *cmd;
3857
3858 if (!instance->frame_dma_pool)
3859 return;
3860
3861 /*
3862 * Return all frames to pool
3863 */
3864 for (i = 0; i < max_cmd; i++) {
3865
3866 cmd = instance->cmd_list[i];
3867
3868 if (cmd->frame)
fc69d86d 3869 dma_pool_free(instance->frame_dma_pool, cmd->frame,
c4a3e0a5
BS		 3870 cmd->frame_phys_addr);
3871
3872 if (cmd->sense)
fc69d86d 3873 dma_pool_free(instance->sense_dma_pool, cmd->sense,
c4a3e0a5
BS		 3874 cmd->sense_phys_addr);
3875 }
3876
3877 /*
3878 * Now destroy the pool itself
3879 */
fc69d86d
RP		 3880 dma_pool_destroy(instance->frame_dma_pool);
3881 dma_pool_destroy(instance->sense_dma_pool);
c4a3e0a5
BS		 3882
3883 instance->frame_dma_pool = NULL;
3884 instance->sense_dma_pool = NULL;
3885}
3886
3887/**
3888 * megasas_create_frame_pool - Creates DMA pool for cmd frames
3889 * @instance: Adapter soft state
3890 *
3891 * Each command packet has an embedded DMA memory buffer that is used for
3892 * filling MFI frame and the SG list that immediately follows the frame. This
3893 * function creates those DMA memory buffers for each command packet by using
3894 * PCI pool facility.
3895 */
3896static int megasas_create_frame_pool(struct megasas_instance *instance)
3897{
3898 int i;
50b7f5a2 3899 u16 max_cmd;
c4a3e0a5 3900 u32 sge_sz;
c4a3e0a5
BS		 3901 u32 frame_count;
3902 struct megasas_cmd *cmd;
3903
9c915a8c 3904 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3905
3906 /*
3907 * Size of our frame is 64 bytes for MFI frame, followed by max SG
3908 * elements and finally SCSI_SENSE_BUFFERSIZE bytes for sense buffer
3909 */
3910 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
3911 sizeof(struct megasas_sge32);
3912
da0dc9fb 3913 if (instance->flag_ieee)
f4c9a131 3914 sge_sz = sizeof(struct megasas_sge_skinny);
f4c9a131 3915
c4a3e0a5 3916 /*
200aed58
SS		 3917 * For MFI controllers.
3918 * max_num_sge = 60
3919 * max_sge_sz = 16 byte (sizeof megasas_sge_skinny)
3920 * Total 960 byte (15 MFI frame of 64 byte)
3921 *
3922 * Fusion adapter require only 3 extra frame.
3923 * max_num_sge = 16 (defined as MAX_IOCTL_SGE)
3924 * max_sge_sz = 12 byte (sizeof megasas_sge64)
3925 * Total 192 byte (3 MFI frame of 64 byte)
c4a3e0a5 3926 */
200aed58 3927 frame_count = instance->ctrl_context ? (3 + 1) : (15 + 1);
21c34006 3928 instance->mfi_frame_size = MEGAMFI_FRAME_SIZE * frame_count;
c4a3e0a5
BS		 3929 /*
3930 * Use DMA pool facility provided by PCI layer
3931 */
fc69d86d
RP		 3932 instance->frame_dma_pool = dma_pool_create("megasas frame pool",
3933 &instance->pdev->dev,
3934 instance->mfi_frame_size, 256, 0);
c4a3e0a5
BS		 3935
3936 if (!instance->frame_dma_pool) {
1be18254 3937 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup frame pool\n");
c4a3e0a5
BS		 3938 return -ENOMEM;
3939 }
3940
fc69d86d
RP		 3941 instance->sense_dma_pool = dma_pool_create("megasas sense pool",
3942 &instance->pdev->dev, 128,
3943 4, 0);
c4a3e0a5
BS		 3944
3945 if (!instance->sense_dma_pool) {
1be18254 3946 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup sense pool\n");
c4a3e0a5 3947
fc69d86d 3948 dma_pool_destroy(instance->frame_dma_pool);
c4a3e0a5
BS		 3949 instance->frame_dma_pool = NULL;
3950
3951 return -ENOMEM;
3952 }
3953
3954 /*
3955 * Allocate and attach a frame to each of the commands in cmd_list.
3956 * By making cmd->index as the context instead of the &cmd, we can
3957 * always use 32bit context regardless of the architecture
3958 */
3959 for (i = 0; i < max_cmd; i++) {
3960
3961 cmd = instance->cmd_list[i];
3962
fc69d86d 3963 cmd->frame = dma_pool_alloc(instance->frame_dma_pool,
c4a3e0a5
BS		 3964 GFP_KERNEL, &cmd->frame_phys_addr);
3965
fc69d86d 3966 cmd->sense = dma_pool_alloc(instance->sense_dma_pool,
c4a3e0a5
BS		 3967 GFP_KERNEL, &cmd->sense_phys_addr);
3968
3969 /*
3970 * megasas_teardown_frame_pool() takes care of freeing
3971 * whatever has been allocated
3972 */
3973 if (!cmd->frame || !cmd->sense) {
fc69d86d 3974 dev_printk(KERN_DEBUG, &instance->pdev->dev, "dma_pool_alloc failed\n");
c4a3e0a5
BS		 3975 megasas_teardown_frame_pool(instance);
3976 return -ENOMEM;
3977 }
3978
21c34006 3979 memset(cmd->frame, 0, instance->mfi_frame_size);
94cd65dd 3980 cmd->frame->io.context = cpu_to_le32(cmd->index);
7e8a75f4 3981 cmd->frame->io.pad_0 = 0;
5a8cb85b 3982 if (!instance->ctrl_context && reset_devices)
e5f93a36 3983 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
c4a3e0a5
BS		 3984 }
3985
3986 return 0;
3987}
3988
3989/**
3990 * megasas_free_cmds - Free all the cmds in the free cmd pool
3991 * @instance: Adapter soft state
3992 */
9c915a8c 3993void megasas_free_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 3994{
3995 int i;
da0dc9fb 3996
c4a3e0a5
BS		 3997 /* First free the MFI frame pool */
3998 megasas_teardown_frame_pool(instance);
3999
4000 /* Free all the commands in the cmd_list */
9c915a8c
AR		 4001 for (i = 0; i < instance->max_mfi_cmds; i++)
4002
c4a3e0a5
BS		 4003 kfree(instance->cmd_list[i]);
4004
4005 /* Free the cmd_list buffer itself */
4006 kfree(instance->cmd_list);
4007 instance->cmd_list = NULL;
4008
4009 INIT_LIST_HEAD(&instance->cmd_pool);
4010}
4011
4012/**
4013 * megasas_alloc_cmds - Allocates the command packets
4014 * @instance: Adapter soft state
4015 *
4016 * Each command that is issued to the FW, whether IO commands from the OS or
4017 * internal commands like IOCTLs, are wrapped in local data structure called
4018 * megasas_cmd. The frame embedded in this megasas_cmd is actually issued to
4019 * the FW.
4020 *
4021 * Each frame has a 32-bit field called context (tag). This context is used
4022 * to get back the megasas_cmd from the frame when a frame gets completed in
4023 * the ISR. Typically the address of the megasas_cmd itself would be used as
4024 * the context. But we wanted to keep the differences between 32 and 64 bit
4025 * systems to the mininum. We always use 32 bit integers for the context. In
4026 * this driver, the 32 bit values are the indices into an array cmd_list.
4027 * This array is used only to look up the megasas_cmd given the context. The
4028 * free commands themselves are maintained in a linked list called cmd_pool.
4029 */
9c915a8c 4030int megasas_alloc_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 4031{
4032 int i;
4033 int j;
50b7f5a2 4034 u16 max_cmd;
c4a3e0a5 4035 struct megasas_cmd *cmd;
90dc9d98 4036 struct fusion_context *fusion;
c4a3e0a5 4037
90dc9d98 4038 fusion = instance->ctrl_context;
9c915a8c 4039 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 4040
4041 /*
4042 * instance->cmd_list is an array of struct megasas_cmd pointers.
4043 * Allocate the dynamic array first and then allocate individual
4044 * commands.
4045 */
dd00cc48 4046 instance->cmd_list = kcalloc(max_cmd, sizeof(struct megasas_cmd*), GFP_KERNEL);
c4a3e0a5
BS		 4047
4048 if (!instance->cmd_list) {
1be18254 4049 dev_printk(KERN_DEBUG, &instance->pdev->dev, "out of memory\n");
c4a3e0a5
BS		 4050 return -ENOMEM;
4051 }
4052
9c915a8c 4053 memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) *max_cmd);
c4a3e0a5
BS		 4054
4055 for (i = 0; i < max_cmd; i++) {
4056 instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd),
4057 GFP_KERNEL);
4058
4059 if (!instance->cmd_list[i]) {
4060
4061 for (j = 0; j < i; j++)
4062 kfree(instance->cmd_list[j]);
4063
4064 kfree(instance->cmd_list);
4065 instance->cmd_list = NULL;
4066
4067 return -ENOMEM;
4068 }
4069 }
4070
c4a3e0a5
BS		 4071 for (i = 0; i < max_cmd; i++) {
4072 cmd = instance->cmd_list[i];
4073 memset(cmd, 0, sizeof(struct megasas_cmd));
4074 cmd->index = i;
39a98554 4075 cmd->scmd = NULL;
c4a3e0a5
BS		 4076 cmd->instance = instance;
4077
4078 list_add_tail(&cmd->list, &instance->cmd_pool);
4079 }
4080
4081 /*
4082 * Create a frame pool and assign one frame to each cmd
4083 */
4084 if (megasas_create_frame_pool(instance)) {
1be18254 4085 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error creating frame DMA pool\n");
c4a3e0a5
BS		 4086 megasas_free_cmds(instance);
4087 }
4088
4089 return 0;
4090}
4091
6d40afbc
SS		 4092/*
4093 * dcmd_timeout_ocr_possible - Check if OCR is possible based on Driver/FW state.
4094 * @instance: Adapter soft state
4095 *
4096 * Return 0 for only Fusion adapter, if driver load/unload is not in progress
4097 * or FW is not under OCR.
4098 */
4099inline int
4100dcmd_timeout_ocr_possible(struct megasas_instance *instance) {
4101
4102 if (!instance->ctrl_context)
4103 return KILL_ADAPTER;
4104 else if (instance->unload ||
4105 test_bit(MEGASAS_FUSION_IN_RESET, &instance->reset_flags))
4106 return IGNORE_TIMEOUT;
4107 else
4108 return INITIATE_OCR;
4109}
4110
15dd0381
S		 4111static void
4112megasas_get_pd_info(struct megasas_instance *instance, struct scsi_device *sdev)
2216c305
SS		 4113{
4114 int ret;
4115 struct megasas_cmd *cmd;
4116 struct megasas_dcmd_frame *dcmd;
4117
15dd0381
S		 4118 struct MR_PRIV_DEVICE *mr_device_priv_data;
4119 u16 device_id = 0;
4120
4121 device_id = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) + sdev->id;
2216c305
SS		 4122 cmd = megasas_get_cmd(instance);
4123
4124 if (!cmd) {
4125 dev_err(&instance->pdev->dev, "Failed to get cmd %s\n", __func__);
15dd0381 4126 return;
2216c305
SS		 4127 }
4128
4129 dcmd = &cmd->frame->dcmd;
4130
4131 memset(instance->pd_info, 0, sizeof(*instance->pd_info));
4132 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4133
4134 dcmd->mbox.s[0] = cpu_to_le16(device_id);
4135 dcmd->cmd = MFI_CMD_DCMD;
4136 dcmd->cmd_status = 0xFF;
4137 dcmd->sge_count = 1;
4138 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
4139 dcmd->timeout = 0;
4140 dcmd->pad_0 = 0;
4141 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_PD_INFO));
4142 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_GET_INFO);
4143 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->pd_info_h);
4144 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_PD_INFO));
4145
4146 if (instance->ctrl_context && !instance->mask_interrupts)
4147 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
4148 else
4149 ret = megasas_issue_polled(instance, cmd);
4150
4151 switch (ret) {
4152 case DCMD_SUCCESS:
15dd0381
S		 4153 mr_device_priv_data = sdev->hostdata;
4154 le16_to_cpus((u16 *)&instance->pd_info->state.ddf.pdType);
4155 mr_device_priv_data->interface_type =
2216c305
SS		 4156 instance->pd_info->state.ddf.pdType.intf;
4157 break;
4158
4159 case DCMD_TIMEOUT:
4160
4161 switch (dcmd_timeout_ocr_possible(instance)) {
4162 case INITIATE_OCR:
4163 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4164 megasas_reset_fusion(instance->host,
4165 MFI_IO_TIMEOUT_OCR);
4166 break;
4167 case KILL_ADAPTER:
4168 megaraid_sas_kill_hba(instance);
4169 break;
4170 case IGNORE_TIMEOUT:
4171 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4172 __func__, __LINE__);
4173 break;
4174 }
4175
4176 break;
4177 }
4178
4179 if (ret != DCMD_TIMEOUT)
4180 megasas_return_cmd(instance, cmd);
4181
15dd0381 4182 return;
2216c305 4183}
81e403ce
YB		 4184/*
4185 * megasas_get_pd_list_info - Returns FW's pd_list structure
4186 * @instance: Adapter soft state
4187 * @pd_list: pd_list structure
4188 *
4189 * Issues an internal command (DCMD) to get the FW's controller PD
4190 * list structure. This information is mainly used to find out SYSTEM
4191 * supported by the FW.
4192 */
4193static int
4194megasas_get_pd_list(struct megasas_instance *instance)
4195{
4196 int ret = 0, pd_index = 0;
4197 struct megasas_cmd *cmd;
4198 struct megasas_dcmd_frame *dcmd;
4199 struct MR_PD_LIST *ci;
4200 struct MR_PD_ADDRESS *pd_addr;
4201 dma_addr_t ci_h = 0;
4202
d9083160
SS		 4203 if (instance->pd_list_not_supported) {
4204 dev_info(&instance->pdev->dev, "MR_DCMD_PD_LIST_QUERY "
4205 "not supported by firmware\n");
4206 return ret;
4207 }
4208
81e403ce
YB		 4209 cmd = megasas_get_cmd(instance);
4210
4211 if (!cmd) {
1be18254 4212 dev_printk(KERN_DEBUG, &instance->pdev->dev, "(get_pd_list): Failed to get cmd\n");
81e403ce
YB		 4213 return -ENOMEM;
4214 }
4215
4216 dcmd = &cmd->frame->dcmd;
4217
4218 ci = pci_alloc_consistent(instance->pdev,
4219 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST), &ci_h);
4220
4221 if (!ci) {
1be18254 4222 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for pd_list\n");
81e403ce
YB		 4223 megasas_return_cmd(instance, cmd);
4224 return -ENOMEM;
4225 }
4226
4227 memset(ci, 0, sizeof(*ci));
4228 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4229
4230 dcmd->mbox.b[0] = MR_PD_QUERY_TYPE_EXPOSED_TO_HOST;
4231 dcmd->mbox.b[1] = 0;
4232 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4233 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
81e403ce 4234 dcmd->sge_count = 1;
94cd65dd 4235 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
81e403ce 4236 dcmd->timeout = 0;
780a3762 4237 dcmd->pad_0 = 0;
94cd65dd
SS		 4238 dcmd->data_xfer_len = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
4239 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_LIST_QUERY);
4240 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4241 dcmd->sgl.sge32[0].length = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
81e403ce 4242
90dc9d98
SS		 4243 if (instance->ctrl_context && !instance->mask_interrupts)
4244 ret = megasas_issue_blocked_cmd(instance, cmd,
6d40afbc 4245 MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4246 else
4247 ret = megasas_issue_polled(instance, cmd);
81e403ce 4248
6d40afbc
SS		 4249 switch (ret) {
4250 case DCMD_FAILED:
30845586
SS		 4251 dev_info(&instance->pdev->dev, "MR_DCMD_PD_LIST_QUERY "
4252 "failed/not supported by firmware\n");
4253
4254 if (instance->ctrl_context)
4255 megaraid_sas_kill_hba(instance);
4256 else
4257 instance->pd_list_not_supported = 1;
6d40afbc
SS		 4258 break;
4259 case DCMD_TIMEOUT:
81e403ce 4260
6d40afbc
SS		 4261 switch (dcmd_timeout_ocr_possible(instance)) {
4262 case INITIATE_OCR:
4263 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4264 /*
4265 * DCMD failed from AEN path.
4266 * AEN path already hold reset_mutex to avoid PCI access
4267 * while OCR is in progress.
4268 */
4269 mutex_unlock(&instance->reset_mutex);
4270 megasas_reset_fusion(instance->host,
4271 MFI_IO_TIMEOUT_OCR);
4272 mutex_lock(&instance->reset_mutex);
4273 break;
4274 case KILL_ADAPTER:
4275 megaraid_sas_kill_hba(instance);
4276 break;
4277 case IGNORE_TIMEOUT:
4278 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d \n",
4279 __func__, __LINE__);
4280 break;
4281 }
81e403ce 4282
6d40afbc
SS		 4283 break;
4284
4285 case DCMD_SUCCESS:
4286 pd_addr = ci->addr;
4287
4288 if ((le32_to_cpu(ci->count) >
4289 (MEGASAS_MAX_PD_CHANNELS * MEGASAS_MAX_DEV_PER_CHANNEL)))
4290 break;
81e403ce 4291
999ece0a 4292 memset(instance->local_pd_list, 0,
6d40afbc 4293 MEGASAS_MAX_PD * sizeof(struct megasas_pd_list));
81e403ce 4294
94cd65dd 4295 for (pd_index = 0; pd_index < le32_to_cpu(ci->count); pd_index++) {
999ece0a 4296 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].tid =
6d40afbc 4297 le16_to_cpu(pd_addr->deviceId);
999ece0a 4298 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveType =
6d40afbc 4299 pd_addr->scsiDevType;
999ece0a 4300 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveState =
6d40afbc 4301 MR_PD_STATE_SYSTEM;
81e403ce
YB		 4302 pd_addr++;
4303 }
6d40afbc 4304
999ece0a
SS		 4305 memcpy(instance->pd_list, instance->local_pd_list,
4306 sizeof(instance->pd_list));
6d40afbc
SS		 4307 break;
4308
81e403ce
YB		 4309 }
4310
4311 pci_free_consistent(instance->pdev,
4312 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST),
4313 ci, ci_h);
90dc9d98 4314
6d40afbc
SS		 4315 if (ret != DCMD_TIMEOUT)
4316 megasas_return_cmd(instance, cmd);
81e403ce
YB		 4317
4318 return ret;
4319}
4320
bdc6fb8d
YB		 4321/*
4322 * megasas_get_ld_list_info - Returns FW's ld_list structure
4323 * @instance: Adapter soft state
4324 * @ld_list: ld_list structure
4325 *
4326 * Issues an internal command (DCMD) to get the FW's controller PD
4327 * list structure. This information is mainly used to find out SYSTEM
4328 * supported by the FW.
4329 */
4330static int
4331megasas_get_ld_list(struct megasas_instance *instance)
4332{
4333 int ret = 0, ld_index = 0, ids = 0;
4334 struct megasas_cmd *cmd;
4335 struct megasas_dcmd_frame *dcmd;
4336 struct MR_LD_LIST *ci;
4337 dma_addr_t ci_h = 0;
94cd65dd 4338 u32 ld_count;
bdc6fb8d
YB		 4339
4340 cmd = megasas_get_cmd(instance);
4341
4342 if (!cmd) {
1be18254 4343 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_list: Failed to get cmd\n");
bdc6fb8d
YB		 4344 return -ENOMEM;
4345 }
4346
4347 dcmd = &cmd->frame->dcmd;
4348
4349 ci = pci_alloc_consistent(instance->pdev,
4350 sizeof(struct MR_LD_LIST),
4351 &ci_h);
4352
4353 if (!ci) {
1be18254 4354 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem in get_ld_list\n");
bdc6fb8d
YB		 4355 megasas_return_cmd(instance, cmd);
4356 return -ENOMEM;
4357 }
4358
4359 memset(ci, 0, sizeof(*ci));
4360 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4361
51087a86
SS		 4362 if (instance->supportmax256vd)
4363 dcmd->mbox.b[0] = 1;
bdc6fb8d 4364 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4365 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
bdc6fb8d 4366 dcmd->sge_count = 1;
94cd65dd 4367 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
bdc6fb8d 4368 dcmd->timeout = 0;
94cd65dd
SS		 4369 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_LIST));
4370 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_GET_LIST);
4371 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4372 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_LIST));
bdc6fb8d
YB		 4373 dcmd->pad_0 = 0;
4374
90dc9d98
SS		 4375 if (instance->ctrl_context && !instance->mask_interrupts)
4376 ret = megasas_issue_blocked_cmd(instance, cmd,
6d40afbc 4377 MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4378 else
4379 ret = megasas_issue_polled(instance, cmd);
4380
94cd65dd
SS		 4381 ld_count = le32_to_cpu(ci->ldCount);
4382
6d40afbc
SS		 4383 switch (ret) {
4384 case DCMD_FAILED:
4385 megaraid_sas_kill_hba(instance);
4386 break;
4387 case DCMD_TIMEOUT:
4388
4389 switch (dcmd_timeout_ocr_possible(instance)) {
4390 case INITIATE_OCR:
4391 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4392 /*
4393 * DCMD failed from AEN path.
4394 * AEN path already hold reset_mutex to avoid PCI access
4395 * while OCR is in progress.
4396 */
4397 mutex_unlock(&instance->reset_mutex);
4398 megasas_reset_fusion(instance->host,
4399 MFI_IO_TIMEOUT_OCR);
4400 mutex_lock(&instance->reset_mutex);
4401 break;
4402 case KILL_ADAPTER:
4403 megaraid_sas_kill_hba(instance);
4404 break;
4405 case IGNORE_TIMEOUT:
4406 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4407 __func__, __LINE__);
4408 break;
4409 }
4410
4411 break;
4412
4413 case DCMD_SUCCESS:
4414 if (ld_count > instance->fw_supported_vd_count)
4415 break;
bdc6fb8d 4416
51087a86 4417 memset(instance->ld_ids, 0xff, MAX_LOGICAL_DRIVES_EXT);
bdc6fb8d 4418
94cd65dd 4419 for (ld_index = 0; ld_index < ld_count; ld_index++) {
bdc6fb8d
YB		 4420 if (ci->ldList[ld_index].state != 0) {
4421 ids = ci->ldList[ld_index].ref.targetId;
6d40afbc 4422 instance->ld_ids[ids] = ci->ldList[ld_index].ref.targetId;
bdc6fb8d
YB		 4423 }
4424 }
6d40afbc
SS		 4425
4426 break;
bdc6fb8d
YB		 4427 }
4428
6d40afbc
SS		 4429 pci_free_consistent(instance->pdev, sizeof(struct MR_LD_LIST), ci, ci_h);
4430
4431 if (ret != DCMD_TIMEOUT)
4432 megasas_return_cmd(instance, cmd);
bdc6fb8d 4433
bdc6fb8d
YB		 4434 return ret;
4435}
4436
21c9e160
AR		 4437/**
4438 * megasas_ld_list_query - Returns FW's ld_list structure
4439 * @instance: Adapter soft state
4440 * @ld_list: ld_list structure
4441 *
4442 * Issues an internal command (DCMD) to get the FW's controller PD
4443 * list structure. This information is mainly used to find out SYSTEM
4444 * supported by the FW.
4445 */
4446static int
4447megasas_ld_list_query(struct megasas_instance *instance, u8 query_type)
4448{
4449 int ret = 0, ld_index = 0, ids = 0;
4450 struct megasas_cmd *cmd;
4451 struct megasas_dcmd_frame *dcmd;
4452 struct MR_LD_TARGETID_LIST *ci;
4453 dma_addr_t ci_h = 0;
94cd65dd 4454 u32 tgtid_count;
21c9e160
AR		 4455
4456 cmd = megasas_get_cmd(instance);
4457
4458 if (!cmd) {
1be18254
BH		 4459 dev_warn(&instance->pdev->dev,
4460 "megasas_ld_list_query: Failed to get cmd\n");
21c9e160
AR		 4461 return -ENOMEM;
4462 }
4463
4464 dcmd = &cmd->frame->dcmd;
4465
4466 ci = pci_alloc_consistent(instance->pdev,
4467 sizeof(struct MR_LD_TARGETID_LIST), &ci_h);
4468
4469 if (!ci) {
1be18254
BH		 4470 dev_warn(&instance->pdev->dev,
4471 "Failed to alloc mem for ld_list_query\n");
21c9e160
AR		 4472 megasas_return_cmd(instance, cmd);
4473 return -ENOMEM;
4474 }
4475
4476 memset(ci, 0, sizeof(*ci));
4477 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4478
4479 dcmd->mbox.b[0] = query_type;
51087a86
SS		 4480 if (instance->supportmax256vd)
4481 dcmd->mbox.b[2] = 1;
21c9e160
AR		 4482
4483 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4484 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
21c9e160 4485 dcmd->sge_count = 1;
94cd65dd 4486 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
21c9e160 4487 dcmd->timeout = 0;
94cd65dd
SS		 4488 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
4489 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_LIST_QUERY);
4490 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4491 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
21c9e160
AR		 4492 dcmd->pad_0 = 0;
4493
90dc9d98 4494 if (instance->ctrl_context && !instance->mask_interrupts)
6d40afbc 4495 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4496 else
4497 ret = megasas_issue_polled(instance, cmd);
21c9e160 4498
6d40afbc
SS		 4499 switch (ret) {
4500 case DCMD_FAILED:
4501 dev_info(&instance->pdev->dev,
4502 "DCMD not supported by firmware - %s %d\n",
4503 __func__, __LINE__);
4504 ret = megasas_get_ld_list(instance);
4505 break;
4506 case DCMD_TIMEOUT:
4507 switch (dcmd_timeout_ocr_possible(instance)) {
4508 case INITIATE_OCR:
4509 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4510 /*
4511 * DCMD failed from AEN path.
4512 * AEN path already hold reset_mutex to avoid PCI access
4513 * while OCR is in progress.
4514 */
4515 mutex_unlock(&instance->reset_mutex);
4516 megasas_reset_fusion(instance->host,
4517 MFI_IO_TIMEOUT_OCR);
4518 mutex_lock(&instance->reset_mutex);
4519 break;
4520 case KILL_ADAPTER:
4521 megaraid_sas_kill_hba(instance);
4522 break;
4523 case IGNORE_TIMEOUT:
4524 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4525 __func__, __LINE__);
4526 break;
4527 }
4528
4529 break;
4530 case DCMD_SUCCESS:
4531 tgtid_count = le32_to_cpu(ci->count);
4532
4533 if ((tgtid_count > (instance->fw_supported_vd_count)))
4534 break;
94cd65dd 4535
21c9e160 4536 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
94cd65dd 4537 for (ld_index = 0; ld_index < tgtid_count; ld_index++) {
21c9e160
AR		 4538 ids = ci->targetId[ld_index];
4539 instance->ld_ids[ids] = ci->targetId[ld_index];
4540 }
4541
6d40afbc 4542 break;
21c9e160
AR		 4543 }
4544
4545 pci_free_consistent(instance->pdev, sizeof(struct MR_LD_TARGETID_LIST),
6d40afbc 4546 ci, ci_h);
21c9e160 4547
6d40afbc
SS		 4548 if (ret != DCMD_TIMEOUT)
4549 megasas_return_cmd(instance, cmd);
21c9e160
AR		 4550
4551 return ret;
4552}
4553
d009b576
SS		 4554/*
4555 * megasas_update_ext_vd_details : Update details w.r.t Extended VD
4556 * instance : Controller's instance
4557*/
4558static void megasas_update_ext_vd_details(struct megasas_instance *instance)
4559{
4560 struct fusion_context *fusion;
d889344e 4561 u32 ventura_map_sz = 0;
d009b576
SS		 4562
4563 fusion = instance->ctrl_context;
4564 /* For MFI based controllers return dummy success */
4565 if (!fusion)
4566 return;
4567
4568 instance->supportmax256vd =
4569 instance->ctrl_info->adapterOperations3.supportMaxExtLDs;
4570 /* Below is additional check to address future FW enhancement */
4571 if (instance->ctrl_info->max_lds > 64)
4572 instance->supportmax256vd = 1;
4573
4574 instance->drv_supported_vd_count = MEGASAS_MAX_LD_CHANNELS
4575 * MEGASAS_MAX_DEV_PER_CHANNEL;
4576 instance->drv_supported_pd_count = MEGASAS_MAX_PD_CHANNELS
4577 * MEGASAS_MAX_DEV_PER_CHANNEL;
4578 if (instance->supportmax256vd) {
4579 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES_EXT;
4580 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4581 } else {
4582 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
4583 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4584 }
d88da09a
SS		 4585
4586 dev_info(&instance->pdev->dev,
4587 "firmware type\t: %s\n",
4588 instance->supportmax256vd ? "Extended VD(240 VD)firmware" :
4589 "Legacy(64 VD) firmware");
d009b576 4590
d889344e
SC		 4591 if (instance->max_raid_mapsize) {
4592 ventura_map_sz = instance->max_raid_mapsize *
4593 MR_MIN_MAP_SIZE; /* 64k */
4594 fusion->current_map_sz = ventura_map_sz;
4595 fusion->max_map_sz = ventura_map_sz;
4596 } else {
4597 fusion->old_map_sz = sizeof(struct MR_FW_RAID_MAP) +
4598 (sizeof(struct MR_LD_SPAN_MAP) *
4599 (instance->fw_supported_vd_count - 1));
4600 fusion->new_map_sz = sizeof(struct MR_FW_RAID_MAP_EXT);
d009b576 4601
d889344e
SC		 4602 fusion->max_map_sz =
4603 max(fusion->old_map_sz, fusion->new_map_sz);
d009b576 4604
d889344e
SC		 4605 if (instance->supportmax256vd)
4606 fusion->current_map_sz = fusion->new_map_sz;
4607 else
4608 fusion->current_map_sz = fusion->old_map_sz;
4609 }
4610 /* irrespective of FW raid maps, driver raid map is constant */
4611 fusion->drv_map_sz = sizeof(struct MR_DRV_RAID_MAP_ALL);
d009b576
SS		 4612}
4613
c4a3e0a5
BS		 4614/**
4615 * megasas_get_controller_info - Returns FW's controller structure
4616 * @instance: Adapter soft state
c4a3e0a5
BS		 4617 *
4618 * Issues an internal command (DCMD) to get the FW's controller structure.
4619 * This information is mainly used to find out the maximum IO transfer per
4620 * command supported by the FW.
4621 */
51087a86 4622int
d009b576 4623megasas_get_ctrl_info(struct megasas_instance *instance)
c4a3e0a5
BS		 4624{
4625 int ret = 0;
4626 struct megasas_cmd *cmd;
4627 struct megasas_dcmd_frame *dcmd;
4628 struct megasas_ctrl_info *ci;
d009b576 4629 struct megasas_ctrl_info *ctrl_info;
c4a3e0a5
BS		 4630 dma_addr_t ci_h = 0;
4631
d009b576
SS		 4632 ctrl_info = instance->ctrl_info;
4633
c4a3e0a5
BS		 4634 cmd = megasas_get_cmd(instance);
4635
4636 if (!cmd) {
1be18254 4637 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a free cmd\n");
c4a3e0a5
BS		 4638 return -ENOMEM;
4639 }
4640
4641 dcmd = &cmd->frame->dcmd;
4642
4643 ci = pci_alloc_consistent(instance->pdev,
4644 sizeof(struct megasas_ctrl_info), &ci_h);
4645
4646 if (!ci) {
1be18254 4647 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for ctrl info\n");
c4a3e0a5
BS		 4648 megasas_return_cmd(instance, cmd);
4649 return -ENOMEM;
4650 }
4651
4652 memset(ci, 0, sizeof(*ci));
4653 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4654
4655 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4656 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
c4a3e0a5 4657 dcmd->sge_count = 1;
94cd65dd 4658 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 4659 dcmd->timeout = 0;
780a3762 4660 dcmd->pad_0 = 0;
94cd65dd
SS		 4661 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_ctrl_info));
4662 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_GET_INFO);
4663 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4664 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_ctrl_info));
51087a86 4665 dcmd->mbox.b[0] = 1;
c4a3e0a5 4666
90dc9d98 4667 if (instance->ctrl_context && !instance->mask_interrupts)
6d40afbc 4668 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
90dc9d98
SS		 4669 else
4670 ret = megasas_issue_polled(instance, cmd);
4671
6d40afbc
SS		 4672 switch (ret) {
4673 case DCMD_SUCCESS:
c4a3e0a5 4674 memcpy(ctrl_info, ci, sizeof(struct megasas_ctrl_info));
6d40afbc
SS		 4675 /* Save required controller information in
4676 * CPU endianness format.
4677 */
d009b576
SS		 4678 le32_to_cpus((u32 *)&ctrl_info->properties.OnOffProperties);
4679 le32_to_cpus((u32 *)&ctrl_info->adapterOperations2);
4680 le32_to_cpus((u32 *)&ctrl_info->adapterOperations3);
ede7c3ce 4681 le16_to_cpus((u16 *)&ctrl_info->adapter_operations4);
6d40afbc
SS		 4682
4683 /* Update the latest Ext VD info.
4684 * From Init path, store current firmware details.
4685 * From OCR path, detect any firmware properties changes.
4686 * in case of Firmware upgrade without system reboot.
4687 */
d009b576 4688 megasas_update_ext_vd_details(instance);
3761cb4c 4689 instance->use_seqnum_jbod_fp =
4690 ctrl_info->adapterOperations3.useSeqNumJbodFP;
ede7c3ce
SC		 4691 instance->support_morethan256jbod =
4692 ctrl_info->adapter_operations4.support_pd_map_target_id;
6d40afbc
SS		 4693
4694 /*Check whether controller is iMR or MR */
4026e9aa
SS		 4695 instance->is_imr = (ctrl_info->memory_size ? 0 : 1);
4696 dev_info(&instance->pdev->dev,
6d40afbc
SS		 4697 "controller type\t: %s(%dMB)\n",
4698 instance->is_imr ? "iMR" : "MR",
4699 le16_to_cpu(ctrl_info->memory_size));
4700
c4bd2654 4701 instance->disableOnlineCtrlReset =
4702 ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset;
3222251d 4703 instance->secure_jbod_support =
4704 ctrl_info->adapterOperations3.supportSecurityonJBOD;
6d40afbc
SS		 4705 dev_info(&instance->pdev->dev, "Online Controller Reset(OCR)\t: %s\n",
4706 instance->disableOnlineCtrlReset ? "Disabled" : "Enabled");
3222251d 4707 dev_info(&instance->pdev->dev, "Secure JBOD support\t: %s\n",
4708 instance->secure_jbod_support ? "Yes" : "No");
6d40afbc
SS		 4709 break;
4710
4711 case DCMD_TIMEOUT:
4712 switch (dcmd_timeout_ocr_possible(instance)) {
4713 case INITIATE_OCR:
4714 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4715 megasas_reset_fusion(instance->host,
4716 MFI_IO_TIMEOUT_OCR);
4717 break;
4718 case KILL_ADAPTER:
4719 megaraid_sas_kill_hba(instance);
4720 break;
4721 case IGNORE_TIMEOUT:
4722 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4723 __func__, __LINE__);
4724 break;
4725 }
4726 case DCMD_FAILED:
4727 megaraid_sas_kill_hba(instance);
4728 break;
4729
d009b576 4730 }
c4a3e0a5
BS		 4731
4732 pci_free_consistent(instance->pdev, sizeof(struct megasas_ctrl_info),
4733 ci, ci_h);
4734
4026e9aa 4735 megasas_return_cmd(instance, cmd);
6d40afbc
SS		 4736
4737
c4a3e0a5
BS		 4738 return ret;
4739}
4740
fc62b3fc
SS		 4741/*
4742 * megasas_set_crash_dump_params - Sends address of crash dump DMA buffer
4743 * to firmware
4744 *
4745 * @instance: Adapter soft state
4746 * @crash_buf_state - tell FW to turn ON/OFF crash dump feature
4747 MR_CRASH_BUF_TURN_OFF = 0
4748 MR_CRASH_BUF_TURN_ON = 1
4749 * @return 0 on success non-zero on failure.
4750 * Issues an internal command (DCMD) to set parameters for crash dump feature.
4751 * Driver will send address of crash dump DMA buffer and set mbox to tell FW
4752 * that driver supports crash dump feature. This DCMD will be sent only if
4753 * crash dump feature is supported by the FW.
4754 *
4755 */
4756int megasas_set_crash_dump_params(struct megasas_instance *instance,
4757 u8 crash_buf_state)
4758{
4759 int ret = 0;
4760 struct megasas_cmd *cmd;
4761 struct megasas_dcmd_frame *dcmd;
4762
4763 cmd = megasas_get_cmd(instance);
4764
4765 if (!cmd) {
4766 dev_err(&instance->pdev->dev, "Failed to get a free cmd\n");
4767 return -ENOMEM;
4768 }
4769
4770
4771 dcmd = &cmd->frame->dcmd;
4772
4773 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4774 dcmd->mbox.b[0] = crash_buf_state;
4775 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4776 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
fc62b3fc
SS		 4777 dcmd->sge_count = 1;
4778 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
4779 dcmd->timeout = 0;
4780 dcmd->pad_0 = 0;
4781 dcmd->data_xfer_len = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4782 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SET_CRASH_DUMP_PARAMS);
4783 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->crash_dump_h);
4784 dcmd->sgl.sge32[0].length = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4785
90dc9d98 4786 if (instance->ctrl_context && !instance->mask_interrupts)
6d40afbc 4787 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
fc62b3fc 4788 else
90dc9d98
SS		 4789 ret = megasas_issue_polled(instance, cmd);
4790
6d40afbc
SS		 4791 if (ret == DCMD_TIMEOUT) {
4792 switch (dcmd_timeout_ocr_possible(instance)) {
4793 case INITIATE_OCR:
4794 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4795 megasas_reset_fusion(instance->host,
4796 MFI_IO_TIMEOUT_OCR);
4797 break;
4798 case KILL_ADAPTER:
4799 megaraid_sas_kill_hba(instance);
4800 break;
4801 case IGNORE_TIMEOUT:
4802 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4803 __func__, __LINE__);
4804 break;
4805 }
4806 } else
4807 megasas_return_cmd(instance, cmd);
4808
fc62b3fc
SS		 4809 return ret;
4810}
4811
31ea7088 4812/**
4813 * megasas_issue_init_mfi - Initializes the FW
4814 * @instance: Adapter soft state
4815 *
4816 * Issues the INIT MFI cmd
4817 */
4818static int
4819megasas_issue_init_mfi(struct megasas_instance *instance)
4820{
9ab9ed38 4821 __le32 context;
31ea7088 4822 struct megasas_cmd *cmd;
31ea7088 4823 struct megasas_init_frame *init_frame;
4824 struct megasas_init_queue_info *initq_info;
4825 dma_addr_t init_frame_h;
4826 dma_addr_t initq_info_h;
4827
4828 /*
4829 * Prepare a init frame. Note the init frame points to queue info
4830 * structure. Each frame has SGL allocated after first 64 bytes. For
4831 * this frame - since we don't need any SGL - we use SGL's space as
4832 * queue info structure
4833 *
4834 * We will not get a NULL command below. We just created the pool.
4835 */
4836 cmd = megasas_get_cmd(instance);
4837
4838 init_frame = (struct megasas_init_frame *)cmd->frame;
4839 initq_info = (struct megasas_init_queue_info *)
4840 ((unsigned long)init_frame + 64);
4841
4842 init_frame_h = cmd->frame_phys_addr;
4843 initq_info_h = init_frame_h + 64;
4844
4845 context = init_frame->context;
4846 memset(init_frame, 0, MEGAMFI_FRAME_SIZE);
4847 memset(initq_info, 0, sizeof(struct megasas_init_queue_info));
4848 init_frame->context = context;
4849
94cd65dd
SS		 4850 initq_info->reply_queue_entries = cpu_to_le32(instance->max_fw_cmds + 1);
4851 initq_info->reply_queue_start_phys_addr_lo = cpu_to_le32(instance->reply_queue_h);
31ea7088 4852
94cd65dd
SS		 4853 initq_info->producer_index_phys_addr_lo = cpu_to_le32(instance->producer_h);
4854 initq_info->consumer_index_phys_addr_lo = cpu_to_le32(instance->consumer_h);
31ea7088 4855
4856 init_frame->cmd = MFI_CMD_INIT;
2be2a988 4857 init_frame->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 4858 init_frame->queue_info_new_phys_addr_lo =
4859 cpu_to_le32(lower_32_bits(initq_info_h));
4860 init_frame->queue_info_new_phys_addr_hi =
4861 cpu_to_le32(upper_32_bits(initq_info_h));
31ea7088 4862
94cd65dd 4863 init_frame->data_xfer_len = cpu_to_le32(sizeof(struct megasas_init_queue_info));
31ea7088 4864
4865 /*
4866 * disable the intr before firing the init frame to FW
4867 */
d46a3ad6 4868 instance->instancet->disable_intr(instance);
31ea7088 4869
4870 /*
4871 * Issue the init frame in polled mode
4872 */
4873
4874 if (megasas_issue_polled(instance, cmd)) {
1be18254 4875 dev_err(&instance->pdev->dev, "Failed to init firmware\n");
31ea7088 4876 megasas_return_cmd(instance, cmd);
4877 goto fail_fw_init;
4878 }
4879
4880 megasas_return_cmd(instance, cmd);
4881
4882 return 0;
4883
4884fail_fw_init:
4885 return -EINVAL;
4886}
4887
cd50ba8e
AR		 4888static u32
4889megasas_init_adapter_mfi(struct megasas_instance *instance)
c4a3e0a5 4890{
cd50ba8e 4891 struct megasas_register_set __iomem *reg_set;
c4a3e0a5
BS		 4892 u32 context_sz;
4893 u32 reply_q_sz;
c4a3e0a5
BS		 4894
4895 reg_set = instance->reg_set;
4896
c4a3e0a5
BS		 4897 /*
4898 * Get various operational parameters from status register
4899 */
1341c939 4900 instance->max_fw_cmds = instance->instancet->read_fw_status_reg(reg_set) & 0x00FFFF;
e3bbff9f
SP		 4901 /*
4902 * Reduce the max supported cmds by 1. This is to ensure that the
4903 * reply_q_sz (1 more than the max cmd that driver may send)
4904 * does not exceed max cmds that the FW can support
4905 */
4906 instance->max_fw_cmds = instance->max_fw_cmds-1;
9c915a8c 4907 instance->max_mfi_cmds = instance->max_fw_cmds;
0d49016b 4908 instance->max_num_sge = (instance->instancet->read_fw_status_reg(reg_set) & 0xFF0000) >>
1341c939 4909 0x10;
f26ac3a1
SS		 4910 /*
4911 * For MFI skinny adapters, MEGASAS_SKINNY_INT_CMDS commands
4912 * are reserved for IOCTL + driver's internal DCMDs.
4913 */
4914 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
4915 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
4916 instance->max_scsi_cmds = (instance->max_fw_cmds -
4917 MEGASAS_SKINNY_INT_CMDS);
4918 sema_init(&instance->ioctl_sem, MEGASAS_SKINNY_INT_CMDS);
4919 } else {
4920 instance->max_scsi_cmds = (instance->max_fw_cmds -
4921 MEGASAS_INT_CMDS);
4922 sema_init(&instance->ioctl_sem, (MEGASAS_MFI_IOCTL_CMDS));
4923 }
4924
308ec459 4925 instance->cur_can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS		 4926 /*
4927 * Create a pool of commands
4928 */
4929 if (megasas_alloc_cmds(instance))
4930 goto fail_alloc_cmds;
4931
4932 /*
4933 * Allocate memory for reply queue. Length of reply queue should
4934 * be _one_ more than the maximum commands handled by the firmware.
4935 *
4936 * Note: When FW completes commands, it places corresponding contex
4937 * values in this circular reply queue. This circular queue is a fairly
4938 * typical producer-consumer queue. FW is the producer (of completed
4939 * commands) and the driver is the consumer.
4940 */
4941 context_sz = sizeof(u32);
4942 reply_q_sz = context_sz * (instance->max_fw_cmds + 1);
4943
4944 instance->reply_queue = pci_alloc_consistent(instance->pdev,
4945 reply_q_sz,
4946 &instance->reply_queue_h);
4947
4948 if (!instance->reply_queue) {
1be18254 4949 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Out of DMA mem for reply queue\n");
c4a3e0a5
BS		 4950 goto fail_reply_queue;
4951 }
4952
31ea7088 4953 if (megasas_issue_init_mfi(instance))
c4a3e0a5 4954 goto fail_fw_init;
c4a3e0a5 4955
d009b576 4956 if (megasas_get_ctrl_info(instance)) {
51087a86
SS		 4957 dev_err(&instance->pdev->dev, "(%d): Could get controller info "
4958 "Fail from %s %d\n", instance->unique_id,
4959 __func__, __LINE__);
4960 goto fail_fw_init;
4961 }
4962
39a98554 4963 instance->fw_support_ieee = 0;
4964 instance->fw_support_ieee =
4965 (instance->instancet->read_fw_status_reg(reg_set) &
4966 0x04000000);
4967
1be18254 4968 dev_notice(&instance->pdev->dev, "megasas_init_mfi: fw_support_ieee=%d",
39a98554 4969 instance->fw_support_ieee);
4970
4971 if (instance->fw_support_ieee)
4972 instance->flag_ieee = 1;
4973
cd50ba8e
AR		 4974 return 0;
4975
4976fail_fw_init:
4977
4978 pci_free_consistent(instance->pdev, reply_q_sz,
4979 instance->reply_queue, instance->reply_queue_h);
4980fail_reply_queue:
4981 megasas_free_cmds(instance);
4982
4983fail_alloc_cmds:
cd50ba8e
AR		 4984 return 1;
4985}
4986
d3557fc8 4987/*
fad119b7 4988 * megasas_setup_irqs_ioapic - register legacy interrupts.
d3557fc8
SS		 4989 * @instance: Adapter soft state
4990 *
4991 * Do not enable interrupt, only setup ISRs.
4992 *
4993 * Return 0 on success.
4994 */
4995static int
4996megasas_setup_irqs_ioapic(struct megasas_instance *instance)
4997{
4998 struct pci_dev *pdev;
4999
5000 pdev = instance->pdev;
5001 instance->irq_context[0].instance = instance;
5002 instance->irq_context[0].MSIxIndex = 0;
fad119b7
HR		 5003 if (request_irq(pci_irq_vector(pdev, 0),
5004 instance->instancet->service_isr, IRQF_SHARED,
5005 "megasas", &instance->irq_context[0])) {
d3557fc8
SS		 5006 dev_err(&instance->pdev->dev,
5007 "Failed to register IRQ from %s %d\n",
5008 __func__, __LINE__);
5009 return -1;
5010 }
5011 return 0;
5012}
5013
5014/**
5015 * megasas_setup_irqs_msix - register MSI-x interrupts.
5016 * @instance: Adapter soft state
5017 * @is_probe: Driver probe check
5018 *
5019 * Do not enable interrupt, only setup ISRs.
5020 *
5021 * Return 0 on success.
5022 */
5023static int
5024megasas_setup_irqs_msix(struct megasas_instance *instance, u8 is_probe)
5025{
fad119b7 5026 int i, j;
d3557fc8
SS		 5027 struct pci_dev *pdev;
5028
5029 pdev = instance->pdev;
5030
5031 /* Try MSI-x */
d3557fc8
SS		 5032 for (i = 0; i < instance->msix_vectors; i++) {
5033 instance->irq_context[i].instance = instance;
5034 instance->irq_context[i].MSIxIndex = i;
fad119b7 5035 if (request_irq(pci_irq_vector(pdev, i),
d3557fc8
SS		 5036 instance->instancet->service_isr, 0, "megasas",
5037 &instance->irq_context[i])) {
5038 dev_err(&instance->pdev->dev,
5039 "Failed to register IRQ for vector %d.\n", i);
fad119b7
HR		 5040 for (j = 0; j < i; j++)
5041 free_irq(pci_irq_vector(pdev, j),
5042 &instance->irq_context[j]);
d3557fc8
SS		 5043 /* Retry irq register for IO_APIC*/
5044 instance->msix_vectors = 0;
64ff64b9
S		 5045 if (is_probe) {
5046 pci_free_irq_vectors(instance->pdev);
d3557fc8 5047 return megasas_setup_irqs_ioapic(instance);
64ff64b9 5048 } else {
d3557fc8 5049 return -1;
64ff64b9 5050 }
d3557fc8 5051 }
d3557fc8
SS		 5052 }
5053 return 0;
5054}
5055
5056/*
5057 * megasas_destroy_irqs- unregister interrupts.
5058 * @instance: Adapter soft state
5059 * return: void
5060 */
5061static void
5062megasas_destroy_irqs(struct megasas_instance *instance) {
5063
5064 int i;
5065
5066 if (instance->msix_vectors)
5067 for (i = 0; i < instance->msix_vectors; i++) {
fad119b7 5068 free_irq(pci_irq_vector(instance->pdev, i),
d3557fc8
SS		 5069 &instance->irq_context[i]);
5070 }
5071 else
fad119b7
HR		 5072 free_irq(pci_irq_vector(instance->pdev, 0),
5073 &instance->irq_context[0]);
d3557fc8
SS		 5074}
5075
3761cb4c 5076/**
5077 * megasas_setup_jbod_map - setup jbod map for FP seq_number.
5078 * @instance: Adapter soft state
5079 * @is_probe: Driver probe check
5080 *
5081 * Return 0 on success.
5082 */
5083void
5084megasas_setup_jbod_map(struct megasas_instance *instance)
5085{
5086 int i;
5087 struct fusion_context *fusion = instance->ctrl_context;
5088 u32 pd_seq_map_sz;
5089
5090 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
5091 (sizeof(struct MR_PD_CFG_SEQ) * (MAX_PHYSICAL_DEVICES - 1));
5092
5093 if (reset_devices || !fusion ||
5094 !instance->ctrl_info->adapterOperations3.useSeqNumJbodFP) {
5095 dev_info(&instance->pdev->dev,
5096 "Jbod map is not supported %s %d\n",
5097 __func__, __LINE__);
5098 instance->use_seqnum_jbod_fp = false;
5099 return;
5100 }
5101
5102 if (fusion->pd_seq_sync[0])
5103 goto skip_alloc;
5104
5105 for (i = 0; i < JBOD_MAPS_COUNT; i++) {
5106 fusion->pd_seq_sync[i] = dma_alloc_coherent
5107 (&instance->pdev->dev, pd_seq_map_sz,
5108 &fusion->pd_seq_phys[i], GFP_KERNEL);
5109 if (!fusion->pd_seq_sync[i]) {
5110 dev_err(&instance->pdev->dev,
5111 "Failed to allocate memory from %s %d\n",
5112 __func__, __LINE__);
5113 if (i == 1) {
5114 dma_free_coherent(&instance->pdev->dev,
5115 pd_seq_map_sz, fusion->pd_seq_sync[0],
5116 fusion->pd_seq_phys[0]);
5117 fusion->pd_seq_sync[0] = NULL;
5118 }
5119 instance->use_seqnum_jbod_fp = false;
5120 return;
5121 }
5122 }
5123
5124skip_alloc:
5125 if (!megasas_sync_pd_seq_num(instance, false) &&
5126 !megasas_sync_pd_seq_num(instance, true))
5127 instance->use_seqnum_jbod_fp = true;
5128 else
5129 instance->use_seqnum_jbod_fp = false;
5130}
5131
cd50ba8e
AR		 5132/**
5133 * megasas_init_fw - Initializes the FW
5134 * @instance: Adapter soft state
5135 *
5136 * This is the main function for initializing firmware
5137 */
5138
5139static int megasas_init_fw(struct megasas_instance *instance)
5140{
5141 u32 max_sectors_1;
15dd0381
S		 5142 u32 max_sectors_2, tmp_sectors, msix_enable;
5143 u32 scratch_pad_2, scratch_pad_3, scratch_pad_4;
11f8a7b3 5144 resource_size_t base_addr;
cd50ba8e 5145 struct megasas_register_set __iomem *reg_set;
51087a86 5146 struct megasas_ctrl_info *ctrl_info = NULL;
cd50ba8e 5147 unsigned long bar_list;
fdd84e25 5148 int i, j, loop, fw_msix_count = 0;
229fe47c 5149 struct IOV_111 *iovPtr;
5a8cb85b 5150 struct fusion_context *fusion;
5151
5152 fusion = instance->ctrl_context;
cd50ba8e
AR		 5153
5154 /* Find first memory bar */
5155 bar_list = pci_select_bars(instance->pdev, IORESOURCE_MEM);
51f9039f 5156 instance->bar = find_first_bit(&bar_list, BITS_PER_LONG);
e7f85168 5157 if (pci_request_selected_regions(instance->pdev, 1<<instance->bar,
cd50ba8e 5158 "megasas: LSI")) {
1be18254 5159 dev_printk(KERN_DEBUG, &instance->pdev->dev, "IO memory region busy!\n");
cd50ba8e
AR		 5160 return -EBUSY;
5161 }
5162
11f8a7b3
BC		 5163 base_addr = pci_resource_start(instance->pdev, instance->bar);
5164 instance->reg_set = ioremap_nocache(base_addr, 8192);
cd50ba8e
AR		 5165
5166 if (!instance->reg_set) {
1be18254 5167 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to map IO mem\n");
cd50ba8e
AR		 5168 goto fail_ioremap;
5169 }
5170
5171 reg_set = instance->reg_set;
5172
9581ebeb 5173 if (fusion)
9c915a8c 5174 instance->instancet = &megasas_instance_template_fusion;
9581ebeb
SC		 5175 else {
5176 switch (instance->pdev->device) {
5177 case PCI_DEVICE_ID_LSI_SAS1078R:
5178 case PCI_DEVICE_ID_LSI_SAS1078DE:
5179 instance->instancet = &megasas_instance_template_ppc;
5180 break;
5181 case PCI_DEVICE_ID_LSI_SAS1078GEN2:
5182 case PCI_DEVICE_ID_LSI_SAS0079GEN2:
5183 instance->instancet = &megasas_instance_template_gen2;
5184 break;
5185 case PCI_DEVICE_ID_LSI_SAS0073SKINNY:
5186 case PCI_DEVICE_ID_LSI_SAS0071SKINNY:
5187 instance->instancet = &megasas_instance_template_skinny;
5188 break;
5189 case PCI_DEVICE_ID_LSI_SAS1064R:
5190 case PCI_DEVICE_ID_DELL_PERC5:
5191 default:
5192 instance->instancet = &megasas_instance_template_xscale;
5193 instance->pd_list_not_supported = 1;
5194 break;
5195 }
cd50ba8e
AR		 5196 }
5197
6431f5d7
SS		 5198 if (megasas_transition_to_ready(instance, 0)) {
5199 atomic_set(&instance->fw_reset_no_pci_access, 1);
5200 instance->instancet->adp_reset
5201 (instance, instance->reg_set);
5202 atomic_set(&instance->fw_reset_no_pci_access, 0);
5203 dev_info(&instance->pdev->dev,
1be18254 5204 "FW restarted successfully from %s!\n",
6431f5d7
SS		 5205 __func__);
5206
5207 /*waitting for about 30 second before retry*/
5208 ssleep(30);
5209
5210 if (megasas_transition_to_ready(instance, 0))
5211 goto fail_ready_state;
5212 }
cd50ba8e 5213
d889344e
SC		 5214 if (instance->is_ventura) {
5215 scratch_pad_3 =
5216 readl(&instance->reg_set->outbound_scratch_pad_3);
d889344e
SC		 5217 instance->max_raid_mapsize = ((scratch_pad_3 >>
5218 MR_MAX_RAID_MAP_SIZE_OFFSET_SHIFT) &
5219 MR_MAX_RAID_MAP_SIZE_MASK);
5220 }
d46a3ad6 5221
3f1abce4
AR		 5222 /* Check if MSI-X is supported while in ready state */
5223 msix_enable = (instance->instancet->read_fw_status_reg(reg_set) &
5224 0x4000000) >> 0x1a;
c8e858fe 5225 if (msix_enable && !msix_disable) {
fad119b7
HR		 5226 int irq_flags = PCI_IRQ_MSIX;
5227
d46a3ad6
SS		 5228 scratch_pad_2 = readl
5229 (&instance->reg_set->outbound_scratch_pad_2);
c8e858fe 5230 /* Check max MSI-X vectors */
5a8cb85b 5231 if (fusion) {
c365178f
S		 5232 if (instance->adapter_type == THUNDERBOLT_SERIES) {
5233 /* Thunderbolt Series*/
5a8cb85b 5234 instance->msix_vectors = (scratch_pad_2
5235 & MR_MAX_REPLY_QUEUES_OFFSET) + 1;
5236 fw_msix_count = instance->msix_vectors;
5237 } else { /* Invader series supports more than 8 MSI-x vectors*/
5238 instance->msix_vectors = ((scratch_pad_2
5239 & MR_MAX_REPLY_QUEUES_EXT_OFFSET)
5240 >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1;
2493c67e
SC		 5241 if (instance->msix_vectors > 16)
5242 instance->msix_combined = true;
5243
179ac142
SS		 5244 if (rdpq_enable)
5245 instance->is_rdpq = (scratch_pad_2 & MR_RDPQ_MODE_OFFSET) ?
5246 1 : 0;
5a8cb85b 5247 fw_msix_count = instance->msix_vectors;
5248 /* Save 1-15 reply post index address to local memory
5249 * Index 0 is already saved from reg offset
5250 * MPI2_REPLY_POST_HOST_INDEX_OFFSET
5251 */
5252 for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; loop++) {
5253 instance->reply_post_host_index_addr[loop] =
5254 (u32 __iomem *)
5255 ((u8 __iomem *)instance->reg_set +
5256 MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET
5257 + (loop * 0x10));
5258 }
d46a3ad6
SS		 5259 }
5260 if (msix_vectors)
5261 instance->msix_vectors = min(msix_vectors,
5262 instance->msix_vectors);
5a8cb85b 5263 } else /* MFI adapters */
c8e858fe
AR		 5264 instance->msix_vectors = 1;
5265 /* Don't bother allocating more MSI-X vectors than cpus */
5266 instance->msix_vectors = min(instance->msix_vectors,
5267 (unsigned int)num_online_cpus());
fad119b7
HR		 5268 if (smp_affinity_enable)
5269 irq_flags |= PCI_IRQ_AFFINITY;
5270 i = pci_alloc_irq_vectors(instance->pdev, 1,
5271 instance->msix_vectors, irq_flags);
c12de882 5272 if (i > 0)
8ae80ed1
AG		 5273 instance->msix_vectors = i;
5274 else
c8e858fe
AR		 5275 instance->msix_vectors = 0;
5276 }
2493c67e
SC		 5277 /*
5278 * MSI-X host index 0 is common for all adapter.
5279 * It is used for all MPT based Adapters.
5280 */
5281 if (instance->msix_combined) {
5282 instance->reply_post_host_index_addr[0] =
5283 (u32 *)((u8 *)instance->reg_set +
5284 MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET);
5285 } else {
5286 instance->reply_post_host_index_addr[0] =
5287 (u32 *)((u8 *)instance->reg_set +
5288 MPI2_REPLY_POST_HOST_INDEX_OFFSET);
5289 }
5290
64ff64b9
S		 5291 if (!instance->msix_vectors) {
5292 i = pci_alloc_irq_vectors(instance->pdev, 1, 1, PCI_IRQ_LEGACY);
5293 if (i < 0)
5294 goto fail_setup_irqs;
5295 }
3f1abce4 5296
258c3af2
TH		 5297 dev_info(&instance->pdev->dev,
5298 "firmware supports msix\t: (%d)", fw_msix_count);
5299 dev_info(&instance->pdev->dev,
5300 "current msix/online cpus\t: (%d/%d)\n",
5301 instance->msix_vectors, (unsigned int)num_online_cpus());
179ac142
SS		 5302 dev_info(&instance->pdev->dev,
5303 "RDPQ mode\t: (%s)\n", instance->is_rdpq ? "enabled" : "disabled");
d3557fc8 5304
91626c27 5305 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
5306 (unsigned long)instance);
5307
51087a86
SS		 5308 instance->ctrl_info = kzalloc(sizeof(struct megasas_ctrl_info),
5309 GFP_KERNEL);
5310 if (instance->ctrl_info == NULL)
5311 goto fail_init_adapter;
5312
5313 /*
5314 * Below are default value for legacy Firmware.
5315 * non-fusion based controllers
5316 */
5317 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
5318 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
cd50ba8e
AR		 5319 /* Get operational params, sge flags, send init cmd to controller */
5320 if (instance->instancet->init_adapter(instance))
eb1b1237 5321 goto fail_init_adapter;
cd50ba8e 5322
15dd0381
S		 5323 if (instance->is_ventura) {
5324 scratch_pad_4 =
5325 readl(&instance->reg_set->outbound_scratch_pad_4);
5326 if ((scratch_pad_4 & MR_NVME_PAGE_SIZE_MASK) >=
5327 MR_DEFAULT_NVME_PAGE_SHIFT)
5328 instance->nvme_page_size =
5329 (1 << (scratch_pad_4 & MR_NVME_PAGE_SIZE_MASK));
5330
5331 dev_info(&instance->pdev->dev,
5332 "NVME page size\t: (%d)\n", instance->nvme_page_size);
5333 }
5334
18103efc
TH		 5335 if (instance->msix_vectors ?
5336 megasas_setup_irqs_msix(instance, 1) :
5337 megasas_setup_irqs_ioapic(instance))
5338 goto fail_init_adapter;
258c3af2 5339
d3557fc8 5340 instance->instancet->enable_intr(instance);
cd50ba8e 5341
13f30771 5342 dev_info(&instance->pdev->dev, "INIT adapter done\n");
cd50ba8e 5343
3761cb4c 5344 megasas_setup_jbod_map(instance);
5345
39a98554 5346 /** for passthrough
da0dc9fb
BH		 5347 * the following function will get the PD LIST.
5348 */
5349 memset(instance->pd_list, 0,
81e403ce 5350 (MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)));
58968fc8 5351 if (megasas_get_pd_list(instance) < 0) {
1be18254 5352 dev_err(&instance->pdev->dev, "failed to get PD list\n");
72bff2d1 5353 goto fail_get_ld_pd_list;
58968fc8 5354 }
81e403ce 5355
bdc6fb8d 5356 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
fdd84e25
SC		 5357
5358 /* stream detection initialization */
41064f1b 5359 if (instance->is_ventura && fusion) {
fdd84e25 5360 fusion->stream_detect_by_ld =
41064f1b
S		 5361 kzalloc(sizeof(struct LD_STREAM_DETECT *)
5362 * MAX_LOGICAL_DRIVES_EXT,
5363 GFP_KERNEL);
fdd84e25
SC		 5364 if (!fusion->stream_detect_by_ld) {
5365 dev_err(&instance->pdev->dev,
41064f1b 5366 "unable to allocate stream detection for pool of LDs\n");
fdd84e25
SC		 5367 goto fail_get_ld_pd_list;
5368 }
5369 for (i = 0; i < MAX_LOGICAL_DRIVES_EXT; ++i) {
5370 fusion->stream_detect_by_ld[i] =
5371 kmalloc(sizeof(struct LD_STREAM_DETECT),
5372 GFP_KERNEL);
5373 if (!fusion->stream_detect_by_ld[i]) {
5374 dev_err(&instance->pdev->dev,
5375 "unable to allocate stream detect by LD\n ");
5376 for (j = 0; j < i; ++j)
5377 kfree(fusion->stream_detect_by_ld[j]);
5378 kfree(fusion->stream_detect_by_ld);
5379 fusion->stream_detect_by_ld = NULL;
5380 goto fail_get_ld_pd_list;
5381 }
5382 fusion->stream_detect_by_ld[i]->mru_bit_map
5383 = MR_STREAM_BITMAP;
5384 }
5385 }
5386
21c9e160
AR		 5387 if (megasas_ld_list_query(instance,
5388 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
72bff2d1 5389 goto fail_get_ld_pd_list;
bdc6fb8d 5390
c4a3e0a5
BS		 5391 /*
5392 * Compute the max allowed sectors per IO: The controller info has two
5393 * limits on max sectors. Driver should use the minimum of these two.
5394 *
5395 * 1 << stripe_sz_ops.min = max sectors per strip
5396 *
5397 * Note that older firmwares ( < FW ver 30) didn't report information
5398 * to calculate max_sectors_1. So the number ended up as zero always.
5399 */
14faea9f 5400 tmp_sectors = 0;
51087a86 5401 ctrl_info = instance->ctrl_info;
c4a3e0a5 5402
51087a86
SS		 5403 max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) *
5404 le16_to_cpu(ctrl_info->max_strips_per_io);
5405 max_sectors_2 = le32_to_cpu(ctrl_info->max_request_size);
404a8a1a 5406
da0dc9fb 5407 tmp_sectors = min_t(u32, max_sectors_1, max_sectors_2);
bc93d425 5408
8f67c8c5
SS		 5409 instance->peerIsPresent = ctrl_info->cluster.peerIsPresent;
5410 instance->passive = ctrl_info->cluster.passive;
5411 memcpy(instance->clusterId, ctrl_info->clusterId, sizeof(instance->clusterId));
51087a86
SS		 5412 instance->UnevenSpanSupport =
5413 ctrl_info->adapterOperations2.supportUnevenSpans;
5414 if (instance->UnevenSpanSupport) {
5415 struct fusion_context *fusion = instance->ctrl_context;
51087a86
SS		 5416 if (MR_ValidateMapInfo(instance))
5417 fusion->fast_path_io = 1;
5418 else
5419 fusion->fast_path_io = 0;
fc62b3fc 5420
51087a86
SS		 5421 }
5422 if (ctrl_info->host_interface.SRIOV) {
92bb6505 5423 instance->requestorId = ctrl_info->iov.requestorId;
5424 if (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) {
5425 if (!ctrl_info->adapterOperations2.activePassive)
5426 instance->PlasmaFW111 = 1;
5427
5428 dev_info(&instance->pdev->dev, "SR-IOV: firmware type: %s\n",
5429 instance->PlasmaFW111 ? "1.11" : "new");
5430
5431 if (instance->PlasmaFW111) {
5432 iovPtr = (struct IOV_111 *)
5433 ((unsigned char *)ctrl_info + IOV_111_OFFSET);
5434 instance->requestorId = iovPtr->requestorId;
5435 }
fc62b3fc 5436 }
92bb6505 5437 dev_info(&instance->pdev->dev, "SRIOV: VF requestorId %d\n",
5438 instance->requestorId);
51087a86
SS		 5439 }
5440
51087a86
SS		 5441 instance->crash_dump_fw_support =
5442 ctrl_info->adapterOperations3.supportCrashDump;
5443 instance->crash_dump_drv_support =
5444 (instance->crash_dump_fw_support &&
5445 instance->crash_dump_buf);
d88da09a 5446 if (instance->crash_dump_drv_support)
51087a86
SS		 5447 megasas_set_crash_dump_params(instance,
5448 MR_CRASH_BUF_TURN_OFF);
5449
d88da09a 5450 else {
51087a86
SS		 5451 if (instance->crash_dump_buf)
5452 pci_free_consistent(instance->pdev,
5453 CRASH_DMA_BUF_SIZE,
5454 instance->crash_dump_buf,
5455 instance->crash_dump_h);
5456 instance->crash_dump_buf = NULL;
14faea9f 5457 }
7497cde8 5458
d88da09a
SS		 5459
5460 dev_info(&instance->pdev->dev,
5461 "pci id\t\t: (0x%04x)/(0x%04x)/(0x%04x)/(0x%04x)\n",
5462 le16_to_cpu(ctrl_info->pci.vendor_id),
5463 le16_to_cpu(ctrl_info->pci.device_id),
5464 le16_to_cpu(ctrl_info->pci.sub_vendor_id),
5465 le16_to_cpu(ctrl_info->pci.sub_device_id));
5466 dev_info(&instance->pdev->dev, "unevenspan support : %s\n",
5467 instance->UnevenSpanSupport ? "yes" : "no");
d88da09a
SS		 5468 dev_info(&instance->pdev->dev, "firmware crash dump : %s\n",
5469 instance->crash_dump_drv_support ? "yes" : "no");
3761cb4c 5470 dev_info(&instance->pdev->dev, "jbod sync map : %s\n",
5471 instance->use_seqnum_jbod_fp ? "yes" : "no");
d88da09a
SS		 5472
5473
14faea9f 5474 instance->max_sectors_per_req = instance->max_num_sge *
357ae967 5475 SGE_BUFFER_SIZE / 512;
14faea9f 5476 if (tmp_sectors && (instance->max_sectors_per_req > tmp_sectors))
5477 instance->max_sectors_per_req = tmp_sectors;
c4a3e0a5 5478
ae09a6c1
SS		 5479 /* Check for valid throttlequeuedepth module parameter */
5480 if (throttlequeuedepth &&
5481 throttlequeuedepth <= instance->max_scsi_cmds)
5482 instance->throttlequeuedepth = throttlequeuedepth;
5483 else
5484 instance->throttlequeuedepth =
5485 MEGASAS_THROTTLE_QUEUE_DEPTH;
5486
e636a7a4
S		 5487 if ((resetwaittime < 1) ||
5488 (resetwaittime > MEGASAS_RESET_WAIT_TIME))
e3d178ca
SS		 5489 resetwaittime = MEGASAS_RESET_WAIT_TIME;
5490
5491 if ((scmd_timeout < 10) || (scmd_timeout > MEGASAS_DEFAULT_CMD_TIMEOUT))
5492 scmd_timeout = MEGASAS_DEFAULT_CMD_TIMEOUT;
ad84db2e 5493
229fe47c
AR		 5494 /* Launch SR-IOV heartbeat timer */
5495 if (instance->requestorId) {
5496 if (!megasas_sriov_start_heartbeat(instance, 1))
5497 megasas_start_timer(instance,
5498 &instance->sriov_heartbeat_timer,
5499 megasas_sriov_heartbeat_handler,
5500 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
5501 else
5502 instance->skip_heartbeat_timer_del = 1;
5503 }
5504
c4a3e0a5
BS		 5505 return 0;
5506
fdd84e25
SC		 5507fail_get_ld_pd_list:
5508 instance->instancet->disable_intr(instance);
18103efc 5509fail_init_adapter:
fad119b7
HR		 5510 megasas_destroy_irqs(instance);
5511fail_setup_irqs:
d3557fc8 5512 if (instance->msix_vectors)
fad119b7 5513 pci_free_irq_vectors(instance->pdev);
d3557fc8 5514 instance->msix_vectors = 0;
cd50ba8e 5515fail_ready_state:
51087a86
SS		 5516 kfree(instance->ctrl_info);
5517 instance->ctrl_info = NULL;
c4a3e0a5
BS		 5518 iounmap(instance->reg_set);
5519
72bff2d1 5520fail_ioremap:
e7f85168 5521 pci_release_selected_regions(instance->pdev, 1<<instance->bar);
c4a3e0a5 5522
72bff2d1
S		 5523 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
5524 __func__, __LINE__);
c4a3e0a5
BS		 5525 return -EINVAL;
5526}
5527
5528/**
5529 * megasas_release_mfi - Reverses the FW initialization
4b63b286 5530 * @instance: Adapter soft state
c4a3e0a5
BS		 5531 */
5532static void megasas_release_mfi(struct megasas_instance *instance)
5533{
9c915a8c 5534 u32 reply_q_sz = sizeof(u32) *(instance->max_mfi_cmds + 1);
c4a3e0a5 5535
9c915a8c
AR		 5536 if (instance->reply_queue)
5537 pci_free_consistent(instance->pdev, reply_q_sz,
c4a3e0a5
BS		 5538 instance->reply_queue, instance->reply_queue_h);
5539
5540 megasas_free_cmds(instance);
5541
5542 iounmap(instance->reg_set);
5543
e7f85168 5544 pci_release_selected_regions(instance->pdev, 1<<instance->bar);
c4a3e0a5
BS		 5545}
5546
5547/**
5548 * megasas_get_seq_num - Gets latest event sequence numbers
5549 * @instance: Adapter soft state
5550 * @eli: FW event log sequence numbers information
5551 *
5552 * FW maintains a log of all events in a non-volatile area. Upper layers would
5553 * usually find out the latest sequence number of the events, the seq number at
5554 * the boot etc. They would "read" all the events below the latest seq number
5555 * by issuing a direct fw cmd (DCMD). For the future events (beyond latest seq
5556 * number), they would subsribe to AEN (asynchronous event notification) and
5557 * wait for the events to happen.
5558 */
5559static int
5560megasas_get_seq_num(struct megasas_instance *instance,
5561 struct megasas_evt_log_info *eli)
5562{
5563 struct megasas_cmd *cmd;
5564 struct megasas_dcmd_frame *dcmd;
5565 struct megasas_evt_log_info *el_info;
5566 dma_addr_t el_info_h = 0;
5567
5568 cmd = megasas_get_cmd(instance);
5569
5570 if (!cmd) {
5571 return -ENOMEM;
5572 }
5573
5574 dcmd = &cmd->frame->dcmd;
5575 el_info = pci_alloc_consistent(instance->pdev,
5576 sizeof(struct megasas_evt_log_info),
5577 &el_info_h);
5578
5579 if (!el_info) {
5580 megasas_return_cmd(instance, cmd);
5581 return -ENOMEM;
5582 }
5583
5584 memset(el_info, 0, sizeof(*el_info));
5585 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5586
5587 dcmd->cmd = MFI_CMD_DCMD;
5588 dcmd->cmd_status = 0x0;
5589 dcmd->sge_count = 1;
94cd65dd 5590 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 5591 dcmd->timeout = 0;
780a3762 5592 dcmd->pad_0 = 0;
94cd65dd
SS		 5593 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_log_info));
5594 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_GET_INFO);
5595 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(el_info_h);
5596 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_log_info));
c4a3e0a5 5597
6d40afbc
SS		 5598 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS) ==
5599 DCMD_SUCCESS) {
cfbe7554
SS		 5600 /*
5601 * Copy the data back into callers buffer
5602 */
48100b0e
CH		 5603 eli->newest_seq_num = el_info->newest_seq_num;
5604 eli->oldest_seq_num = el_info->oldest_seq_num;
5605 eli->clear_seq_num = el_info->clear_seq_num;
5606 eli->shutdown_seq_num = el_info->shutdown_seq_num;
5607 eli->boot_seq_num = el_info->boot_seq_num;
6d40afbc
SS		 5608 } else
5609 dev_err(&instance->pdev->dev, "DCMD failed "
5610 "from %s\n", __func__);
c4a3e0a5
BS		 5611
5612 pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info),
5613 el_info, el_info_h);
5614
4026e9aa 5615 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 5616
5617 return 0;
5618}
5619
5620/**
5621 * megasas_register_aen - Registers for asynchronous event notification
5622 * @instance: Adapter soft state
5623 * @seq_num: The starting sequence number
5624 * @class_locale: Class of the event
5625 *
5626 * This function subscribes for AEN for events beyond the @seq_num. It requests
5627 * to be notified if and only if the event is of type @class_locale
5628 */
5629static int
5630megasas_register_aen(struct megasas_instance *instance, u32 seq_num,
5631 u32 class_locale_word)
5632{
5633 int ret_val;
5634 struct megasas_cmd *cmd;
5635 struct megasas_dcmd_frame *dcmd;
5636 union megasas_evt_class_locale curr_aen;
5637 union megasas_evt_class_locale prev_aen;
5638
5639 /*
5640 * If there an AEN pending already (aen_cmd), check if the
5641 * class_locale of that pending AEN is inclusive of the new
5642 * AEN request we currently have. If it is, then we don't have
5643 * to do anything. In other words, whichever events the current
5644 * AEN request is subscribing to, have already been subscribed
5645 * to.
5646 *
5647 * If the old_cmd is _not_ inclusive, then we have to abort
5648 * that command, form a class_locale that is superset of both
5649 * old and current and re-issue to the FW
5650 */
5651
5652 curr_aen.word = class_locale_word;
5653
5654 if (instance->aen_cmd) {
5655
a9555534
CH		 5656 prev_aen.word =
5657 le32_to_cpu(instance->aen_cmd->frame->dcmd.mbox.w[1]);
c4a3e0a5 5658
91b3d9f0
S		 5659 if ((curr_aen.members.class < MFI_EVT_CLASS_DEBUG) ||
5660 (curr_aen.members.class > MFI_EVT_CLASS_DEAD)) {
5661 dev_info(&instance->pdev->dev,
5662 "%s %d out of range class %d send by application\n",
5663 __func__, __LINE__, curr_aen.members.class);
5664 return 0;
5665 }
5666
c4a3e0a5
BS		 5667 /*
5668 * A class whose enum value is smaller is inclusive of all
5669 * higher values. If a PROGRESS (= -1) was previously
5670 * registered, then a new registration requests for higher
5671 * classes need not be sent to FW. They are automatically
5672 * included.
5673 *
5674 * Locale numbers don't have such hierarchy. They are bitmap
5675 * values
5676 */
5677 if ((prev_aen.members.class <= curr_aen.members.class) &&
3993a862 5678 !((prev_aen.members.locale & curr_aen.members.locale) ^
c4a3e0a5
BS		 5679 curr_aen.members.locale)) {
5680 /*
5681 * Previously issued event registration includes
5682 * current request. Nothing to do.
5683 */
5684 return 0;
5685 } else {
3993a862 5686 curr_aen.members.locale |= prev_aen.members.locale;
c4a3e0a5
BS		 5687
5688 if (prev_aen.members.class < curr_aen.members.class)
5689 curr_aen.members.class = prev_aen.members.class;
5690
5691 instance->aen_cmd->abort_aen = 1;
5692 ret_val = megasas_issue_blocked_abort_cmd(instance,
5693 instance->
cfbe7554 5694 aen_cmd, 30);
c4a3e0a5
BS		 5695
5696 if (ret_val) {
1be18254 5697 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to abort "
c4a3e0a5
BS		 5698 "previous AEN command\n");
5699 return ret_val;
5700 }
5701 }
5702 }
5703
5704 cmd = megasas_get_cmd(instance);
5705
5706 if (!cmd)
5707 return -ENOMEM;
5708
5709 dcmd = &cmd->frame->dcmd;
5710
5711 memset(instance->evt_detail, 0, sizeof(struct megasas_evt_detail));
5712
5713 /*
5714 * Prepare DCMD for aen registration
5715 */
5716 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5717
5718 dcmd->cmd = MFI_CMD_DCMD;
5719 dcmd->cmd_status = 0x0;
5720 dcmd->sge_count = 1;
94cd65dd 5721 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 5722 dcmd->timeout = 0;
780a3762 5723 dcmd->pad_0 = 0;
94cd65dd
SS		 5724 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_detail));
5725 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_WAIT);
5726 dcmd->mbox.w[0] = cpu_to_le32(seq_num);
39a98554 5727 instance->last_seq_num = seq_num;
94cd65dd
SS		 5728 dcmd->mbox.w[1] = cpu_to_le32(curr_aen.word);
5729 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->evt_detail_h);
5730 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_detail));
c4a3e0a5 5731
f4c9a131
YB		 5732 if (instance->aen_cmd != NULL) {
5733 megasas_return_cmd(instance, cmd);
5734 return 0;
5735 }
5736
c4a3e0a5
BS		 5737 /*
5738 * Store reference to the cmd used to register for AEN. When an
5739 * application wants us to register for AEN, we have to abort this
5740 * cmd and re-register with a new EVENT LOCALE supplied by that app
5741 */
5742 instance->aen_cmd = cmd;
5743
5744 /*
5745 * Issue the aen registration frame
5746 */
9c915a8c 5747 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5
BS		 5748
5749 return 0;
5750}
5751
96188a89
S		 5752/* megasas_get_target_prop - Send DCMD with below details to firmware.
5753 *
5754 * This DCMD will fetch few properties of LD/system PD defined
5755 * in MR_TARGET_DEV_PROPERTIES. eg. Queue Depth, MDTS value.
5756 *
5757 * DCMD send by drivers whenever new target is added to the OS.
5758 *
5759 * dcmd.opcode - MR_DCMD_DEV_GET_TARGET_PROP
5760 * dcmd.mbox.b[0] - DCMD is to be fired for LD or system PD.
5761 * 0 = system PD, 1 = LD.
5762 * dcmd.mbox.s[1] - TargetID for LD/system PD.
5763 * dcmd.sge IN - Pointer to return MR_TARGET_DEV_PROPERTIES.
5764 *
5765 * @instance: Adapter soft state
5766 * @sdev: OS provided scsi device
5767 *
5768 * Returns 0 on success non-zero on failure.
5769 */
5770static int
5771megasas_get_target_prop(struct megasas_instance *instance,
5772 struct scsi_device *sdev)
5773{
5774 int ret;
5775 struct megasas_cmd *cmd;
5776 struct megasas_dcmd_frame *dcmd;
5777 u16 targetId = (sdev->channel % 2) + sdev->id;
5778
5779 cmd = megasas_get_cmd(instance);
5780
5781 if (!cmd) {
5782 dev_err(&instance->pdev->dev,
5783 "Failed to get cmd %s\n", __func__);
5784 return -ENOMEM;
5785 }
5786
5787 dcmd = &cmd->frame->dcmd;
5788
5789 memset(instance->tgt_prop, 0, sizeof(*instance->tgt_prop));
5790 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5791 dcmd->mbox.b[0] = MEGASAS_IS_LOGICAL(sdev);
5792
5793 dcmd->mbox.s[1] = cpu_to_le16(targetId);
5794 dcmd->cmd = MFI_CMD_DCMD;
5795 dcmd->cmd_status = 0xFF;
5796 dcmd->sge_count = 1;
5797 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
5798 dcmd->timeout = 0;
5799 dcmd->pad_0 = 0;
5800 dcmd->data_xfer_len =
5801 cpu_to_le32(sizeof(struct MR_TARGET_PROPERTIES));
5802 dcmd->opcode = cpu_to_le32(MR_DCMD_DRV_GET_TARGET_PROP);
5803 dcmd->sgl.sge32[0].phys_addr =
5804 cpu_to_le32(instance->tgt_prop_h);
5805 dcmd->sgl.sge32[0].length =
5806 cpu_to_le32(sizeof(struct MR_TARGET_PROPERTIES));
5807
5808 if (instance->ctrl_context && !instance->mask_interrupts)
5809 ret = megasas_issue_blocked_cmd(instance,
5810 cmd, MFI_IO_TIMEOUT_SECS);
5811 else
5812 ret = megasas_issue_polled(instance, cmd);
5813
5814 switch (ret) {
5815 case DCMD_TIMEOUT:
5816 switch (dcmd_timeout_ocr_possible(instance)) {
5817 case INITIATE_OCR:
5818 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
5819 megasas_reset_fusion(instance->host,
5820 MFI_IO_TIMEOUT_OCR);
5821 break;
5822 case KILL_ADAPTER:
5823 megaraid_sas_kill_hba(instance);
5824 break;
5825 case IGNORE_TIMEOUT:
5826 dev_info(&instance->pdev->dev,
5827 "Ignore DCMD timeout: %s %d\n",
5828 __func__, __LINE__);
5829 break;
5830 }
5831 break;
5832
5833 default:
5834 megasas_return_cmd(instance, cmd);
5835 }
5836 if (ret != DCMD_SUCCESS)
5837 dev_err(&instance->pdev->dev,
5838 "return from %s %d return value %d\n",
5839 __func__, __LINE__, ret);
5840
5841 return ret;
5842}
5843
c4a3e0a5
BS		 5844/**
5845 * megasas_start_aen - Subscribes to AEN during driver load time
5846 * @instance: Adapter soft state
5847 */
5848static int megasas_start_aen(struct megasas_instance *instance)
5849{
5850 struct megasas_evt_log_info eli;
5851 union megasas_evt_class_locale class_locale;
5852
5853 /*
5854 * Get the latest sequence number from FW
5855 */
5856 memset(&eli, 0, sizeof(eli));
5857
5858 if (megasas_get_seq_num(instance, &eli))
5859 return -1;
5860
5861 /*
5862 * Register AEN with FW for latest sequence number plus 1
5863 */
5864 class_locale.members.reserved = 0;
5865 class_locale.members.locale = MR_EVT_LOCALE_ALL;
5866 class_locale.members.class = MR_EVT_CLASS_DEBUG;
5867
94cd65dd 5868 return megasas_register_aen(instance,
48100b0e 5869 le32_to_cpu(eli.newest_seq_num) + 1,
94cd65dd 5870 class_locale.word);
c4a3e0a5
BS		 5871}
5872
5873/**
5874 * megasas_io_attach - Attaches this driver to SCSI mid-layer
5875 * @instance: Adapter soft state
5876 */
5877static int megasas_io_attach(struct megasas_instance *instance)
5878{
5879 struct Scsi_Host *host = instance->host;
5880
5881 /*
5882 * Export parameters required by SCSI mid-layer
5883 */
c4a3e0a5 5884 host->unique_id = instance->unique_id;
ae09a6c1 5885 host->can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS		 5886 host->this_id = instance->init_id;
5887 host->sg_tablesize = instance->max_num_sge;
42a8d2b3
AR		 5888
5889 if (instance->fw_support_ieee)
5890 instance->max_sectors_per_req = MEGASAS_MAX_SECTORS_IEEE;
5891
1fd10685
YB		 5892 /*
5893 * Check if the module parameter value for max_sectors can be used
5894 */
5895 if (max_sectors && max_sectors < instance->max_sectors_per_req)
5896 instance->max_sectors_per_req = max_sectors;
5897 else {
5898 if (max_sectors) {
5899 if (((instance->pdev->device ==
5900 PCI_DEVICE_ID_LSI_SAS1078GEN2) ||
5901 (instance->pdev->device ==
5902 PCI_DEVICE_ID_LSI_SAS0079GEN2)) &&
5903 (max_sectors <= MEGASAS_MAX_SECTORS)) {
5904 instance->max_sectors_per_req = max_sectors;
5905 } else {
1be18254 5906 dev_info(&instance->pdev->dev, "max_sectors should be > 0"
1fd10685
YB		 5907 "and <= %d (or < 1MB for GEN2 controller)\n",
5908 instance->max_sectors_per_req);
5909 }
5910 }
5911 }
5912
c4a3e0a5 5913 host->max_sectors = instance->max_sectors_per_req;
9c915a8c 5914 host->cmd_per_lun = MEGASAS_DEFAULT_CMD_PER_LUN;
c4a3e0a5
BS		 5915 host->max_channel = MEGASAS_MAX_CHANNELS - 1;
5916 host->max_id = MEGASAS_MAX_DEV_PER_CHANNEL;
5917 host->max_lun = MEGASAS_MAX_LUN;
122da302 5918 host->max_cmd_len = 16;
c4a3e0a5
BS		 5919
5920 /*
5921 * Notify the mid-layer about the new controller
5922 */
5923 if (scsi_add_host(host, &instance->pdev->dev)) {
4026e9aa
SS		 5924 dev_err(&instance->pdev->dev,
5925 "Failed to add host from %s %d\n",
5926 __func__, __LINE__);
c4a3e0a5
BS		 5927 return -ENODEV;
5928 }
5929
c4a3e0a5
BS		 5930 return 0;
5931}
5932
31ea7088 5933static int
5934megasas_set_dma_mask(struct pci_dev *pdev)
5935{
5936 /*
da0dc9fb 5937 * All our controllers are capable of performing 64-bit DMA
31ea7088 5938 */
5939 if (IS_DMA64) {
6a35528a 5940 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
31ea7088 5941
284901a9 5942 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5943 goto fail_set_dma_mask;
5944 }
5945 } else {
284901a9 5946 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5947 goto fail_set_dma_mask;
5948 }
46de63e2
SS		 5949 /*
5950 * Ensure that all data structures are allocated in 32-bit
5951 * memory.
5952 */
5953 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
5954 /* Try 32bit DMA mask and 32 bit Consistent dma mask */
5955 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
5956 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
5957 dev_info(&pdev->dev, "set 32bit DMA mask"
5958 "and 32 bit consistent mask\n");
5959 else
5960 goto fail_set_dma_mask;
5961 }
94cd65dd 5962
31ea7088 5963 return 0;
5964
5965fail_set_dma_mask:
5966 return 1;
5967}
5968
c365178f
S		 5969/*
5970 * megasas_set_adapter_type - Set adapter type.
5971 * Supported controllers can be divided in
5972 * 4 categories- enum MR_ADAPTER_TYPE {
5973 * MFI_SERIES = 1,
5974 * THUNDERBOLT_SERIES = 2,
5975 * INVADER_SERIES = 3,
5976 * VENTURA_SERIES = 4,
5977 * };
5978 * @instance: Adapter soft state
5979 * return: void
5980 */
5981static inline void megasas_set_adapter_type(struct megasas_instance *instance)
5982{
5983 switch (instance->pdev->device) {
5984 case PCI_DEVICE_ID_LSI_VENTURA:
5985 case PCI_DEVICE_ID_LSI_HARPOON:
5986 case PCI_DEVICE_ID_LSI_TOMCAT:
5987 case PCI_DEVICE_ID_LSI_VENTURA_4PORT:
5988 case PCI_DEVICE_ID_LSI_CRUSADER_4PORT:
5989 instance->adapter_type = VENTURA_SERIES;
5990 break;
5991 case PCI_DEVICE_ID_LSI_FUSION:
5992 case PCI_DEVICE_ID_LSI_PLASMA:
5993 instance->adapter_type = THUNDERBOLT_SERIES;
5994 break;
5995 case PCI_DEVICE_ID_LSI_INVADER:
5996 case PCI_DEVICE_ID_LSI_INTRUDER:
5997 case PCI_DEVICE_ID_LSI_INTRUDER_24:
5998 case PCI_DEVICE_ID_LSI_CUTLASS_52:
5999 case PCI_DEVICE_ID_LSI_CUTLASS_53:
6000 case PCI_DEVICE_ID_LSI_FURY:
6001 instance->adapter_type = INVADER_SERIES;
6002 break;
6003 default: /* For all other supported controllers */
6004 instance->adapter_type = MFI_SERIES;
6005 break;
6006 }
6007}
6008
c4a3e0a5
BS		 6009/**
6010 * megasas_probe_one - PCI hotplug entry point
6011 * @pdev: PCI device structure
0d49016b 6012 * @id: PCI ids of supported hotplugged adapter
c4a3e0a5 6013 */
6f039790
GKH		 6014static int megasas_probe_one(struct pci_dev *pdev,
6015 const struct pci_device_id *id)
c4a3e0a5 6016{
d3557fc8 6017 int rval, pos;
c4a3e0a5
BS		 6018 struct Scsi_Host *host;
6019 struct megasas_instance *instance;
66192dfe
AR		 6020 u16 control = 0;
6021
6022 /* Reset MSI-X in the kdump kernel */
6023 if (reset_devices) {
6024 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
6025 if (pos) {
99369065 6026 pci_read_config_word(pdev, pos + PCI_MSIX_FLAGS,
66192dfe
AR		 6027 &control);
6028 if (control & PCI_MSIX_FLAGS_ENABLE) {
6029 dev_info(&pdev->dev, "resetting MSI-X\n");
6030 pci_write_config_word(pdev,
99369065 6031 pos + PCI_MSIX_FLAGS,
66192dfe
AR		 6032 control &
6033 ~PCI_MSIX_FLAGS_ENABLE);
6034 }
6035 }
6036 }
c4a3e0a5 6037
c4a3e0a5
BS		 6038 /*
6039 * PCI prepping: enable device set bus mastering and dma mask
6040 */
aeab3fd7 6041 rval = pci_enable_device_mem(pdev);
c4a3e0a5
BS		 6042
6043 if (rval) {
6044 return rval;
6045 }
6046
6047 pci_set_master(pdev);
6048
31ea7088 6049 if (megasas_set_dma_mask(pdev))
6050 goto fail_set_dma_mask;
c4a3e0a5
BS		 6051
6052 host = scsi_host_alloc(&megasas_template,
6053 sizeof(struct megasas_instance));
6054
6055 if (!host) {
1be18254 6056 dev_printk(KERN_DEBUG, &pdev->dev, "scsi_host_alloc failed\n");
c4a3e0a5
BS		 6057 goto fail_alloc_instance;
6058 }
6059
6060 instance = (struct megasas_instance *)host->hostdata;
6061 memset(instance, 0, sizeof(*instance));
da0dc9fb 6062 atomic_set(&instance->fw_reset_no_pci_access, 0);
9c915a8c 6063 instance->pdev = pdev;
c4a3e0a5 6064
c365178f 6065 megasas_set_adapter_type(instance);
9c915a8c 6066
c365178f
S		 6067 switch (instance->adapter_type) {
6068 case MFI_SERIES:
9c915a8c
AR		 6069 instance->producer =
6070 pci_alloc_consistent(pdev, sizeof(u32),
6071 &instance->producer_h);
6072 instance->consumer =
6073 pci_alloc_consistent(pdev, sizeof(u32),
6074 &instance->consumer_h);
6075
6076 if (!instance->producer || !instance->consumer) {
4086eae5 6077 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate "
9c915a8c
AR		 6078 "memory for producer, consumer\n");
6079 goto fail_alloc_dma_buf;
6080 }
c4a3e0a5 6081
9c915a8c
AR		 6082 *instance->producer = 0;
6083 *instance->consumer = 0;
c365178f 6084
9c915a8c 6085 break;
c365178f
S		 6086 case VENTURA_SERIES:
6087 instance->is_ventura = 1;
6088 case THUNDERBOLT_SERIES:
6089 case INVADER_SERIES:
6090 if (megasas_alloc_fusion_context(instance)) {
6091 megasas_free_fusion_context(instance);
6092 goto fail_alloc_dma_buf;
6093 }
c4a3e0a5
BS		 6094 }
6095
fc62b3fc
SS		 6096 /* Crash dump feature related initialisation*/
6097 instance->drv_buf_index = 0;
6098 instance->drv_buf_alloc = 0;
6099 instance->crash_dump_fw_support = 0;
6100 instance->crash_dump_app_support = 0;
6101 instance->fw_crash_state = UNAVAILABLE;
6102 spin_lock_init(&instance->crashdump_lock);
6103 instance->crash_dump_buf = NULL;
6104
c3518837 6105 megasas_poll_wait_aen = 0;
f4c9a131 6106 instance->flag_ieee = 0;
7e8a75f4 6107 instance->ev = NULL;
39a98554 6108 instance->issuepend_done = 1;
8a01a41d 6109 atomic_set(&instance->adprecovery, MEGASAS_HBA_OPERATIONAL);
404a8a1a 6110 instance->is_imr = 0;
c4a3e0a5
BS		 6111
6112 instance->evt_detail = pci_alloc_consistent(pdev,
6113 sizeof(struct
6114 megasas_evt_detail),
6115 &instance->evt_detail_h);
6116
6117 if (!instance->evt_detail) {
1be18254 6118 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate memory for "
c4a3e0a5
BS		 6119 "event detail structure\n");
6120 goto fail_alloc_dma_buf;
6121 }
6122
c3e385a1
SS		 6123 if (!reset_devices) {
6124 instance->system_info_buf = pci_zalloc_consistent(pdev,
6125 sizeof(struct MR_DRV_SYSTEM_INFO),
6126 &instance->system_info_h);
6127 if (!instance->system_info_buf)
6128 dev_info(&instance->pdev->dev, "Can't allocate system info buffer\n");
6129
6130 instance->pd_info = pci_alloc_consistent(pdev,
6131 sizeof(struct MR_PD_INFO), &instance->pd_info_h);
2216c305 6132
c3e385a1
SS		 6133 if (!instance->pd_info)
6134 dev_err(&instance->pdev->dev, "Failed to alloc mem for pd_info\n");
6135
3b8328e2 6136 instance->tgt_prop = pci_alloc_consistent(pdev,
6137 sizeof(struct MR_TARGET_PROPERTIES), &instance->tgt_prop_h);
6138
96188a89
S		 6139 if (!instance->tgt_prop)
6140 dev_err(&instance->pdev->dev, "Failed to alloc mem for tgt_prop\n");
6141
c3e385a1
SS		 6142 instance->crash_dump_buf = pci_alloc_consistent(pdev,
6143 CRASH_DMA_BUF_SIZE,
6144 &instance->crash_dump_h);
6145 if (!instance->crash_dump_buf)
6146 dev_err(&pdev->dev, "Can't allocate Firmware "
6147 "crash dump DMA buffer\n");
6148 }
2216c305 6149
c4a3e0a5
BS		 6150 /*
6151 * Initialize locks and queues
6152 */
6153 INIT_LIST_HEAD(&instance->cmd_pool);
39a98554 6154 INIT_LIST_HEAD(&instance->internal_reset_pending_q);
c4a3e0a5 6155
e4a082c7
SP		 6156 atomic_set(&instance->fw_outstanding,0);
6157
c4a3e0a5
BS		 6158 init_waitqueue_head(&instance->int_cmd_wait_q);
6159 init_waitqueue_head(&instance->abort_cmd_wait_q);
6160
90dc9d98 6161 spin_lock_init(&instance->mfi_pool_lock);
39a98554 6162 spin_lock_init(&instance->hba_lock);
fdd84e25 6163 spin_lock_init(&instance->stream_lock);
7343eb65 6164 spin_lock_init(&instance->completion_lock);
c4a3e0a5 6165
9c915a8c 6166 mutex_init(&instance->reset_mutex);
2216c305 6167 mutex_init(&instance->hba_mutex);
c4a3e0a5
BS		 6168
6169 /*
6170 * Initialize PCI related and misc parameters
6171 */
c4a3e0a5
BS		 6172 instance->host = host;
6173 instance->unique_id = pdev->bus->number << 8 | pdev->devfn;
6174 instance->init_id = MEGASAS_DEFAULT_INIT_ID;
51087a86 6175 instance->ctrl_info = NULL;
c4a3e0a5 6176
ae09a6c1 6177
7bebf5c7 6178 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
ae09a6c1 6179 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY))
f4c9a131 6180 instance->flag_ieee = 1;
7bebf5c7 6181
658dcedb 6182 megasas_dbg_lvl = 0;
05e9ebbe 6183 instance->flag = 0;
0c79e681 6184 instance->unload = 1;
05e9ebbe 6185 instance->last_time = 0;
39a98554 6186 instance->disableOnlineCtrlReset = 1;
bc93d425 6187 instance->UnevenSpanSupport = 0;
39a98554 6188
5a8cb85b 6189 if (instance->ctrl_context) {
9c915a8c 6190 INIT_WORK(&instance->work_init, megasas_fusion_ocr_wq);
fc62b3fc
SS		 6191 INIT_WORK(&instance->crash_init, megasas_fusion_crash_dump_wq);
6192 } else
9c915a8c 6193 INIT_WORK(&instance->work_init, process_fw_state_change_wq);
658dcedb 6194
0a77066a
AR		 6195 /*
6196 * Initialize MFI Firmware
6197 */
6198 if (megasas_init_fw(instance))
6199 goto fail_init_mfi;
6200
229fe47c
AR		 6201 if (instance->requestorId) {
6202 if (instance->PlasmaFW111) {
6203 instance->vf_affiliation_111 =
6204 pci_alloc_consistent(pdev, sizeof(struct MR_LD_VF_AFFILIATION_111),
6205 &instance->vf_affiliation_111_h);
6206 if (!instance->vf_affiliation_111)
1be18254 6207 dev_warn(&pdev->dev, "Can't allocate "
229fe47c
AR		 6208 "memory for VF affiliation buffer\n");
6209 } else {
6210 instance->vf_affiliation =
6211 pci_alloc_consistent(pdev,
6212 (MAX_LOGICAL_DRIVES + 1) *
6213 sizeof(struct MR_LD_VF_AFFILIATION),
6214 &instance->vf_affiliation_h);
6215 if (!instance->vf_affiliation)
1be18254 6216 dev_warn(&pdev->dev, "Can't allocate "
229fe47c
AR		 6217 "memory for VF affiliation buffer\n");
6218 }
6219 }
6220
c4a3e0a5
BS		 6221 /*
6222 * Store instance in PCI softstate
6223 */
6224 pci_set_drvdata(pdev, instance);
6225
6226 /*
6227 * Add this controller to megasas_mgmt_info structure so that it
6228 * can be exported to management applications
6229 */
6230 megasas_mgmt_info.count++;
6231 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = instance;
6232 megasas_mgmt_info.max_index++;
6233
541f90b7
AR		 6234 /*
6235 * Register with SCSI mid-layer
6236 */
6237 if (megasas_io_attach(instance))
6238 goto fail_io_attach;
6239
6240 instance->unload = 0;
aa00832b
SS		 6241 /*
6242 * Trigger SCSI to scan our drives
6243 */
6244 scsi_scan_host(host);
541f90b7 6245
c4a3e0a5
BS		 6246 /*
6247 * Initiate AEN (Asynchronous Event Notification)
6248 */
6249 if (megasas_start_aen(instance)) {
1be18254 6250 dev_printk(KERN_DEBUG, &pdev->dev, "start aen failed\n");
c4a3e0a5
BS		 6251 goto fail_start_aen;
6252 }
6253
9ea81f81
AR		 6254 /* Get current SR-IOV LD/VF affiliation */
6255 if (instance->requestorId)
6256 megasas_get_ld_vf_affiliation(instance, 1);
6257
c4a3e0a5
BS		 6258 return 0;
6259
da0dc9fb
BH		 6260fail_start_aen:
6261fail_io_attach:
c4a3e0a5 6262 megasas_mgmt_info.count--;
c4a3e0a5 6263 megasas_mgmt_info.max_index--;
61f0c3c7 6264 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = NULL;
c4a3e0a5 6265
d46a3ad6 6266 instance->instancet->disable_intr(instance);
d3557fc8
SS		 6267 megasas_destroy_irqs(instance);
6268
5a8cb85b 6269 if (instance->ctrl_context)
eb1b1237
AR		 6270 megasas_release_fusion(instance);
6271 else
6272 megasas_release_mfi(instance);
c8e858fe 6273 if (instance->msix_vectors)
fad119b7 6274 pci_free_irq_vectors(instance->pdev);
d3557fc8 6275fail_init_mfi:
da0dc9fb 6276fail_alloc_dma_buf:
c4a3e0a5
BS		 6277 if (instance->evt_detail)
6278 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
6279 instance->evt_detail,
6280 instance->evt_detail_h);
6281
2216c305
SS		 6282 if (instance->pd_info)
6283 pci_free_consistent(pdev, sizeof(struct MR_PD_INFO),
6284 instance->pd_info,
6285 instance->pd_info_h);
96188a89
S		 6286 if (instance->tgt_prop)
6287 pci_free_consistent(pdev, sizeof(struct MR_TARGET_PROPERTIES),
6288 instance->tgt_prop,
6289 instance->tgt_prop_h);
eb1b1237 6290 if (instance->producer)
c4a3e0a5
BS		 6291 pci_free_consistent(pdev, sizeof(u32), instance->producer,
6292 instance->producer_h);
6293 if (instance->consumer)
6294 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
6295 instance->consumer_h);
6296 scsi_host_put(host);
6297
da0dc9fb
BH		 6298fail_alloc_instance:
6299fail_set_dma_mask:
c4a3e0a5
BS		 6300 pci_disable_device(pdev);
6301
6302 return -ENODEV;
6303}
6304
6305/**
6306 * megasas_flush_cache - Requests FW to flush all its caches
6307 * @instance: Adapter soft state
6308 */
6309static void megasas_flush_cache(struct megasas_instance *instance)
6310{
6311 struct megasas_cmd *cmd;
6312 struct megasas_dcmd_frame *dcmd;
6313
8a01a41d 6314 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
39a98554 6315 return;
6316
c4a3e0a5
BS		 6317 cmd = megasas_get_cmd(instance);
6318
6319 if (!cmd)
6320 return;
6321
6322 dcmd = &cmd->frame->dcmd;
6323
6324 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
6325
6326 dcmd->cmd = MFI_CMD_DCMD;
6327 dcmd->cmd_status = 0x0;
6328 dcmd->sge_count = 0;
94cd65dd 6329 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 6330 dcmd->timeout = 0;
780a3762 6331 dcmd->pad_0 = 0;
c4a3e0a5 6332 dcmd->data_xfer_len = 0;
94cd65dd 6333 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_CACHE_FLUSH);
c4a3e0a5
BS		 6334 dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
6335
6d40afbc
SS		 6336 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS)
6337 != DCMD_SUCCESS) {
6338 dev_err(&instance->pdev->dev,
6339 "return from %s %d\n", __func__, __LINE__);
6340 return;
6341 }
c4a3e0a5 6342
4026e9aa 6343 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 6344}
6345
6346/**
6347 * megasas_shutdown_controller - Instructs FW to shutdown the controller
6348 * @instance: Adapter soft state
31ea7088 6349 * @opcode: Shutdown/Hibernate
c4a3e0a5 6350 */
31ea7088 6351static void megasas_shutdown_controller(struct megasas_instance *instance,
6352 u32 opcode)
c4a3e0a5
BS		 6353{
6354 struct megasas_cmd *cmd;
6355 struct megasas_dcmd_frame *dcmd;
6356
8a01a41d 6357 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
39a98554 6358 return;
6359
c4a3e0a5
BS		 6360 cmd = megasas_get_cmd(instance);
6361
6362 if (!cmd)
6363 return;
6364
6365 if (instance->aen_cmd)
cfbe7554 6366 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6367 instance->aen_cmd, MFI_IO_TIMEOUT_SECS);
9c915a8c
AR		 6368 if (instance->map_update_cmd)
6369 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6370 instance->map_update_cmd, MFI_IO_TIMEOUT_SECS);
3761cb4c 6371 if (instance->jbod_seq_cmd)
6372 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6373 instance->jbod_seq_cmd, MFI_IO_TIMEOUT_SECS);
3761cb4c 6374
c4a3e0a5
BS		 6375 dcmd = &cmd->frame->dcmd;
6376
6377 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
6378
6379 dcmd->cmd = MFI_CMD_DCMD;
6380 dcmd->cmd_status = 0x0;
6381 dcmd->sge_count = 0;
94cd65dd 6382 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 6383 dcmd->timeout = 0;
780a3762 6384 dcmd->pad_0 = 0;
c4a3e0a5 6385 dcmd->data_xfer_len = 0;
94cd65dd 6386 dcmd->opcode = cpu_to_le32(opcode);
c4a3e0a5 6387
6d40afbc
SS		 6388 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS)
6389 != DCMD_SUCCESS) {
6390 dev_err(&instance->pdev->dev,
6391 "return from %s %d\n", __func__, __LINE__);
6392 return;
6393 }
c4a3e0a5 6394
4026e9aa 6395 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 6396}
6397
33139b21 6398#ifdef CONFIG_PM
31ea7088 6399/**
ad84db2e 6400 * megasas_suspend - driver suspend entry point
6401 * @pdev: PCI device structure
31ea7088 6402 * @state: PCI power state to suspend routine
6403 */
33139b21 6404static int
31ea7088 6405megasas_suspend(struct pci_dev *pdev, pm_message_t state)
6406{
6407 struct Scsi_Host *host;
6408 struct megasas_instance *instance;
6409
6410 instance = pci_get_drvdata(pdev);
6411 host = instance->host;
0c79e681 6412 instance->unload = 1;
31ea7088 6413
229fe47c
AR		 6414 /* Shutdown SR-IOV heartbeat timer */
6415 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
6416 del_timer_sync(&instance->sriov_heartbeat_timer);
6417
31ea7088 6418 megasas_flush_cache(instance);
6419 megasas_shutdown_controller(instance, MR_DCMD_HIBERNATE_SHUTDOWN);
7e8a75f4
YB		 6420
6421 /* cancel the delayed work if this work still in queue */
6422 if (instance->ev != NULL) {
6423 struct megasas_aen_event *ev = instance->ev;
c1d390d8 6424 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 6425 instance->ev = NULL;
6426 }
6427
31ea7088 6428 tasklet_kill(&instance->isr_tasklet);
6429
6430 pci_set_drvdata(instance->pdev, instance);
d46a3ad6 6431 instance->instancet->disable_intr(instance);
c8e858fe 6432
d3557fc8
SS		 6433 megasas_destroy_irqs(instance);
6434
c8e858fe 6435 if (instance->msix_vectors)
fad119b7 6436 pci_free_irq_vectors(instance->pdev);
31ea7088 6437
6438 pci_save_state(pdev);
6439 pci_disable_device(pdev);
6440
6441 pci_set_power_state(pdev, pci_choose_state(pdev, state));
6442
6443 return 0;
6444}
6445
6446/**
6447 * megasas_resume- driver resume entry point
6448 * @pdev: PCI device structure
6449 */
33139b21 6450static int
31ea7088 6451megasas_resume(struct pci_dev *pdev)
6452{
d3557fc8 6453 int rval;
31ea7088 6454 struct Scsi_Host *host;
6455 struct megasas_instance *instance;
fad119b7 6456 int irq_flags = PCI_IRQ_LEGACY;
31ea7088 6457
6458 instance = pci_get_drvdata(pdev);
6459 host = instance->host;
6460 pci_set_power_state(pdev, PCI_D0);
6461 pci_enable_wake(pdev, PCI_D0, 0);
6462 pci_restore_state(pdev);
6463
6464 /*
6465 * PCI prepping: enable device set bus mastering and dma mask
6466 */
aeab3fd7 6467 rval = pci_enable_device_mem(pdev);
31ea7088 6468
6469 if (rval) {
1be18254 6470 dev_err(&pdev->dev, "Enable device failed\n");
31ea7088 6471 return rval;
6472 }
6473
6474 pci_set_master(pdev);
6475
6476 if (megasas_set_dma_mask(pdev))
6477 goto fail_set_dma_mask;
6478
6479 /*
6480 * Initialize MFI Firmware
6481 */
6482
31ea7088 6483 atomic_set(&instance->fw_outstanding, 0);
6484
6485 /*
6486 * We expect the FW state to be READY
6487 */
058a8fac 6488 if (megasas_transition_to_ready(instance, 0))
31ea7088 6489 goto fail_ready_state;
6490
3f1abce4 6491 /* Now re-enable MSI-X */
fad119b7
HR		 6492 if (instance->msix_vectors) {
6493 irq_flags = PCI_IRQ_MSIX;
6494 if (smp_affinity_enable)
6495 irq_flags |= PCI_IRQ_AFFINITY;
6496 }
6497 rval = pci_alloc_irq_vectors(instance->pdev, 1,
6498 instance->msix_vectors ?
6499 instance->msix_vectors : 1, irq_flags);
6500 if (rval < 0)
dd088128 6501 goto fail_reenable_msix;
3f1abce4 6502
5a8cb85b 6503 if (instance->ctrl_context) {
9c915a8c
AR		 6504 megasas_reset_reply_desc(instance);
6505 if (megasas_ioc_init_fusion(instance)) {
6506 megasas_free_cmds(instance);
6507 megasas_free_cmds_fusion(instance);
6508 goto fail_init_mfi;
6509 }
6510 if (!megasas_get_map_info(instance))
6511 megasas_sync_map_info(instance);
5a8cb85b 6512 } else {
9c915a8c
AR		 6513 *instance->producer = 0;
6514 *instance->consumer = 0;
6515 if (megasas_issue_init_mfi(instance))
6516 goto fail_init_mfi;
9c915a8c 6517 }
31ea7088 6518
9c915a8c
AR		 6519 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
6520 (unsigned long)instance);
31ea7088 6521
d3557fc8
SS		 6522 if (instance->msix_vectors ?
6523 megasas_setup_irqs_msix(instance, 0) :
6524 megasas_setup_irqs_ioapic(instance))
6525 goto fail_init_mfi;
31ea7088 6526
229fe47c
AR		 6527 /* Re-launch SR-IOV heartbeat timer */
6528 if (instance->requestorId) {
6529 if (!megasas_sriov_start_heartbeat(instance, 0))
6530 megasas_start_timer(instance,
6531 &instance->sriov_heartbeat_timer,
6532 megasas_sriov_heartbeat_handler,
6533 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
5765c5b8 6534 else {
229fe47c 6535 instance->skip_heartbeat_timer_del = 1;
5765c5b8
SS		 6536 goto fail_init_mfi;
6537 }
229fe47c
AR		 6538 }
6539
d46a3ad6 6540 instance->instancet->enable_intr(instance);
3761cb4c 6541 megasas_setup_jbod_map(instance);
0c79e681
YB		 6542 instance->unload = 0;
6543
541f90b7
AR		 6544 /*
6545 * Initiate AEN (Asynchronous Event Notification)
6546 */
6547 if (megasas_start_aen(instance))
1be18254 6548 dev_err(&instance->pdev->dev, "Start AEN failed\n");
541f90b7 6549
31ea7088 6550 return 0;
6551
31ea7088 6552fail_init_mfi:
6553 if (instance->evt_detail)
6554 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
6555 instance->evt_detail,
6556 instance->evt_detail_h);
6557
2216c305
SS		 6558 if (instance->pd_info)
6559 pci_free_consistent(pdev, sizeof(struct MR_PD_INFO),
6560 instance->pd_info,
6561 instance->pd_info_h);
96188a89
S		 6562 if (instance->tgt_prop)
6563 pci_free_consistent(pdev, sizeof(struct MR_TARGET_PROPERTIES),
6564 instance->tgt_prop,
6565 instance->tgt_prop_h);
31ea7088 6566 if (instance->producer)
6567 pci_free_consistent(pdev, sizeof(u32), instance->producer,
6568 instance->producer_h);
6569 if (instance->consumer)
6570 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
6571 instance->consumer_h);
6572 scsi_host_put(host);
6573
6574fail_set_dma_mask:
6575fail_ready_state:
dd088128 6576fail_reenable_msix:
31ea7088 6577
6578 pci_disable_device(pdev);
6579
6580 return -ENODEV;
6581}
33139b21
JS		 6582#else
6583#define megasas_suspend NULL
6584#define megasas_resume NULL
6585#endif
31ea7088 6586
a1dfd62c
KD		 6587static inline int
6588megasas_wait_for_adapter_operational(struct megasas_instance *instance)
6589{
6590 int wait_time = MEGASAS_RESET_WAIT_TIME * 2;
6591 int i;
6592
6593 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
6594 return 1;
6595
6596 for (i = 0; i < wait_time; i++) {
6597 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL)
6598 break;
6599
6600 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL))
6601 dev_notice(&instance->pdev->dev, "waiting for controller reset to finish\n");
6602
6603 msleep(1000);
6604 }
6605
6606 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
6607 dev_info(&instance->pdev->dev, "%s timed out while waiting for HBA to recover.\n",
6608 __func__);
6609 return 1;
6610 }
6611
6612 return 0;
6613}
6614
c4a3e0a5
BS		 6615/**
6616 * megasas_detach_one - PCI hot"un"plug entry point
6617 * @pdev: PCI device structure
6618 */
6f039790 6619static void megasas_detach_one(struct pci_dev *pdev)
c4a3e0a5
BS		 6620{
6621 int i;
6622 struct Scsi_Host *host;
6623 struct megasas_instance *instance;
9c915a8c 6624 struct fusion_context *fusion;
3761cb4c 6625 u32 pd_seq_map_sz;
c4a3e0a5
BS		 6626
6627 instance = pci_get_drvdata(pdev);
c3518837 6628 instance->unload = 1;
c4a3e0a5 6629 host = instance->host;
9c915a8c 6630 fusion = instance->ctrl_context;
c4a3e0a5 6631
229fe47c
AR		 6632 /* Shutdown SR-IOV heartbeat timer */
6633 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
6634 del_timer_sync(&instance->sriov_heartbeat_timer);
6635
fc62b3fc
SS		 6636 if (instance->fw_crash_state != UNAVAILABLE)
6637 megasas_free_host_crash_buffer(instance);
c4a3e0a5 6638 scsi_remove_host(instance->host);
a1dfd62c
KD		 6639
6640 if (megasas_wait_for_adapter_operational(instance))
6641 goto skip_firing_dcmds;
6642
c4a3e0a5 6643 megasas_flush_cache(instance);
31ea7088 6644 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
7e8a75f4 6645
a1dfd62c 6646skip_firing_dcmds:
7e8a75f4
YB		 6647 /* cancel the delayed work if this work still in queue*/
6648 if (instance->ev != NULL) {
6649 struct megasas_aen_event *ev = instance->ev;
c1d390d8 6650 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 6651 instance->ev = NULL;
6652 }
6653
cfbe7554
SS		 6654 /* cancel all wait events */
6655 wake_up_all(&instance->int_cmd_wait_q);
6656
5d018ad0 6657 tasklet_kill(&instance->isr_tasklet);
c4a3e0a5
BS		 6658
6659 /*
6660 * Take the instance off the instance array. Note that we will not
6661 * decrement the max_index. We let this array be sparse array
6662 */
6663 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
6664 if (megasas_mgmt_info.instance[i] == instance) {
6665 megasas_mgmt_info.count--;
6666 megasas_mgmt_info.instance[i] = NULL;
6667
6668 break;
6669 }
6670 }
6671
d46a3ad6 6672 instance->instancet->disable_intr(instance);
c4a3e0a5 6673
d3557fc8
SS		 6674 megasas_destroy_irqs(instance);
6675
c8e858fe 6676 if (instance->msix_vectors)
fad119b7 6677 pci_free_irq_vectors(instance->pdev);
c4a3e0a5 6678
fdd84e25
SC		 6679 if (instance->is_ventura) {
6680 for (i = 0; i < MAX_LOGICAL_DRIVES_EXT; ++i)
6681 kfree(fusion->stream_detect_by_ld[i]);
6682 kfree(fusion->stream_detect_by_ld);
6683 fusion->stream_detect_by_ld = NULL;
6684 }
6685
6686
5a8cb85b 6687 if (instance->ctrl_context) {
9c915a8c 6688 megasas_release_fusion(instance);
3761cb4c 6689 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
6690 (sizeof(struct MR_PD_CFG_SEQ) *
6691 (MAX_PHYSICAL_DEVICES - 1));
51087a86 6692 for (i = 0; i < 2 ; i++) {
9c915a8c
AR		 6693 if (fusion->ld_map[i])
6694 dma_free_coherent(&instance->pdev->dev,
51087a86 6695 fusion->max_map_sz,
9c915a8c 6696 fusion->ld_map[i],
51087a86 6697 fusion->ld_map_phys[i]);
def3e8df
S		 6698 if (fusion->ld_drv_map[i]) {
6699 if (is_vmalloc_addr(fusion->ld_drv_map[i]))
6700 vfree(fusion->ld_drv_map[i]);
6701 else
6702 free_pages((ulong)fusion->ld_drv_map[i],
6703 fusion->drv_map_pages);
6704 }
6705
546e559c
ML		 6706 if (fusion->pd_seq_sync[i])
6707 dma_free_coherent(&instance->pdev->dev,
6708 pd_seq_map_sz,
6709 fusion->pd_seq_sync[i],
6710 fusion->pd_seq_phys[i]);
51087a86 6711 }
5fc499b6 6712 megasas_free_fusion_context(instance);
5a8cb85b 6713 } else {
9c915a8c 6714 megasas_release_mfi(instance);
9c915a8c
AR		 6715 pci_free_consistent(pdev, sizeof(u32),
6716 instance->producer,
6717 instance->producer_h);
6718 pci_free_consistent(pdev, sizeof(u32),
6719 instance->consumer,
6720 instance->consumer_h);
9c915a8c 6721 }
c4a3e0a5 6722
51087a86
SS		 6723 kfree(instance->ctrl_info);
6724
105900d5
SS		 6725 if (instance->evt_detail)
6726 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
6727 instance->evt_detail, instance->evt_detail_h);
2216c305
SS		 6728 if (instance->pd_info)
6729 pci_free_consistent(pdev, sizeof(struct MR_PD_INFO),
6730 instance->pd_info,
6731 instance->pd_info_h);
96188a89
S		 6732 if (instance->tgt_prop)
6733 pci_free_consistent(pdev, sizeof(struct MR_TARGET_PROPERTIES),
6734 instance->tgt_prop,
6735 instance->tgt_prop_h);
229fe47c
AR		 6736 if (instance->vf_affiliation)
6737 pci_free_consistent(pdev, (MAX_LOGICAL_DRIVES + 1) *
6738 sizeof(struct MR_LD_VF_AFFILIATION),
6739 instance->vf_affiliation,
6740 instance->vf_affiliation_h);
6741
6742 if (instance->vf_affiliation_111)
6743 pci_free_consistent(pdev,
6744 sizeof(struct MR_LD_VF_AFFILIATION_111),
6745 instance->vf_affiliation_111,
6746 instance->vf_affiliation_111_h);
6747
6748 if (instance->hb_host_mem)
6749 pci_free_consistent(pdev, sizeof(struct MR_CTRL_HB_HOST_MEM),
6750 instance->hb_host_mem,
6751 instance->hb_host_mem_h);
6752
fc62b3fc
SS		 6753 if (instance->crash_dump_buf)
6754 pci_free_consistent(pdev, CRASH_DMA_BUF_SIZE,
6755 instance->crash_dump_buf, instance->crash_dump_h);
6756
5765c5b8
SS		 6757 if (instance->system_info_buf)
6758 pci_free_consistent(pdev, sizeof(struct MR_DRV_SYSTEM_INFO),
6759 instance->system_info_buf, instance->system_info_h);
6760
c4a3e0a5
BS		 6761 scsi_host_put(host);
6762
c4a3e0a5 6763 pci_disable_device(pdev);
c4a3e0a5
BS		 6764}
6765
6766/**
6767 * megasas_shutdown - Shutdown entry point
6768 * @device: Generic device structure
6769 */
6770static void megasas_shutdown(struct pci_dev *pdev)
6771{
6772 struct megasas_instance *instance = pci_get_drvdata(pdev);
c8e858fe 6773
0c79e681 6774 instance->unload = 1;
a1dfd62c
KD		 6775
6776 if (megasas_wait_for_adapter_operational(instance))
6777 goto skip_firing_dcmds;
6778
c4a3e0a5 6779 megasas_flush_cache(instance);
530e6fc1 6780 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
a1dfd62c
KD		 6781
6782skip_firing_dcmds:
d46a3ad6 6783 instance->instancet->disable_intr(instance);
d3557fc8
SS		 6784 megasas_destroy_irqs(instance);
6785
c8e858fe 6786 if (instance->msix_vectors)
fad119b7 6787 pci_free_irq_vectors(instance->pdev);
c4a3e0a5
BS		 6788}
6789
6790/**
6791 * megasas_mgmt_open - char node "open" entry point
6792 */
6793static int megasas_mgmt_open(struct inode *inode, struct file *filep)
6794{
6795 /*
6796 * Allow only those users with admin rights
6797 */
6798 if (!capable(CAP_SYS_ADMIN))
6799 return -EACCES;
6800
6801 return 0;
6802}
6803
c4a3e0a5
BS		 6804/**
6805 * megasas_mgmt_fasync - Async notifier registration from applications
6806 *
6807 * This function adds the calling process to a driver global queue. When an
6808 * event occurs, SIGIO will be sent to all processes in this queue.
6809 */
6810static int megasas_mgmt_fasync(int fd, struct file *filep, int mode)
6811{
6812 int rc;
6813
0b950672 6814 mutex_lock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 6815
6816 rc = fasync_helper(fd, filep, mode, &megasas_async_queue);
6817
0b950672 6818 mutex_unlock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 6819
6820 if (rc >= 0) {
6821 /* For sanity check when we get ioctl */
6822 filep->private_data = filep;
6823 return 0;
6824 }
6825
6826 printk(KERN_DEBUG "megasas: fasync_helper failed [%d]\n", rc);
6827
6828 return rc;
6829}
6830
c3518837
YB		 6831/**
6832 * megasas_mgmt_poll - char node "poll" entry point
6833 * */
6834static unsigned int megasas_mgmt_poll(struct file *file, poll_table *wait)
6835{
6836 unsigned int mask;
6837 unsigned long flags;
da0dc9fb 6838
c3518837
YB		 6839 poll_wait(file, &megasas_poll_wait, wait);
6840 spin_lock_irqsave(&poll_aen_lock, flags);
6841 if (megasas_poll_wait_aen)
da0dc9fb 6842 mask = (POLLIN | POLLRDNORM);
c3518837
YB		 6843 else
6844 mask = 0;
51087a86 6845 megasas_poll_wait_aen = 0;
c3518837
YB		 6846 spin_unlock_irqrestore(&poll_aen_lock, flags);
6847 return mask;
6848}
6849
fc62b3fc
SS		 6850/*
6851 * megasas_set_crash_dump_params_ioctl:
6852 * Send CRASH_DUMP_MODE DCMD to all controllers
6853 * @cmd: MFI command frame
6854 */
6855
da0dc9fb 6856static int megasas_set_crash_dump_params_ioctl(struct megasas_cmd *cmd)
fc62b3fc
SS		 6857{
6858 struct megasas_instance *local_instance;
6859 int i, error = 0;
6860 int crash_support;
6861
6862 crash_support = cmd->frame->dcmd.mbox.w[0];
6863
6864 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
6865 local_instance = megasas_mgmt_info.instance[i];
6866 if (local_instance && local_instance->crash_dump_drv_support) {
8a01a41d 6867 if ((atomic_read(&local_instance->adprecovery) ==
fc62b3fc
SS		 6868 MEGASAS_HBA_OPERATIONAL) &&
6869 !megasas_set_crash_dump_params(local_instance,
6870 crash_support)) {
6871 local_instance->crash_dump_app_support =
6872 crash_support;
6873 dev_info(&local_instance->pdev->dev,
6874 "Application firmware crash "
6875 "dump mode set success\n");
6876 error = 0;
6877 } else {
6878 dev_info(&local_instance->pdev->dev,
6879 "Application firmware crash "
6880 "dump mode set failed\n");
6881 error = -1;
6882 }
6883 }
6884 }
6885 return error;
6886}
6887
c4a3e0a5
BS		 6888/**
6889 * megasas_mgmt_fw_ioctl - Issues management ioctls to FW
6890 * @instance: Adapter soft state
6891 * @argp: User's ioctl packet
6892 */
6893static int
6894megasas_mgmt_fw_ioctl(struct megasas_instance *instance,
6895 struct megasas_iocpacket __user * user_ioc,
6896 struct megasas_iocpacket *ioc)
6897{
6898 struct megasas_sge32 *kern_sge32;
6899 struct megasas_cmd *cmd;
6900 void *kbuff_arr[MAX_IOCTL_SGE];
6901 dma_addr_t buf_handle = 0;
6902 int error = 0, i;
6903 void *sense = NULL;
6904 dma_addr_t sense_handle;
7b2519af 6905 unsigned long *sense_ptr;
8823abed 6906 u32 opcode;
c4a3e0a5
BS		 6907
6908 memset(kbuff_arr, 0, sizeof(kbuff_arr));
6909
6910 if (ioc->sge_count > MAX_IOCTL_SGE) {
1be18254 6911 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SGE count [%d] > max limit [%d]\n",
c4a3e0a5
BS		 6912 ioc->sge_count, MAX_IOCTL_SGE);
6913 return -EINVAL;
6914 }
6915
6916 cmd = megasas_get_cmd(instance);
6917 if (!cmd) {
1be18254 6918 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a cmd packet\n");
c4a3e0a5
BS		 6919 return -ENOMEM;
6920 }
6921
6922 /*
6923 * User's IOCTL packet has 2 frames (maximum). Copy those two
6924 * frames into our cmd's frames. cmd->frame's context will get
6925 * overwritten when we copy from user's frames. So set that value
6926 * alone separately
6927 */
6928 memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE);
94cd65dd 6929 cmd->frame->hdr.context = cpu_to_le32(cmd->index);
c3518837 6930 cmd->frame->hdr.pad_0 = 0;
94cd65dd
SS		 6931 cmd->frame->hdr.flags &= cpu_to_le16(~(MFI_FRAME_IEEE |
6932 MFI_FRAME_SGL64 |
6933 MFI_FRAME_SENSE64));
8823abed 6934 opcode = le32_to_cpu(cmd->frame->dcmd.opcode);
c4a3e0a5 6935
8823abed 6936 if (opcode == MR_DCMD_CTRL_SHUTDOWN) {
95c06086
S		 6937 if (megasas_get_ctrl_info(instance) != DCMD_SUCCESS) {
6938 megasas_return_cmd(instance, cmd);
6939 return -1;
6940 }
6941 }
6942
8823abed 6943 if (opcode == MR_DRIVER_SET_APP_CRASHDUMP_MODE) {
fc62b3fc
SS		 6944 error = megasas_set_crash_dump_params_ioctl(cmd);
6945 megasas_return_cmd(instance, cmd);
6946 return error;
6947 }
6948
c4a3e0a5
BS		 6949 /*
6950 * The management interface between applications and the fw uses
6951 * MFI frames. E.g, RAID configuration changes, LD property changes
6952 * etc are accomplishes through different kinds of MFI frames. The
6953 * driver needs to care only about substituting user buffers with
6954 * kernel buffers in SGLs. The location of SGL is embedded in the
6955 * struct iocpacket itself.
6956 */
6957 kern_sge32 = (struct megasas_sge32 *)
6958 ((unsigned long)cmd->frame + ioc->sgl_off);
6959
6960 /*
6961 * For each user buffer, create a mirror buffer and copy in
6962 */
6963 for (i = 0; i < ioc->sge_count; i++) {
98cb7e44
BM		 6964 if (!ioc->sgl[i].iov_len)
6965 continue;
6966
9f35fa8a 6967 kbuff_arr[i] = dma_alloc_coherent(&instance->pdev->dev,
c4a3e0a5 6968 ioc->sgl[i].iov_len,
9f35fa8a 6969 &buf_handle, GFP_KERNEL);
c4a3e0a5 6970 if (!kbuff_arr[i]) {
1be18254
BH		 6971 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc "
6972 "kernel SGL buffer for IOCTL\n");
c4a3e0a5
BS		 6973 error = -ENOMEM;
6974 goto out;
6975 }
6976
6977 /*
6978 * We don't change the dma_coherent_mask, so
6979 * pci_alloc_consistent only returns 32bit addresses
6980 */
94cd65dd
SS		 6981 kern_sge32[i].phys_addr = cpu_to_le32(buf_handle);
6982 kern_sge32[i].length = cpu_to_le32(ioc->sgl[i].iov_len);
c4a3e0a5
BS		 6983
6984 /*
6985 * We created a kernel buffer corresponding to the
6986 * user buffer. Now copy in from the user buffer
6987 */
6988 if (copy_from_user(kbuff_arr[i], ioc->sgl[i].iov_base,
6989 (u32) (ioc->sgl[i].iov_len))) {
6990 error = -EFAULT;
6991 goto out;
6992 }
6993 }
6994
6995 if (ioc->sense_len) {
9f35fa8a
SP		 6996 sense = dma_alloc_coherent(&instance->pdev->dev, ioc->sense_len,
6997 &sense_handle, GFP_KERNEL);
c4a3e0a5
BS		 6998 if (!sense) {
6999 error = -ENOMEM;
7000 goto out;
7001 }
7002
7003 sense_ptr =
7b2519af 7004 (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off);
94cd65dd 7005 *sense_ptr = cpu_to_le32(sense_handle);
c4a3e0a5
BS		 7006 }
7007
7008 /*
7009 * Set the sync_cmd flag so that the ISR knows not to complete this
7010 * cmd to the SCSI mid-layer
7011 */
7012 cmd->sync_cmd = 1;
6d40afbc
SS		 7013 if (megasas_issue_blocked_cmd(instance, cmd, 0) == DCMD_NOT_FIRED) {
7014 cmd->sync_cmd = 0;
7015 dev_err(&instance->pdev->dev,
7016 "return -EBUSY from %s %d opcode 0x%x cmd->cmd_status_drv 0x%x\n",
8823abed 7017 __func__, __LINE__, opcode, cmd->cmd_status_drv);
6d40afbc
SS		 7018 return -EBUSY;
7019 }
7020
c4a3e0a5
BS		 7021 cmd->sync_cmd = 0;
7022
aa00832b
SS		 7023 if (instance->unload == 1) {
7024 dev_info(&instance->pdev->dev, "Driver unload is in progress "
7025 "don't submit data to application\n");
7026 goto out;
7027 }
c4a3e0a5
BS		 7028 /*
7029 * copy out the kernel buffers to user buffers
7030 */
7031 for (i = 0; i < ioc->sge_count; i++) {
7032 if (copy_to_user(ioc->sgl[i].iov_base, kbuff_arr[i],
7033 ioc->sgl[i].iov_len)) {
7034 error = -EFAULT;
7035 goto out;
7036 }
7037 }
7038
7039 /*
7040 * copy out the sense
7041 */
7042 if (ioc->sense_len) {
7043 /*
b70a41e0 7044 * sense_ptr points to the location that has the user
c4a3e0a5
BS		 7045 * sense buffer address
7046 */
7b2519af
YB		 7047 sense_ptr = (unsigned long *) ((unsigned long)ioc->frame.raw +
7048 ioc->sense_off);
c4a3e0a5 7049
318aaef8
S		 7050 if (copy_to_user((void __user *)((unsigned long)
7051 get_unaligned((unsigned long *)sense_ptr)),
b70a41e0 7052 sense, ioc->sense_len)) {
1be18254 7053 dev_err(&instance->pdev->dev, "Failed to copy out to user "
b10c36a5 7054 "sense data\n");
c4a3e0a5
BS		 7055 error = -EFAULT;
7056 goto out;
7057 }
7058 }
7059
7060 /*
7061 * copy the status codes returned by the fw
7062 */
7063 if (copy_to_user(&user_ioc->frame.hdr.cmd_status,
7064 &cmd->frame->hdr.cmd_status, sizeof(u8))) {
1be18254 7065 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error copying out cmd_status\n");
c4a3e0a5
BS		 7066 error = -EFAULT;
7067 }
7068
da0dc9fb 7069out:
c4a3e0a5 7070 if (sense) {
9f35fa8a 7071 dma_free_coherent(&instance->pdev->dev, ioc->sense_len,
c4a3e0a5
BS		 7072 sense, sense_handle);
7073 }
7074
7a6a731b 7075 for (i = 0; i < ioc->sge_count; i++) {
3deb9438 7076 if (kbuff_arr[i]) {
7a6a731b 7077 dma_free_coherent(&instance->pdev->dev,
94cd65dd 7078 le32_to_cpu(kern_sge32[i].length),
7a6a731b 7079 kbuff_arr[i],
94cd65dd 7080 le32_to_cpu(kern_sge32[i].phys_addr));
90dc9d98 7081 kbuff_arr[i] = NULL;
3deb9438 7082 }
c4a3e0a5
BS		 7083 }
7084
4026e9aa 7085 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 7086 return error;
7087}
7088
c4a3e0a5
BS		 7089static int megasas_mgmt_ioctl_fw(struct file *file, unsigned long arg)
7090{
7091 struct megasas_iocpacket __user *user_ioc =
7092 (struct megasas_iocpacket __user *)arg;
7093 struct megasas_iocpacket *ioc;
7094 struct megasas_instance *instance;
7095 int error;
39a98554 7096 int i;
7097 unsigned long flags;
7098 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5 7099
709ab231
ME		 7100 ioc = memdup_user(user_ioc, sizeof(*ioc));
7101 if (IS_ERR(ioc))
7102 return PTR_ERR(ioc);
c4a3e0a5
BS		 7103
7104 instance = megasas_lookup_instance(ioc->host_no);
7105 if (!instance) {
7106 error = -ENODEV;
7107 goto out_kfree_ioc;
7108 }
7109
229fe47c
AR		 7110 /* Adjust ioctl wait time for VF mode */
7111 if (instance->requestorId)
7112 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
7113
7114 /* Block ioctls in VF mode */
7115 if (instance->requestorId && !allow_vf_ioctls) {
7116 error = -ENODEV;
7117 goto out_kfree_ioc;
7118 }
7119
8a01a41d 7120 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 7121 dev_err(&instance->pdev->dev, "Controller in crit error\n");
0c79e681
YB		 7122 error = -ENODEV;
7123 goto out_kfree_ioc;
7124 }
7125
7126 if (instance->unload == 1) {
7127 error = -ENODEV;
7128 goto out_kfree_ioc;
7129 }
7130
c4a3e0a5
BS		 7131 if (down_interruptible(&instance->ioctl_sem)) {
7132 error = -ERESTARTSYS;
7133 goto out_kfree_ioc;
7134 }
39a98554 7135
7136 for (i = 0; i < wait_time; i++) {
7137
7138 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7139 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL) {
39a98554 7140 spin_unlock_irqrestore(&instance->hba_lock, flags);
7141 break;
7142 }
7143 spin_unlock_irqrestore(&instance->hba_lock, flags);
7144
7145 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 7146 dev_notice(&instance->pdev->dev, "waiting"
39a98554 7147 "for controller reset to finish\n");
7148 }
7149
7150 msleep(1000);
7151 }
7152
7153 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7154 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 7155 spin_unlock_irqrestore(&instance->hba_lock, flags);
7156
644da3c3 7157 dev_err(&instance->pdev->dev, "timed out while waiting for HBA to recover\n");
39a98554 7158 error = -ENODEV;
c64e483e 7159 goto out_up;
39a98554 7160 }
7161 spin_unlock_irqrestore(&instance->hba_lock, flags);
7162
c4a3e0a5 7163 error = megasas_mgmt_fw_ioctl(instance, user_ioc, ioc);
da0dc9fb 7164out_up:
c4a3e0a5
BS		 7165 up(&instance->ioctl_sem);
7166
da0dc9fb 7167out_kfree_ioc:
c4a3e0a5
BS		 7168 kfree(ioc);
7169 return error;
7170}
7171
7172static int megasas_mgmt_ioctl_aen(struct file *file, unsigned long arg)
7173{
7174 struct megasas_instance *instance;
7175 struct megasas_aen aen;
7176 int error;
39a98554 7177 int i;
7178 unsigned long flags;
7179 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 7180
7181 if (file->private_data != file) {
7182 printk(KERN_DEBUG "megasas: fasync_helper was not "
7183 "called first\n");
7184 return -EINVAL;
7185 }
7186
7187 if (copy_from_user(&aen, (void __user *)arg, sizeof(aen)))
7188 return -EFAULT;
7189
7190 instance = megasas_lookup_instance(aen.host_no);
7191
7192 if (!instance)
7193 return -ENODEV;
7194
8a01a41d 7195 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
39a98554 7196 return -ENODEV;
0c79e681
YB		 7197 }
7198
7199 if (instance->unload == 1) {
7200 return -ENODEV;
7201 }
7202
39a98554 7203 for (i = 0; i < wait_time; i++) {
7204
7205 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7206 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL) {
39a98554 7207 spin_unlock_irqrestore(&instance->hba_lock,
7208 flags);
7209 break;
7210 }
7211
7212 spin_unlock_irqrestore(&instance->hba_lock, flags);
7213
7214 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 7215 dev_notice(&instance->pdev->dev, "waiting for"
39a98554 7216 "controller reset to finish\n");
7217 }
7218
7219 msleep(1000);
7220 }
7221
7222 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 7223 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 7224 spin_unlock_irqrestore(&instance->hba_lock, flags);
644da3c3 7225 dev_err(&instance->pdev->dev, "timed out while waiting for HBA to recover\n");
39a98554 7226 return -ENODEV;
7227 }
7228 spin_unlock_irqrestore(&instance->hba_lock, flags);
7229
11c71cb4 7230 mutex_lock(&instance->reset_mutex);
c4a3e0a5
BS		 7231 error = megasas_register_aen(instance, aen.seq_num,
7232 aen.class_locale_word);
11c71cb4 7233 mutex_unlock(&instance->reset_mutex);
c4a3e0a5
BS		 7234 return error;
7235}
7236
7237/**
7238 * megasas_mgmt_ioctl - char node ioctl entry point
7239 */
7240static long
7241megasas_mgmt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
7242{
7243 switch (cmd) {
7244 case MEGASAS_IOC_FIRMWARE:
7245 return megasas_mgmt_ioctl_fw(file, arg);
7246
7247 case MEGASAS_IOC_GET_AEN:
7248 return megasas_mgmt_ioctl_aen(file, arg);
7249 }
7250
7251 return -ENOTTY;
7252}
7253
7254#ifdef CONFIG_COMPAT
7255static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg)
7256{
7257 struct compat_megasas_iocpacket __user *cioc =
7258 (struct compat_megasas_iocpacket __user *)arg;
7259 struct megasas_iocpacket __user *ioc =
7260 compat_alloc_user_space(sizeof(struct megasas_iocpacket));
7261 int i;
7262 int error = 0;
b3dc1a21 7263 compat_uptr_t ptr;
323c4a02 7264 u32 local_sense_off;
7265 u32 local_sense_len;
ea1c928b 7266 u32 user_sense_off;
c4a3e0a5 7267
83aabc1b
JG		 7268 if (clear_user(ioc, sizeof(*ioc)))
7269 return -EFAULT;
c4a3e0a5
BS		 7270
7271 if (copy_in_user(&ioc->host_no, &cioc->host_no, sizeof(u16)) ||
7272 copy_in_user(&ioc->sgl_off, &cioc->sgl_off, sizeof(u32)) ||
7273 copy_in_user(&ioc->sense_off, &cioc->sense_off, sizeof(u32)) ||
7274 copy_in_user(&ioc->sense_len, &cioc->sense_len, sizeof(u32)) ||
7275 copy_in_user(ioc->frame.raw, cioc->frame.raw, 128) ||
7276 copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32)))
7277 return -EFAULT;
7278
b3dc1a21
TH		 7279 /*
7280 * The sense_ptr is used in megasas_mgmt_fw_ioctl only when
7281 * sense_len is not null, so prepare the 64bit value under
7282 * the same condition.
7283 */
ea1c928b
SS		 7284 if (get_user(local_sense_off, &ioc->sense_off) ||
7285 get_user(local_sense_len, &ioc->sense_len) ||
7286 get_user(user_sense_off, &cioc->sense_off))
323c4a02 7287 return -EFAULT;
7288
323c4a02 7289 if (local_sense_len) {
b3dc1a21 7290 void __user **sense_ioc_ptr =
ea1c928b 7291 (void __user **)((u8 *)((unsigned long)&ioc->frame.raw) + local_sense_off);
b3dc1a21 7292 compat_uptr_t *sense_cioc_ptr =
ea1c928b 7293 (compat_uptr_t *)(((unsigned long)&cioc->frame.raw) + user_sense_off);
b3dc1a21
TH		 7294 if (get_user(ptr, sense_cioc_ptr) ||
7295 put_user(compat_ptr(ptr), sense_ioc_ptr))
7296 return -EFAULT;
7297 }
c4a3e0a5 7298
b3dc1a21 7299 for (i = 0; i < MAX_IOCTL_SGE; i++) {
c4a3e0a5
BS		 7300 if (get_user(ptr, &cioc->sgl[i].iov_base) ||
7301 put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) ||
7302 copy_in_user(&ioc->sgl[i].iov_len,
7303 &cioc->sgl[i].iov_len, sizeof(compat_size_t)))
7304 return -EFAULT;
7305 }
7306
7307 error = megasas_mgmt_ioctl_fw(file, (unsigned long)ioc);
7308
7309 if (copy_in_user(&cioc->frame.hdr.cmd_status,
7310 &ioc->frame.hdr.cmd_status, sizeof(u8))) {
7311 printk(KERN_DEBUG "megasas: error copy_in_user cmd_status\n");
7312 return -EFAULT;
7313 }
7314 return error;
7315}
7316
7317static long
7318megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd,
7319 unsigned long arg)
7320{
7321 switch (cmd) {
cb59aa6a
SP		 7322 case MEGASAS_IOC_FIRMWARE32:
7323 return megasas_mgmt_compat_ioctl_fw(file, arg);
c4a3e0a5
BS		 7324 case MEGASAS_IOC_GET_AEN:
7325 return megasas_mgmt_ioctl_aen(file, arg);
7326 }
7327
7328 return -ENOTTY;
7329}
7330#endif
7331
7332/*
7333 * File operations structure for management interface
7334 */
00977a59 7335static const struct file_operations megasas_mgmt_fops = {
c4a3e0a5
BS		 7336 .owner = THIS_MODULE,
7337 .open = megasas_mgmt_open,
c4a3e0a5
BS		 7338 .fasync = megasas_mgmt_fasync,
7339 .unlocked_ioctl = megasas_mgmt_ioctl,
c3518837 7340 .poll = megasas_mgmt_poll,
c4a3e0a5
BS		 7341#ifdef CONFIG_COMPAT
7342 .compat_ioctl = megasas_mgmt_compat_ioctl,
7343#endif
6038f373 7344 .llseek = noop_llseek,
c4a3e0a5
BS		 7345};
7346
7347/*
7348 * PCI hotplug support registration structure
7349 */
7350static struct pci_driver megasas_pci_driver = {
7351
7352 .name = "megaraid_sas",
7353 .id_table = megasas_pci_table,
7354 .probe = megasas_probe_one,
6f039790 7355 .remove = megasas_detach_one,
31ea7088 7356 .suspend = megasas_suspend,
7357 .resume = megasas_resume,
c4a3e0a5
BS		 7358 .shutdown = megasas_shutdown,
7359};
7360
7361/*
7362 * Sysfs driver attributes
7363 */
e14a3967 7364static ssize_t version_show(struct device_driver *dd, char *buf)
c4a3e0a5
BS		 7365{
7366 return snprintf(buf, strlen(MEGASAS_VERSION) + 2, "%s\n",
7367 MEGASAS_VERSION);
7368}
e14a3967 7369static DRIVER_ATTR_RO(version);
c4a3e0a5 7370
e14a3967 7371static ssize_t release_date_show(struct device_driver *dd, char *buf)
09fced19
SS		 7372{
7373 return snprintf(buf, strlen(MEGASAS_RELDATE) + 2, "%s\n",
7374 MEGASAS_RELDATE);
7375}
e14a3967 7376static DRIVER_ATTR_RO(release_date);
09fced19 7377
e14a3967 7378static ssize_t support_poll_for_event_show(struct device_driver *dd, char *buf)
72c4fd36
YB		 7379{
7380 return sprintf(buf, "%u\n", support_poll_for_event);
7381}
e14a3967 7382static DRIVER_ATTR_RO(support_poll_for_event);
72c4fd36 7383
e14a3967 7384static ssize_t support_device_change_show(struct device_driver *dd, char *buf)
837f5fe8
YB		 7385{
7386 return sprintf(buf, "%u\n", support_device_change);
7387}
e14a3967 7388static DRIVER_ATTR_RO(support_device_change);
837f5fe8 7389
e14a3967 7390static ssize_t dbg_lvl_show(struct device_driver *dd, char *buf)
658dcedb 7391{
ad84db2e 7392 return sprintf(buf, "%u\n", megasas_dbg_lvl);
658dcedb
SP		 7393}
7394
e14a3967
GKH		 7395static ssize_t dbg_lvl_store(struct device_driver *dd, const char *buf,
7396 size_t count)
658dcedb
SP		 7397{
7398 int retval = count;
da0dc9fb
BH		 7399
7400 if (sscanf(buf, "%u", &megasas_dbg_lvl) < 1) {
658dcedb
SP		 7401 printk(KERN_ERR "megasas: could not set dbg_lvl\n");
7402 retval = -EINVAL;
7403 }
7404 return retval;
7405}
e14a3967 7406static DRIVER_ATTR_RW(dbg_lvl);
ad84db2e 7407
b4a42213
S		 7408static inline void megasas_remove_scsi_device(struct scsi_device *sdev)
7409{
7410 sdev_printk(KERN_INFO, sdev, "SCSI device is removed\n");
7411 scsi_remove_device(sdev);
7412 scsi_device_put(sdev);
7413}
7414
7e8a75f4
YB		 7415static void
7416megasas_aen_polling(struct work_struct *work)
7417{
7418 struct megasas_aen_event *ev =
c1d390d8 7419 container_of(work, struct megasas_aen_event, hotplug_work.work);
7e8a75f4
YB		 7420 struct megasas_instance *instance = ev->instance;
7421 union megasas_evt_class_locale class_locale;
7422 struct Scsi_Host *host;
7423 struct scsi_device *sdev1;
7424 u16 pd_index = 0;
c9786842 7425 u16 ld_index = 0;
7e8a75f4 7426 int i, j, doscan = 0;
229fe47c 7427 u32 seq_num, wait_time = MEGASAS_RESET_WAIT_TIME;
7e8a75f4 7428 int error;
6d40afbc 7429 u8 dcmd_ret = DCMD_SUCCESS;
7e8a75f4
YB		 7430
7431 if (!instance) {
7432 printk(KERN_ERR "invalid instance!\n");
7433 kfree(ev);
7434 return;
7435 }
229fe47c
AR		 7436
7437 /* Adjust event workqueue thread wait time for VF mode */
7438 if (instance->requestorId)
7439 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
7440
7441 /* Don't run the event workqueue thread if OCR is running */
11c71cb4 7442 mutex_lock(&instance->reset_mutex);
229fe47c 7443
7e8a75f4
YB		 7444 instance->ev = NULL;
7445 host = instance->host;
7446 if (instance->evt_detail) {
714f5177 7447 megasas_decode_evt(instance);
7e8a75f4 7448
94cd65dd 7449 switch (le32_to_cpu(instance->evt_detail->code)) {
c9786842 7450
11c71cb4 7451 case MR_EVT_PD_INSERTED:
7e8a75f4 7452 case MR_EVT_PD_REMOVED:
11c71cb4 7453 dcmd_ret = megasas_get_pd_list(instance);
6d40afbc 7454 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4 7455 doscan = SCAN_PD_CHANNEL;
c9786842
YB		 7456 break;
7457
7458 case MR_EVT_LD_OFFLINE:
4c598b23 7459 case MR_EVT_CFG_CLEARED:
c9786842 7460 case MR_EVT_LD_DELETED:
c9786842 7461 case MR_EVT_LD_CREATED:
229fe47c 7462 if (!instance->requestorId ||
11c71cb4
SS		 7463 (instance->requestorId && megasas_get_ld_vf_affiliation(instance, 0)))
7464 dcmd_ret = megasas_ld_list_query(instance, MR_LD_QUERY_TYPE_EXPOSED_TO_HOST);
7465
6d40afbc 7466 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4
SS		 7467 doscan = SCAN_VD_CHANNEL;
7468
c9786842 7469 break;
11c71cb4 7470
7e8a75f4 7471 case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED:
c9786842 7472 case MR_EVT_FOREIGN_CFG_IMPORTED:
9c915a8c 7473 case MR_EVT_LD_STATE_CHANGE:
11c71cb4
SS		 7474 dcmd_ret = megasas_get_pd_list(instance);
7475
6d40afbc 7476 if (dcmd_ret != DCMD_SUCCESS)
11c71cb4
SS		 7477 break;
7478
7479 if (!instance->requestorId ||
7480 (instance->requestorId && megasas_get_ld_vf_affiliation(instance, 0)))
7481 dcmd_ret = megasas_ld_list_query(instance, MR_LD_QUERY_TYPE_EXPOSED_TO_HOST);
7482
6d40afbc 7483 if (dcmd_ret != DCMD_SUCCESS)
11c71cb4
SS		 7484 break;
7485
7486 doscan = SCAN_VD_CHANNEL | SCAN_PD_CHANNEL;
7487 dev_info(&instance->pdev->dev, "scanning for scsi%d...\n",
7488 instance->host->host_no);
7e8a75f4 7489 break;
11c71cb4 7490
c4bd2654 7491 case MR_EVT_CTRL_PROP_CHANGED:
11c71cb4
SS		 7492 dcmd_ret = megasas_get_ctrl_info(instance);
7493 break;
7e8a75f4
YB		 7494 default:
7495 doscan = 0;
7496 break;
7497 }
7498 } else {
1be18254 7499 dev_err(&instance->pdev->dev, "invalid evt_detail!\n");
11c71cb4 7500 mutex_unlock(&instance->reset_mutex);
7e8a75f4
YB		 7501 kfree(ev);
7502 return;
7503 }
7504
11c71cb4
SS		 7505 mutex_unlock(&instance->reset_mutex);
7506
7507 if (doscan & SCAN_PD_CHANNEL) {
7508 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
7509 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
7510 pd_index = i*MEGASAS_MAX_DEV_PER_CHANNEL + j;
7511 sdev1 = scsi_device_lookup(host, i, j, 0);
7512 if (instance->pd_list[pd_index].driveState ==
7513 MR_PD_STATE_SYSTEM) {
7514 if (!sdev1)
7515 scsi_add_device(host, i, j, 0);
7516 else
7517 scsi_device_put(sdev1);
7518 } else {
b4a42213
S		 7519 if (sdev1)
7520 megasas_remove_scsi_device(sdev1);
7e8a75f4
YB		 7521 }
7522 }
7523 }
11c71cb4 7524 }
c9786842 7525
11c71cb4
SS		 7526 if (doscan & SCAN_VD_CHANNEL) {
7527 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
7528 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
7529 ld_index = (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
7530 sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
7531 if (instance->ld_ids[ld_index] != 0xff) {
7532 if (!sdev1)
7533 scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
7534 else
7535 scsi_device_put(sdev1);
7536 } else {
b4a42213
S		 7537 if (sdev1)
7538 megasas_remove_scsi_device(sdev1);
c9786842
YB		 7539 }
7540 }
7541 }
7e8a75f4
YB		 7542 }
7543
6d40afbc 7544 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4
SS		 7545 seq_num = le32_to_cpu(instance->evt_detail->seq_num) + 1;
7546 else
7547 seq_num = instance->last_seq_num;
7e8a75f4
YB		 7548
7549 /* Register AEN with FW for latest sequence number plus 1 */
7550 class_locale.members.reserved = 0;
7551 class_locale.members.locale = MR_EVT_LOCALE_ALL;
7552 class_locale.members.class = MR_EVT_CLASS_DEBUG;
11c71cb4
SS		 7553
7554 if (instance->aen_cmd != NULL) {
7555 kfree(ev);
7556 return;
7557 }
7558
7559 mutex_lock(&instance->reset_mutex);
7e8a75f4
YB		 7560 error = megasas_register_aen(instance, seq_num,
7561 class_locale.word);
7e8a75f4 7562 if (error)
11c71cb4
SS		 7563 dev_err(&instance->pdev->dev,
7564 "register aen failed error %x\n", error);
7e8a75f4 7565
11c71cb4 7566 mutex_unlock(&instance->reset_mutex);
7e8a75f4
YB		 7567 kfree(ev);
7568}
7569
c4a3e0a5
BS		 7570/**
7571 * megasas_init - Driver load entry point
7572 */
7573static int __init megasas_init(void)
7574{
7575 int rval;
7576
c3e385a1
SS		 7577 /*
7578 * Booted in kdump kernel, minimize memory footprints by
7579 * disabling few features
7580 */
7581 if (reset_devices) {
7582 msix_vectors = 1;
7583 rdpq_enable = 0;
7584 dual_qdepth_disable = 1;
7585 }
7586
c4a3e0a5
BS		 7587 /*
7588 * Announce driver version and other information
7589 */
d98a6deb 7590 pr_info("megasas: %s\n", MEGASAS_VERSION);
c4a3e0a5 7591
bd8d6dd4
KD		 7592 spin_lock_init(&poll_aen_lock);
7593
72c4fd36 7594 support_poll_for_event = 2;
837f5fe8 7595 support_device_change = 1;
72c4fd36 7596
c4a3e0a5
BS		 7597 memset(&megasas_mgmt_info, 0, sizeof(megasas_mgmt_info));
7598
7599 /*
7600 * Register character device node
7601 */
7602 rval = register_chrdev(0, "megaraid_sas_ioctl", &megasas_mgmt_fops);
7603
7604 if (rval < 0) {
7605 printk(KERN_DEBUG "megasas: failed to open device node\n");
7606 return rval;
7607 }
7608
7609 megasas_mgmt_majorno = rval;
7610
7611 /*
7612 * Register ourselves as PCI hotplug module
7613 */
4041b9cd 7614 rval = pci_register_driver(&megasas_pci_driver);
c4a3e0a5
BS		 7615
7616 if (rval) {
6774def6 7617 printk(KERN_DEBUG "megasas: PCI hotplug registration failed \n");
83aabc1b
JG		 7618 goto err_pcidrv;
7619 }
7620
7621 rval = driver_create_file(&megasas_pci_driver.driver,
7622 &driver_attr_version);
7623 if (rval)
7624 goto err_dcf_attr_ver;
72c4fd36 7625
09fced19
SS		 7626 rval = driver_create_file(&megasas_pci_driver.driver,
7627 &driver_attr_release_date);
7628 if (rval)
7629 goto err_dcf_rel_date;
7630
72c4fd36
YB		 7631 rval = driver_create_file(&megasas_pci_driver.driver,
7632 &driver_attr_support_poll_for_event);
7633 if (rval)
7634 goto err_dcf_support_poll_for_event;
7635
83aabc1b
JG		 7636 rval = driver_create_file(&megasas_pci_driver.driver,
7637 &driver_attr_dbg_lvl);
7638 if (rval)
7639 goto err_dcf_dbg_lvl;
837f5fe8
YB		 7640 rval = driver_create_file(&megasas_pci_driver.driver,
7641 &driver_attr_support_device_change);
7642 if (rval)
7643 goto err_dcf_support_device_change;
7644
c4a3e0a5 7645 return rval;
ad84db2e 7646
837f5fe8 7647err_dcf_support_device_change:
ad84db2e 7648 driver_remove_file(&megasas_pci_driver.driver,
7649 &driver_attr_dbg_lvl);
83aabc1b 7650err_dcf_dbg_lvl:
72c4fd36
YB		 7651 driver_remove_file(&megasas_pci_driver.driver,
7652 &driver_attr_support_poll_for_event);
72c4fd36 7653err_dcf_support_poll_for_event:
09fced19
SS		 7654 driver_remove_file(&megasas_pci_driver.driver,
7655 &driver_attr_release_date);
7656err_dcf_rel_date:
83aabc1b
JG		 7657 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
7658err_dcf_attr_ver:
7659 pci_unregister_driver(&megasas_pci_driver);
7660err_pcidrv:
7661 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
0d49016b 7662 return rval;
c4a3e0a5
BS		 7663}
7664
7665/**
7666 * megasas_exit - Driver unload entry point
7667 */
7668static void __exit megasas_exit(void)
7669{
658dcedb
SP		 7670 driver_remove_file(&megasas_pci_driver.driver,
7671 &driver_attr_dbg_lvl);
837f5fe8
YB		 7672 driver_remove_file(&megasas_pci_driver.driver,
7673 &driver_attr_support_poll_for_event);
7674 driver_remove_file(&megasas_pci_driver.driver,
7675 &driver_attr_support_device_change);
09fced19
SS		 7676 driver_remove_file(&megasas_pci_driver.driver,
7677 &driver_attr_release_date);
83aabc1b 7678 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
c4a3e0a5
BS		 7679
7680 pci_unregister_driver(&megasas_pci_driver);
7681 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
7682}
7683
7684module_init(megasas_init);
7685module_exit(megasas_exit);
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