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megaraid_sas: Increase timeout to 60 secs for abort frames during shutdown
[thirdparty/linux.git] / drivers / scsi / megaraid / megaraid_sas_base.c
CommitLineData
c4a3e0a5 1/*
3f1530c1 2 * Linux MegaRAID driver for SAS based RAID controllers
c4a3e0a5 3 *
e399065b
SS		 4 * Copyright (c) 2003-2013 LSI Corporation
5 * Copyright (c) 2013-2014 Avago Technologies
c4a3e0a5 6 *
3f1530c1
AR		 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
c4a3e0a5 11 *
3f1530c1
AR		 12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
c4a3e0a5 16 *
3f1530c1 17 * You should have received a copy of the GNU General Public License
e399065b 18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
c4a3e0a5 19 *
e399065b 20 * Authors: Avago Technologies
3f1530c1
AR		 21 * Sreenivas Bagalkote
22 * Sumant Patro
23 * Bo Yang
e399065b
SS		 24 * Adam Radford
25 * Kashyap Desai <kashyap.desai@avagotech.com>
26 * Sumit Saxena <sumit.saxena@avagotech.com>
c4a3e0a5 27 *
e399065b 28 * Send feedback to: megaraidlinux.pdl@avagotech.com
3f1530c1 29 *
e399065b
SS		 30 * Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
31 * San Jose, California 95131
c4a3e0a5
BS		 32 */
33
34#include <linux/kernel.h>
35#include <linux/types.h>
36#include <linux/pci.h>
37#include <linux/list.h>
c4a3e0a5
BS		 38#include <linux/moduleparam.h>
39#include <linux/module.h>
40#include <linux/spinlock.h>
41#include <linux/interrupt.h>
42#include <linux/delay.h>
43#include <linux/uio.h>
5a0e3ad6 44#include <linux/slab.h>
c4a3e0a5 45#include <asm/uaccess.h>
43399236 46#include <linux/fs.h>
c4a3e0a5 47#include <linux/compat.h>
cf62a0a5 48#include <linux/blkdev.h>
0b950672 49#include <linux/mutex.h>
c3518837 50#include <linux/poll.h>
c4a3e0a5
BS		 51
52#include <scsi/scsi.h>
53#include <scsi/scsi_cmnd.h>
54#include <scsi/scsi_device.h>
55#include <scsi/scsi_host.h>
4bcde509 56#include <scsi/scsi_tcq.h>
9c915a8c 57#include "megaraid_sas_fusion.h"
c4a3e0a5
BS		 58#include "megaraid_sas.h"
59
1fd10685
YB		 60/*
61 * Number of sectors per IO command
62 * Will be set in megasas_init_mfi if user does not provide
63 */
64static unsigned int max_sectors;
65module_param_named(max_sectors, max_sectors, int, 0);
66MODULE_PARM_DESC(max_sectors,
67 "Maximum number of sectors per IO command");
68
80d9da98
AR		 69static int msix_disable;
70module_param(msix_disable, int, S_IRUGO);
71MODULE_PARM_DESC(msix_disable, "Disable MSI-X interrupt handling. Default: 0");
72
079eaddf
AR		 73static unsigned int msix_vectors;
74module_param(msix_vectors, int, S_IRUGO);
75MODULE_PARM_DESC(msix_vectors, "MSI-X max vector count. Default: Set by FW");
76
229fe47c
AR		 77static int allow_vf_ioctls;
78module_param(allow_vf_ioctls, int, S_IRUGO);
79MODULE_PARM_DESC(allow_vf_ioctls, "Allow ioctls in SR-IOV VF mode. Default: 0");
80
ae09a6c1 81static unsigned int throttlequeuedepth = MEGASAS_THROTTLE_QUEUE_DEPTH;
c5daa6a9
AR		 82module_param(throttlequeuedepth, int, S_IRUGO);
83MODULE_PARM_DESC(throttlequeuedepth,
84 "Adapter queue depth when throttled due to I/O timeout. Default: 16");
85
c007b8b2
AR		 86int resetwaittime = MEGASAS_RESET_WAIT_TIME;
87module_param(resetwaittime, int, S_IRUGO);
88MODULE_PARM_DESC(resetwaittime, "Wait time in seconds after I/O timeout "
89 "before resetting adapter. Default: 180");
90
ac95136a
SS		 91int smp_affinity_enable = 1;
92module_param(smp_affinity_enable, int, S_IRUGO);
93MODULE_PARM_DESC(smp_affinity_enable, "SMP affinity feature enable/disbale Default: enable(1)");
94
c4a3e0a5
BS		 95MODULE_LICENSE("GPL");
96MODULE_VERSION(MEGASAS_VERSION);
43cd7fe4
SS		 97MODULE_AUTHOR("megaraidlinux.pdl@avagotech.com");
98MODULE_DESCRIPTION("Avago MegaRAID SAS Driver");
c4a3e0a5 99
058a8fac 100int megasas_transition_to_ready(struct megasas_instance *instance, int ocr);
39a98554 101static int megasas_get_pd_list(struct megasas_instance *instance);
21c9e160
AR		 102static int megasas_ld_list_query(struct megasas_instance *instance,
103 u8 query_type);
39a98554 104static int megasas_issue_init_mfi(struct megasas_instance *instance);
105static int megasas_register_aen(struct megasas_instance *instance,
106 u32 seq_num, u32 class_locale_word);
c4a3e0a5
BS		 107/*
108 * PCI ID table for all supported controllers
109 */
110static struct pci_device_id megasas_pci_table[] = {
111
f3d7271c
HK		 112 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1064R)},
113 /* xscale IOP */
114 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078R)},
115 /* ppc IOP */
af7a5647 116 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078DE)},
117 /* ppc IOP */
6610a6b3
YB		 118 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078GEN2)},
119 /* gen2*/
120 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0079GEN2)},
121 /* gen2*/
87911122
YB		 122 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0073SKINNY)},
123 /* skinny*/
124 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0071SKINNY)},
125 /* skinny*/
f3d7271c
HK		 126 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VERDE_ZCR)},
127 /* xscale IOP, vega */
128 {PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)},
129 /* xscale IOP */
9c915a8c
AR		 130 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FUSION)},
131 /* Fusion */
229fe47c
AR		 132 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_PLASMA)},
133 /* Plasma */
36807e67
AR		 134 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INVADER)},
135 /* Invader */
21d3c710
SS		 136 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FURY)},
137 /* Fury */
f3d7271c 138 {}
c4a3e0a5
BS		 139};
140
141MODULE_DEVICE_TABLE(pci, megasas_pci_table);
142
143static int megasas_mgmt_majorno;
229fe47c 144struct megasas_mgmt_info megasas_mgmt_info;
c4a3e0a5 145static struct fasync_struct *megasas_async_queue;
0b950672 146static DEFINE_MUTEX(megasas_async_queue_mutex);
c4a3e0a5 147
c3518837
YB		 148static int megasas_poll_wait_aen;
149static DECLARE_WAIT_QUEUE_HEAD(megasas_poll_wait);
72c4fd36 150static u32 support_poll_for_event;
9c915a8c 151u32 megasas_dbg_lvl;
837f5fe8 152static u32 support_device_change;
658dcedb 153
c3518837
YB		 154/* define lock for aen poll */
155spinlock_t poll_aen_lock;
156
9c915a8c 157void
7343eb65 158megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
159 u8 alt_status);
ebf054b0
AR		 160static u32
161megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs);
162static int
163megasas_adp_reset_gen2(struct megasas_instance *instance,
164 struct megasas_register_set __iomem *reg_set);
cd50ba8e
AR		 165static irqreturn_t megasas_isr(int irq, void *devp);
166static u32
167megasas_init_adapter_mfi(struct megasas_instance *instance);
168u32
169megasas_build_and_issue_cmd(struct megasas_instance *instance,
170 struct scsi_cmnd *scmd);
171static void megasas_complete_cmd_dpc(unsigned long instance_addr);
9c915a8c
AR		 172void
173megasas_release_fusion(struct megasas_instance *instance);
174int
175megasas_ioc_init_fusion(struct megasas_instance *instance);
176void
177megasas_free_cmds_fusion(struct megasas_instance *instance);
178u8
179megasas_get_map_info(struct megasas_instance *instance);
180int
181megasas_sync_map_info(struct megasas_instance *instance);
182int
229fe47c
AR		 183wait_and_poll(struct megasas_instance *instance, struct megasas_cmd *cmd,
184 int seconds);
9c915a8c 185void megasas_reset_reply_desc(struct megasas_instance *instance);
229fe47c 186int megasas_reset_fusion(struct Scsi_Host *shost, int iotimeout);
9c915a8c 187void megasas_fusion_ocr_wq(struct work_struct *work);
229fe47c
AR		 188static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
189 int initial);
190int megasas_check_mpio_paths(struct megasas_instance *instance,
191 struct scsi_cmnd *scmd);
cd50ba8e
AR		 192
193void
194megasas_issue_dcmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
195{
196 instance->instancet->fire_cmd(instance,
197 cmd->frame_phys_addr, 0, instance->reg_set);
198}
7343eb65 199
c4a3e0a5
BS		 200/**
201 * megasas_get_cmd - Get a command from the free pool
202 * @instance: Adapter soft state
203 *
204 * Returns a free command from the pool
205 */
9c915a8c 206struct megasas_cmd *megasas_get_cmd(struct megasas_instance
c4a3e0a5
BS		 207 *instance)
208{
209 unsigned long flags;
210 struct megasas_cmd *cmd = NULL;
211
90dc9d98 212 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 213
214 if (!list_empty(&instance->cmd_pool)) {
215 cmd = list_entry((&instance->cmd_pool)->next,
216 struct megasas_cmd, list);
217 list_del_init(&cmd->list);
218 } else {
1be18254 219 dev_err(&instance->pdev->dev, "Command pool empty!\n");
c4a3e0a5
BS		 220 }
221
90dc9d98 222 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 223 return cmd;
224}
225
226/**
4026e9aa 227 * megasas_return_cmd - Return a cmd to free command pool
c4a3e0a5
BS		 228 * @instance: Adapter soft state
229 * @cmd: Command packet to be returned to free command pool
230 */
9c915a8c 231inline void
4026e9aa 232megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
c4a3e0a5 233{
4026e9aa
SS		 234 unsigned long flags;
235 u32 blk_tags;
236 struct megasas_cmd_fusion *cmd_fusion;
237 struct fusion_context *fusion = instance->ctrl_context;
238
239 /* This flag is used only for fusion adapter.
240 * Wait for Interrupt for Polled mode DCMD
90dc9d98 241 */
4026e9aa 242 if (cmd->flags & DRV_DCMD_POLLED_MODE)
90dc9d98 243 return;
c4a3e0a5 244
4026e9aa
SS		 245 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
246
247 if (fusion) {
248 blk_tags = instance->max_scsi_cmds + cmd->index;
249 cmd_fusion = fusion->cmd_list[blk_tags];
250 megasas_return_cmd_fusion(instance, cmd_fusion);
251 }
c4a3e0a5 252 cmd->scmd = NULL;
9c915a8c 253 cmd->frame_count = 0;
4026e9aa
SS		 254 cmd->flags = 0;
255 if (!fusion && reset_devices)
e5f93a36 256 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
90dc9d98 257 list_add(&cmd->list, (&instance->cmd_pool)->next);
90dc9d98 258
90dc9d98 259 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5 260
4026e9aa 261}
1341c939
SP		 262
263/**
0d49016b 264* The following functions are defined for xscale
1341c939
SP		 265* (deviceid : 1064R, PERC5) controllers
266*/
267
c4a3e0a5 268/**
1341c939 269 * megasas_enable_intr_xscale - Enables interrupts
c4a3e0a5
BS		 270 * @regs: MFI register set
271 */
272static inline void
d46a3ad6 273megasas_enable_intr_xscale(struct megasas_instance *instance)
c4a3e0a5 274{
d46a3ad6 275 struct megasas_register_set __iomem *regs;
da0dc9fb 276
d46a3ad6 277 regs = instance->reg_set;
39a98554 278 writel(0, &(regs)->outbound_intr_mask);
c4a3e0a5
BS		 279
280 /* Dummy readl to force pci flush */
281 readl(&regs->outbound_intr_mask);
282}
283
b274cab7
SP		 284/**
285 * megasas_disable_intr_xscale -Disables interrupt
286 * @regs: MFI register set
287 */
288static inline void
d46a3ad6 289megasas_disable_intr_xscale(struct megasas_instance *instance)
b274cab7 290{
d46a3ad6 291 struct megasas_register_set __iomem *regs;
b274cab7 292 u32 mask = 0x1f;
da0dc9fb 293
d46a3ad6 294 regs = instance->reg_set;
b274cab7
SP		 295 writel(mask, &regs->outbound_intr_mask);
296 /* Dummy readl to force pci flush */
297 readl(&regs->outbound_intr_mask);
298}
299
1341c939
SP		 300/**
301 * megasas_read_fw_status_reg_xscale - returns the current FW status value
302 * @regs: MFI register set
303 */
304static u32
305megasas_read_fw_status_reg_xscale(struct megasas_register_set __iomem * regs)
306{
307 return readl(&(regs)->outbound_msg_0);
308}
309/**
310 * megasas_clear_interrupt_xscale - Check & clear interrupt
311 * @regs: MFI register set
312 */
0d49016b 313static int
1341c939
SP		 314megasas_clear_intr_xscale(struct megasas_register_set __iomem * regs)
315{
316 u32 status;
39a98554 317 u32 mfiStatus = 0;
da0dc9fb 318
1341c939
SP		 319 /*
320 * Check if it is our interrupt
321 */
322 status = readl(&regs->outbound_intr_status);
323
39a98554 324 if (status & MFI_OB_INTR_STATUS_MASK)
325 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
326 if (status & MFI_XSCALE_OMR0_CHANGE_INTERRUPT)
327 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
1341c939
SP		 328
329 /*
330 * Clear the interrupt by writing back the same value
331 */
39a98554 332 if (mfiStatus)
333 writel(status, &regs->outbound_intr_status);
1341c939 334
06f579de
YB		 335 /* Dummy readl to force pci flush */
336 readl(&regs->outbound_intr_status);
337
39a98554 338 return mfiStatus;
1341c939
SP		 339}
340
341/**
342 * megasas_fire_cmd_xscale - Sends command to the FW
343 * @frame_phys_addr : Physical address of cmd
344 * @frame_count : Number of frames for the command
345 * @regs : MFI register set
346 */
0d49016b 347static inline void
0c79e681
YB		 348megasas_fire_cmd_xscale(struct megasas_instance *instance,
349 dma_addr_t frame_phys_addr,
350 u32 frame_count,
351 struct megasas_register_set __iomem *regs)
1341c939 352{
39a98554 353 unsigned long flags;
da0dc9fb 354
39a98554 355 spin_lock_irqsave(&instance->hba_lock, flags);
1341c939
SP		 356 writel((frame_phys_addr >> 3)|(frame_count),
357 &(regs)->inbound_queue_port);
39a98554 358 spin_unlock_irqrestore(&instance->hba_lock, flags);
359}
360
361/**
362 * megasas_adp_reset_xscale - For controller reset
363 * @regs: MFI register set
364 */
365static int
366megasas_adp_reset_xscale(struct megasas_instance *instance,
367 struct megasas_register_set __iomem *regs)
368{
369 u32 i;
370 u32 pcidata;
da0dc9fb 371
39a98554 372 writel(MFI_ADP_RESET, &regs->inbound_doorbell);
373
374 for (i = 0; i < 3; i++)
375 msleep(1000); /* sleep for 3 secs */
376 pcidata = 0;
377 pci_read_config_dword(instance->pdev, MFI_1068_PCSR_OFFSET, &pcidata);
1be18254 378 dev_notice(&instance->pdev->dev, "pcidata = %x\n", pcidata);
39a98554 379 if (pcidata & 0x2) {
1be18254 380 dev_notice(&instance->pdev->dev, "mfi 1068 offset read=%x\n", pcidata);
39a98554 381 pcidata &= ~0x2;
382 pci_write_config_dword(instance->pdev,
383 MFI_1068_PCSR_OFFSET, pcidata);
384
385 for (i = 0; i < 2; i++)
386 msleep(1000); /* need to wait 2 secs again */
387
388 pcidata = 0;
389 pci_read_config_dword(instance->pdev,
390 MFI_1068_FW_HANDSHAKE_OFFSET, &pcidata);
1be18254 391 dev_notice(&instance->pdev->dev, "1068 offset handshake read=%x\n", pcidata);
39a98554 392 if ((pcidata & 0xffff0000) == MFI_1068_FW_READY) {
1be18254 393 dev_notice(&instance->pdev->dev, "1068 offset pcidt=%x\n", pcidata);
39a98554 394 pcidata = 0;
395 pci_write_config_dword(instance->pdev,
396 MFI_1068_FW_HANDSHAKE_OFFSET, pcidata);
397 }
398 }
399 return 0;
400}
401
402/**
403 * megasas_check_reset_xscale - For controller reset check
404 * @regs: MFI register set
405 */
406static int
407megasas_check_reset_xscale(struct megasas_instance *instance,
408 struct megasas_register_set __iomem *regs)
409{
39a98554 410 if ((instance->adprecovery != MEGASAS_HBA_OPERATIONAL) &&
94cd65dd
SS		 411 (le32_to_cpu(*instance->consumer) ==
412 MEGASAS_ADPRESET_INPROG_SIGN))
39a98554 413 return 1;
39a98554 414 return 0;
1341c939
SP		 415}
416
417static struct megasas_instance_template megasas_instance_template_xscale = {
418
419 .fire_cmd = megasas_fire_cmd_xscale,
420 .enable_intr = megasas_enable_intr_xscale,
b274cab7 421 .disable_intr = megasas_disable_intr_xscale,
1341c939
SP		 422 .clear_intr = megasas_clear_intr_xscale,
423 .read_fw_status_reg = megasas_read_fw_status_reg_xscale,
39a98554 424 .adp_reset = megasas_adp_reset_xscale,
425 .check_reset = megasas_check_reset_xscale,
cd50ba8e
AR		 426 .service_isr = megasas_isr,
427 .tasklet = megasas_complete_cmd_dpc,
428 .init_adapter = megasas_init_adapter_mfi,
429 .build_and_issue_cmd = megasas_build_and_issue_cmd,
430 .issue_dcmd = megasas_issue_dcmd,
1341c939
SP		 431};
432
433/**
0d49016b 434* This is the end of set of functions & definitions specific
1341c939
SP		 435* to xscale (deviceid : 1064R, PERC5) controllers
436*/
437
f9876f0b 438/**
0d49016b 439* The following functions are defined for ppc (deviceid : 0x60)
da0dc9fb 440* controllers
f9876f0b
SP		 441*/
442
443/**
444 * megasas_enable_intr_ppc - Enables interrupts
445 * @regs: MFI register set
446 */
447static inline void
d46a3ad6 448megasas_enable_intr_ppc(struct megasas_instance *instance)
f9876f0b 449{
d46a3ad6 450 struct megasas_register_set __iomem *regs;
da0dc9fb 451
d46a3ad6 452 regs = instance->reg_set;
f9876f0b 453 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
0d49016b 454
39a98554 455 writel(~0x80000000, &(regs)->outbound_intr_mask);
f9876f0b
SP		 456
457 /* Dummy readl to force pci flush */
458 readl(&regs->outbound_intr_mask);
459}
460
b274cab7
SP		 461/**
462 * megasas_disable_intr_ppc - Disable interrupt
463 * @regs: MFI register set
464 */
465static inline void
d46a3ad6 466megasas_disable_intr_ppc(struct megasas_instance *instance)
b274cab7 467{
d46a3ad6 468 struct megasas_register_set __iomem *regs;
b274cab7 469 u32 mask = 0xFFFFFFFF;
da0dc9fb 470
d46a3ad6 471 regs = instance->reg_set;
b274cab7
SP		 472 writel(mask, &regs->outbound_intr_mask);
473 /* Dummy readl to force pci flush */
474 readl(&regs->outbound_intr_mask);
475}
476
f9876f0b
SP		 477/**
478 * megasas_read_fw_status_reg_ppc - returns the current FW status value
479 * @regs: MFI register set
480 */
481static u32
482megasas_read_fw_status_reg_ppc(struct megasas_register_set __iomem * regs)
483{
484 return readl(&(regs)->outbound_scratch_pad);
485}
486
487/**
488 * megasas_clear_interrupt_ppc - Check & clear interrupt
489 * @regs: MFI register set
490 */
0d49016b 491static int
f9876f0b
SP		 492megasas_clear_intr_ppc(struct megasas_register_set __iomem * regs)
493{
3cc6851f
AR		 494 u32 status, mfiStatus = 0;
495
f9876f0b
SP		 496 /*
497 * Check if it is our interrupt
498 */
499 status = readl(&regs->outbound_intr_status);
500
3cc6851f
AR		 501 if (status & MFI_REPLY_1078_MESSAGE_INTERRUPT)
502 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
503
504 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT)
505 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
f9876f0b
SP		 506
507 /*
508 * Clear the interrupt by writing back the same value
509 */
510 writel(status, &regs->outbound_doorbell_clear);
511
06f579de
YB		 512 /* Dummy readl to force pci flush */
513 readl(&regs->outbound_doorbell_clear);
514
3cc6851f 515 return mfiStatus;
f9876f0b 516}
3cc6851f 517
f9876f0b
SP		 518/**
519 * megasas_fire_cmd_ppc - Sends command to the FW
520 * @frame_phys_addr : Physical address of cmd
521 * @frame_count : Number of frames for the command
522 * @regs : MFI register set
523 */
0d49016b 524static inline void
0c79e681
YB		 525megasas_fire_cmd_ppc(struct megasas_instance *instance,
526 dma_addr_t frame_phys_addr,
527 u32 frame_count,
528 struct megasas_register_set __iomem *regs)
f9876f0b 529{
39a98554 530 unsigned long flags;
da0dc9fb 531
39a98554 532 spin_lock_irqsave(&instance->hba_lock, flags);
0d49016b 533 writel((frame_phys_addr | (frame_count<<1))|1,
f9876f0b 534 &(regs)->inbound_queue_port);
39a98554 535 spin_unlock_irqrestore(&instance->hba_lock, flags);
f9876f0b
SP		 536}
537
39a98554 538/**
539 * megasas_check_reset_ppc - For controller reset check
540 * @regs: MFI register set
541 */
542static int
543megasas_check_reset_ppc(struct megasas_instance *instance,
544 struct megasas_register_set __iomem *regs)
545{
3cc6851f
AR		 546 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL)
547 return 1;
548
39a98554 549 return 0;
550}
3cc6851f 551
f9876f0b 552static struct megasas_instance_template megasas_instance_template_ppc = {
0d49016b 553
f9876f0b
SP		 554 .fire_cmd = megasas_fire_cmd_ppc,
555 .enable_intr = megasas_enable_intr_ppc,
b274cab7 556 .disable_intr = megasas_disable_intr_ppc,
f9876f0b
SP		 557 .clear_intr = megasas_clear_intr_ppc,
558 .read_fw_status_reg = megasas_read_fw_status_reg_ppc,
3cc6851f 559 .adp_reset = megasas_adp_reset_xscale,
39a98554 560 .check_reset = megasas_check_reset_ppc,
cd50ba8e
AR		 561 .service_isr = megasas_isr,
562 .tasklet = megasas_complete_cmd_dpc,
563 .init_adapter = megasas_init_adapter_mfi,
564 .build_and_issue_cmd = megasas_build_and_issue_cmd,
565 .issue_dcmd = megasas_issue_dcmd,
f9876f0b
SP		 566};
567
87911122
YB		 568/**
569 * megasas_enable_intr_skinny - Enables interrupts
570 * @regs: MFI register set
571 */
572static inline void
d46a3ad6 573megasas_enable_intr_skinny(struct megasas_instance *instance)
87911122 574{
d46a3ad6 575 struct megasas_register_set __iomem *regs;
da0dc9fb 576
d46a3ad6 577 regs = instance->reg_set;
87911122
YB		 578 writel(0xFFFFFFFF, &(regs)->outbound_intr_mask);
579
580 writel(~MFI_SKINNY_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
581
582 /* Dummy readl to force pci flush */
583 readl(&regs->outbound_intr_mask);
584}
585
586/**
587 * megasas_disable_intr_skinny - Disables interrupt
588 * @regs: MFI register set
589 */
590static inline void
d46a3ad6 591megasas_disable_intr_skinny(struct megasas_instance *instance)
87911122 592{
d46a3ad6 593 struct megasas_register_set __iomem *regs;
87911122 594 u32 mask = 0xFFFFFFFF;
da0dc9fb 595
d46a3ad6 596 regs = instance->reg_set;
87911122
YB		 597 writel(mask, &regs->outbound_intr_mask);
598 /* Dummy readl to force pci flush */
599 readl(&regs->outbound_intr_mask);
600}
601
602/**
603 * megasas_read_fw_status_reg_skinny - returns the current FW status value
604 * @regs: MFI register set
605 */
606static u32
607megasas_read_fw_status_reg_skinny(struct megasas_register_set __iomem *regs)
608{
609 return readl(&(regs)->outbound_scratch_pad);
610}
611
612/**
613 * megasas_clear_interrupt_skinny - Check & clear interrupt
614 * @regs: MFI register set
615 */
616static int
617megasas_clear_intr_skinny(struct megasas_register_set __iomem *regs)
618{
619 u32 status;
ebf054b0
AR		 620 u32 mfiStatus = 0;
621
87911122
YB		 622 /*
623 * Check if it is our interrupt
624 */
625 status = readl(&regs->outbound_intr_status);
626
627 if (!(status & MFI_SKINNY_ENABLE_INTERRUPT_MASK)) {
39a98554 628 return 0;
87911122
YB		 629 }
630
ebf054b0
AR		 631 /*
632 * Check if it is our interrupt
633 */
a3fda7dd 634 if ((megasas_read_fw_status_reg_skinny(regs) & MFI_STATE_MASK) ==
ebf054b0
AR		 635 MFI_STATE_FAULT) {
636 mfiStatus = MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
637 } else
638 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
639
87911122
YB		 640 /*
641 * Clear the interrupt by writing back the same value
642 */
643 writel(status, &regs->outbound_intr_status);
644
645 /*
da0dc9fb
BH		 646 * dummy read to flush PCI
647 */
87911122
YB		 648 readl(&regs->outbound_intr_status);
649
ebf054b0 650 return mfiStatus;
87911122
YB		 651}
652
653/**
654 * megasas_fire_cmd_skinny - Sends command to the FW
655 * @frame_phys_addr : Physical address of cmd
656 * @frame_count : Number of frames for the command
657 * @regs : MFI register set
658 */
659static inline void
0c79e681
YB		 660megasas_fire_cmd_skinny(struct megasas_instance *instance,
661 dma_addr_t frame_phys_addr,
662 u32 frame_count,
87911122
YB		 663 struct megasas_register_set __iomem *regs)
664{
0c79e681 665 unsigned long flags;
da0dc9fb 666
39a98554 667 spin_lock_irqsave(&instance->hba_lock, flags);
94cd65dd
SS		 668 writel(upper_32_bits(frame_phys_addr),
669 &(regs)->inbound_high_queue_port);
670 writel((lower_32_bits(frame_phys_addr) | (frame_count<<1))|1,
671 &(regs)->inbound_low_queue_port);
39a98554 672 spin_unlock_irqrestore(&instance->hba_lock, flags);
673}
674
39a98554 675/**
676 * megasas_check_reset_skinny - For controller reset check
677 * @regs: MFI register set
678 */
679static int
680megasas_check_reset_skinny(struct megasas_instance *instance,
681 struct megasas_register_set __iomem *regs)
682{
3cc6851f
AR		 683 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL)
684 return 1;
685
39a98554 686 return 0;
87911122
YB		 687}
688
689static struct megasas_instance_template megasas_instance_template_skinny = {
690
691 .fire_cmd = megasas_fire_cmd_skinny,
692 .enable_intr = megasas_enable_intr_skinny,
693 .disable_intr = megasas_disable_intr_skinny,
694 .clear_intr = megasas_clear_intr_skinny,
695 .read_fw_status_reg = megasas_read_fw_status_reg_skinny,
ebf054b0 696 .adp_reset = megasas_adp_reset_gen2,
39a98554 697 .check_reset = megasas_check_reset_skinny,
cd50ba8e
AR		 698 .service_isr = megasas_isr,
699 .tasklet = megasas_complete_cmd_dpc,
700 .init_adapter = megasas_init_adapter_mfi,
701 .build_and_issue_cmd = megasas_build_and_issue_cmd,
702 .issue_dcmd = megasas_issue_dcmd,
87911122
YB		 703};
704
705
6610a6b3
YB		 706/**
707* The following functions are defined for gen2 (deviceid : 0x78 0x79)
708* controllers
709*/
710
711/**
712 * megasas_enable_intr_gen2 - Enables interrupts
713 * @regs: MFI register set
714 */
715static inline void
d46a3ad6 716megasas_enable_intr_gen2(struct megasas_instance *instance)
6610a6b3 717{
d46a3ad6 718 struct megasas_register_set __iomem *regs;
da0dc9fb 719
d46a3ad6 720 regs = instance->reg_set;
6610a6b3
YB		 721 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
722
723 /* write ~0x00000005 (4 & 1) to the intr mask*/
724 writel(~MFI_GEN2_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
725
726 /* Dummy readl to force pci flush */
727 readl(&regs->outbound_intr_mask);
728}
729
730/**
731 * megasas_disable_intr_gen2 - Disables interrupt
732 * @regs: MFI register set
733 */
734static inline void
d46a3ad6 735megasas_disable_intr_gen2(struct megasas_instance *instance)
6610a6b3 736{
d46a3ad6 737 struct megasas_register_set __iomem *regs;
6610a6b3 738 u32 mask = 0xFFFFFFFF;
da0dc9fb 739
d46a3ad6 740 regs = instance->reg_set;
6610a6b3
YB		 741 writel(mask, &regs->outbound_intr_mask);
742 /* Dummy readl to force pci flush */
743 readl(&regs->outbound_intr_mask);
744}
745
746/**
747 * megasas_read_fw_status_reg_gen2 - returns the current FW status value
748 * @regs: MFI register set
749 */
750static u32
751megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs)
752{
753 return readl(&(regs)->outbound_scratch_pad);
754}
755
756/**
757 * megasas_clear_interrupt_gen2 - Check & clear interrupt
758 * @regs: MFI register set
759 */
760static int
761megasas_clear_intr_gen2(struct megasas_register_set __iomem *regs)
762{
763 u32 status;
39a98554 764 u32 mfiStatus = 0;
da0dc9fb 765
6610a6b3
YB		 766 /*
767 * Check if it is our interrupt
768 */
769 status = readl(&regs->outbound_intr_status);
770
b5bccadd 771 if (status & MFI_INTR_FLAG_REPLY_MESSAGE) {
39a98554 772 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
773 }
774 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT) {
775 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
776 }
6610a6b3
YB		 777
778 /*
779 * Clear the interrupt by writing back the same value
780 */
39a98554 781 if (mfiStatus)
782 writel(status, &regs->outbound_doorbell_clear);
6610a6b3
YB		 783
784 /* Dummy readl to force pci flush */
785 readl(&regs->outbound_intr_status);
786
39a98554 787 return mfiStatus;
6610a6b3
YB		 788}
789/**
790 * megasas_fire_cmd_gen2 - Sends command to the FW
791 * @frame_phys_addr : Physical address of cmd
792 * @frame_count : Number of frames for the command
793 * @regs : MFI register set
794 */
795static inline void
0c79e681
YB		 796megasas_fire_cmd_gen2(struct megasas_instance *instance,
797 dma_addr_t frame_phys_addr,
798 u32 frame_count,
6610a6b3
YB		 799 struct megasas_register_set __iomem *regs)
800{
39a98554 801 unsigned long flags;
da0dc9fb 802
39a98554 803 spin_lock_irqsave(&instance->hba_lock, flags);
6610a6b3
YB		 804 writel((frame_phys_addr | (frame_count<<1))|1,
805 &(regs)->inbound_queue_port);
39a98554 806 spin_unlock_irqrestore(&instance->hba_lock, flags);
807}
808
809/**
810 * megasas_adp_reset_gen2 - For controller reset
811 * @regs: MFI register set
812 */
813static int
814megasas_adp_reset_gen2(struct megasas_instance *instance,
815 struct megasas_register_set __iomem *reg_set)
816{
da0dc9fb
BH		 817 u32 retry = 0 ;
818 u32 HostDiag;
819 u32 __iomem *seq_offset = &reg_set->seq_offset;
820 u32 __iomem *hostdiag_offset = &reg_set->host_diag;
ebf054b0
AR		 821
822 if (instance->instancet == &megasas_instance_template_skinny) {
823 seq_offset = &reg_set->fusion_seq_offset;
824 hostdiag_offset = &reg_set->fusion_host_diag;
825 }
826
827 writel(0, seq_offset);
828 writel(4, seq_offset);
829 writel(0xb, seq_offset);
830 writel(2, seq_offset);
831 writel(7, seq_offset);
832 writel(0xd, seq_offset);
39a98554 833
39a98554 834 msleep(1000);
835
ebf054b0 836 HostDiag = (u32)readl(hostdiag_offset);
39a98554 837
da0dc9fb 838 while (!(HostDiag & DIAG_WRITE_ENABLE)) {
39a98554 839 msleep(100);
ebf054b0 840 HostDiag = (u32)readl(hostdiag_offset);
1be18254 841 dev_notice(&instance->pdev->dev, "RESETGEN2: retry=%x, hostdiag=%x\n",
39a98554 842 retry, HostDiag);
843
844 if (retry++ >= 100)
845 return 1;
846
847 }
848
1be18254 849 dev_notice(&instance->pdev->dev, "ADP_RESET_GEN2: HostDiag=%x\n", HostDiag);
39a98554 850
ebf054b0 851 writel((HostDiag | DIAG_RESET_ADAPTER), hostdiag_offset);
39a98554 852
853 ssleep(10);
854
ebf054b0 855 HostDiag = (u32)readl(hostdiag_offset);
da0dc9fb 856 while (HostDiag & DIAG_RESET_ADAPTER) {
39a98554 857 msleep(100);
ebf054b0 858 HostDiag = (u32)readl(hostdiag_offset);
1be18254 859 dev_notice(&instance->pdev->dev, "RESET_GEN2: retry=%x, hostdiag=%x\n",
39a98554 860 retry, HostDiag);
861
862 if (retry++ >= 1000)
863 return 1;
864
865 }
866 return 0;
867}
868
869/**
870 * megasas_check_reset_gen2 - For controller reset check
871 * @regs: MFI register set
872 */
873static int
874megasas_check_reset_gen2(struct megasas_instance *instance,
875 struct megasas_register_set __iomem *regs)
876{
707e09bd
YB		 877 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
878 return 1;
879 }
880
39a98554 881 return 0;
6610a6b3
YB		 882}
883
884static struct megasas_instance_template megasas_instance_template_gen2 = {
885
886 .fire_cmd = megasas_fire_cmd_gen2,
887 .enable_intr = megasas_enable_intr_gen2,
888 .disable_intr = megasas_disable_intr_gen2,
889 .clear_intr = megasas_clear_intr_gen2,
890 .read_fw_status_reg = megasas_read_fw_status_reg_gen2,
39a98554 891 .adp_reset = megasas_adp_reset_gen2,
892 .check_reset = megasas_check_reset_gen2,
cd50ba8e
AR		 893 .service_isr = megasas_isr,
894 .tasklet = megasas_complete_cmd_dpc,
895 .init_adapter = megasas_init_adapter_mfi,
896 .build_and_issue_cmd = megasas_build_and_issue_cmd,
897 .issue_dcmd = megasas_issue_dcmd,
6610a6b3
YB		 898};
899
f9876f0b
SP		 900/**
901* This is the end of set of functions & definitions
39a98554 902* specific to gen2 (deviceid : 0x78, 0x79) controllers
f9876f0b
SP		 903*/
904
9c915a8c
AR		 905/*
906 * Template added for TB (Fusion)
907 */
908extern struct megasas_instance_template megasas_instance_template_fusion;
909
c4a3e0a5
BS		 910/**
911 * megasas_issue_polled - Issues a polling command
912 * @instance: Adapter soft state
0d49016b 913 * @cmd: Command packet to be issued
c4a3e0a5 914 *
2be2a988 915 * For polling, MFI requires the cmd_status to be set to MFI_STAT_INVALID_STATUS before posting.
c4a3e0a5 916 */
9c915a8c 917int
c4a3e0a5
BS		 918megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd)
919{
229fe47c 920 int seconds;
c4a3e0a5
BS		 921 struct megasas_header *frame_hdr = &cmd->frame->hdr;
922
94cd65dd
SS		 923 frame_hdr->cmd_status = MFI_CMD_STATUS_POLL_MODE;
924 frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE);
c4a3e0a5
BS		 925
926 /*
927 * Issue the frame using inbound queue port
928 */
9c915a8c 929 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5
BS		 930
931 /*
932 * Wait for cmd_status to change
933 */
229fe47c
AR		 934 if (instance->requestorId)
935 seconds = MEGASAS_ROUTINE_WAIT_TIME_VF;
936 else
937 seconds = MFI_POLL_TIMEOUT_SECS;
938 return wait_and_poll(instance, cmd, seconds);
c4a3e0a5
BS		 939}
940
941/**
942 * megasas_issue_blocked_cmd - Synchronous wrapper around regular FW cmds
943 * @instance: Adapter soft state
944 * @cmd: Command to be issued
cfbe7554 945 * @timeout: Timeout in seconds
c4a3e0a5
BS		 946 *
947 * This function waits on an event for the command to be returned from ISR.
2a3681e5 948 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 949 * Used to issue ioctl commands.
950 */
90dc9d98 951int
c4a3e0a5 952megasas_issue_blocked_cmd(struct megasas_instance *instance,
cfbe7554 953 struct megasas_cmd *cmd, int timeout)
c4a3e0a5 954{
cfbe7554 955 int ret = 0;
da0dc9fb 956
2be2a988 957 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 958
9c915a8c 959 instance->instancet->issue_dcmd(instance, cmd);
cfbe7554
SS		 960 if (timeout) {
961 ret = wait_event_timeout(instance->int_cmd_wait_q,
2be2a988 962 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
cfbe7554
SS		 963 if (!ret)
964 return 1;
965 } else
966 wait_event(instance->int_cmd_wait_q,
2be2a988 967 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
c4a3e0a5 968
2be2a988
SS		 969 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
970 0 : 1;
c4a3e0a5
BS		 971}
972
973/**
974 * megasas_issue_blocked_abort_cmd - Aborts previously issued cmd
975 * @instance: Adapter soft state
976 * @cmd_to_abort: Previously issued cmd to be aborted
cfbe7554 977 * @timeout: Timeout in seconds
c4a3e0a5 978 *
cfbe7554 979 * MFI firmware can abort previously issued AEN comamnd (automatic event
c4a3e0a5 980 * notification). The megasas_issue_blocked_abort_cmd() issues such abort
2a3681e5
SP		 981 * cmd and waits for return status.
982 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 983 */
984static int
985megasas_issue_blocked_abort_cmd(struct megasas_instance *instance,
cfbe7554 986 struct megasas_cmd *cmd_to_abort, int timeout)
c4a3e0a5
BS		 987{
988 struct megasas_cmd *cmd;
989 struct megasas_abort_frame *abort_fr;
cfbe7554 990 int ret = 0;
c4a3e0a5
BS		 991
992 cmd = megasas_get_cmd(instance);
993
994 if (!cmd)
995 return -1;
996
997 abort_fr = &cmd->frame->abort;
998
999 /*
1000 * Prepare and issue the abort frame
1001 */
1002 abort_fr->cmd = MFI_CMD_ABORT;
2be2a988 1003 abort_fr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 1004 abort_fr->flags = cpu_to_le16(0);
1005 abort_fr->abort_context = cpu_to_le32(cmd_to_abort->index);
1006 abort_fr->abort_mfi_phys_addr_lo =
1007 cpu_to_le32(lower_32_bits(cmd_to_abort->frame_phys_addr));
1008 abort_fr->abort_mfi_phys_addr_hi =
1009 cpu_to_le32(upper_32_bits(cmd_to_abort->frame_phys_addr));
c4a3e0a5
BS		 1010
1011 cmd->sync_cmd = 1;
2be2a988 1012 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1013
9c915a8c 1014 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5 1015
cfbe7554
SS		 1016 if (timeout) {
1017 ret = wait_event_timeout(instance->abort_cmd_wait_q,
2be2a988 1018 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
cfbe7554
SS		 1019 if (!ret) {
1020 dev_err(&instance->pdev->dev, "Command timedout"
1021 "from %s\n", __func__);
1022 return 1;
1023 }
1024 } else
1025 wait_event(instance->abort_cmd_wait_q,
2be2a988 1026 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
cfbe7554 1027
39a98554 1028 cmd->sync_cmd = 0;
c4a3e0a5
BS		 1029
1030 megasas_return_cmd(instance, cmd);
1031 return 0;
1032}
1033
1034/**
1035 * megasas_make_sgl32 - Prepares 32-bit SGL
1036 * @instance: Adapter soft state
1037 * @scp: SCSI command from the mid-layer
1038 * @mfi_sgl: SGL to be filled in
1039 *
1040 * If successful, this function returns the number of SG elements. Otherwise,
1041 * it returnes -1.
1042 */
858119e1 1043static int
c4a3e0a5
BS		 1044megasas_make_sgl32(struct megasas_instance *instance, struct scsi_cmnd *scp,
1045 union megasas_sgl *mfi_sgl)
1046{
1047 int i;
1048 int sge_count;
1049 struct scatterlist *os_sgl;
1050
155d98f0
FT		 1051 sge_count = scsi_dma_map(scp);
1052 BUG_ON(sge_count < 0);
c4a3e0a5 1053
155d98f0
FT		 1054 if (sge_count) {
1055 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1056 mfi_sgl->sge32[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1057 mfi_sgl->sge32[i].phys_addr = cpu_to_le32(sg_dma_address(os_sgl));
155d98f0 1058 }
c4a3e0a5 1059 }
c4a3e0a5
BS		 1060 return sge_count;
1061}
1062
1063/**
1064 * megasas_make_sgl64 - Prepares 64-bit SGL
1065 * @instance: Adapter soft state
1066 * @scp: SCSI command from the mid-layer
1067 * @mfi_sgl: SGL to be filled in
1068 *
1069 * If successful, this function returns the number of SG elements. Otherwise,
1070 * it returnes -1.
1071 */
858119e1 1072static int
c4a3e0a5
BS		 1073megasas_make_sgl64(struct megasas_instance *instance, struct scsi_cmnd *scp,
1074 union megasas_sgl *mfi_sgl)
1075{
1076 int i;
1077 int sge_count;
1078 struct scatterlist *os_sgl;
1079
155d98f0
FT		 1080 sge_count = scsi_dma_map(scp);
1081 BUG_ON(sge_count < 0);
c4a3e0a5 1082
155d98f0
FT		 1083 if (sge_count) {
1084 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1085 mfi_sgl->sge64[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1086 mfi_sgl->sge64[i].phys_addr = cpu_to_le64(sg_dma_address(os_sgl));
155d98f0 1087 }
c4a3e0a5 1088 }
c4a3e0a5
BS		 1089 return sge_count;
1090}
1091
f4c9a131
YB		 1092/**
1093 * megasas_make_sgl_skinny - Prepares IEEE SGL
1094 * @instance: Adapter soft state
1095 * @scp: SCSI command from the mid-layer
1096 * @mfi_sgl: SGL to be filled in
1097 *
1098 * If successful, this function returns the number of SG elements. Otherwise,
1099 * it returnes -1.
1100 */
1101static int
1102megasas_make_sgl_skinny(struct megasas_instance *instance,
1103 struct scsi_cmnd *scp, union megasas_sgl *mfi_sgl)
1104{
1105 int i;
1106 int sge_count;
1107 struct scatterlist *os_sgl;
1108
1109 sge_count = scsi_dma_map(scp);
1110
1111 if (sge_count) {
1112 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1113 mfi_sgl->sge_skinny[i].length =
1114 cpu_to_le32(sg_dma_len(os_sgl));
f4c9a131 1115 mfi_sgl->sge_skinny[i].phys_addr =
94cd65dd
SS		 1116 cpu_to_le64(sg_dma_address(os_sgl));
1117 mfi_sgl->sge_skinny[i].flag = cpu_to_le32(0);
f4c9a131
YB		 1118 }
1119 }
1120 return sge_count;
1121}
1122
b1df99d9
SP		 1123 /**
1124 * megasas_get_frame_count - Computes the number of frames
d532dbe2 1125 * @frame_type : type of frame- io or pthru frame
b1df99d9
SP		 1126 * @sge_count : number of sg elements
1127 *
1128 * Returns the number of frames required for numnber of sge's (sge_count)
1129 */
1130
f4c9a131
YB		 1131static u32 megasas_get_frame_count(struct megasas_instance *instance,
1132 u8 sge_count, u8 frame_type)
b1df99d9
SP		 1133{
1134 int num_cnt;
1135 int sge_bytes;
1136 u32 sge_sz;
da0dc9fb 1137 u32 frame_count = 0;
b1df99d9
SP		 1138
1139 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
1140 sizeof(struct megasas_sge32);
1141
f4c9a131
YB		 1142 if (instance->flag_ieee) {
1143 sge_sz = sizeof(struct megasas_sge_skinny);
1144 }
1145
b1df99d9 1146 /*
d532dbe2 1147 * Main frame can contain 2 SGEs for 64-bit SGLs and
1148 * 3 SGEs for 32-bit SGLs for ldio &
1149 * 1 SGEs for 64-bit SGLs and
1150 * 2 SGEs for 32-bit SGLs for pthru frame
1151 */
1152 if (unlikely(frame_type == PTHRU_FRAME)) {
f4c9a131
YB		 1153 if (instance->flag_ieee == 1) {
1154 num_cnt = sge_count - 1;
1155 } else if (IS_DMA64)
d532dbe2 1156 num_cnt = sge_count - 1;
1157 else
1158 num_cnt = sge_count - 2;
1159 } else {
f4c9a131
YB		 1160 if (instance->flag_ieee == 1) {
1161 num_cnt = sge_count - 1;
1162 } else if (IS_DMA64)
d532dbe2 1163 num_cnt = sge_count - 2;
1164 else
1165 num_cnt = sge_count - 3;
1166 }
b1df99d9 1167
da0dc9fb 1168 if (num_cnt > 0) {
b1df99d9
SP		 1169 sge_bytes = sge_sz * num_cnt;
1170
1171 frame_count = (sge_bytes / MEGAMFI_FRAME_SIZE) +
1172 ((sge_bytes % MEGAMFI_FRAME_SIZE) ? 1 : 0) ;
1173 }
1174 /* Main frame */
da0dc9fb 1175 frame_count += 1;
b1df99d9
SP		 1176
1177 if (frame_count > 7)
1178 frame_count = 8;
1179 return frame_count;
1180}
1181
c4a3e0a5
BS		 1182/**
1183 * megasas_build_dcdb - Prepares a direct cdb (DCDB) command
1184 * @instance: Adapter soft state
1185 * @scp: SCSI command
1186 * @cmd: Command to be prepared in
1187 *
1188 * This function prepares CDB commands. These are typcially pass-through
1189 * commands to the devices.
1190 */
858119e1 1191static int
c4a3e0a5
BS		 1192megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp,
1193 struct megasas_cmd *cmd)
1194{
c4a3e0a5
BS		 1195 u32 is_logical;
1196 u32 device_id;
1197 u16 flags = 0;
1198 struct megasas_pthru_frame *pthru;
1199
1200 is_logical = MEGASAS_IS_LOGICAL(scp);
4a5c814d 1201 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1202 pthru = (struct megasas_pthru_frame *)cmd->frame;
1203
1204 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1205 flags = MFI_FRAME_DIR_WRITE;
1206 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1207 flags = MFI_FRAME_DIR_READ;
1208 else if (scp->sc_data_direction == PCI_DMA_NONE)
1209 flags = MFI_FRAME_DIR_NONE;
1210
f4c9a131
YB		 1211 if (instance->flag_ieee == 1) {
1212 flags |= MFI_FRAME_IEEE;
1213 }
1214
c4a3e0a5
BS		 1215 /*
1216 * Prepare the DCDB frame
1217 */
1218 pthru->cmd = (is_logical) ? MFI_CMD_LD_SCSI_IO : MFI_CMD_PD_SCSI_IO;
1219 pthru->cmd_status = 0x0;
1220 pthru->scsi_status = 0x0;
1221 pthru->target_id = device_id;
1222 pthru->lun = scp->device->lun;
1223 pthru->cdb_len = scp->cmd_len;
1224 pthru->timeout = 0;
780a3762 1225 pthru->pad_0 = 0;
94cd65dd
SS		 1226 pthru->flags = cpu_to_le16(flags);
1227 pthru->data_xfer_len = cpu_to_le32(scsi_bufflen(scp));
c4a3e0a5
BS		 1228
1229 memcpy(pthru->cdb, scp->cmnd, scp->cmd_len);
1230
8d568253 1231 /*
da0dc9fb
BH		 1232 * If the command is for the tape device, set the
1233 * pthru timeout to the os layer timeout value.
1234 */
8d568253
YB		 1235 if (scp->device->type == TYPE_TAPE) {
1236 if ((scp->request->timeout / HZ) > 0xFFFF)
c6f5bf81 1237 pthru->timeout = cpu_to_le16(0xFFFF);
8d568253 1238 else
94cd65dd 1239 pthru->timeout = cpu_to_le16(scp->request->timeout / HZ);
8d568253
YB		 1240 }
1241
c4a3e0a5
BS		 1242 /*
1243 * Construct SGL
1244 */
f4c9a131 1245 if (instance->flag_ieee == 1) {
94cd65dd 1246 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1247 pthru->sge_count = megasas_make_sgl_skinny(instance, scp,
1248 &pthru->sgl);
1249 } else if (IS_DMA64) {
94cd65dd 1250 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1251 pthru->sge_count = megasas_make_sgl64(instance, scp,
1252 &pthru->sgl);
1253 } else
1254 pthru->sge_count = megasas_make_sgl32(instance, scp,
1255 &pthru->sgl);
1256
bdc6fb8d 1257 if (pthru->sge_count > instance->max_num_sge) {
1be18254 1258 dev_err(&instance->pdev->dev, "DCDB too many SGE NUM=%x\n",
bdc6fb8d
YB		 1259 pthru->sge_count);
1260 return 0;
1261 }
1262
c4a3e0a5
BS		 1263 /*
1264 * Sense info specific
1265 */
1266 pthru->sense_len = SCSI_SENSE_BUFFERSIZE;
94cd65dd
SS		 1267 pthru->sense_buf_phys_addr_hi =
1268 cpu_to_le32(upper_32_bits(cmd->sense_phys_addr));
1269 pthru->sense_buf_phys_addr_lo =
1270 cpu_to_le32(lower_32_bits(cmd->sense_phys_addr));
c4a3e0a5 1271
c4a3e0a5
BS		 1272 /*
1273 * Compute the total number of frames this command consumes. FW uses
1274 * this number to pull sufficient number of frames from host memory.
1275 */
f4c9a131 1276 cmd->frame_count = megasas_get_frame_count(instance, pthru->sge_count,
d532dbe2 1277 PTHRU_FRAME);
c4a3e0a5
BS		 1278
1279 return cmd->frame_count;
1280}
1281
1282/**
1283 * megasas_build_ldio - Prepares IOs to logical devices
1284 * @instance: Adapter soft state
1285 * @scp: SCSI command
fd589a8f 1286 * @cmd: Command to be prepared
c4a3e0a5
BS		 1287 *
1288 * Frames (and accompanying SGLs) for regular SCSI IOs use this function.
1289 */
858119e1 1290static int
c4a3e0a5
BS		 1291megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp,
1292 struct megasas_cmd *cmd)
1293{
c4a3e0a5
BS		 1294 u32 device_id;
1295 u8 sc = scp->cmnd[0];
1296 u16 flags = 0;
1297 struct megasas_io_frame *ldio;
1298
4a5c814d 1299 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1300 ldio = (struct megasas_io_frame *)cmd->frame;
1301
1302 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1303 flags = MFI_FRAME_DIR_WRITE;
1304 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1305 flags = MFI_FRAME_DIR_READ;
1306
f4c9a131
YB		 1307 if (instance->flag_ieee == 1) {
1308 flags |= MFI_FRAME_IEEE;
1309 }
1310
c4a3e0a5 1311 /*
b1df99d9 1312 * Prepare the Logical IO frame: 2nd bit is zero for all read cmds
c4a3e0a5
BS		 1313 */
1314 ldio->cmd = (sc & 0x02) ? MFI_CMD_LD_WRITE : MFI_CMD_LD_READ;
1315 ldio->cmd_status = 0x0;
1316 ldio->scsi_status = 0x0;
1317 ldio->target_id = device_id;
1318 ldio->timeout = 0;
1319 ldio->reserved_0 = 0;
1320 ldio->pad_0 = 0;
94cd65dd 1321 ldio->flags = cpu_to_le16(flags);
c4a3e0a5
BS		 1322 ldio->start_lba_hi = 0;
1323 ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0;
1324
1325 /*
1326 * 6-byte READ(0x08) or WRITE(0x0A) cdb
1327 */
1328 if (scp->cmd_len == 6) {
94cd65dd
SS		 1329 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[4]);
1330 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[1] << 16) |
1331 ((u32) scp->cmnd[2] << 8) |
1332 (u32) scp->cmnd[3]);
c4a3e0a5 1333
94cd65dd 1334 ldio->start_lba_lo &= cpu_to_le32(0x1FFFFF);
c4a3e0a5
BS		 1335 }
1336
1337 /*
1338 * 10-byte READ(0x28) or WRITE(0x2A) cdb
1339 */
1340 else if (scp->cmd_len == 10) {
94cd65dd
SS		 1341 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[8] |
1342 ((u32) scp->cmnd[7] << 8));
1343 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1344 ((u32) scp->cmnd[3] << 16) |
1345 ((u32) scp->cmnd[4] << 8) |
1346 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1347 }
1348
1349 /*
1350 * 12-byte READ(0xA8) or WRITE(0xAA) cdb
1351 */
1352 else if (scp->cmd_len == 12) {
94cd65dd
SS		 1353 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1354 ((u32) scp->cmnd[7] << 16) |
1355 ((u32) scp->cmnd[8] << 8) |
1356 (u32) scp->cmnd[9]);
c4a3e0a5 1357
94cd65dd
SS		 1358 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1359 ((u32) scp->cmnd[3] << 16) |
1360 ((u32) scp->cmnd[4] << 8) |
1361 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1362 }
1363
1364 /*
1365 * 16-byte READ(0x88) or WRITE(0x8A) cdb
1366 */
1367 else if (scp->cmd_len == 16) {
94cd65dd
SS		 1368 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[10] << 24) |
1369 ((u32) scp->cmnd[11] << 16) |
1370 ((u32) scp->cmnd[12] << 8) |
1371 (u32) scp->cmnd[13]);
c4a3e0a5 1372
94cd65dd
SS		 1373 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1374 ((u32) scp->cmnd[7] << 16) |
1375 ((u32) scp->cmnd[8] << 8) |
1376 (u32) scp->cmnd[9]);
c4a3e0a5 1377
94cd65dd
SS		 1378 ldio->start_lba_hi = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1379 ((u32) scp->cmnd[3] << 16) |
1380 ((u32) scp->cmnd[4] << 8) |
1381 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1382
1383 }
1384
1385 /*
1386 * Construct SGL
1387 */
f4c9a131 1388 if (instance->flag_ieee) {
94cd65dd 1389 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1390 ldio->sge_count = megasas_make_sgl_skinny(instance, scp,
1391 &ldio->sgl);
1392 } else if (IS_DMA64) {
94cd65dd 1393 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1394 ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl);
1395 } else
1396 ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl);
1397
bdc6fb8d 1398 if (ldio->sge_count > instance->max_num_sge) {
1be18254 1399 dev_err(&instance->pdev->dev, "build_ld_io: sge_count = %x\n",
bdc6fb8d
YB		 1400 ldio->sge_count);
1401 return 0;
1402 }
1403
c4a3e0a5
BS		 1404 /*
1405 * Sense info specific
1406 */
1407 ldio->sense_len = SCSI_SENSE_BUFFERSIZE;
1408 ldio->sense_buf_phys_addr_hi = 0;
94cd65dd 1409 ldio->sense_buf_phys_addr_lo = cpu_to_le32(cmd->sense_phys_addr);
c4a3e0a5 1410
b1df99d9
SP		 1411 /*
1412 * Compute the total number of frames this command consumes. FW uses
1413 * this number to pull sufficient number of frames from host memory.
1414 */
f4c9a131
YB		 1415 cmd->frame_count = megasas_get_frame_count(instance,
1416 ldio->sge_count, IO_FRAME);
c4a3e0a5
BS		 1417
1418 return cmd->frame_count;
1419}
1420
1421/**
7497cde8
SS		 1422 * megasas_cmd_type - Checks if the cmd is for logical drive/sysPD
1423 * and whether it's RW or non RW
cb59aa6a 1424 * @scmd: SCSI command
0d49016b 1425 *
c4a3e0a5 1426 */
7497cde8 1427inline int megasas_cmd_type(struct scsi_cmnd *cmd)
c4a3e0a5 1428{
7497cde8
SS		 1429 int ret;
1430
cb59aa6a
SP		 1431 switch (cmd->cmnd[0]) {
1432 case READ_10:
1433 case WRITE_10:
1434 case READ_12:
1435 case WRITE_12:
1436 case READ_6:
1437 case WRITE_6:
1438 case READ_16:
1439 case WRITE_16:
7497cde8
SS		 1440 ret = (MEGASAS_IS_LOGICAL(cmd)) ?
1441 READ_WRITE_LDIO : READ_WRITE_SYSPDIO;
1442 break;
cb59aa6a 1443 default:
7497cde8
SS		 1444 ret = (MEGASAS_IS_LOGICAL(cmd)) ?
1445 NON_READ_WRITE_LDIO : NON_READ_WRITE_SYSPDIO;
c4a3e0a5 1446 }
7497cde8 1447 return ret;
c4a3e0a5
BS		 1448}
1449
658dcedb
SP		 1450 /**
1451 * megasas_dump_pending_frames - Dumps the frame address of all pending cmds
da0dc9fb 1452 * in FW
658dcedb
SP		 1453 * @instance: Adapter soft state
1454 */
1455static inline void
1456megasas_dump_pending_frames(struct megasas_instance *instance)
1457{
1458 struct megasas_cmd *cmd;
1459 int i,n;
1460 union megasas_sgl *mfi_sgl;
1461 struct megasas_io_frame *ldio;
1462 struct megasas_pthru_frame *pthru;
1463 u32 sgcount;
1464 u32 max_cmd = instance->max_fw_cmds;
1465
1be18254
BH		 1466 dev_err(&instance->pdev->dev, "[%d]: Dumping Frame Phys Address of all pending cmds in FW\n",instance->host->host_no);
1467 dev_err(&instance->pdev->dev, "[%d]: Total OS Pending cmds : %d\n",instance->host->host_no,atomic_read(&instance->fw_outstanding));
658dcedb 1468 if (IS_DMA64)
1be18254 1469 dev_err(&instance->pdev->dev, "[%d]: 64 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1470 else
1be18254 1471 dev_err(&instance->pdev->dev, "[%d]: 32 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1472
1be18254 1473 dev_err(&instance->pdev->dev, "[%d]: Pending OS cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1474 for (i = 0; i < max_cmd; i++) {
1475 cmd = instance->cmd_list[i];
da0dc9fb 1476 if (!cmd->scmd)
658dcedb 1477 continue;
1be18254 1478 dev_err(&instance->pdev->dev, "[%d]: Frame addr :0x%08lx : ",instance->host->host_no,(unsigned long)cmd->frame_phys_addr);
7497cde8 1479 if (megasas_cmd_type(cmd->scmd) == READ_WRITE_LDIO) {
658dcedb
SP		 1480 ldio = (struct megasas_io_frame *)cmd->frame;
1481 mfi_sgl = &ldio->sgl;
1482 sgcount = ldio->sge_count;
1be18254 1483 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x,"
94cd65dd
SS		 1484 " lba lo : 0x%x, lba_hi : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1485 instance->host->host_no, cmd->frame_count, ldio->cmd, ldio->target_id,
1486 le32_to_cpu(ldio->start_lba_lo), le32_to_cpu(ldio->start_lba_hi),
1487 le32_to_cpu(ldio->sense_buf_phys_addr_lo), sgcount);
da0dc9fb 1488 } else {
658dcedb
SP		 1489 pthru = (struct megasas_pthru_frame *) cmd->frame;
1490 mfi_sgl = &pthru->sgl;
1491 sgcount = pthru->sge_count;
1be18254 1492 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, "
94cd65dd
SS		 1493 "lun : 0x%x, cdb_len : 0x%x, data xfer len : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1494 instance->host->host_no, cmd->frame_count, pthru->cmd, pthru->target_id,
1495 pthru->lun, pthru->cdb_len, le32_to_cpu(pthru->data_xfer_len),
1496 le32_to_cpu(pthru->sense_buf_phys_addr_lo), sgcount);
658dcedb 1497 }
da0dc9fb
BH		 1498 if (megasas_dbg_lvl & MEGASAS_DBG_LVL) {
1499 for (n = 0; n < sgcount; n++) {
1500 if (IS_DMA64)
1501 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%llx\n",
1502 le32_to_cpu(mfi_sgl->sge64[n].length),
1503 le64_to_cpu(mfi_sgl->sge64[n].phys_addr));
1504 else
1505 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%x\n",
1506 le32_to_cpu(mfi_sgl->sge32[n].length),
1507 le32_to_cpu(mfi_sgl->sge32[n].phys_addr));
658dcedb
SP		 1508 }
1509 }
658dcedb 1510 } /*for max_cmd*/
1be18254 1511 dev_err(&instance->pdev->dev, "[%d]: Pending Internal cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1512 for (i = 0; i < max_cmd; i++) {
1513
1514 cmd = instance->cmd_list[i];
1515
da0dc9fb 1516 if (cmd->sync_cmd == 1)
1be18254 1517 dev_err(&instance->pdev->dev, "0x%08lx : ", (unsigned long)cmd->frame_phys_addr);
658dcedb 1518 }
1be18254 1519 dev_err(&instance->pdev->dev, "[%d]: Dumping Done\n\n",instance->host->host_no);
658dcedb
SP		 1520}
1521
cd50ba8e
AR		 1522u32
1523megasas_build_and_issue_cmd(struct megasas_instance *instance,
1524 struct scsi_cmnd *scmd)
1525{
1526 struct megasas_cmd *cmd;
1527 u32 frame_count;
1528
1529 cmd = megasas_get_cmd(instance);
1530 if (!cmd)
1531 return SCSI_MLQUEUE_HOST_BUSY;
1532
1533 /*
1534 * Logical drive command
1535 */
7497cde8 1536 if (megasas_cmd_type(scmd) == READ_WRITE_LDIO)
cd50ba8e
AR		 1537 frame_count = megasas_build_ldio(instance, scmd, cmd);
1538 else
1539 frame_count = megasas_build_dcdb(instance, scmd, cmd);
1540
1541 if (!frame_count)
1542 goto out_return_cmd;
1543
1544 cmd->scmd = scmd;
1545 scmd->SCp.ptr = (char *)cmd;
1546
1547 /*
1548 * Issue the command to the FW
1549 */
1550 atomic_inc(&instance->fw_outstanding);
1551
1552 instance->instancet->fire_cmd(instance, cmd->frame_phys_addr,
1553 cmd->frame_count-1, instance->reg_set);
cd50ba8e
AR		 1554
1555 return 0;
1556out_return_cmd:
1557 megasas_return_cmd(instance, cmd);
1558 return 1;
1559}
1560
1561
c4a3e0a5
BS		 1562/**
1563 * megasas_queue_command - Queue entry point
1564 * @scmd: SCSI command to be queued
1565 * @done: Callback entry point
1566 */
1567static int
fb1a24ff 1568megasas_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd)
c4a3e0a5 1569{
c4a3e0a5 1570 struct megasas_instance *instance;
39a98554 1571 unsigned long flags;
c4a3e0a5
BS		 1572
1573 instance = (struct megasas_instance *)
1574 scmd->device->host->hostdata;
af37acfb 1575
aa00832b
SS		 1576 if (instance->unload == 1) {
1577 scmd->result = DID_NO_CONNECT << 16;
1578 scmd->scsi_done(scmd);
1579 return 0;
1580 }
1581
39a98554 1582 if (instance->issuepend_done == 0)
af37acfb
SP		 1583 return SCSI_MLQUEUE_HOST_BUSY;
1584
39a98554 1585 spin_lock_irqsave(&instance->hba_lock, flags);
b09e66da 1586
229fe47c
AR		 1587 /* Check for an mpio path and adjust behavior */
1588 if (instance->adprecovery == MEGASAS_ADPRESET_SM_INFAULT) {
1589 if (megasas_check_mpio_paths(instance, scmd) ==
1590 (DID_RESET << 16)) {
1591 spin_unlock_irqrestore(&instance->hba_lock, flags);
1592 return SCSI_MLQUEUE_HOST_BUSY;
1593 } else {
1594 spin_unlock_irqrestore(&instance->hba_lock, flags);
1595 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1596 scmd->scsi_done(scmd);
229fe47c
AR		 1597 return 0;
1598 }
1599 }
1600
b09e66da
SS		 1601 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
1602 spin_unlock_irqrestore(&instance->hba_lock, flags);
229fe47c 1603 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1604 scmd->scsi_done(scmd);
b09e66da
SS		 1605 return 0;
1606 }
1607
39a98554 1608 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
1609 spin_unlock_irqrestore(&instance->hba_lock, flags);
1610 return SCSI_MLQUEUE_HOST_BUSY;
1611 }
1612
1613 spin_unlock_irqrestore(&instance->hba_lock, flags);
1614
c4a3e0a5
BS		 1615 scmd->result = 0;
1616
cb59aa6a 1617 if (MEGASAS_IS_LOGICAL(scmd) &&
51087a86
SS		 1618 (scmd->device->id >= instance->fw_supported_vd_count ||
1619 scmd->device->lun)) {
cb59aa6a
SP		 1620 scmd->result = DID_BAD_TARGET << 16;
1621 goto out_done;
c4a3e0a5
BS		 1622 }
1623
02b01e01
SP		 1624 switch (scmd->cmnd[0]) {
1625 case SYNCHRONIZE_CACHE:
1626 /*
1627 * FW takes care of flush cache on its own
1628 * No need to send it down
1629 */
1630 scmd->result = DID_OK << 16;
1631 goto out_done;
1632 default:
1633 break;
1634 }
1635
cd50ba8e 1636 if (instance->instancet->build_and_issue_cmd(instance, scmd)) {
1be18254 1637 dev_err(&instance->pdev->dev, "Err returned from build_and_issue_cmd\n");
cb59aa6a 1638 return SCSI_MLQUEUE_HOST_BUSY;
cd50ba8e 1639 }
c4a3e0a5
BS		 1640
1641 return 0;
cb59aa6a 1642
cb59aa6a 1643 out_done:
fb1a24ff 1644 scmd->scsi_done(scmd);
cb59aa6a 1645 return 0;
c4a3e0a5
BS		 1646}
1647
044833b5
YB		 1648static struct megasas_instance *megasas_lookup_instance(u16 host_no)
1649{
1650 int i;
1651
1652 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
1653
1654 if ((megasas_mgmt_info.instance[i]) &&
1655 (megasas_mgmt_info.instance[i]->host->host_no == host_no))
1656 return megasas_mgmt_info.instance[i];
1657 }
1658
1659 return NULL;
1660}
1661
147aab6a
CH		 1662static int megasas_slave_configure(struct scsi_device *sdev)
1663{
e5b3a65f 1664 /*
da0dc9fb
BH		 1665 * The RAID firmware may require extended timeouts.
1666 */
044833b5
YB		 1667 blk_queue_rq_timeout(sdev->request_queue,
1668 MEGASAS_DEFAULT_CMD_TIMEOUT * HZ);
07e38d94 1669
044833b5
YB		 1670 return 0;
1671}
1672
1673static int megasas_slave_alloc(struct scsi_device *sdev)
1674{
da0dc9fb 1675 u16 pd_index = 0;
044833b5 1676 struct megasas_instance *instance ;
da0dc9fb 1677
044833b5 1678 instance = megasas_lookup_instance(sdev->host->host_no);
07e38d94 1679 if (sdev->channel < MEGASAS_MAX_PD_CHANNELS) {
044833b5
YB		 1680 /*
1681 * Open the OS scan to the SYSTEM PD
1682 */
1683 pd_index =
1684 (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1685 sdev->id;
07e38d94
SS		 1686 if (instance->pd_list[pd_index].driveState ==
1687 MR_PD_STATE_SYSTEM) {
044833b5
YB		 1688 return 0;
1689 }
1690 return -ENXIO;
1691 }
147aab6a
CH		 1692 return 0;
1693}
1694
c8dd61ef
SS		 1695/*
1696* megasas_complete_outstanding_ioctls - Complete outstanding ioctls after a
1697* kill adapter
1698* @instance: Adapter soft state
1699*
1700*/
6a6981fe 1701static void megasas_complete_outstanding_ioctls(struct megasas_instance *instance)
c8dd61ef
SS		 1702{
1703 int i;
1704 struct megasas_cmd *cmd_mfi;
1705 struct megasas_cmd_fusion *cmd_fusion;
1706 struct fusion_context *fusion = instance->ctrl_context;
1707
1708 /* Find all outstanding ioctls */
1709 if (fusion) {
1710 for (i = 0; i < instance->max_fw_cmds; i++) {
1711 cmd_fusion = fusion->cmd_list[i];
1712 if (cmd_fusion->sync_cmd_idx != (u32)ULONG_MAX) {
1713 cmd_mfi = instance->cmd_list[cmd_fusion->sync_cmd_idx];
1714 if (cmd_mfi->sync_cmd &&
1715 cmd_mfi->frame->hdr.cmd != MFI_CMD_ABORT)
1716 megasas_complete_cmd(instance,
1717 cmd_mfi, DID_OK);
1718 }
1719 }
1720 } else {
1721 for (i = 0; i < instance->max_fw_cmds; i++) {
1722 cmd_mfi = instance->cmd_list[i];
1723 if (cmd_mfi->sync_cmd && cmd_mfi->frame->hdr.cmd !=
1724 MFI_CMD_ABORT)
1725 megasas_complete_cmd(instance, cmd_mfi, DID_OK);
1726 }
1727 }
1728}
1729
1730
9c915a8c 1731void megaraid_sas_kill_hba(struct megasas_instance *instance)
39a98554 1732{
c8dd61ef
SS		 1733 /* Set critical error to block I/O & ioctls in case caller didn't */
1734 instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR;
1735 /* Wait 1 second to ensure IO or ioctls in build have posted */
1736 msleep(1000);
39a98554 1737 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
c8dd61ef
SS		 1738 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
1739 (instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
1740 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
1741 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
1742 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) {
da0dc9fb 1743 writel(MFI_STOP_ADP, &instance->reg_set->doorbell);
229fe47c
AR		 1744 /* Flush */
1745 readl(&instance->reg_set->doorbell);
1746 if (instance->mpio && instance->requestorId)
1747 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
39a98554 1748 } else {
c8dd61ef
SS		 1749 writel(MFI_STOP_ADP,
1750 &instance->reg_set->inbound_doorbell);
9c915a8c 1751 }
c8dd61ef
SS		 1752 /* Complete outstanding ioctls when adapter is killed */
1753 megasas_complete_outstanding_ioctls(instance);
9c915a8c
AR		 1754}
1755
1756 /**
1757 * megasas_check_and_restore_queue_depth - Check if queue depth needs to be
1758 * restored to max value
1759 * @instance: Adapter soft state
1760 *
1761 */
1762void
1763megasas_check_and_restore_queue_depth(struct megasas_instance *instance)
1764{
1765 unsigned long flags;
ae09a6c1 1766
9c915a8c 1767 if (instance->flag & MEGASAS_FW_BUSY
c5daa6a9
AR		 1768 && time_after(jiffies, instance->last_time + 5 * HZ)
1769 && atomic_read(&instance->fw_outstanding) <
1770 instance->throttlequeuedepth + 1) {
9c915a8c
AR		 1771
1772 spin_lock_irqsave(instance->host->host_lock, flags);
1773 instance->flag &= ~MEGASAS_FW_BUSY;
9c915a8c 1774
ae09a6c1 1775 instance->host->can_queue = instance->max_scsi_cmds;
9c915a8c 1776 spin_unlock_irqrestore(instance->host->host_lock, flags);
39a98554 1777 }
1778}
1779
7343eb65 1780/**
1781 * megasas_complete_cmd_dpc - Returns FW's controller structure
1782 * @instance_addr: Address of adapter soft state
1783 *
1784 * Tasklet to complete cmds
1785 */
1786static void megasas_complete_cmd_dpc(unsigned long instance_addr)
1787{
1788 u32 producer;
1789 u32 consumer;
1790 u32 context;
1791 struct megasas_cmd *cmd;
1792 struct megasas_instance *instance =
1793 (struct megasas_instance *)instance_addr;
1794 unsigned long flags;
1795
1796 /* If we have already declared adapter dead, donot complete cmds */
da0dc9fb 1797 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR)
7343eb65 1798 return;
1799
1800 spin_lock_irqsave(&instance->completion_lock, flags);
1801
94cd65dd
SS		 1802 producer = le32_to_cpu(*instance->producer);
1803 consumer = le32_to_cpu(*instance->consumer);
7343eb65 1804
1805 while (consumer != producer) {
94cd65dd 1806 context = le32_to_cpu(instance->reply_queue[consumer]);
39a98554 1807 if (context >= instance->max_fw_cmds) {
1be18254 1808 dev_err(&instance->pdev->dev, "Unexpected context value %x\n",
39a98554 1809 context);
1810 BUG();
1811 }
7343eb65 1812
1813 cmd = instance->cmd_list[context];
1814
1815 megasas_complete_cmd(instance, cmd, DID_OK);
1816
1817 consumer++;
1818 if (consumer == (instance->max_fw_cmds + 1)) {
1819 consumer = 0;
1820 }
1821 }
1822
94cd65dd 1823 *instance->consumer = cpu_to_le32(producer);
7343eb65 1824
1825 spin_unlock_irqrestore(&instance->completion_lock, flags);
1826
1827 /*
1828 * Check if we can restore can_queue
1829 */
9c915a8c 1830 megasas_check_and_restore_queue_depth(instance);
7343eb65 1831}
1832
229fe47c
AR		 1833/**
1834 * megasas_start_timer - Initializes a timer object
1835 * @instance: Adapter soft state
1836 * @timer: timer object to be initialized
1837 * @fn: timer function
1838 * @interval: time interval between timer function call
1839 *
1840 */
1841void megasas_start_timer(struct megasas_instance *instance,
1842 struct timer_list *timer,
1843 void *fn, unsigned long interval)
1844{
1845 init_timer(timer);
1846 timer->expires = jiffies + interval;
1847 timer->data = (unsigned long)instance;
1848 timer->function = fn;
1849 add_timer(timer);
1850}
1851
707e09bd
YB		 1852static void
1853megasas_internal_reset_defer_cmds(struct megasas_instance *instance);
1854
1855static void
1856process_fw_state_change_wq(struct work_struct *work);
1857
1858void megasas_do_ocr(struct megasas_instance *instance)
1859{
1860 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
1861 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
1862 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
94cd65dd 1863 *instance->consumer = cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
707e09bd 1864 }
d46a3ad6 1865 instance->instancet->disable_intr(instance);
707e09bd
YB		 1866 instance->adprecovery = MEGASAS_ADPRESET_SM_INFAULT;
1867 instance->issuepend_done = 0;
1868
1869 atomic_set(&instance->fw_outstanding, 0);
1870 megasas_internal_reset_defer_cmds(instance);
1871 process_fw_state_change_wq(&instance->work_init);
1872}
1873
4cbfea88
AR		 1874static int megasas_get_ld_vf_affiliation_111(struct megasas_instance *instance,
1875 int initial)
229fe47c
AR		 1876{
1877 struct megasas_cmd *cmd;
1878 struct megasas_dcmd_frame *dcmd;
229fe47c 1879 struct MR_LD_VF_AFFILIATION_111 *new_affiliation_111 = NULL;
229fe47c
AR		 1880 dma_addr_t new_affiliation_111_h;
1881 int ld, retval = 0;
1882 u8 thisVf;
1883
1884 cmd = megasas_get_cmd(instance);
1885
1886 if (!cmd) {
1be18254
BH		 1887 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation_111:"
1888 "Failed to get cmd for scsi%d\n",
229fe47c
AR		 1889 instance->host->host_no);
1890 return -ENOMEM;
1891 }
1892
1893 dcmd = &cmd->frame->dcmd;
1894
4cbfea88 1895 if (!instance->vf_affiliation_111) {
1be18254
BH		 1896 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
1897 "affiliation for scsi%d\n", instance->host->host_no);
229fe47c
AR		 1898 megasas_return_cmd(instance, cmd);
1899 return -ENOMEM;
1900 }
1901
1902 if (initial)
229fe47c
AR		 1903 memset(instance->vf_affiliation_111, 0,
1904 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 1905 else {
4cbfea88
AR		 1906 new_affiliation_111 =
1907 pci_alloc_consistent(instance->pdev,
1908 sizeof(struct MR_LD_VF_AFFILIATION_111),
1909 &new_affiliation_111_h);
1910 if (!new_affiliation_111) {
1be18254
BH		 1911 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
1912 "memory for new affiliation for scsi%d\n",
4cbfea88 1913 instance->host->host_no);
229fe47c
AR		 1914 megasas_return_cmd(instance, cmd);
1915 return -ENOMEM;
1916 }
4cbfea88
AR		 1917 memset(new_affiliation_111, 0,
1918 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c
AR		 1919 }
1920
1921 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
1922
1923 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 1924 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 1925 dcmd->sge_count = 1;
2213a467 1926 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c
AR		 1927 dcmd->timeout = 0;
1928 dcmd->pad_0 = 0;
2213a467
CH		 1929 dcmd->data_xfer_len =
1930 cpu_to_le32(sizeof(struct MR_LD_VF_AFFILIATION_111));
1931 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS_111);
229fe47c 1932
4cbfea88
AR		 1933 if (initial)
1934 dcmd->sgl.sge32[0].phys_addr =
2213a467 1935 cpu_to_le32(instance->vf_affiliation_111_h);
229fe47c 1936 else
2213a467
CH		 1937 dcmd->sgl.sge32[0].phys_addr =
1938 cpu_to_le32(new_affiliation_111_h);
4cbfea88 1939
2213a467
CH		 1940 dcmd->sgl.sge32[0].length = cpu_to_le32(
1941 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 1942
1be18254 1943 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
229fe47c
AR		 1944 "scsi%d\n", instance->host->host_no);
1945
1946 megasas_issue_blocked_cmd(instance, cmd, 0);
1947
1948 if (dcmd->cmd_status) {
1be18254
BH		 1949 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
1950 " failed with status 0x%x for scsi%d\n",
229fe47c
AR		 1951 dcmd->cmd_status, instance->host->host_no);
1952 retval = 1; /* Do a scan if we couldn't get affiliation */
1953 goto out;
1954 }
1955
1956 if (!initial) {
4cbfea88
AR		 1957 thisVf = new_affiliation_111->thisVf;
1958 for (ld = 0 ; ld < new_affiliation_111->vdCount; ld++)
1959 if (instance->vf_affiliation_111->map[ld].policy[thisVf] !=
1960 new_affiliation_111->map[ld].policy[thisVf]) {
1be18254
BH		 1961 dev_warn(&instance->pdev->dev, "SR-IOV: "
1962 "Got new LD/VF affiliation for scsi%d\n",
229fe47c 1963 instance->host->host_no);
4cbfea88
AR		 1964 memcpy(instance->vf_affiliation_111,
1965 new_affiliation_111,
1966 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c
AR		 1967 retval = 1;
1968 goto out;
1969 }
4cbfea88
AR		 1970 }
1971out:
1972 if (new_affiliation_111) {
1973 pci_free_consistent(instance->pdev,
1974 sizeof(struct MR_LD_VF_AFFILIATION_111),
1975 new_affiliation_111,
1976 new_affiliation_111_h);
1977 }
90dc9d98 1978
4026e9aa 1979 megasas_return_cmd(instance, cmd);
4cbfea88
AR		 1980
1981 return retval;
1982}
1983
1984static int megasas_get_ld_vf_affiliation_12(struct megasas_instance *instance,
1985 int initial)
1986{
1987 struct megasas_cmd *cmd;
1988 struct megasas_dcmd_frame *dcmd;
1989 struct MR_LD_VF_AFFILIATION *new_affiliation = NULL;
1990 struct MR_LD_VF_MAP *newmap = NULL, *savedmap = NULL;
1991 dma_addr_t new_affiliation_h;
1992 int i, j, retval = 0, found = 0, doscan = 0;
1993 u8 thisVf;
1994
1995 cmd = megasas_get_cmd(instance);
1996
1997 if (!cmd) {
1be18254
BH		 1998 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation12: "
1999 "Failed to get cmd for scsi%d\n",
4cbfea88
AR		 2000 instance->host->host_no);
2001 return -ENOMEM;
2002 }
2003
2004 dcmd = &cmd->frame->dcmd;
2005
2006 if (!instance->vf_affiliation) {
1be18254
BH		 2007 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2008 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2009 megasas_return_cmd(instance, cmd);
2010 return -ENOMEM;
2011 }
2012
2013 if (initial)
2014 memset(instance->vf_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2015 sizeof(struct MR_LD_VF_AFFILIATION));
2016 else {
2017 new_affiliation =
2018 pci_alloc_consistent(instance->pdev,
2019 (MAX_LOGICAL_DRIVES + 1) *
2020 sizeof(struct MR_LD_VF_AFFILIATION),
2021 &new_affiliation_h);
2022 if (!new_affiliation) {
1be18254
BH		 2023 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2024 "memory for new affiliation for scsi%d\n",
4cbfea88
AR		 2025 instance->host->host_no);
2026 megasas_return_cmd(instance, cmd);
2027 return -ENOMEM;
2028 }
2029 memset(new_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2030 sizeof(struct MR_LD_VF_AFFILIATION));
2031 }
2032
2033 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2034
2035 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2036 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
4cbfea88 2037 dcmd->sge_count = 1;
2213a467 2038 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
4cbfea88
AR		 2039 dcmd->timeout = 0;
2040 dcmd->pad_0 = 0;
2213a467
CH		 2041 dcmd->data_xfer_len = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2042 sizeof(struct MR_LD_VF_AFFILIATION));
2043 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS);
4cbfea88
AR		 2044
2045 if (initial)
2213a467
CH		 2046 dcmd->sgl.sge32[0].phys_addr =
2047 cpu_to_le32(instance->vf_affiliation_h);
4cbfea88 2048 else
2213a467
CH		 2049 dcmd->sgl.sge32[0].phys_addr =
2050 cpu_to_le32(new_affiliation_h);
4cbfea88 2051
2213a467
CH		 2052 dcmd->sgl.sge32[0].length = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2053 sizeof(struct MR_LD_VF_AFFILIATION));
4cbfea88 2054
1be18254 2055 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
4cbfea88
AR		 2056 "scsi%d\n", instance->host->host_no);
2057
2058 megasas_issue_blocked_cmd(instance, cmd, 0);
2059
2060 if (dcmd->cmd_status) {
1be18254
BH		 2061 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2062 " failed with status 0x%x for scsi%d\n",
4cbfea88
AR		 2063 dcmd->cmd_status, instance->host->host_no);
2064 retval = 1; /* Do a scan if we couldn't get affiliation */
2065 goto out;
2066 }
2067
2068 if (!initial) {
2069 if (!new_affiliation->ldCount) {
1be18254
BH		 2070 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2071 "affiliation for passive path for scsi%d\n",
4cbfea88
AR		 2072 instance->host->host_no);
2073 retval = 1;
2074 goto out;
2075 }
2076 newmap = new_affiliation->map;
2077 savedmap = instance->vf_affiliation->map;
2078 thisVf = new_affiliation->thisVf;
2079 for (i = 0 ; i < new_affiliation->ldCount; i++) {
2080 found = 0;
2081 for (j = 0; j < instance->vf_affiliation->ldCount;
2082 j++) {
2083 if (newmap->ref.targetId ==
2084 savedmap->ref.targetId) {
2085 found = 1;
2086 if (newmap->policy[thisVf] !=
2087 savedmap->policy[thisVf]) {
2088 doscan = 1;
2089 goto out;
2090 }
229fe47c
AR		 2091 }
2092 savedmap = (struct MR_LD_VF_MAP *)
2093 ((unsigned char *)savedmap +
2094 savedmap->size);
4cbfea88
AR		 2095 }
2096 if (!found && newmap->policy[thisVf] !=
2097 MR_LD_ACCESS_HIDDEN) {
2098 doscan = 1;
2099 goto out;
2100 }
2101 newmap = (struct MR_LD_VF_MAP *)
2102 ((unsigned char *)newmap + newmap->size);
2103 }
2104
2105 newmap = new_affiliation->map;
2106 savedmap = instance->vf_affiliation->map;
2107
2108 for (i = 0 ; i < instance->vf_affiliation->ldCount; i++) {
2109 found = 0;
2110 for (j = 0 ; j < new_affiliation->ldCount; j++) {
2111 if (savedmap->ref.targetId ==
2112 newmap->ref.targetId) {
2113 found = 1;
2114 if (savedmap->policy[thisVf] !=
2115 newmap->policy[thisVf]) {
2116 doscan = 1;
2117 goto out;
2118 }
2119 }
229fe47c
AR		 2120 newmap = (struct MR_LD_VF_MAP *)
2121 ((unsigned char *)newmap +
2122 newmap->size);
2123 }
4cbfea88
AR		 2124 if (!found && savedmap->policy[thisVf] !=
2125 MR_LD_ACCESS_HIDDEN) {
2126 doscan = 1;
2127 goto out;
2128 }
2129 savedmap = (struct MR_LD_VF_MAP *)
2130 ((unsigned char *)savedmap +
2131 savedmap->size);
229fe47c
AR		 2132 }
2133 }
2134out:
4cbfea88 2135 if (doscan) {
1be18254
BH		 2136 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2137 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2138 memcpy(instance->vf_affiliation, new_affiliation,
2139 new_affiliation->size);
2140 retval = 1;
229fe47c 2141 }
4cbfea88
AR		 2142
2143 if (new_affiliation)
2144 pci_free_consistent(instance->pdev,
2145 (MAX_LOGICAL_DRIVES + 1) *
2146 sizeof(struct MR_LD_VF_AFFILIATION),
2147 new_affiliation, new_affiliation_h);
4026e9aa 2148 megasas_return_cmd(instance, cmd);
229fe47c
AR		 2149
2150 return retval;
2151}
2152
4cbfea88
AR		 2153/* This function will get the current SR-IOV LD/VF affiliation */
2154static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
2155 int initial)
2156{
2157 int retval;
2158
2159 if (instance->PlasmaFW111)
2160 retval = megasas_get_ld_vf_affiliation_111(instance, initial);
2161 else
2162 retval = megasas_get_ld_vf_affiliation_12(instance, initial);
2163 return retval;
2164}
2165
229fe47c
AR		 2166/* This function will tell FW to start the SR-IOV heartbeat */
2167int megasas_sriov_start_heartbeat(struct megasas_instance *instance,
2168 int initial)
2169{
2170 struct megasas_cmd *cmd;
2171 struct megasas_dcmd_frame *dcmd;
2172 int retval = 0;
2173
2174 cmd = megasas_get_cmd(instance);
2175
2176 if (!cmd) {
1be18254
BH		 2177 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_sriov_start_heartbeat: "
2178 "Failed to get cmd for scsi%d\n",
229fe47c
AR		 2179 instance->host->host_no);
2180 return -ENOMEM;
2181 }
2182
2183 dcmd = &cmd->frame->dcmd;
2184
2185 if (initial) {
2186 instance->hb_host_mem =
7c845eb5
JP		 2187 pci_zalloc_consistent(instance->pdev,
2188 sizeof(struct MR_CTRL_HB_HOST_MEM),
2189 &instance->hb_host_mem_h);
229fe47c 2190 if (!instance->hb_host_mem) {
1be18254
BH		 2191 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate"
2192 " memory for heartbeat host memory for scsi%d\n",
2193 instance->host->host_no);
229fe47c
AR		 2194 retval = -ENOMEM;
2195 goto out;
2196 }
229fe47c
AR		 2197 }
2198
2199 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2200
2213a467 2201 dcmd->mbox.s[0] = cpu_to_le16(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2202 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2203 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2204 dcmd->sge_count = 1;
2213a467 2205 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c
AR		 2206 dcmd->timeout = 0;
2207 dcmd->pad_0 = 0;
2213a467
CH		 2208 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
2209 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SHARED_HOST_MEM_ALLOC);
2210 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->hb_host_mem_h);
2211 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2212
1be18254 2213 dev_warn(&instance->pdev->dev, "SR-IOV: Starting heartbeat for scsi%d\n",
229fe47c
AR		 2214 instance->host->host_no);
2215
4026e9aa
SS		 2216 if (instance->ctrl_context && !instance->mask_interrupts)
2217 retval = megasas_issue_blocked_cmd(instance, cmd,
2218 MEGASAS_ROUTINE_WAIT_TIME_VF);
2219 else
2220 retval = megasas_issue_polled(instance, cmd);
229fe47c 2221
4026e9aa 2222 if (retval) {
2be2a988
SS		 2223 dev_warn(&instance->pdev->dev, "SR-IOV: MR_DCMD_CTRL_SHARED_HOST"
2224 "_MEM_ALLOC DCMD %s for scsi%d\n",
2225 (dcmd->cmd_status == MFI_STAT_INVALID_STATUS) ?
2226 "timed out" : "failed", instance->host->host_no);
229fe47c 2227 retval = 1;
229fe47c
AR		 2228 }
2229
2230out:
2231 megasas_return_cmd(instance, cmd);
2232
2233 return retval;
2234}
2235
2236/* Handler for SR-IOV heartbeat */
2237void megasas_sriov_heartbeat_handler(unsigned long instance_addr)
2238{
2239 struct megasas_instance *instance =
2240 (struct megasas_instance *)instance_addr;
2241
2242 if (instance->hb_host_mem->HB.fwCounter !=
2243 instance->hb_host_mem->HB.driverCounter) {
2244 instance->hb_host_mem->HB.driverCounter =
2245 instance->hb_host_mem->HB.fwCounter;
2246 mod_timer(&instance->sriov_heartbeat_timer,
2247 jiffies + MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
2248 } else {
1be18254 2249 dev_warn(&instance->pdev->dev, "SR-IOV: Heartbeat never "
229fe47c
AR		 2250 "completed for scsi%d\n", instance->host->host_no);
2251 schedule_work(&instance->work_init);
2252 }
2253}
2254
c4a3e0a5
BS		 2255/**
2256 * megasas_wait_for_outstanding - Wait for all outstanding cmds
2257 * @instance: Adapter soft state
2258 *
25985edc 2259 * This function waits for up to MEGASAS_RESET_WAIT_TIME seconds for FW to
c4a3e0a5
BS		 2260 * complete all its outstanding commands. Returns error if one or more IOs
2261 * are pending after this time period. It also marks the controller dead.
2262 */
2263static int megasas_wait_for_outstanding(struct megasas_instance *instance)
2264{
2265 int i;
39a98554 2266 u32 reset_index;
c4a3e0a5 2267 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
39a98554 2268 u8 adprecovery;
2269 unsigned long flags;
2270 struct list_head clist_local;
2271 struct megasas_cmd *reset_cmd;
707e09bd
YB		 2272 u32 fw_state;
2273 u8 kill_adapter_flag;
39a98554 2274
2275 spin_lock_irqsave(&instance->hba_lock, flags);
2276 adprecovery = instance->adprecovery;
2277 spin_unlock_irqrestore(&instance->hba_lock, flags);
2278
2279 if (adprecovery != MEGASAS_HBA_OPERATIONAL) {
2280
2281 INIT_LIST_HEAD(&clist_local);
2282 spin_lock_irqsave(&instance->hba_lock, flags);
2283 list_splice_init(&instance->internal_reset_pending_q,
2284 &clist_local);
2285 spin_unlock_irqrestore(&instance->hba_lock, flags);
2286
1be18254 2287 dev_notice(&instance->pdev->dev, "HBA reset wait ...\n");
39a98554 2288 for (i = 0; i < wait_time; i++) {
2289 msleep(1000);
2290 spin_lock_irqsave(&instance->hba_lock, flags);
2291 adprecovery = instance->adprecovery;
2292 spin_unlock_irqrestore(&instance->hba_lock, flags);
2293 if (adprecovery == MEGASAS_HBA_OPERATIONAL)
2294 break;
2295 }
2296
2297 if (adprecovery != MEGASAS_HBA_OPERATIONAL) {
1be18254 2298 dev_notice(&instance->pdev->dev, "reset: Stopping HBA.\n");
39a98554 2299 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 2300 instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR;
39a98554 2301 spin_unlock_irqrestore(&instance->hba_lock, flags);
2302 return FAILED;
2303 }
2304
da0dc9fb 2305 reset_index = 0;
39a98554 2306 while (!list_empty(&clist_local)) {
da0dc9fb 2307 reset_cmd = list_entry((&clist_local)->next,
39a98554 2308 struct megasas_cmd, list);
2309 list_del_init(&reset_cmd->list);
2310 if (reset_cmd->scmd) {
2311 reset_cmd->scmd->result = DID_RESET << 16;
1be18254 2312 dev_notice(&instance->pdev->dev, "%d:%p reset [%02x]\n",
39a98554 2313 reset_index, reset_cmd,
5cd049a5 2314 reset_cmd->scmd->cmnd[0]);
39a98554 2315
2316 reset_cmd->scmd->scsi_done(reset_cmd->scmd);
2317 megasas_return_cmd(instance, reset_cmd);
2318 } else if (reset_cmd->sync_cmd) {
1be18254 2319 dev_notice(&instance->pdev->dev, "%p synch cmds"
39a98554 2320 "reset queue\n",
2321 reset_cmd);
2322
2be2a988 2323 reset_cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 2324 instance->instancet->fire_cmd(instance,
2325 reset_cmd->frame_phys_addr,
2326 0, instance->reg_set);
2327 } else {
1be18254 2328 dev_notice(&instance->pdev->dev, "%p unexpected"
39a98554 2329 "cmds lst\n",
2330 reset_cmd);
2331 }
2332 reset_index++;
2333 }
2334
2335 return SUCCESS;
2336 }
c4a3e0a5 2337
c007b8b2 2338 for (i = 0; i < resetwaittime; i++) {
e4a082c7
SP		 2339 int outstanding = atomic_read(&instance->fw_outstanding);
2340
2341 if (!outstanding)
c4a3e0a5
BS		 2342 break;
2343
2344 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 2345 dev_notice(&instance->pdev->dev, "[%2d]waiting for %d "
e4a082c7 2346 "commands to complete\n",i,outstanding);
7343eb65 2347 /*
2348 * Call cmd completion routine. Cmd to be
2349 * be completed directly without depending on isr.
2350 */
2351 megasas_complete_cmd_dpc((unsigned long)instance);
c4a3e0a5
BS		 2352 }
2353
2354 msleep(1000);
2355 }
2356
707e09bd
YB		 2357 i = 0;
2358 kill_adapter_flag = 0;
2359 do {
2360 fw_state = instance->instancet->read_fw_status_reg(
2361 instance->reg_set) & MFI_STATE_MASK;
2362 if ((fw_state == MFI_STATE_FAULT) &&
2363 (instance->disableOnlineCtrlReset == 0)) {
2364 if (i == 3) {
2365 kill_adapter_flag = 2;
2366 break;
2367 }
2368 megasas_do_ocr(instance);
2369 kill_adapter_flag = 1;
2370
2371 /* wait for 1 secs to let FW finish the pending cmds */
2372 msleep(1000);
2373 }
2374 i++;
2375 } while (i <= 3);
2376
da0dc9fb 2377 if (atomic_read(&instance->fw_outstanding) && !kill_adapter_flag) {
707e09bd 2378 if (instance->disableOnlineCtrlReset == 0) {
707e09bd
YB		 2379 megasas_do_ocr(instance);
2380
2381 /* wait for 5 secs to let FW finish the pending cmds */
2382 for (i = 0; i < wait_time; i++) {
2383 int outstanding =
2384 atomic_read(&instance->fw_outstanding);
2385 if (!outstanding)
2386 return SUCCESS;
2387 msleep(1000);
2388 }
2389 }
2390 }
2391
2392 if (atomic_read(&instance->fw_outstanding) ||
2393 (kill_adapter_flag == 2)) {
1be18254 2394 dev_notice(&instance->pdev->dev, "pending cmds after reset\n");
e3bbff9f 2395 /*
da0dc9fb
BH		 2396 * Send signal to FW to stop processing any pending cmds.
2397 * The controller will be taken offline by the OS now.
2398 */
0c79e681
YB		 2399 if ((instance->pdev->device ==
2400 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
2401 (instance->pdev->device ==
2402 PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
2403 writel(MFI_STOP_ADP,
9c915a8c 2404 &instance->reg_set->doorbell);
0c79e681
YB		 2405 } else {
2406 writel(MFI_STOP_ADP,
e3bbff9f 2407 &instance->reg_set->inbound_doorbell);
0c79e681 2408 }
658dcedb 2409 megasas_dump_pending_frames(instance);
39a98554 2410 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 2411 instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR;
39a98554 2412 spin_unlock_irqrestore(&instance->hba_lock, flags);
c4a3e0a5
BS		 2413 return FAILED;
2414 }
2415
1be18254 2416 dev_notice(&instance->pdev->dev, "no pending cmds after reset\n");
39a98554 2417
c4a3e0a5
BS		 2418 return SUCCESS;
2419}
2420
2421/**
2422 * megasas_generic_reset - Generic reset routine
2423 * @scmd: Mid-layer SCSI command
2424 *
2425 * This routine implements a generic reset handler for device, bus and host
2426 * reset requests. Device, bus and host specific reset handlers can use this
2427 * function after they do their specific tasks.
2428 */
2429static int megasas_generic_reset(struct scsi_cmnd *scmd)
2430{
2431 int ret_val;
2432 struct megasas_instance *instance;
2433
2434 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2435
5cd049a5
CH		 2436 scmd_printk(KERN_NOTICE, scmd, "megasas: RESET cmd=%x retries=%x\n",
2437 scmd->cmnd[0], scmd->retries);
c4a3e0a5 2438
39a98554 2439 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 2440 dev_err(&instance->pdev->dev, "cannot recover from previous reset failures\n");
c4a3e0a5
BS		 2441 return FAILED;
2442 }
2443
c4a3e0a5 2444 ret_val = megasas_wait_for_outstanding(instance);
c4a3e0a5 2445 if (ret_val == SUCCESS)
1be18254 2446 dev_notice(&instance->pdev->dev, "reset successful\n");
c4a3e0a5 2447 else
1be18254 2448 dev_err(&instance->pdev->dev, "failed to do reset\n");
c4a3e0a5 2449
c4a3e0a5
BS		 2450 return ret_val;
2451}
2452
05e9ebbe
SP		 2453/**
2454 * megasas_reset_timer - quiesce the adapter if required
2455 * @scmd: scsi cmnd
2456 *
2457 * Sets the FW busy flag and reduces the host->can_queue if the
2458 * cmd has not been completed within the timeout period.
2459 */
2460static enum
242f9dcb 2461blk_eh_timer_return megasas_reset_timer(struct scsi_cmnd *scmd)
05e9ebbe 2462{
05e9ebbe
SP		 2463 struct megasas_instance *instance;
2464 unsigned long flags;
2465
2466 if (time_after(jiffies, scmd->jiffies_at_alloc +
2467 (MEGASAS_DEFAULT_CMD_TIMEOUT * 2) * HZ)) {
242f9dcb 2468 return BLK_EH_NOT_HANDLED;
05e9ebbe
SP		 2469 }
2470
f575c5d3 2471 instance = (struct megasas_instance *)scmd->device->host->hostdata;
05e9ebbe
SP		 2472 if (!(instance->flag & MEGASAS_FW_BUSY)) {
2473 /* FW is busy, throttle IO */
2474 spin_lock_irqsave(instance->host->host_lock, flags);
2475
c5daa6a9 2476 instance->host->can_queue = instance->throttlequeuedepth;
05e9ebbe
SP		 2477 instance->last_time = jiffies;
2478 instance->flag |= MEGASAS_FW_BUSY;
2479
2480 spin_unlock_irqrestore(instance->host->host_lock, flags);
2481 }
242f9dcb 2482 return BLK_EH_RESET_TIMER;
05e9ebbe
SP		 2483}
2484
c4a3e0a5
BS		 2485/**
2486 * megasas_reset_device - Device reset handler entry point
2487 */
2488static int megasas_reset_device(struct scsi_cmnd *scmd)
2489{
c4a3e0a5
BS		 2490 /*
2491 * First wait for all commands to complete
2492 */
da0dc9fb 2493 return megasas_generic_reset(scmd);
c4a3e0a5
BS		 2494}
2495
2496/**
2497 * megasas_reset_bus_host - Bus & host reset handler entry point
2498 */
2499static int megasas_reset_bus_host(struct scsi_cmnd *scmd)
2500{
2501 int ret;
9c915a8c 2502 struct megasas_instance *instance;
da0dc9fb 2503
9c915a8c 2504 instance = (struct megasas_instance *)scmd->device->host->hostdata;
c4a3e0a5
BS		 2505
2506 /*
80682fa9 2507 * First wait for all commands to complete
c4a3e0a5 2508 */
36807e67 2509 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c 2510 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
21d3c710
SS		 2511 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
2512 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
229fe47c 2513 ret = megasas_reset_fusion(scmd->device->host, 1);
9c915a8c
AR		 2514 else
2515 ret = megasas_generic_reset(scmd);
c4a3e0a5
BS		 2516
2517 return ret;
2518}
2519
cf62a0a5
SP		 2520/**
2521 * megasas_bios_param - Returns disk geometry for a disk
da0dc9fb 2522 * @sdev: device handle
cf62a0a5
SP		 2523 * @bdev: block device
2524 * @capacity: drive capacity
2525 * @geom: geometry parameters
2526 */
2527static int
2528megasas_bios_param(struct scsi_device *sdev, struct block_device *bdev,
2529 sector_t capacity, int geom[])
2530{
2531 int heads;
2532 int sectors;
2533 sector_t cylinders;
2534 unsigned long tmp;
da0dc9fb 2535
cf62a0a5
SP		 2536 /* Default heads (64) & sectors (32) */
2537 heads = 64;
2538 sectors = 32;
2539
2540 tmp = heads * sectors;
2541 cylinders = capacity;
2542
2543 sector_div(cylinders, tmp);
2544
2545 /*
2546 * Handle extended translation size for logical drives > 1Gb
2547 */
2548
2549 if (capacity >= 0x200000) {
2550 heads = 255;
2551 sectors = 63;
2552 tmp = heads*sectors;
2553 cylinders = capacity;
2554 sector_div(cylinders, tmp);
2555 }
2556
2557 geom[0] = heads;
2558 geom[1] = sectors;
2559 geom[2] = cylinders;
2560
2561 return 0;
2562}
2563
7e8a75f4
YB		 2564static void megasas_aen_polling(struct work_struct *work);
2565
c4a3e0a5
BS		 2566/**
2567 * megasas_service_aen - Processes an event notification
2568 * @instance: Adapter soft state
2569 * @cmd: AEN command completed by the ISR
2570 *
2571 * For AEN, driver sends a command down to FW that is held by the FW till an
2572 * event occurs. When an event of interest occurs, FW completes the command
2573 * that it was previously holding.
2574 *
2575 * This routines sends SIGIO signal to processes that have registered with the
2576 * driver for AEN.
2577 */
2578static void
2579megasas_service_aen(struct megasas_instance *instance, struct megasas_cmd *cmd)
2580{
c3518837 2581 unsigned long flags;
da0dc9fb 2582
c4a3e0a5
BS		 2583 /*
2584 * Don't signal app if it is just an aborted previously registered aen
2585 */
c3518837
YB		 2586 if ((!cmd->abort_aen) && (instance->unload == 0)) {
2587 spin_lock_irqsave(&poll_aen_lock, flags);
2588 megasas_poll_wait_aen = 1;
2589 spin_unlock_irqrestore(&poll_aen_lock, flags);
2590 wake_up(&megasas_poll_wait);
c4a3e0a5 2591 kill_fasync(&megasas_async_queue, SIGIO, POLL_IN);
c3518837 2592 }
c4a3e0a5
BS		 2593 else
2594 cmd->abort_aen = 0;
2595
2596 instance->aen_cmd = NULL;
90dc9d98 2597
4026e9aa 2598 megasas_return_cmd(instance, cmd);
7e8a75f4 2599
39a98554 2600 if ((instance->unload == 0) &&
2601 ((instance->issuepend_done == 1))) {
7e8a75f4 2602 struct megasas_aen_event *ev;
da0dc9fb 2603
7e8a75f4
YB		 2604 ev = kzalloc(sizeof(*ev), GFP_ATOMIC);
2605 if (!ev) {
1be18254 2606 dev_err(&instance->pdev->dev, "megasas_service_aen: out of memory\n");
7e8a75f4
YB		 2607 } else {
2608 ev->instance = instance;
2609 instance->ev = ev;
c1d390d8
XF		 2610 INIT_DELAYED_WORK(&ev->hotplug_work,
2611 megasas_aen_polling);
2612 schedule_delayed_work(&ev->hotplug_work, 0);
7e8a75f4
YB		 2613 }
2614 }
c4a3e0a5
BS		 2615}
2616
fc62b3fc
SS		 2617static ssize_t
2618megasas_fw_crash_buffer_store(struct device *cdev,
2619 struct device_attribute *attr, const char *buf, size_t count)
2620{
2621 struct Scsi_Host *shost = class_to_shost(cdev);
2622 struct megasas_instance *instance =
2623 (struct megasas_instance *) shost->hostdata;
2624 int val = 0;
2625 unsigned long flags;
2626
2627 if (kstrtoint(buf, 0, &val) != 0)
2628 return -EINVAL;
2629
2630 spin_lock_irqsave(&instance->crashdump_lock, flags);
2631 instance->fw_crash_buffer_offset = val;
2632 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2633 return strlen(buf);
2634}
2635
2636static ssize_t
2637megasas_fw_crash_buffer_show(struct device *cdev,
2638 struct device_attribute *attr, char *buf)
2639{
2640 struct Scsi_Host *shost = class_to_shost(cdev);
2641 struct megasas_instance *instance =
2642 (struct megasas_instance *) shost->hostdata;
2643 u32 size;
2644 unsigned long buff_addr;
2645 unsigned long dmachunk = CRASH_DMA_BUF_SIZE;
2646 unsigned long src_addr;
2647 unsigned long flags;
2648 u32 buff_offset;
2649
2650 spin_lock_irqsave(&instance->crashdump_lock, flags);
2651 buff_offset = instance->fw_crash_buffer_offset;
2652 if (!instance->crash_dump_buf &&
2653 !((instance->fw_crash_state == AVAILABLE) ||
2654 (instance->fw_crash_state == COPYING))) {
2655 dev_err(&instance->pdev->dev,
2656 "Firmware crash dump is not available\n");
2657 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2658 return -EINVAL;
2659 }
2660
2661 buff_addr = (unsigned long) buf;
2662
da0dc9fb 2663 if (buff_offset > (instance->fw_crash_buffer_size * dmachunk)) {
fc62b3fc
SS		 2664 dev_err(&instance->pdev->dev,
2665 "Firmware crash dump offset is out of range\n");
2666 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2667 return 0;
2668 }
2669
2670 size = (instance->fw_crash_buffer_size * dmachunk) - buff_offset;
2671 size = (size >= PAGE_SIZE) ? (PAGE_SIZE - 1) : size;
2672
2673 src_addr = (unsigned long)instance->crash_buf[buff_offset / dmachunk] +
2674 (buff_offset % dmachunk);
da0dc9fb 2675 memcpy(buf, (void *)src_addr, size);
fc62b3fc
SS		 2676 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2677
2678 return size;
2679}
2680
2681static ssize_t
2682megasas_fw_crash_buffer_size_show(struct device *cdev,
2683 struct device_attribute *attr, char *buf)
2684{
2685 struct Scsi_Host *shost = class_to_shost(cdev);
2686 struct megasas_instance *instance =
2687 (struct megasas_instance *) shost->hostdata;
2688
2689 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)
2690 ((instance->fw_crash_buffer_size) * 1024 * 1024)/PAGE_SIZE);
2691}
2692
2693static ssize_t
2694megasas_fw_crash_state_store(struct device *cdev,
2695 struct device_attribute *attr, const char *buf, size_t count)
2696{
2697 struct Scsi_Host *shost = class_to_shost(cdev);
2698 struct megasas_instance *instance =
2699 (struct megasas_instance *) shost->hostdata;
2700 int val = 0;
2701 unsigned long flags;
2702
2703 if (kstrtoint(buf, 0, &val) != 0)
2704 return -EINVAL;
2705
2706 if ((val <= AVAILABLE || val > COPY_ERROR)) {
2707 dev_err(&instance->pdev->dev, "application updates invalid "
2708 "firmware crash state\n");
2709 return -EINVAL;
2710 }
2711
2712 instance->fw_crash_state = val;
2713
2714 if ((val == COPIED) || (val == COPY_ERROR)) {
2715 spin_lock_irqsave(&instance->crashdump_lock, flags);
2716 megasas_free_host_crash_buffer(instance);
2717 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2718 if (val == COPY_ERROR)
2719 dev_info(&instance->pdev->dev, "application failed to "
2720 "copy Firmware crash dump\n");
2721 else
2722 dev_info(&instance->pdev->dev, "Firmware crash dump "
2723 "copied successfully\n");
2724 }
2725 return strlen(buf);
2726}
2727
2728static ssize_t
2729megasas_fw_crash_state_show(struct device *cdev,
2730 struct device_attribute *attr, char *buf)
2731{
2732 struct Scsi_Host *shost = class_to_shost(cdev);
2733 struct megasas_instance *instance =
2734 (struct megasas_instance *) shost->hostdata;
da0dc9fb 2735
fc62b3fc
SS		 2736 return snprintf(buf, PAGE_SIZE, "%d\n", instance->fw_crash_state);
2737}
2738
2739static ssize_t
2740megasas_page_size_show(struct device *cdev,
2741 struct device_attribute *attr, char *buf)
2742{
2743 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)PAGE_SIZE - 1);
2744}
2745
2746static DEVICE_ATTR(fw_crash_buffer, S_IRUGO | S_IWUSR,
2747 megasas_fw_crash_buffer_show, megasas_fw_crash_buffer_store);
2748static DEVICE_ATTR(fw_crash_buffer_size, S_IRUGO,
2749 megasas_fw_crash_buffer_size_show, NULL);
2750static DEVICE_ATTR(fw_crash_state, S_IRUGO | S_IWUSR,
2751 megasas_fw_crash_state_show, megasas_fw_crash_state_store);
2752static DEVICE_ATTR(page_size, S_IRUGO,
2753 megasas_page_size_show, NULL);
2754
2755struct device_attribute *megaraid_host_attrs[] = {
2756 &dev_attr_fw_crash_buffer_size,
2757 &dev_attr_fw_crash_buffer,
2758 &dev_attr_fw_crash_state,
2759 &dev_attr_page_size,
2760 NULL,
2761};
2762
c4a3e0a5
BS		 2763/*
2764 * Scsi host template for megaraid_sas driver
2765 */
2766static struct scsi_host_template megasas_template = {
2767
2768 .module = THIS_MODULE,
43cd7fe4 2769 .name = "Avago SAS based MegaRAID driver",
c4a3e0a5 2770 .proc_name = "megaraid_sas",
147aab6a 2771 .slave_configure = megasas_slave_configure,
044833b5 2772 .slave_alloc = megasas_slave_alloc,
c4a3e0a5
BS		 2773 .queuecommand = megasas_queue_command,
2774 .eh_device_reset_handler = megasas_reset_device,
2775 .eh_bus_reset_handler = megasas_reset_bus_host,
2776 .eh_host_reset_handler = megasas_reset_bus_host,
05e9ebbe 2777 .eh_timed_out = megasas_reset_timer,
fc62b3fc 2778 .shost_attrs = megaraid_host_attrs,
cf62a0a5 2779 .bios_param = megasas_bios_param,
c4a3e0a5 2780 .use_clustering = ENABLE_CLUSTERING,
db5ed4df 2781 .change_queue_depth = scsi_change_queue_depth,
54b2b50c 2782 .no_write_same = 1,
c4a3e0a5
BS		 2783};
2784
2785/**
2786 * megasas_complete_int_cmd - Completes an internal command
2787 * @instance: Adapter soft state
2788 * @cmd: Command to be completed
2789 *
2790 * The megasas_issue_blocked_cmd() function waits for a command to complete
2791 * after it issues a command. This function wakes up that waiting routine by
2792 * calling wake_up() on the wait queue.
2793 */
2794static void
2795megasas_complete_int_cmd(struct megasas_instance *instance,
2796 struct megasas_cmd *cmd)
2797{
2be2a988 2798 cmd->cmd_status_drv = cmd->frame->io.cmd_status;
c4a3e0a5
BS		 2799 wake_up(&instance->int_cmd_wait_q);
2800}
2801
2802/**
2803 * megasas_complete_abort - Completes aborting a command
2804 * @instance: Adapter soft state
2805 * @cmd: Cmd that was issued to abort another cmd
2806 *
0d49016b
AR		 2807 * The megasas_issue_blocked_abort_cmd() function waits on abort_cmd_wait_q
2808 * after it issues an abort on a previously issued command. This function
c4a3e0a5
BS		 2809 * wakes up all functions waiting on the same wait queue.
2810 */
2811static void
2812megasas_complete_abort(struct megasas_instance *instance,
2813 struct megasas_cmd *cmd)
2814{
2815 if (cmd->sync_cmd) {
2816 cmd->sync_cmd = 0;
2be2a988 2817 cmd->cmd_status_drv = 0;
c4a3e0a5
BS		 2818 wake_up(&instance->abort_cmd_wait_q);
2819 }
c4a3e0a5
BS		 2820}
2821
c4a3e0a5
BS		 2822/**
2823 * megasas_complete_cmd - Completes a command
2824 * @instance: Adapter soft state
2825 * @cmd: Command to be completed
0d49016b 2826 * @alt_status: If non-zero, use this value as status to
da0dc9fb
BH		 2827 * SCSI mid-layer instead of the value returned
2828 * by the FW. This should be used if caller wants
2829 * an alternate status (as in the case of aborted
2830 * commands)
c4a3e0a5 2831 */
9c915a8c 2832void
c4a3e0a5
BS		 2833megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
2834 u8 alt_status)
2835{
2836 int exception = 0;
2837 struct megasas_header *hdr = &cmd->frame->hdr;
c3518837 2838 unsigned long flags;
9c915a8c 2839 struct fusion_context *fusion = instance->ctrl_context;
94cd65dd 2840 u32 opcode;
c4a3e0a5 2841
39a98554 2842 /* flag for the retry reset */
2843 cmd->retry_for_fw_reset = 0;
2844
05e9ebbe
SP		 2845 if (cmd->scmd)
2846 cmd->scmd->SCp.ptr = NULL;
c4a3e0a5
BS		 2847
2848 switch (hdr->cmd) {
e5f93a36
AR		 2849 case MFI_CMD_INVALID:
2850 /* Some older 1068 controller FW may keep a pended
2851 MR_DCMD_CTRL_EVENT_GET_INFO left over from the main kernel
2852 when booting the kdump kernel. Ignore this command to
2853 prevent a kernel panic on shutdown of the kdump kernel. */
1be18254
BH		 2854 dev_warn(&instance->pdev->dev, "MFI_CMD_INVALID command "
2855 "completed\n");
2856 dev_warn(&instance->pdev->dev, "If you have a controller "
2857 "other than PERC5, please upgrade your firmware\n");
e5f93a36 2858 break;
c4a3e0a5
BS		 2859 case MFI_CMD_PD_SCSI_IO:
2860 case MFI_CMD_LD_SCSI_IO:
2861
2862 /*
2863 * MFI_CMD_PD_SCSI_IO and MFI_CMD_LD_SCSI_IO could have been
2864 * issued either through an IO path or an IOCTL path. If it
2865 * was via IOCTL, we will send it to internal completion.
2866 */
2867 if (cmd->sync_cmd) {
2868 cmd->sync_cmd = 0;
2869 megasas_complete_int_cmd(instance, cmd);
2870 break;
2871 }
2872
c4a3e0a5
BS		 2873 case MFI_CMD_LD_READ:
2874 case MFI_CMD_LD_WRITE:
2875
2876 if (alt_status) {
2877 cmd->scmd->result = alt_status << 16;
2878 exception = 1;
2879 }
2880
2881 if (exception) {
2882
e4a082c7 2883 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 2884
155d98f0 2885 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 2886 cmd->scmd->scsi_done(cmd->scmd);
2887 megasas_return_cmd(instance, cmd);
2888
2889 break;
2890 }
2891
2892 switch (hdr->cmd_status) {
2893
2894 case MFI_STAT_OK:
2895 cmd->scmd->result = DID_OK << 16;
2896 break;
2897
2898 case MFI_STAT_SCSI_IO_FAILED:
2899 case MFI_STAT_LD_INIT_IN_PROGRESS:
2900 cmd->scmd->result =
2901 (DID_ERROR << 16) | hdr->scsi_status;
2902 break;
2903
2904 case MFI_STAT_SCSI_DONE_WITH_ERROR:
2905
2906 cmd->scmd->result = (DID_OK << 16) | hdr->scsi_status;
2907
2908 if (hdr->scsi_status == SAM_STAT_CHECK_CONDITION) {
2909 memset(cmd->scmd->sense_buffer, 0,
2910 SCSI_SENSE_BUFFERSIZE);
2911 memcpy(cmd->scmd->sense_buffer, cmd->sense,
2912 hdr->sense_len);
2913
2914 cmd->scmd->result |= DRIVER_SENSE << 24;
2915 }
2916
2917 break;
2918
2919 case MFI_STAT_LD_OFFLINE:
2920 case MFI_STAT_DEVICE_NOT_FOUND:
2921 cmd->scmd->result = DID_BAD_TARGET << 16;
2922 break;
2923
2924 default:
1be18254 2925 dev_printk(KERN_DEBUG, &instance->pdev->dev, "MFI FW status %#x\n",
c4a3e0a5
BS		 2926 hdr->cmd_status);
2927 cmd->scmd->result = DID_ERROR << 16;
2928 break;
2929 }
2930
e4a082c7 2931 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 2932
155d98f0 2933 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 2934 cmd->scmd->scsi_done(cmd->scmd);
2935 megasas_return_cmd(instance, cmd);
2936
2937 break;
2938
2939 case MFI_CMD_SMP:
2940 case MFI_CMD_STP:
2941 case MFI_CMD_DCMD:
94cd65dd 2942 opcode = le32_to_cpu(cmd->frame->dcmd.opcode);
9c915a8c 2943 /* Check for LD map update */
94cd65dd
SS		 2944 if ((opcode == MR_DCMD_LD_MAP_GET_INFO)
2945 && (cmd->frame->dcmd.mbox.b[1] == 1)) {
bc93d425 2946 fusion->fast_path_io = 0;
9c915a8c
AR		 2947 spin_lock_irqsave(instance->host->host_lock, flags);
2948 if (cmd->frame->hdr.cmd_status != 0) {
2949 if (cmd->frame->hdr.cmd_status !=
2950 MFI_STAT_NOT_FOUND)
1be18254 2951 dev_warn(&instance->pdev->dev, "map syncfailed, status = 0x%x\n",
9c915a8c
AR		 2952 cmd->frame->hdr.cmd_status);
2953 else {
4026e9aa 2954 megasas_return_cmd(instance, cmd);
9c915a8c
AR		 2955 spin_unlock_irqrestore(
2956 instance->host->host_lock,
2957 flags);
2958 break;
2959 }
2960 } else
2961 instance->map_id++;
4026e9aa 2962 megasas_return_cmd(instance, cmd);
bc93d425
SS		 2963
2964 /*
2965 * Set fast path IO to ZERO.
2966 * Validate Map will set proper value.
2967 * Meanwhile all IOs will go as LD IO.
2968 */
2969 if (MR_ValidateMapInfo(instance))
9c915a8c
AR		 2970 fusion->fast_path_io = 1;
2971 else
2972 fusion->fast_path_io = 0;
2973 megasas_sync_map_info(instance);
2974 spin_unlock_irqrestore(instance->host->host_lock,
2975 flags);
2976 break;
2977 }
94cd65dd
SS		 2978 if (opcode == MR_DCMD_CTRL_EVENT_GET_INFO ||
2979 opcode == MR_DCMD_CTRL_EVENT_GET) {
c3518837
YB		 2980 spin_lock_irqsave(&poll_aen_lock, flags);
2981 megasas_poll_wait_aen = 0;
2982 spin_unlock_irqrestore(&poll_aen_lock, flags);
2983 }
c4a3e0a5
BS		 2984
2985 /*
2986 * See if got an event notification
2987 */
94cd65dd 2988 if (opcode == MR_DCMD_CTRL_EVENT_WAIT)
c4a3e0a5
BS		 2989 megasas_service_aen(instance, cmd);
2990 else
2991 megasas_complete_int_cmd(instance, cmd);
2992
2993 break;
2994
2995 case MFI_CMD_ABORT:
2996 /*
2997 * Cmd issued to abort another cmd returned
2998 */
2999 megasas_complete_abort(instance, cmd);
3000 break;
3001
3002 default:
1be18254 3003 dev_info(&instance->pdev->dev, "Unknown command completed! [0x%X]\n",
c4a3e0a5
BS		 3004 hdr->cmd);
3005 break;
3006 }
3007}
3008
39a98554 3009/**
3010 * megasas_issue_pending_cmds_again - issue all pending cmds
da0dc9fb 3011 * in FW again because of the fw reset
39a98554 3012 * @instance: Adapter soft state
3013 */
3014static inline void
3015megasas_issue_pending_cmds_again(struct megasas_instance *instance)
3016{
3017 struct megasas_cmd *cmd;
3018 struct list_head clist_local;
3019 union megasas_evt_class_locale class_locale;
3020 unsigned long flags;
3021 u32 seq_num;
3022
3023 INIT_LIST_HEAD(&clist_local);
3024 spin_lock_irqsave(&instance->hba_lock, flags);
3025 list_splice_init(&instance->internal_reset_pending_q, &clist_local);
3026 spin_unlock_irqrestore(&instance->hba_lock, flags);
3027
3028 while (!list_empty(&clist_local)) {
da0dc9fb 3029 cmd = list_entry((&clist_local)->next,
39a98554 3030 struct megasas_cmd, list);
3031 list_del_init(&cmd->list);
3032
3033 if (cmd->sync_cmd || cmd->scmd) {
1be18254
BH		 3034 dev_notice(&instance->pdev->dev, "command %p, %p:%d"
3035 "detected to be pending while HBA reset\n",
39a98554 3036 cmd, cmd->scmd, cmd->sync_cmd);
3037
3038 cmd->retry_for_fw_reset++;
3039
3040 if (cmd->retry_for_fw_reset == 3) {
1be18254 3041 dev_notice(&instance->pdev->dev, "cmd %p, %p:%d"
39a98554 3042 "was tried multiple times during reset."
3043 "Shutting down the HBA\n",
3044 cmd, cmd->scmd, cmd->sync_cmd);
c8dd61ef
SS		 3045 instance->instancet->disable_intr(instance);
3046 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3047 megaraid_sas_kill_hba(instance);
39a98554 3048 return;
3049 }
3050 }
3051
3052 if (cmd->sync_cmd == 1) {
3053 if (cmd->scmd) {
1be18254 3054 dev_notice(&instance->pdev->dev, "unexpected"
39a98554 3055 "cmd attached to internal command!\n");
3056 }
1be18254 3057 dev_notice(&instance->pdev->dev, "%p synchronous cmd"
39a98554 3058 "on the internal reset queue,"
3059 "issue it again.\n", cmd);
2be2a988 3060 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 3061 instance->instancet->fire_cmd(instance,
da0dc9fb 3062 cmd->frame_phys_addr,
39a98554 3063 0, instance->reg_set);
3064 } else if (cmd->scmd) {
1be18254 3065 dev_notice(&instance->pdev->dev, "%p scsi cmd [%02x]"
39a98554 3066 "detected on the internal queue, issue again.\n",
5cd049a5 3067 cmd, cmd->scmd->cmnd[0]);
39a98554 3068
3069 atomic_inc(&instance->fw_outstanding);
3070 instance->instancet->fire_cmd(instance,
3071 cmd->frame_phys_addr,
3072 cmd->frame_count-1, instance->reg_set);
3073 } else {
1be18254 3074 dev_notice(&instance->pdev->dev, "%p unexpected cmd on the"
39a98554 3075 "internal reset defer list while re-issue!!\n",
3076 cmd);
3077 }
3078 }
3079
3080 if (instance->aen_cmd) {
1be18254 3081 dev_notice(&instance->pdev->dev, "aen_cmd in def process\n");
39a98554 3082 megasas_return_cmd(instance, instance->aen_cmd);
3083
da0dc9fb 3084 instance->aen_cmd = NULL;
39a98554 3085 }
3086
3087 /*
da0dc9fb
BH		 3088 * Initiate AEN (Asynchronous Event Notification)
3089 */
39a98554 3090 seq_num = instance->last_seq_num;
3091 class_locale.members.reserved = 0;
3092 class_locale.members.locale = MR_EVT_LOCALE_ALL;
3093 class_locale.members.class = MR_EVT_CLASS_DEBUG;
3094
3095 megasas_register_aen(instance, seq_num, class_locale.word);
3096}
3097
3098/**
3099 * Move the internal reset pending commands to a deferred queue.
3100 *
3101 * We move the commands pending at internal reset time to a
3102 * pending queue. This queue would be flushed after successful
3103 * completion of the internal reset sequence. if the internal reset
3104 * did not complete in time, the kernel reset handler would flush
3105 * these commands.
3106 **/
3107static void
3108megasas_internal_reset_defer_cmds(struct megasas_instance *instance)
3109{
3110 struct megasas_cmd *cmd;
3111 int i;
3112 u32 max_cmd = instance->max_fw_cmds;
3113 u32 defer_index;
3114 unsigned long flags;
3115
da0dc9fb 3116 defer_index = 0;
90dc9d98 3117 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
39a98554 3118 for (i = 0; i < max_cmd; i++) {
3119 cmd = instance->cmd_list[i];
3120 if (cmd->sync_cmd == 1 || cmd->scmd) {
1be18254 3121 dev_notice(&instance->pdev->dev, "moving cmd[%d]:%p:%d:%p"
39a98554 3122 "on the defer queue as internal\n",
3123 defer_index, cmd, cmd->sync_cmd, cmd->scmd);
3124
3125 if (!list_empty(&cmd->list)) {
1be18254 3126 dev_notice(&instance->pdev->dev, "ERROR while"
39a98554 3127 " moving this cmd:%p, %d %p, it was"
3128 "discovered on some list?\n",
3129 cmd, cmd->sync_cmd, cmd->scmd);
3130
3131 list_del_init(&cmd->list);
3132 }
3133 defer_index++;
3134 list_add_tail(&cmd->list,
3135 &instance->internal_reset_pending_q);
3136 }
3137 }
90dc9d98 3138 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
39a98554 3139}
3140
3141
3142static void
3143process_fw_state_change_wq(struct work_struct *work)
3144{
3145 struct megasas_instance *instance =
3146 container_of(work, struct megasas_instance, work_init);
3147 u32 wait;
3148 unsigned long flags;
3149
3150 if (instance->adprecovery != MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3151 dev_notice(&instance->pdev->dev, "error, recovery st %x\n",
39a98554 3152 instance->adprecovery);
3153 return ;
3154 }
3155
3156 if (instance->adprecovery == MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3157 dev_notice(&instance->pdev->dev, "FW detected to be in fault"
39a98554 3158 "state, restarting it...\n");
3159
d46a3ad6 3160 instance->instancet->disable_intr(instance);
39a98554 3161 atomic_set(&instance->fw_outstanding, 0);
3162
3163 atomic_set(&instance->fw_reset_no_pci_access, 1);
3164 instance->instancet->adp_reset(instance, instance->reg_set);
da0dc9fb 3165 atomic_set(&instance->fw_reset_no_pci_access, 0);
39a98554 3166
1be18254 3167 dev_notice(&instance->pdev->dev, "FW restarted successfully,"
39a98554 3168 "initiating next stage...\n");
3169
1be18254 3170 dev_notice(&instance->pdev->dev, "HBA recovery state machine,"
39a98554 3171 "state 2 starting...\n");
3172
da0dc9fb 3173 /* waiting for about 20 second before start the second init */
39a98554 3174 for (wait = 0; wait < 30; wait++) {
3175 msleep(1000);
3176 }
3177
058a8fac 3178 if (megasas_transition_to_ready(instance, 1)) {
1be18254 3179 dev_notice(&instance->pdev->dev, "adapter not ready\n");
39a98554 3180
c8dd61ef 3181 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3182 megaraid_sas_kill_hba(instance);
39a98554 3183 return ;
3184 }
3185
3186 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
3187 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
3188 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)
3189 ) {
3190 *instance->consumer = *instance->producer;
3191 } else {
3192 *instance->consumer = 0;
3193 *instance->producer = 0;
3194 }
3195
3196 megasas_issue_init_mfi(instance);
3197
3198 spin_lock_irqsave(&instance->hba_lock, flags);
3199 instance->adprecovery = MEGASAS_HBA_OPERATIONAL;
3200 spin_unlock_irqrestore(&instance->hba_lock, flags);
d46a3ad6 3201 instance->instancet->enable_intr(instance);
39a98554 3202
3203 megasas_issue_pending_cmds_again(instance);
3204 instance->issuepend_done = 1;
3205 }
39a98554 3206}
3207
c4a3e0a5
BS		 3208/**
3209 * megasas_deplete_reply_queue - Processes all completed commands
3210 * @instance: Adapter soft state
3211 * @alt_status: Alternate status to be returned to
da0dc9fb
BH		 3212 * SCSI mid-layer instead of the status
3213 * returned by the FW
39a98554 3214 * Note: this must be called with hba lock held
c4a3e0a5 3215 */
858119e1 3216static int
39a98554 3217megasas_deplete_reply_queue(struct megasas_instance *instance,
3218 u8 alt_status)
c4a3e0a5 3219{
39a98554 3220 u32 mfiStatus;
3221 u32 fw_state;
3222
3223 if ((mfiStatus = instance->instancet->check_reset(instance,
3224 instance->reg_set)) == 1) {
3225 return IRQ_HANDLED;
3226 }
3227
3228 if ((mfiStatus = instance->instancet->clear_intr(
3229 instance->reg_set)
3230 ) == 0) {
e1419191 3231 /* Hardware may not set outbound_intr_status in MSI-X mode */
c8e858fe 3232 if (!instance->msix_vectors)
e1419191 3233 return IRQ_NONE;
39a98554 3234 }
3235
3236 instance->mfiStatus = mfiStatus;
3237
3238 if ((mfiStatus & MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE)) {
3239 fw_state = instance->instancet->read_fw_status_reg(
3240 instance->reg_set) & MFI_STATE_MASK;
3241
3242 if (fw_state != MFI_STATE_FAULT) {
1be18254 3243 dev_notice(&instance->pdev->dev, "fw state:%x\n",
39a98554 3244 fw_state);
3245 }
3246
3247 if ((fw_state == MFI_STATE_FAULT) &&
3248 (instance->disableOnlineCtrlReset == 0)) {
1be18254 3249 dev_notice(&instance->pdev->dev, "wait adp restart\n");
39a98554 3250
3251 if ((instance->pdev->device ==
3252 PCI_DEVICE_ID_LSI_SAS1064R) ||
3253 (instance->pdev->device ==
3254 PCI_DEVICE_ID_DELL_PERC5) ||
3255 (instance->pdev->device ==
3256 PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
3257
3258 *instance->consumer =
94cd65dd 3259 cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
39a98554 3260 }
3261
3262
d46a3ad6 3263 instance->instancet->disable_intr(instance);
39a98554 3264 instance->adprecovery = MEGASAS_ADPRESET_SM_INFAULT;
3265 instance->issuepend_done = 0;
3266
3267 atomic_set(&instance->fw_outstanding, 0);
3268 megasas_internal_reset_defer_cmds(instance);
3269
1be18254 3270 dev_notice(&instance->pdev->dev, "fwState=%x, stage:%d\n",
39a98554 3271 fw_state, instance->adprecovery);
3272
3273 schedule_work(&instance->work_init);
3274 return IRQ_HANDLED;
3275
3276 } else {
1be18254 3277 dev_notice(&instance->pdev->dev, "fwstate:%x, dis_OCR=%x\n",
39a98554 3278 fw_state, instance->disableOnlineCtrlReset);
3279 }
3280 }
c4a3e0a5 3281
5d018ad0 3282 tasklet_schedule(&instance->isr_tasklet);
c4a3e0a5
BS		 3283 return IRQ_HANDLED;
3284}
c4a3e0a5
BS		 3285/**
3286 * megasas_isr - isr entry point
3287 */
7d12e780 3288static irqreturn_t megasas_isr(int irq, void *devp)
c4a3e0a5 3289{
c8e858fe
AR		 3290 struct megasas_irq_context *irq_context = devp;
3291 struct megasas_instance *instance = irq_context->instance;
39a98554 3292 unsigned long flags;
da0dc9fb 3293 irqreturn_t rc;
39a98554 3294
c8e858fe 3295 if (atomic_read(&instance->fw_reset_no_pci_access))
39a98554 3296 return IRQ_HANDLED;
3297
39a98554 3298 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 3299 rc = megasas_deplete_reply_queue(instance, DID_OK);
39a98554 3300 spin_unlock_irqrestore(&instance->hba_lock, flags);
3301
3302 return rc;
c4a3e0a5
BS		 3303}
3304
3305/**
3306 * megasas_transition_to_ready - Move the FW to READY state
1341c939 3307 * @instance: Adapter soft state
c4a3e0a5
BS		 3308 *
3309 * During the initialization, FW passes can potentially be in any one of
3310 * several possible states. If the FW in operational, waiting-for-handshake
3311 * states, driver must take steps to bring it to ready state. Otherwise, it
3312 * has to wait for the ready state.
3313 */
9c915a8c 3314int
058a8fac 3315megasas_transition_to_ready(struct megasas_instance *instance, int ocr)
c4a3e0a5
BS		 3316{
3317 int i;
3318 u8 max_wait;
3319 u32 fw_state;
3320 u32 cur_state;
7218df69 3321 u32 abs_state, curr_abs_state;
c4a3e0a5 3322
bc6ac5e8
TH		 3323 abs_state = instance->instancet->read_fw_status_reg(instance->reg_set);
3324 fw_state = abs_state & MFI_STATE_MASK;
c4a3e0a5 3325
e3bbff9f 3326 if (fw_state != MFI_STATE_READY)
1be18254 3327 dev_info(&instance->pdev->dev, "Waiting for FW to come to ready"
0d49016b 3328 " state\n");
e3bbff9f 3329
c4a3e0a5
BS		 3330 while (fw_state != MFI_STATE_READY) {
3331
c4a3e0a5
BS		 3332 switch (fw_state) {
3333
3334 case MFI_STATE_FAULT:
1be18254 3335 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW in FAULT state!!\n");
058a8fac
AR		 3336 if (ocr) {
3337 max_wait = MEGASAS_RESET_WAIT_TIME;
3338 cur_state = MFI_STATE_FAULT;
3339 break;
3340 } else
3341 return -ENODEV;
c4a3e0a5
BS		 3342
3343 case MFI_STATE_WAIT_HANDSHAKE:
3344 /*
3345 * Set the CLR bit in inbound doorbell
3346 */
0c79e681 3347 if ((instance->pdev->device ==
87911122
YB		 3348 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3349 (instance->pdev->device ==
9c915a8c
AR		 3350 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
3351 (instance->pdev->device ==
21d3c710 3352 PCI_DEVICE_ID_LSI_FUSION) ||
36807e67 3353 (instance->pdev->device ==
229fe47c
AR		 3354 PCI_DEVICE_ID_LSI_PLASMA) ||
3355 (instance->pdev->device ==
21d3c710
SS		 3356 PCI_DEVICE_ID_LSI_INVADER) ||
3357 (instance->pdev->device ==
3358 PCI_DEVICE_ID_LSI_FURY)) {
87911122
YB		 3359 writel(
3360 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
9c915a8c 3361 &instance->reg_set->doorbell);
87911122
YB		 3362 } else {
3363 writel(
3364 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
3365 &instance->reg_set->inbound_doorbell);
3366 }
c4a3e0a5 3367
7218df69 3368 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3369 cur_state = MFI_STATE_WAIT_HANDSHAKE;
3370 break;
3371
e3bbff9f 3372 case MFI_STATE_BOOT_MESSAGE_PENDING:
87911122 3373 if ((instance->pdev->device ==
9c915a8c
AR		 3374 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3375 (instance->pdev->device ==
3376 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
3377 (instance->pdev->device ==
36807e67 3378 PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c
AR		 3379 (instance->pdev->device ==
3380 PCI_DEVICE_ID_LSI_PLASMA) ||
36807e67 3381 (instance->pdev->device ==
21d3c710
SS		 3382 PCI_DEVICE_ID_LSI_INVADER) ||
3383 (instance->pdev->device ==
3384 PCI_DEVICE_ID_LSI_FURY)) {
87911122 3385 writel(MFI_INIT_HOTPLUG,
9c915a8c 3386 &instance->reg_set->doorbell);
87911122
YB		 3387 } else
3388 writel(MFI_INIT_HOTPLUG,
3389 &instance->reg_set->inbound_doorbell);
e3bbff9f 3390
7218df69 3391 max_wait = MEGASAS_RESET_WAIT_TIME;
e3bbff9f
SP		 3392 cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
3393 break;
3394
c4a3e0a5
BS		 3395 case MFI_STATE_OPERATIONAL:
3396 /*
e3bbff9f 3397 * Bring it to READY state; assuming max wait 10 secs
c4a3e0a5 3398 */
d46a3ad6 3399 instance->instancet->disable_intr(instance);
87911122
YB		 3400 if ((instance->pdev->device ==
3401 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3402 (instance->pdev->device ==
9c915a8c
AR		 3403 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
3404 (instance->pdev->device
36807e67 3405 == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c
AR		 3406 (instance->pdev->device
3407 == PCI_DEVICE_ID_LSI_PLASMA) ||
36807e67 3408 (instance->pdev->device
21d3c710
SS		 3409 == PCI_DEVICE_ID_LSI_INVADER) ||
3410 (instance->pdev->device
3411 == PCI_DEVICE_ID_LSI_FURY)) {
87911122 3412 writel(MFI_RESET_FLAGS,
9c915a8c 3413 &instance->reg_set->doorbell);
36807e67 3414 if ((instance->pdev->device ==
21d3c710
SS		 3415 PCI_DEVICE_ID_LSI_FUSION) ||
3416 (instance->pdev->device ==
229fe47c
AR		 3417 PCI_DEVICE_ID_LSI_PLASMA) ||
3418 (instance->pdev->device ==
21d3c710
SS		 3419 PCI_DEVICE_ID_LSI_INVADER) ||
3420 (instance->pdev->device ==
3421 PCI_DEVICE_ID_LSI_FURY)) {
9c915a8c
AR		 3422 for (i = 0; i < (10 * 1000); i += 20) {
3423 if (readl(
3424 &instance->
3425 reg_set->
3426 doorbell) & 1)
3427 msleep(20);
3428 else
3429 break;
3430 }
3431 }
87911122
YB		 3432 } else
3433 writel(MFI_RESET_FLAGS,
3434 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3435
7218df69 3436 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3437 cur_state = MFI_STATE_OPERATIONAL;
3438 break;
3439
3440 case MFI_STATE_UNDEFINED:
3441 /*
3442 * This state should not last for more than 2 seconds
3443 */
7218df69 3444 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3445 cur_state = MFI_STATE_UNDEFINED;
3446 break;
3447
3448 case MFI_STATE_BB_INIT:
7218df69 3449 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3450 cur_state = MFI_STATE_BB_INIT;
3451 break;
3452
3453 case MFI_STATE_FW_INIT:
7218df69 3454 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3455 cur_state = MFI_STATE_FW_INIT;
3456 break;
3457
3458 case MFI_STATE_FW_INIT_2:
7218df69 3459 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3460 cur_state = MFI_STATE_FW_INIT_2;
3461 break;
3462
3463 case MFI_STATE_DEVICE_SCAN:
7218df69 3464 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3465 cur_state = MFI_STATE_DEVICE_SCAN;
3466 break;
3467
3468 case MFI_STATE_FLUSH_CACHE:
7218df69 3469 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3470 cur_state = MFI_STATE_FLUSH_CACHE;
3471 break;
3472
3473 default:
1be18254 3474 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Unknown state 0x%x\n",
c4a3e0a5
BS		 3475 fw_state);
3476 return -ENODEV;
3477 }
3478
3479 /*
3480 * The cur_state should not last for more than max_wait secs
3481 */
3482 for (i = 0; i < (max_wait * 1000); i++) {
bc6ac5e8
TH		 3483 curr_abs_state = instance->instancet->
3484 read_fw_status_reg(instance->reg_set);
c4a3e0a5 3485
7218df69 3486 if (abs_state == curr_abs_state) {
c4a3e0a5
BS		 3487 msleep(1);
3488 } else
3489 break;
3490 }
3491
3492 /*
3493 * Return error if fw_state hasn't changed after max_wait
3494 */
7218df69 3495 if (curr_abs_state == abs_state) {
1be18254 3496 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW state [%d] hasn't changed "
c4a3e0a5
BS		 3497 "in %d secs\n", fw_state, max_wait);
3498 return -ENODEV;
3499 }
bc6ac5e8
TH		 3500
3501 abs_state = curr_abs_state;
3502 fw_state = curr_abs_state & MFI_STATE_MASK;
39a98554 3503 }
1be18254 3504 dev_info(&instance->pdev->dev, "FW now in Ready state\n");
c4a3e0a5
BS		 3505
3506 return 0;
3507}
3508
3509/**
3510 * megasas_teardown_frame_pool - Destroy the cmd frame DMA pool
3511 * @instance: Adapter soft state
3512 */
3513static void megasas_teardown_frame_pool(struct megasas_instance *instance)
3514{
3515 int i;
9c915a8c 3516 u32 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3517 struct megasas_cmd *cmd;
3518
3519 if (!instance->frame_dma_pool)
3520 return;
3521
3522 /*
3523 * Return all frames to pool
3524 */
3525 for (i = 0; i < max_cmd; i++) {
3526
3527 cmd = instance->cmd_list[i];
3528
3529 if (cmd->frame)
3530 pci_pool_free(instance->frame_dma_pool, cmd->frame,
3531 cmd->frame_phys_addr);
3532
3533 if (cmd->sense)
e3bbff9f 3534 pci_pool_free(instance->sense_dma_pool, cmd->sense,
c4a3e0a5
BS		 3535 cmd->sense_phys_addr);
3536 }
3537
3538 /*
3539 * Now destroy the pool itself
3540 */
3541 pci_pool_destroy(instance->frame_dma_pool);
3542 pci_pool_destroy(instance->sense_dma_pool);
3543
3544 instance->frame_dma_pool = NULL;
3545 instance->sense_dma_pool = NULL;
3546}
3547
3548/**
3549 * megasas_create_frame_pool - Creates DMA pool for cmd frames
3550 * @instance: Adapter soft state
3551 *
3552 * Each command packet has an embedded DMA memory buffer that is used for
3553 * filling MFI frame and the SG list that immediately follows the frame. This
3554 * function creates those DMA memory buffers for each command packet by using
3555 * PCI pool facility.
3556 */
3557static int megasas_create_frame_pool(struct megasas_instance *instance)
3558{
3559 int i;
3560 u32 max_cmd;
3561 u32 sge_sz;
c4a3e0a5
BS		 3562 u32 total_sz;
3563 u32 frame_count;
3564 struct megasas_cmd *cmd;
3565
9c915a8c 3566 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3567
3568 /*
3569 * Size of our frame is 64 bytes for MFI frame, followed by max SG
3570 * elements and finally SCSI_SENSE_BUFFERSIZE bytes for sense buffer
3571 */
3572 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
3573 sizeof(struct megasas_sge32);
3574
da0dc9fb 3575 if (instance->flag_ieee)
f4c9a131 3576 sge_sz = sizeof(struct megasas_sge_skinny);
f4c9a131 3577
c4a3e0a5 3578 /*
200aed58
SS		 3579 * For MFI controllers.
3580 * max_num_sge = 60
3581 * max_sge_sz = 16 byte (sizeof megasas_sge_skinny)
3582 * Total 960 byte (15 MFI frame of 64 byte)
3583 *
3584 * Fusion adapter require only 3 extra frame.
3585 * max_num_sge = 16 (defined as MAX_IOCTL_SGE)
3586 * max_sge_sz = 12 byte (sizeof megasas_sge64)
3587 * Total 192 byte (3 MFI frame of 64 byte)
c4a3e0a5 3588 */
200aed58 3589 frame_count = instance->ctrl_context ? (3 + 1) : (15 + 1);
c4a3e0a5
BS		 3590 total_sz = MEGAMFI_FRAME_SIZE * frame_count;
3591 /*
3592 * Use DMA pool facility provided by PCI layer
3593 */
3594 instance->frame_dma_pool = pci_pool_create("megasas frame pool",
200aed58 3595 instance->pdev, total_sz, 256, 0);
c4a3e0a5
BS		 3596
3597 if (!instance->frame_dma_pool) {
1be18254 3598 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup frame pool\n");
c4a3e0a5
BS		 3599 return -ENOMEM;
3600 }
3601
3602 instance->sense_dma_pool = pci_pool_create("megasas sense pool",
3603 instance->pdev, 128, 4, 0);
3604
3605 if (!instance->sense_dma_pool) {
1be18254 3606 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup sense pool\n");
c4a3e0a5
BS		 3607
3608 pci_pool_destroy(instance->frame_dma_pool);
3609 instance->frame_dma_pool = NULL;
3610
3611 return -ENOMEM;
3612 }
3613
3614 /*
3615 * Allocate and attach a frame to each of the commands in cmd_list.
3616 * By making cmd->index as the context instead of the &cmd, we can
3617 * always use 32bit context regardless of the architecture
3618 */
3619 for (i = 0; i < max_cmd; i++) {
3620
3621 cmd = instance->cmd_list[i];
3622
3623 cmd->frame = pci_pool_alloc(instance->frame_dma_pool,
3624 GFP_KERNEL, &cmd->frame_phys_addr);
3625
3626 cmd->sense = pci_pool_alloc(instance->sense_dma_pool,
3627 GFP_KERNEL, &cmd->sense_phys_addr);
3628
3629 /*
3630 * megasas_teardown_frame_pool() takes care of freeing
3631 * whatever has been allocated
3632 */
3633 if (!cmd->frame || !cmd->sense) {
1be18254 3634 dev_printk(KERN_DEBUG, &instance->pdev->dev, "pci_pool_alloc failed\n");
c4a3e0a5
BS		 3635 megasas_teardown_frame_pool(instance);
3636 return -ENOMEM;
3637 }
3638
707e09bd 3639 memset(cmd->frame, 0, total_sz);
94cd65dd 3640 cmd->frame->io.context = cpu_to_le32(cmd->index);
7e8a75f4 3641 cmd->frame->io.pad_0 = 0;
e5f93a36 3642 if ((instance->pdev->device != PCI_DEVICE_ID_LSI_FUSION) &&
229fe47c 3643 (instance->pdev->device != PCI_DEVICE_ID_LSI_PLASMA) &&
e5f93a36 3644 (instance->pdev->device != PCI_DEVICE_ID_LSI_INVADER) &&
21d3c710 3645 (instance->pdev->device != PCI_DEVICE_ID_LSI_FURY) &&
e5f93a36
AR		 3646 (reset_devices))
3647 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
c4a3e0a5
BS		 3648 }
3649
3650 return 0;
3651}
3652
3653/**
3654 * megasas_free_cmds - Free all the cmds in the free cmd pool
3655 * @instance: Adapter soft state
3656 */
9c915a8c 3657void megasas_free_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 3658{
3659 int i;
da0dc9fb 3660
c4a3e0a5
BS		 3661 /* First free the MFI frame pool */
3662 megasas_teardown_frame_pool(instance);
3663
3664 /* Free all the commands in the cmd_list */
9c915a8c
AR		 3665 for (i = 0; i < instance->max_mfi_cmds; i++)
3666
c4a3e0a5
BS		 3667 kfree(instance->cmd_list[i]);
3668
3669 /* Free the cmd_list buffer itself */
3670 kfree(instance->cmd_list);
3671 instance->cmd_list = NULL;
3672
3673 INIT_LIST_HEAD(&instance->cmd_pool);
3674}
3675
3676/**
3677 * megasas_alloc_cmds - Allocates the command packets
3678 * @instance: Adapter soft state
3679 *
3680 * Each command that is issued to the FW, whether IO commands from the OS or
3681 * internal commands like IOCTLs, are wrapped in local data structure called
3682 * megasas_cmd. The frame embedded in this megasas_cmd is actually issued to
3683 * the FW.
3684 *
3685 * Each frame has a 32-bit field called context (tag). This context is used
3686 * to get back the megasas_cmd from the frame when a frame gets completed in
3687 * the ISR. Typically the address of the megasas_cmd itself would be used as
3688 * the context. But we wanted to keep the differences between 32 and 64 bit
3689 * systems to the mininum. We always use 32 bit integers for the context. In
3690 * this driver, the 32 bit values are the indices into an array cmd_list.
3691 * This array is used only to look up the megasas_cmd given the context. The
3692 * free commands themselves are maintained in a linked list called cmd_pool.
3693 */
9c915a8c 3694int megasas_alloc_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 3695{
3696 int i;
3697 int j;
3698 u32 max_cmd;
3699 struct megasas_cmd *cmd;
90dc9d98 3700 struct fusion_context *fusion;
c4a3e0a5 3701
90dc9d98 3702 fusion = instance->ctrl_context;
9c915a8c 3703 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3704
3705 /*
3706 * instance->cmd_list is an array of struct megasas_cmd pointers.
3707 * Allocate the dynamic array first and then allocate individual
3708 * commands.
3709 */
dd00cc48 3710 instance->cmd_list = kcalloc(max_cmd, sizeof(struct megasas_cmd*), GFP_KERNEL);
c4a3e0a5
BS		 3711
3712 if (!instance->cmd_list) {
1be18254 3713 dev_printk(KERN_DEBUG, &instance->pdev->dev, "out of memory\n");
c4a3e0a5
BS		 3714 return -ENOMEM;
3715 }
3716
9c915a8c 3717 memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) *max_cmd);
c4a3e0a5
BS		 3718
3719 for (i = 0; i < max_cmd; i++) {
3720 instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd),
3721 GFP_KERNEL);
3722
3723 if (!instance->cmd_list[i]) {
3724
3725 for (j = 0; j < i; j++)
3726 kfree(instance->cmd_list[j]);
3727
3728 kfree(instance->cmd_list);
3729 instance->cmd_list = NULL;
3730
3731 return -ENOMEM;
3732 }
3733 }
3734
c4a3e0a5
BS		 3735 for (i = 0; i < max_cmd; i++) {
3736 cmd = instance->cmd_list[i];
3737 memset(cmd, 0, sizeof(struct megasas_cmd));
3738 cmd->index = i;
39a98554 3739 cmd->scmd = NULL;
c4a3e0a5
BS		 3740 cmd->instance = instance;
3741
3742 list_add_tail(&cmd->list, &instance->cmd_pool);
3743 }
3744
3745 /*
3746 * Create a frame pool and assign one frame to each cmd
3747 */
3748 if (megasas_create_frame_pool(instance)) {
1be18254 3749 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error creating frame DMA pool\n");
c4a3e0a5
BS		 3750 megasas_free_cmds(instance);
3751 }
3752
3753 return 0;
3754}
3755
81e403ce
YB		 3756/*
3757 * megasas_get_pd_list_info - Returns FW's pd_list structure
3758 * @instance: Adapter soft state
3759 * @pd_list: pd_list structure
3760 *
3761 * Issues an internal command (DCMD) to get the FW's controller PD
3762 * list structure. This information is mainly used to find out SYSTEM
3763 * supported by the FW.
3764 */
3765static int
3766megasas_get_pd_list(struct megasas_instance *instance)
3767{
3768 int ret = 0, pd_index = 0;
3769 struct megasas_cmd *cmd;
3770 struct megasas_dcmd_frame *dcmd;
3771 struct MR_PD_LIST *ci;
3772 struct MR_PD_ADDRESS *pd_addr;
3773 dma_addr_t ci_h = 0;
3774
3775 cmd = megasas_get_cmd(instance);
3776
3777 if (!cmd) {
1be18254 3778 dev_printk(KERN_DEBUG, &instance->pdev->dev, "(get_pd_list): Failed to get cmd\n");
81e403ce
YB		 3779 return -ENOMEM;
3780 }
3781
3782 dcmd = &cmd->frame->dcmd;
3783
3784 ci = pci_alloc_consistent(instance->pdev,
3785 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST), &ci_h);
3786
3787 if (!ci) {
1be18254 3788 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for pd_list\n");
81e403ce
YB		 3789 megasas_return_cmd(instance, cmd);
3790 return -ENOMEM;
3791 }
3792
3793 memset(ci, 0, sizeof(*ci));
3794 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
3795
3796 dcmd->mbox.b[0] = MR_PD_QUERY_TYPE_EXPOSED_TO_HOST;
3797 dcmd->mbox.b[1] = 0;
3798 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 3799 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
81e403ce 3800 dcmd->sge_count = 1;
94cd65dd 3801 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
81e403ce 3802 dcmd->timeout = 0;
780a3762 3803 dcmd->pad_0 = 0;
94cd65dd
SS		 3804 dcmd->data_xfer_len = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
3805 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_LIST_QUERY);
3806 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
3807 dcmd->sgl.sge32[0].length = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
81e403ce 3808
90dc9d98
SS		 3809 if (instance->ctrl_context && !instance->mask_interrupts)
3810 ret = megasas_issue_blocked_cmd(instance, cmd,
3811 MEGASAS_BLOCKED_CMD_TIMEOUT);
3812 else
3813 ret = megasas_issue_polled(instance, cmd);
81e403ce
YB		 3814
3815 /*
da0dc9fb
BH		 3816 * the following function will get the instance PD LIST.
3817 */
81e403ce
YB		 3818
3819 pd_addr = ci->addr;
3820
da0dc9fb 3821 if (ret == 0 &&
94cd65dd 3822 (le32_to_cpu(ci->count) <
81e403ce
YB		 3823 (MEGASAS_MAX_PD_CHANNELS * MEGASAS_MAX_DEV_PER_CHANNEL))) {
3824
999ece0a 3825 memset(instance->local_pd_list, 0,
81e403ce
YB		 3826 MEGASAS_MAX_PD * sizeof(struct megasas_pd_list));
3827
94cd65dd 3828 for (pd_index = 0; pd_index < le32_to_cpu(ci->count); pd_index++) {
81e403ce 3829
999ece0a 3830 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].tid =
94cd65dd 3831 le16_to_cpu(pd_addr->deviceId);
999ece0a 3832 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveType =
81e403ce 3833 pd_addr->scsiDevType;
999ece0a 3834 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveState =
81e403ce
YB		 3835 MR_PD_STATE_SYSTEM;
3836 pd_addr++;
3837 }
999ece0a
SS		 3838 memcpy(instance->pd_list, instance->local_pd_list,
3839 sizeof(instance->pd_list));
81e403ce
YB		 3840 }
3841
3842 pci_free_consistent(instance->pdev,
3843 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST),
3844 ci, ci_h);
90dc9d98 3845
4026e9aa 3846 megasas_return_cmd(instance, cmd);
81e403ce
YB		 3847
3848 return ret;
3849}
3850
bdc6fb8d
YB		 3851/*
3852 * megasas_get_ld_list_info - Returns FW's ld_list structure
3853 * @instance: Adapter soft state
3854 * @ld_list: ld_list structure
3855 *
3856 * Issues an internal command (DCMD) to get the FW's controller PD
3857 * list structure. This information is mainly used to find out SYSTEM
3858 * supported by the FW.
3859 */
3860static int
3861megasas_get_ld_list(struct megasas_instance *instance)
3862{
3863 int ret = 0, ld_index = 0, ids = 0;
3864 struct megasas_cmd *cmd;
3865 struct megasas_dcmd_frame *dcmd;
3866 struct MR_LD_LIST *ci;
3867 dma_addr_t ci_h = 0;
94cd65dd 3868 u32 ld_count;
bdc6fb8d
YB		 3869
3870 cmd = megasas_get_cmd(instance);
3871
3872 if (!cmd) {
1be18254 3873 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_list: Failed to get cmd\n");
bdc6fb8d
YB		 3874 return -ENOMEM;
3875 }
3876
3877 dcmd = &cmd->frame->dcmd;
3878
3879 ci = pci_alloc_consistent(instance->pdev,
3880 sizeof(struct MR_LD_LIST),
3881 &ci_h);
3882
3883 if (!ci) {
1be18254 3884 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem in get_ld_list\n");
bdc6fb8d
YB		 3885 megasas_return_cmd(instance, cmd);
3886 return -ENOMEM;
3887 }
3888
3889 memset(ci, 0, sizeof(*ci));
3890 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
3891
51087a86
SS		 3892 if (instance->supportmax256vd)
3893 dcmd->mbox.b[0] = 1;
bdc6fb8d 3894 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 3895 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
bdc6fb8d 3896 dcmd->sge_count = 1;
94cd65dd 3897 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
bdc6fb8d 3898 dcmd->timeout = 0;
94cd65dd
SS		 3899 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_LIST));
3900 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_GET_LIST);
3901 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
3902 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_LIST));
bdc6fb8d
YB		 3903 dcmd->pad_0 = 0;
3904
90dc9d98
SS		 3905 if (instance->ctrl_context && !instance->mask_interrupts)
3906 ret = megasas_issue_blocked_cmd(instance, cmd,
3907 MEGASAS_BLOCKED_CMD_TIMEOUT);
3908 else
3909 ret = megasas_issue_polled(instance, cmd);
3910
bdc6fb8d 3911
94cd65dd
SS		 3912 ld_count = le32_to_cpu(ci->ldCount);
3913
bdc6fb8d
YB		 3914 /* the following function will get the instance PD LIST */
3915
51087a86
SS		 3916 if ((ret == 0) && (ld_count <= instance->fw_supported_vd_count)) {
3917 memset(instance->ld_ids, 0xff, MAX_LOGICAL_DRIVES_EXT);
bdc6fb8d 3918
94cd65dd 3919 for (ld_index = 0; ld_index < ld_count; ld_index++) {
bdc6fb8d
YB		 3920 if (ci->ldList[ld_index].state != 0) {
3921 ids = ci->ldList[ld_index].ref.targetId;
3922 instance->ld_ids[ids] =
3923 ci->ldList[ld_index].ref.targetId;
3924 }
3925 }
3926 }
3927
3928 pci_free_consistent(instance->pdev,
3929 sizeof(struct MR_LD_LIST),
3930 ci,
3931 ci_h);
3932
4026e9aa 3933 megasas_return_cmd(instance, cmd);
bdc6fb8d
YB		 3934 return ret;
3935}
3936
21c9e160
AR		 3937/**
3938 * megasas_ld_list_query - Returns FW's ld_list structure
3939 * @instance: Adapter soft state
3940 * @ld_list: ld_list structure
3941 *
3942 * Issues an internal command (DCMD) to get the FW's controller PD
3943 * list structure. This information is mainly used to find out SYSTEM
3944 * supported by the FW.
3945 */
3946static int
3947megasas_ld_list_query(struct megasas_instance *instance, u8 query_type)
3948{
3949 int ret = 0, ld_index = 0, ids = 0;
3950 struct megasas_cmd *cmd;
3951 struct megasas_dcmd_frame *dcmd;
3952 struct MR_LD_TARGETID_LIST *ci;
3953 dma_addr_t ci_h = 0;
94cd65dd 3954 u32 tgtid_count;
21c9e160
AR		 3955
3956 cmd = megasas_get_cmd(instance);
3957
3958 if (!cmd) {
1be18254
BH		 3959 dev_warn(&instance->pdev->dev,
3960 "megasas_ld_list_query: Failed to get cmd\n");
21c9e160
AR		 3961 return -ENOMEM;
3962 }
3963
3964 dcmd = &cmd->frame->dcmd;
3965
3966 ci = pci_alloc_consistent(instance->pdev,
3967 sizeof(struct MR_LD_TARGETID_LIST), &ci_h);
3968
3969 if (!ci) {
1be18254
BH		 3970 dev_warn(&instance->pdev->dev,
3971 "Failed to alloc mem for ld_list_query\n");
21c9e160
AR		 3972 megasas_return_cmd(instance, cmd);
3973 return -ENOMEM;
3974 }
3975
3976 memset(ci, 0, sizeof(*ci));
3977 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
3978
3979 dcmd->mbox.b[0] = query_type;
51087a86
SS		 3980 if (instance->supportmax256vd)
3981 dcmd->mbox.b[2] = 1;
21c9e160
AR		 3982
3983 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 3984 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
21c9e160 3985 dcmd->sge_count = 1;
94cd65dd 3986 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
21c9e160 3987 dcmd->timeout = 0;
94cd65dd
SS		 3988 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
3989 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_LIST_QUERY);
3990 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
3991 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
21c9e160
AR		 3992 dcmd->pad_0 = 0;
3993
90dc9d98
SS		 3994 if (instance->ctrl_context && !instance->mask_interrupts)
3995 ret = megasas_issue_blocked_cmd(instance, cmd,
3996 MEGASAS_BLOCKED_CMD_TIMEOUT);
3997 else
3998 ret = megasas_issue_polled(instance, cmd);
21c9e160 3999
94cd65dd
SS		 4000 tgtid_count = le32_to_cpu(ci->count);
4001
51087a86 4002 if ((ret == 0) && (tgtid_count <= (instance->fw_supported_vd_count))) {
21c9e160 4003 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
94cd65dd 4004 for (ld_index = 0; ld_index < tgtid_count; ld_index++) {
21c9e160
AR		 4005 ids = ci->targetId[ld_index];
4006 instance->ld_ids[ids] = ci->targetId[ld_index];
4007 }
4008
4009 }
4010
4011 pci_free_consistent(instance->pdev, sizeof(struct MR_LD_TARGETID_LIST),
4012 ci, ci_h);
4013
4026e9aa 4014 megasas_return_cmd(instance, cmd);
21c9e160
AR		 4015
4016 return ret;
4017}
4018
d009b576
SS		 4019/*
4020 * megasas_update_ext_vd_details : Update details w.r.t Extended VD
4021 * instance : Controller's instance
4022*/
4023static void megasas_update_ext_vd_details(struct megasas_instance *instance)
4024{
4025 struct fusion_context *fusion;
4026 u32 old_map_sz;
4027 u32 new_map_sz;
4028
4029 fusion = instance->ctrl_context;
4030 /* For MFI based controllers return dummy success */
4031 if (!fusion)
4032 return;
4033
4034 instance->supportmax256vd =
4035 instance->ctrl_info->adapterOperations3.supportMaxExtLDs;
4036 /* Below is additional check to address future FW enhancement */
4037 if (instance->ctrl_info->max_lds > 64)
4038 instance->supportmax256vd = 1;
4039
4040 instance->drv_supported_vd_count = MEGASAS_MAX_LD_CHANNELS
4041 * MEGASAS_MAX_DEV_PER_CHANNEL;
4042 instance->drv_supported_pd_count = MEGASAS_MAX_PD_CHANNELS
4043 * MEGASAS_MAX_DEV_PER_CHANNEL;
4044 if (instance->supportmax256vd) {
4045 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES_EXT;
4046 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4047 } else {
4048 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
4049 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4050 }
d88da09a
SS		 4051
4052 dev_info(&instance->pdev->dev,
4053 "firmware type\t: %s\n",
4054 instance->supportmax256vd ? "Extended VD(240 VD)firmware" :
4055 "Legacy(64 VD) firmware");
d009b576 4056
da0dc9fb 4057 old_map_sz = sizeof(struct MR_FW_RAID_MAP) +
d009b576
SS		 4058 (sizeof(struct MR_LD_SPAN_MAP) *
4059 (instance->fw_supported_vd_count - 1));
da0dc9fb
BH		 4060 new_map_sz = sizeof(struct MR_FW_RAID_MAP_EXT);
4061 fusion->drv_map_sz = sizeof(struct MR_DRV_RAID_MAP) +
d009b576
SS		 4062 (sizeof(struct MR_LD_SPAN_MAP) *
4063 (instance->drv_supported_vd_count - 1));
4064
4065 fusion->max_map_sz = max(old_map_sz, new_map_sz);
4066
4067
4068 if (instance->supportmax256vd)
4069 fusion->current_map_sz = new_map_sz;
4070 else
4071 fusion->current_map_sz = old_map_sz;
d009b576
SS		 4072}
4073
c4a3e0a5
BS		 4074/**
4075 * megasas_get_controller_info - Returns FW's controller structure
4076 * @instance: Adapter soft state
c4a3e0a5
BS		 4077 *
4078 * Issues an internal command (DCMD) to get the FW's controller structure.
4079 * This information is mainly used to find out the maximum IO transfer per
4080 * command supported by the FW.
4081 */
51087a86 4082int
d009b576 4083megasas_get_ctrl_info(struct megasas_instance *instance)
c4a3e0a5
BS		 4084{
4085 int ret = 0;
4086 struct megasas_cmd *cmd;
4087 struct megasas_dcmd_frame *dcmd;
4088 struct megasas_ctrl_info *ci;
d009b576 4089 struct megasas_ctrl_info *ctrl_info;
c4a3e0a5
BS		 4090 dma_addr_t ci_h = 0;
4091
d009b576
SS		 4092 ctrl_info = instance->ctrl_info;
4093
c4a3e0a5
BS		 4094 cmd = megasas_get_cmd(instance);
4095
4096 if (!cmd) {
1be18254 4097 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a free cmd\n");
c4a3e0a5
BS		 4098 return -ENOMEM;
4099 }
4100
4101 dcmd = &cmd->frame->dcmd;
4102
4103 ci = pci_alloc_consistent(instance->pdev,
4104 sizeof(struct megasas_ctrl_info), &ci_h);
4105
4106 if (!ci) {
1be18254 4107 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for ctrl info\n");
c4a3e0a5
BS		 4108 megasas_return_cmd(instance, cmd);
4109 return -ENOMEM;
4110 }
4111
4112 memset(ci, 0, sizeof(*ci));
4113 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4114
4115 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4116 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
c4a3e0a5 4117 dcmd->sge_count = 1;
94cd65dd 4118 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 4119 dcmd->timeout = 0;
780a3762 4120 dcmd->pad_0 = 0;
94cd65dd
SS		 4121 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_ctrl_info));
4122 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_GET_INFO);
4123 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4124 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_ctrl_info));
51087a86 4125 dcmd->mbox.b[0] = 1;
c4a3e0a5 4126
90dc9d98
SS		 4127 if (instance->ctrl_context && !instance->mask_interrupts)
4128 ret = megasas_issue_blocked_cmd(instance, cmd,
4129 MEGASAS_BLOCKED_CMD_TIMEOUT);
4130 else
4131 ret = megasas_issue_polled(instance, cmd);
4132
d009b576 4133 if (!ret) {
c4a3e0a5 4134 memcpy(ctrl_info, ci, sizeof(struct megasas_ctrl_info));
d009b576
SS		 4135 le32_to_cpus((u32 *)&ctrl_info->properties.OnOffProperties);
4136 le32_to_cpus((u32 *)&ctrl_info->adapterOperations2);
4137 le32_to_cpus((u32 *)&ctrl_info->adapterOperations3);
4138 megasas_update_ext_vd_details(instance);
4026e9aa
SS		 4139 instance->is_imr = (ctrl_info->memory_size ? 0 : 1);
4140 dev_info(&instance->pdev->dev,
4141 "controller type\t: %s(%dMB)\n",
4142 instance->is_imr ? "iMR" : "MR",
4143 le16_to_cpu(ctrl_info->memory_size));
d009b576 4144 }
c4a3e0a5
BS		 4145
4146 pci_free_consistent(instance->pdev, sizeof(struct megasas_ctrl_info),
4147 ci, ci_h);
4148
4026e9aa 4149 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 4150 return ret;
4151}
4152
fc62b3fc
SS		 4153/*
4154 * megasas_set_crash_dump_params - Sends address of crash dump DMA buffer
4155 * to firmware
4156 *
4157 * @instance: Adapter soft state
4158 * @crash_buf_state - tell FW to turn ON/OFF crash dump feature
4159 MR_CRASH_BUF_TURN_OFF = 0
4160 MR_CRASH_BUF_TURN_ON = 1
4161 * @return 0 on success non-zero on failure.
4162 * Issues an internal command (DCMD) to set parameters for crash dump feature.
4163 * Driver will send address of crash dump DMA buffer and set mbox to tell FW
4164 * that driver supports crash dump feature. This DCMD will be sent only if
4165 * crash dump feature is supported by the FW.
4166 *
4167 */
4168int megasas_set_crash_dump_params(struct megasas_instance *instance,
4169 u8 crash_buf_state)
4170{
4171 int ret = 0;
4172 struct megasas_cmd *cmd;
4173 struct megasas_dcmd_frame *dcmd;
4174
4175 cmd = megasas_get_cmd(instance);
4176
4177 if (!cmd) {
4178 dev_err(&instance->pdev->dev, "Failed to get a free cmd\n");
4179 return -ENOMEM;
4180 }
4181
4182
4183 dcmd = &cmd->frame->dcmd;
4184
4185 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4186 dcmd->mbox.b[0] = crash_buf_state;
4187 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4188 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
fc62b3fc
SS		 4189 dcmd->sge_count = 1;
4190 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
4191 dcmd->timeout = 0;
4192 dcmd->pad_0 = 0;
4193 dcmd->data_xfer_len = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4194 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SET_CRASH_DUMP_PARAMS);
4195 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->crash_dump_h);
4196 dcmd->sgl.sge32[0].length = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4197
90dc9d98
SS		 4198 if (instance->ctrl_context && !instance->mask_interrupts)
4199 ret = megasas_issue_blocked_cmd(instance, cmd,
4200 MEGASAS_BLOCKED_CMD_TIMEOUT);
fc62b3fc 4201 else
90dc9d98
SS		 4202 ret = megasas_issue_polled(instance, cmd);
4203
4026e9aa 4204 megasas_return_cmd(instance, cmd);
fc62b3fc
SS		 4205 return ret;
4206}
4207
31ea7088 4208/**
4209 * megasas_issue_init_mfi - Initializes the FW
4210 * @instance: Adapter soft state
4211 *
4212 * Issues the INIT MFI cmd
4213 */
4214static int
4215megasas_issue_init_mfi(struct megasas_instance *instance)
4216{
9ab9ed38 4217 __le32 context;
31ea7088 4218 struct megasas_cmd *cmd;
31ea7088 4219 struct megasas_init_frame *init_frame;
4220 struct megasas_init_queue_info *initq_info;
4221 dma_addr_t init_frame_h;
4222 dma_addr_t initq_info_h;
4223
4224 /*
4225 * Prepare a init frame. Note the init frame points to queue info
4226 * structure. Each frame has SGL allocated after first 64 bytes. For
4227 * this frame - since we don't need any SGL - we use SGL's space as
4228 * queue info structure
4229 *
4230 * We will not get a NULL command below. We just created the pool.
4231 */
4232 cmd = megasas_get_cmd(instance);
4233
4234 init_frame = (struct megasas_init_frame *)cmd->frame;
4235 initq_info = (struct megasas_init_queue_info *)
4236 ((unsigned long)init_frame + 64);
4237
4238 init_frame_h = cmd->frame_phys_addr;
4239 initq_info_h = init_frame_h + 64;
4240
4241 context = init_frame->context;
4242 memset(init_frame, 0, MEGAMFI_FRAME_SIZE);
4243 memset(initq_info, 0, sizeof(struct megasas_init_queue_info));
4244 init_frame->context = context;
4245
94cd65dd
SS		 4246 initq_info->reply_queue_entries = cpu_to_le32(instance->max_fw_cmds + 1);
4247 initq_info->reply_queue_start_phys_addr_lo = cpu_to_le32(instance->reply_queue_h);
31ea7088 4248
94cd65dd
SS		 4249 initq_info->producer_index_phys_addr_lo = cpu_to_le32(instance->producer_h);
4250 initq_info->consumer_index_phys_addr_lo = cpu_to_le32(instance->consumer_h);
31ea7088 4251
4252 init_frame->cmd = MFI_CMD_INIT;
2be2a988 4253 init_frame->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 4254 init_frame->queue_info_new_phys_addr_lo =
4255 cpu_to_le32(lower_32_bits(initq_info_h));
4256 init_frame->queue_info_new_phys_addr_hi =
4257 cpu_to_le32(upper_32_bits(initq_info_h));
31ea7088 4258
94cd65dd 4259 init_frame->data_xfer_len = cpu_to_le32(sizeof(struct megasas_init_queue_info));
31ea7088 4260
4261 /*
4262 * disable the intr before firing the init frame to FW
4263 */
d46a3ad6 4264 instance->instancet->disable_intr(instance);
31ea7088 4265
4266 /*
4267 * Issue the init frame in polled mode
4268 */
4269
4270 if (megasas_issue_polled(instance, cmd)) {
1be18254 4271 dev_err(&instance->pdev->dev, "Failed to init firmware\n");
31ea7088 4272 megasas_return_cmd(instance, cmd);
4273 goto fail_fw_init;
4274 }
4275
4276 megasas_return_cmd(instance, cmd);
4277
4278 return 0;
4279
4280fail_fw_init:
4281 return -EINVAL;
4282}
4283
cd50ba8e
AR		 4284static u32
4285megasas_init_adapter_mfi(struct megasas_instance *instance)
c4a3e0a5 4286{
cd50ba8e 4287 struct megasas_register_set __iomem *reg_set;
c4a3e0a5
BS		 4288 u32 context_sz;
4289 u32 reply_q_sz;
c4a3e0a5
BS		 4290
4291 reg_set = instance->reg_set;
4292
c4a3e0a5
BS		 4293 /*
4294 * Get various operational parameters from status register
4295 */
1341c939 4296 instance->max_fw_cmds = instance->instancet->read_fw_status_reg(reg_set) & 0x00FFFF;
e3bbff9f
SP		 4297 /*
4298 * Reduce the max supported cmds by 1. This is to ensure that the
4299 * reply_q_sz (1 more than the max cmd that driver may send)
4300 * does not exceed max cmds that the FW can support
4301 */
4302 instance->max_fw_cmds = instance->max_fw_cmds-1;
9c915a8c 4303 instance->max_mfi_cmds = instance->max_fw_cmds;
0d49016b 4304 instance->max_num_sge = (instance->instancet->read_fw_status_reg(reg_set) & 0xFF0000) >>
1341c939 4305 0x10;
f26ac3a1
SS		 4306 /*
4307 * For MFI skinny adapters, MEGASAS_SKINNY_INT_CMDS commands
4308 * are reserved for IOCTL + driver's internal DCMDs.
4309 */
4310 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
4311 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
4312 instance->max_scsi_cmds = (instance->max_fw_cmds -
4313 MEGASAS_SKINNY_INT_CMDS);
4314 sema_init(&instance->ioctl_sem, MEGASAS_SKINNY_INT_CMDS);
4315 } else {
4316 instance->max_scsi_cmds = (instance->max_fw_cmds -
4317 MEGASAS_INT_CMDS);
4318 sema_init(&instance->ioctl_sem, (MEGASAS_MFI_IOCTL_CMDS));
4319 }
4320
c4a3e0a5
BS		 4321 /*
4322 * Create a pool of commands
4323 */
4324 if (megasas_alloc_cmds(instance))
4325 goto fail_alloc_cmds;
4326
4327 /*
4328 * Allocate memory for reply queue. Length of reply queue should
4329 * be _one_ more than the maximum commands handled by the firmware.
4330 *
4331 * Note: When FW completes commands, it places corresponding contex
4332 * values in this circular reply queue. This circular queue is a fairly
4333 * typical producer-consumer queue. FW is the producer (of completed
4334 * commands) and the driver is the consumer.
4335 */
4336 context_sz = sizeof(u32);
4337 reply_q_sz = context_sz * (instance->max_fw_cmds + 1);
4338
4339 instance->reply_queue = pci_alloc_consistent(instance->pdev,
4340 reply_q_sz,
4341 &instance->reply_queue_h);
4342
4343 if (!instance->reply_queue) {
1be18254 4344 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Out of DMA mem for reply queue\n");
c4a3e0a5
BS		 4345 goto fail_reply_queue;
4346 }
4347
31ea7088 4348 if (megasas_issue_init_mfi(instance))
c4a3e0a5 4349 goto fail_fw_init;
c4a3e0a5 4350
d009b576 4351 if (megasas_get_ctrl_info(instance)) {
51087a86
SS		 4352 dev_err(&instance->pdev->dev, "(%d): Could get controller info "
4353 "Fail from %s %d\n", instance->unique_id,
4354 __func__, __LINE__);
4355 goto fail_fw_init;
4356 }
4357
39a98554 4358 instance->fw_support_ieee = 0;
4359 instance->fw_support_ieee =
4360 (instance->instancet->read_fw_status_reg(reg_set) &
4361 0x04000000);
4362
1be18254 4363 dev_notice(&instance->pdev->dev, "megasas_init_mfi: fw_support_ieee=%d",
39a98554 4364 instance->fw_support_ieee);
4365
4366 if (instance->fw_support_ieee)
4367 instance->flag_ieee = 1;
4368
cd50ba8e
AR		 4369 return 0;
4370
4371fail_fw_init:
4372
4373 pci_free_consistent(instance->pdev, reply_q_sz,
4374 instance->reply_queue, instance->reply_queue_h);
4375fail_reply_queue:
4376 megasas_free_cmds(instance);
4377
4378fail_alloc_cmds:
cd50ba8e
AR		 4379 return 1;
4380}
4381
d3557fc8
SS		 4382/*
4383 * megasas_setup_irqs_msix - register legacy interrupts.
4384 * @instance: Adapter soft state
4385 *
4386 * Do not enable interrupt, only setup ISRs.
4387 *
4388 * Return 0 on success.
4389 */
4390static int
4391megasas_setup_irqs_ioapic(struct megasas_instance *instance)
4392{
4393 struct pci_dev *pdev;
4394
4395 pdev = instance->pdev;
4396 instance->irq_context[0].instance = instance;
4397 instance->irq_context[0].MSIxIndex = 0;
4398 if (request_irq(pdev->irq, instance->instancet->service_isr,
4399 IRQF_SHARED, "megasas", &instance->irq_context[0])) {
4400 dev_err(&instance->pdev->dev,
4401 "Failed to register IRQ from %s %d\n",
4402 __func__, __LINE__);
4403 return -1;
4404 }
4405 return 0;
4406}
4407
4408/**
4409 * megasas_setup_irqs_msix - register MSI-x interrupts.
4410 * @instance: Adapter soft state
4411 * @is_probe: Driver probe check
4412 *
4413 * Do not enable interrupt, only setup ISRs.
4414 *
4415 * Return 0 on success.
4416 */
4417static int
4418megasas_setup_irqs_msix(struct megasas_instance *instance, u8 is_probe)
4419{
4420 int i, j, cpu;
4421 struct pci_dev *pdev;
4422
4423 pdev = instance->pdev;
4424
4425 /* Try MSI-x */
4426 cpu = cpumask_first(cpu_online_mask);
4427 for (i = 0; i < instance->msix_vectors; i++) {
4428 instance->irq_context[i].instance = instance;
4429 instance->irq_context[i].MSIxIndex = i;
4430 if (request_irq(instance->msixentry[i].vector,
4431 instance->instancet->service_isr, 0, "megasas",
4432 &instance->irq_context[i])) {
4433 dev_err(&instance->pdev->dev,
4434 "Failed to register IRQ for vector %d.\n", i);
4435 for (j = 0; j < i; j++) {
4436 if (smp_affinity_enable)
4437 irq_set_affinity_hint(
4438 instance->msixentry[j].vector, NULL);
4439 free_irq(instance->msixentry[j].vector,
4440 &instance->irq_context[j]);
4441 }
4442 /* Retry irq register for IO_APIC*/
4443 instance->msix_vectors = 0;
4444 if (is_probe)
4445 return megasas_setup_irqs_ioapic(instance);
4446 else
4447 return -1;
4448 }
4449 if (smp_affinity_enable) {
4450 if (irq_set_affinity_hint(instance->msixentry[i].vector,
4451 get_cpu_mask(cpu)))
4452 dev_err(&instance->pdev->dev,
4453 "Failed to set affinity hint"
4454 " for cpu %d\n", cpu);
4455 cpu = cpumask_next(cpu, cpu_online_mask);
4456 }
4457 }
4458 return 0;
4459}
4460
4461/*
4462 * megasas_destroy_irqs- unregister interrupts.
4463 * @instance: Adapter soft state
4464 * return: void
4465 */
4466static void
4467megasas_destroy_irqs(struct megasas_instance *instance) {
4468
4469 int i;
4470
4471 if (instance->msix_vectors)
4472 for (i = 0; i < instance->msix_vectors; i++) {
4473 if (smp_affinity_enable)
4474 irq_set_affinity_hint(
4475 instance->msixentry[i].vector, NULL);
4476 free_irq(instance->msixentry[i].vector,
4477 &instance->irq_context[i]);
4478 }
4479 else
4480 free_irq(instance->pdev->irq, &instance->irq_context[0]);
4481}
4482
cd50ba8e
AR		 4483/**
4484 * megasas_init_fw - Initializes the FW
4485 * @instance: Adapter soft state
4486 *
4487 * This is the main function for initializing firmware
4488 */
4489
4490static int megasas_init_fw(struct megasas_instance *instance)
4491{
4492 u32 max_sectors_1;
4493 u32 max_sectors_2;
d46a3ad6 4494 u32 tmp_sectors, msix_enable, scratch_pad_2;
11f8a7b3 4495 resource_size_t base_addr;
cd50ba8e 4496 struct megasas_register_set __iomem *reg_set;
51087a86 4497 struct megasas_ctrl_info *ctrl_info = NULL;
cd50ba8e 4498 unsigned long bar_list;
d46a3ad6 4499 int i, loop, fw_msix_count = 0;
229fe47c 4500 struct IOV_111 *iovPtr;
cd50ba8e
AR		 4501
4502 /* Find first memory bar */
4503 bar_list = pci_select_bars(instance->pdev, IORESOURCE_MEM);
4504 instance->bar = find_first_bit(&bar_list, sizeof(unsigned long));
cd50ba8e
AR		 4505 if (pci_request_selected_regions(instance->pdev, instance->bar,
4506 "megasas: LSI")) {
1be18254 4507 dev_printk(KERN_DEBUG, &instance->pdev->dev, "IO memory region busy!\n");
cd50ba8e
AR		 4508 return -EBUSY;
4509 }
4510
11f8a7b3
BC		 4511 base_addr = pci_resource_start(instance->pdev, instance->bar);
4512 instance->reg_set = ioremap_nocache(base_addr, 8192);
cd50ba8e
AR		 4513
4514 if (!instance->reg_set) {
1be18254 4515 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to map IO mem\n");
cd50ba8e
AR		 4516 goto fail_ioremap;
4517 }
4518
4519 reg_set = instance->reg_set;
4520
4521 switch (instance->pdev->device) {
9c915a8c 4522 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 4523 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 4524 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 4525 case PCI_DEVICE_ID_LSI_FURY:
9c915a8c
AR		 4526 instance->instancet = &megasas_instance_template_fusion;
4527 break;
cd50ba8e
AR		 4528 case PCI_DEVICE_ID_LSI_SAS1078R:
4529 case PCI_DEVICE_ID_LSI_SAS1078DE:
4530 instance->instancet = &megasas_instance_template_ppc;
4531 break;
4532 case PCI_DEVICE_ID_LSI_SAS1078GEN2:
4533 case PCI_DEVICE_ID_LSI_SAS0079GEN2:
4534 instance->instancet = &megasas_instance_template_gen2;
4535 break;
4536 case PCI_DEVICE_ID_LSI_SAS0073SKINNY:
4537 case PCI_DEVICE_ID_LSI_SAS0071SKINNY:
4538 instance->instancet = &megasas_instance_template_skinny;
4539 break;
4540 case PCI_DEVICE_ID_LSI_SAS1064R:
4541 case PCI_DEVICE_ID_DELL_PERC5:
4542 default:
4543 instance->instancet = &megasas_instance_template_xscale;
4544 break;
4545 }
4546
6431f5d7
SS		 4547 if (megasas_transition_to_ready(instance, 0)) {
4548 atomic_set(&instance->fw_reset_no_pci_access, 1);
4549 instance->instancet->adp_reset
4550 (instance, instance->reg_set);
4551 atomic_set(&instance->fw_reset_no_pci_access, 0);
4552 dev_info(&instance->pdev->dev,
1be18254 4553 "FW restarted successfully from %s!\n",
6431f5d7
SS		 4554 __func__);
4555
4556 /*waitting for about 30 second before retry*/
4557 ssleep(30);
4558
4559 if (megasas_transition_to_ready(instance, 0))
4560 goto fail_ready_state;
4561 }
cd50ba8e 4562
d46a3ad6
SS		 4563 /*
4564 * MSI-X host index 0 is common for all adapter.
4565 * It is used for all MPT based Adapters.
4566 */
4567 instance->reply_post_host_index_addr[0] =
8a232bb3 4568 (u32 __iomem *)((u8 __iomem *)instance->reg_set +
d46a3ad6
SS		 4569 MPI2_REPLY_POST_HOST_INDEX_OFFSET);
4570
3f1abce4
AR		 4571 /* Check if MSI-X is supported while in ready state */
4572 msix_enable = (instance->instancet->read_fw_status_reg(reg_set) &
4573 0x4000000) >> 0x1a;
c8e858fe 4574 if (msix_enable && !msix_disable) {
d46a3ad6
SS		 4575 scratch_pad_2 = readl
4576 (&instance->reg_set->outbound_scratch_pad_2);
c8e858fe 4577 /* Check max MSI-X vectors */
229fe47c
AR		 4578 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
4579 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA)) {
d46a3ad6
SS		 4580 instance->msix_vectors = (scratch_pad_2
4581 & MR_MAX_REPLY_QUEUES_OFFSET) + 1;
4582 fw_msix_count = instance->msix_vectors;
079eaddf
AR		 4583 if (msix_vectors)
4584 instance->msix_vectors =
4585 min(msix_vectors,
4586 instance->msix_vectors);
d46a3ad6
SS		 4587 } else if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER)
4588 || (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) {
4589 /* Invader/Fury supports more than 8 MSI-X */
4590 instance->msix_vectors = ((scratch_pad_2
4591 & MR_MAX_REPLY_QUEUES_EXT_OFFSET)
4592 >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1;
4593 fw_msix_count = instance->msix_vectors;
4594 /* Save 1-15 reply post index address to local memory
4595 * Index 0 is already saved from reg offset
4596 * MPI2_REPLY_POST_HOST_INDEX_OFFSET
4597 */
4598 for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; loop++) {
4599 instance->reply_post_host_index_addr[loop] =
8a232bb3
CH		 4600 (u32 __iomem *)
4601 ((u8 __iomem *)instance->reg_set +
d46a3ad6
SS		 4602 MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET
4603 + (loop * 0x10));
4604 }
4605 if (msix_vectors)
4606 instance->msix_vectors = min(msix_vectors,
4607 instance->msix_vectors);
c8e858fe
AR		 4608 } else
4609 instance->msix_vectors = 1;
4610 /* Don't bother allocating more MSI-X vectors than cpus */
4611 instance->msix_vectors = min(instance->msix_vectors,
4612 (unsigned int)num_online_cpus());
4613 for (i = 0; i < instance->msix_vectors; i++)
4614 instance->msixentry[i].entry = i;
8ae80ed1
AG		 4615 i = pci_enable_msix_range(instance->pdev, instance->msixentry,
4616 1, instance->msix_vectors);
c12de882 4617 if (i > 0)
8ae80ed1
AG		 4618 instance->msix_vectors = i;
4619 else
c8e858fe
AR		 4620 instance->msix_vectors = 0;
4621 }
3f1abce4 4622
258c3af2
TH		 4623 dev_info(&instance->pdev->dev,
4624 "firmware supports msix\t: (%d)", fw_msix_count);
4625 dev_info(&instance->pdev->dev,
4626 "current msix/online cpus\t: (%d/%d)\n",
4627 instance->msix_vectors, (unsigned int)num_online_cpus());
d3557fc8 4628
258c3af2
TH		 4629 if (instance->msix_vectors ?
4630 megasas_setup_irqs_msix(instance, 1) :
4631 megasas_setup_irqs_ioapic(instance))
4632 goto fail_setup_irqs;
3f1abce4 4633
51087a86
SS		 4634 instance->ctrl_info = kzalloc(sizeof(struct megasas_ctrl_info),
4635 GFP_KERNEL);
4636 if (instance->ctrl_info == NULL)
4637 goto fail_init_adapter;
4638
4639 /*
4640 * Below are default value for legacy Firmware.
4641 * non-fusion based controllers
4642 */
4643 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
4644 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
cd50ba8e
AR		 4645 /* Get operational params, sge flags, send init cmd to controller */
4646 if (instance->instancet->init_adapter(instance))
eb1b1237 4647 goto fail_init_adapter;
cd50ba8e 4648
258c3af2
TH		 4649 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
4650 (unsigned long)instance);
4651
d3557fc8 4652 instance->instancet->enable_intr(instance);
cd50ba8e 4653
1be18254 4654 dev_err(&instance->pdev->dev, "INIT adapter done\n");
cd50ba8e 4655
39a98554 4656 /** for passthrough
da0dc9fb
BH		 4657 * the following function will get the PD LIST.
4658 */
4659 memset(instance->pd_list, 0,
81e403ce 4660 (MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)));
58968fc8 4661 if (megasas_get_pd_list(instance) < 0) {
1be18254 4662 dev_err(&instance->pdev->dev, "failed to get PD list\n");
d3557fc8 4663 goto fail_get_pd_list;
58968fc8 4664 }
81e403ce 4665
bdc6fb8d 4666 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
21c9e160
AR		 4667 if (megasas_ld_list_query(instance,
4668 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
4669 megasas_get_ld_list(instance);
bdc6fb8d 4670
c4a3e0a5
BS		 4671 /*
4672 * Compute the max allowed sectors per IO: The controller info has two
4673 * limits on max sectors. Driver should use the minimum of these two.
4674 *
4675 * 1 << stripe_sz_ops.min = max sectors per strip
4676 *
4677 * Note that older firmwares ( < FW ver 30) didn't report information
4678 * to calculate max_sectors_1. So the number ended up as zero always.
4679 */
14faea9f 4680 tmp_sectors = 0;
51087a86 4681 ctrl_info = instance->ctrl_info;
c4a3e0a5 4682
51087a86
SS		 4683 max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) *
4684 le16_to_cpu(ctrl_info->max_strips_per_io);
4685 max_sectors_2 = le32_to_cpu(ctrl_info->max_request_size);
404a8a1a 4686
da0dc9fb 4687 tmp_sectors = min_t(u32, max_sectors_1, max_sectors_2);
bc93d425 4688
51087a86
SS		 4689 instance->disableOnlineCtrlReset =
4690 ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset;
51087a86
SS		 4691 instance->mpio = ctrl_info->adapterOperations2.mpio;
4692 instance->UnevenSpanSupport =
4693 ctrl_info->adapterOperations2.supportUnevenSpans;
4694 if (instance->UnevenSpanSupport) {
4695 struct fusion_context *fusion = instance->ctrl_context;
51087a86
SS		 4696 if (MR_ValidateMapInfo(instance))
4697 fusion->fast_path_io = 1;
4698 else
4699 fusion->fast_path_io = 0;
fc62b3fc 4700
51087a86
SS		 4701 }
4702 if (ctrl_info->host_interface.SRIOV) {
4703 if (!ctrl_info->adapterOperations2.activePassive)
4704 instance->PlasmaFW111 = 1;
fc62b3fc 4705
51087a86
SS		 4706 if (!instance->PlasmaFW111)
4707 instance->requestorId =
4708 ctrl_info->iov.requestorId;
4709 else {
4710 iovPtr = (struct IOV_111 *)((unsigned char *)ctrl_info + IOV_111_OFFSET);
4711 instance->requestorId = iovPtr->requestorId;
fc62b3fc 4712 }
51087a86
SS		 4713 dev_warn(&instance->pdev->dev, "I am VF "
4714 "requestorId %d\n", instance->requestorId);
4715 }
4716
51087a86
SS		 4717 instance->crash_dump_fw_support =
4718 ctrl_info->adapterOperations3.supportCrashDump;
4719 instance->crash_dump_drv_support =
4720 (instance->crash_dump_fw_support &&
4721 instance->crash_dump_buf);
d88da09a 4722 if (instance->crash_dump_drv_support)
51087a86
SS		 4723 megasas_set_crash_dump_params(instance,
4724 MR_CRASH_BUF_TURN_OFF);
4725
d88da09a 4726 else {
51087a86
SS		 4727 if (instance->crash_dump_buf)
4728 pci_free_consistent(instance->pdev,
4729 CRASH_DMA_BUF_SIZE,
4730 instance->crash_dump_buf,
4731 instance->crash_dump_h);
4732 instance->crash_dump_buf = NULL;
14faea9f 4733 }
7497cde8
SS		 4734
4735 instance->secure_jbod_support =
4736 ctrl_info->adapterOperations3.supportSecurityonJBOD;
d88da09a
SS		 4737
4738 dev_info(&instance->pdev->dev,
4739 "pci id\t\t: (0x%04x)/(0x%04x)/(0x%04x)/(0x%04x)\n",
4740 le16_to_cpu(ctrl_info->pci.vendor_id),
4741 le16_to_cpu(ctrl_info->pci.device_id),
4742 le16_to_cpu(ctrl_info->pci.sub_vendor_id),
4743 le16_to_cpu(ctrl_info->pci.sub_device_id));
4744 dev_info(&instance->pdev->dev, "unevenspan support : %s\n",
4745 instance->UnevenSpanSupport ? "yes" : "no");
4746 dev_info(&instance->pdev->dev, "disable ocr : %s\n",
4747 instance->disableOnlineCtrlReset ? "yes" : "no");
4748 dev_info(&instance->pdev->dev, "firmware crash dump : %s\n",
4749 instance->crash_dump_drv_support ? "yes" : "no");
4750 dev_info(&instance->pdev->dev, "secure jbod : %s\n",
4751 instance->secure_jbod_support ? "yes" : "no");
4752
4753
14faea9f 4754 instance->max_sectors_per_req = instance->max_num_sge *
4755 PAGE_SIZE / 512;
4756 if (tmp_sectors && (instance->max_sectors_per_req > tmp_sectors))
4757 instance->max_sectors_per_req = tmp_sectors;
c4a3e0a5 4758
ae09a6c1
SS		 4759 /* Check for valid throttlequeuedepth module parameter */
4760 if (throttlequeuedepth &&
4761 throttlequeuedepth <= instance->max_scsi_cmds)
4762 instance->throttlequeuedepth = throttlequeuedepth;
4763 else
4764 instance->throttlequeuedepth =
4765 MEGASAS_THROTTLE_QUEUE_DEPTH;
4766
ad84db2e 4767
229fe47c
AR		 4768 /* Launch SR-IOV heartbeat timer */
4769 if (instance->requestorId) {
4770 if (!megasas_sriov_start_heartbeat(instance, 1))
4771 megasas_start_timer(instance,
4772 &instance->sriov_heartbeat_timer,
4773 megasas_sriov_heartbeat_handler,
4774 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
4775 else
4776 instance->skip_heartbeat_timer_del = 1;
4777 }
4778
c4a3e0a5
BS		 4779 return 0;
4780
d3557fc8
SS		 4781fail_get_pd_list:
4782 instance->instancet->disable_intr(instance);
eb1b1237 4783fail_init_adapter:
d3557fc8
SS		 4784 megasas_destroy_irqs(instance);
4785fail_setup_irqs:
4786 if (instance->msix_vectors)
4787 pci_disable_msix(instance->pdev);
4788 instance->msix_vectors = 0;
cd50ba8e 4789fail_ready_state:
51087a86
SS		 4790 kfree(instance->ctrl_info);
4791 instance->ctrl_info = NULL;
c4a3e0a5
BS		 4792 iounmap(instance->reg_set);
4793
4794 fail_ioremap:
b6d5d880 4795 pci_release_selected_regions(instance->pdev, instance->bar);
c4a3e0a5
BS		 4796
4797 return -EINVAL;
4798}
4799
4800/**
4801 * megasas_release_mfi - Reverses the FW initialization
4b63b286 4802 * @instance: Adapter soft state
c4a3e0a5
BS		 4803 */
4804static void megasas_release_mfi(struct megasas_instance *instance)
4805{
9c915a8c 4806 u32 reply_q_sz = sizeof(u32) *(instance->max_mfi_cmds + 1);
c4a3e0a5 4807
9c915a8c
AR		 4808 if (instance->reply_queue)
4809 pci_free_consistent(instance->pdev, reply_q_sz,
c4a3e0a5
BS		 4810 instance->reply_queue, instance->reply_queue_h);
4811
4812 megasas_free_cmds(instance);
4813
4814 iounmap(instance->reg_set);
4815
b6d5d880 4816 pci_release_selected_regions(instance->pdev, instance->bar);
c4a3e0a5
BS		 4817}
4818
4819/**
4820 * megasas_get_seq_num - Gets latest event sequence numbers
4821 * @instance: Adapter soft state
4822 * @eli: FW event log sequence numbers information
4823 *
4824 * FW maintains a log of all events in a non-volatile area. Upper layers would
4825 * usually find out the latest sequence number of the events, the seq number at
4826 * the boot etc. They would "read" all the events below the latest seq number
4827 * by issuing a direct fw cmd (DCMD). For the future events (beyond latest seq
4828 * number), they would subsribe to AEN (asynchronous event notification) and
4829 * wait for the events to happen.
4830 */
4831static int
4832megasas_get_seq_num(struct megasas_instance *instance,
4833 struct megasas_evt_log_info *eli)
4834{
4835 struct megasas_cmd *cmd;
4836 struct megasas_dcmd_frame *dcmd;
4837 struct megasas_evt_log_info *el_info;
4838 dma_addr_t el_info_h = 0;
4839
4840 cmd = megasas_get_cmd(instance);
4841
4842 if (!cmd) {
4843 return -ENOMEM;
4844 }
4845
4846 dcmd = &cmd->frame->dcmd;
4847 el_info = pci_alloc_consistent(instance->pdev,
4848 sizeof(struct megasas_evt_log_info),
4849 &el_info_h);
4850
4851 if (!el_info) {
4852 megasas_return_cmd(instance, cmd);
4853 return -ENOMEM;
4854 }
4855
4856 memset(el_info, 0, sizeof(*el_info));
4857 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4858
4859 dcmd->cmd = MFI_CMD_DCMD;
4860 dcmd->cmd_status = 0x0;
4861 dcmd->sge_count = 1;
94cd65dd 4862 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 4863 dcmd->timeout = 0;
780a3762 4864 dcmd->pad_0 = 0;
94cd65dd
SS		 4865 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_log_info));
4866 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_GET_INFO);
4867 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(el_info_h);
4868 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_log_info));
c4a3e0a5 4869
cfbe7554
SS		 4870 if (megasas_issue_blocked_cmd(instance, cmd, 30))
4871 dev_err(&instance->pdev->dev, "Command timedout"
4872 "from %s\n", __func__);
4873 else {
4874 /*
4875 * Copy the data back into callers buffer
4876 */
48100b0e
CH		 4877 eli->newest_seq_num = el_info->newest_seq_num;
4878 eli->oldest_seq_num = el_info->oldest_seq_num;
4879 eli->clear_seq_num = el_info->clear_seq_num;
4880 eli->shutdown_seq_num = el_info->shutdown_seq_num;
4881 eli->boot_seq_num = el_info->boot_seq_num;
cfbe7554 4882 }
c4a3e0a5
BS		 4883
4884 pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info),
4885 el_info, el_info_h);
4886
4026e9aa 4887 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 4888
4889 return 0;
4890}
4891
4892/**
4893 * megasas_register_aen - Registers for asynchronous event notification
4894 * @instance: Adapter soft state
4895 * @seq_num: The starting sequence number
4896 * @class_locale: Class of the event
4897 *
4898 * This function subscribes for AEN for events beyond the @seq_num. It requests
4899 * to be notified if and only if the event is of type @class_locale
4900 */
4901static int
4902megasas_register_aen(struct megasas_instance *instance, u32 seq_num,
4903 u32 class_locale_word)
4904{
4905 int ret_val;
4906 struct megasas_cmd *cmd;
4907 struct megasas_dcmd_frame *dcmd;
4908 union megasas_evt_class_locale curr_aen;
4909 union megasas_evt_class_locale prev_aen;
4910
4911 /*
4912 * If there an AEN pending already (aen_cmd), check if the
4913 * class_locale of that pending AEN is inclusive of the new
4914 * AEN request we currently have. If it is, then we don't have
4915 * to do anything. In other words, whichever events the current
4916 * AEN request is subscribing to, have already been subscribed
4917 * to.
4918 *
4919 * If the old_cmd is _not_ inclusive, then we have to abort
4920 * that command, form a class_locale that is superset of both
4921 * old and current and re-issue to the FW
4922 */
4923
4924 curr_aen.word = class_locale_word;
4925
4926 if (instance->aen_cmd) {
4927
a9555534
CH		 4928 prev_aen.word =
4929 le32_to_cpu(instance->aen_cmd->frame->dcmd.mbox.w[1]);
c4a3e0a5
BS		 4930
4931 /*
4932 * A class whose enum value is smaller is inclusive of all
4933 * higher values. If a PROGRESS (= -1) was previously
4934 * registered, then a new registration requests for higher
4935 * classes need not be sent to FW. They are automatically
4936 * included.
4937 *
4938 * Locale numbers don't have such hierarchy. They are bitmap
4939 * values
4940 */
4941 if ((prev_aen.members.class <= curr_aen.members.class) &&
3993a862 4942 !((prev_aen.members.locale & curr_aen.members.locale) ^
c4a3e0a5
BS		 4943 curr_aen.members.locale)) {
4944 /*
4945 * Previously issued event registration includes
4946 * current request. Nothing to do.
4947 */
4948 return 0;
4949 } else {
3993a862 4950 curr_aen.members.locale |= prev_aen.members.locale;
c4a3e0a5
BS		 4951
4952 if (prev_aen.members.class < curr_aen.members.class)
4953 curr_aen.members.class = prev_aen.members.class;
4954
4955 instance->aen_cmd->abort_aen = 1;
4956 ret_val = megasas_issue_blocked_abort_cmd(instance,
4957 instance->
cfbe7554 4958 aen_cmd, 30);
c4a3e0a5
BS		 4959
4960 if (ret_val) {
1be18254 4961 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to abort "
c4a3e0a5
BS		 4962 "previous AEN command\n");
4963 return ret_val;
4964 }
4965 }
4966 }
4967
4968 cmd = megasas_get_cmd(instance);
4969
4970 if (!cmd)
4971 return -ENOMEM;
4972
4973 dcmd = &cmd->frame->dcmd;
4974
4975 memset(instance->evt_detail, 0, sizeof(struct megasas_evt_detail));
4976
4977 /*
4978 * Prepare DCMD for aen registration
4979 */
4980 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4981
4982 dcmd->cmd = MFI_CMD_DCMD;
4983 dcmd->cmd_status = 0x0;
4984 dcmd->sge_count = 1;
94cd65dd 4985 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 4986 dcmd->timeout = 0;
780a3762 4987 dcmd->pad_0 = 0;
94cd65dd
SS		 4988 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_detail));
4989 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_WAIT);
4990 dcmd->mbox.w[0] = cpu_to_le32(seq_num);
39a98554 4991 instance->last_seq_num = seq_num;
94cd65dd
SS		 4992 dcmd->mbox.w[1] = cpu_to_le32(curr_aen.word);
4993 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->evt_detail_h);
4994 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_detail));
c4a3e0a5 4995
f4c9a131
YB		 4996 if (instance->aen_cmd != NULL) {
4997 megasas_return_cmd(instance, cmd);
4998 return 0;
4999 }
5000
c4a3e0a5
BS		 5001 /*
5002 * Store reference to the cmd used to register for AEN. When an
5003 * application wants us to register for AEN, we have to abort this
5004 * cmd and re-register with a new EVENT LOCALE supplied by that app
5005 */
5006 instance->aen_cmd = cmd;
5007
5008 /*
5009 * Issue the aen registration frame
5010 */
9c915a8c 5011 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5
BS		 5012
5013 return 0;
5014}
5015
5016/**
5017 * megasas_start_aen - Subscribes to AEN during driver load time
5018 * @instance: Adapter soft state
5019 */
5020static int megasas_start_aen(struct megasas_instance *instance)
5021{
5022 struct megasas_evt_log_info eli;
5023 union megasas_evt_class_locale class_locale;
5024
5025 /*
5026 * Get the latest sequence number from FW
5027 */
5028 memset(&eli, 0, sizeof(eli));
5029
5030 if (megasas_get_seq_num(instance, &eli))
5031 return -1;
5032
5033 /*
5034 * Register AEN with FW for latest sequence number plus 1
5035 */
5036 class_locale.members.reserved = 0;
5037 class_locale.members.locale = MR_EVT_LOCALE_ALL;
5038 class_locale.members.class = MR_EVT_CLASS_DEBUG;
5039
94cd65dd 5040 return megasas_register_aen(instance,
48100b0e 5041 le32_to_cpu(eli.newest_seq_num) + 1,
94cd65dd 5042 class_locale.word);
c4a3e0a5
BS		 5043}
5044
5045/**
5046 * megasas_io_attach - Attaches this driver to SCSI mid-layer
5047 * @instance: Adapter soft state
5048 */
5049static int megasas_io_attach(struct megasas_instance *instance)
5050{
5051 struct Scsi_Host *host = instance->host;
da0dc9fb 5052 u32 error;
c4a3e0a5
BS		 5053
5054 /*
5055 * Export parameters required by SCSI mid-layer
5056 */
5057 host->irq = instance->pdev->irq;
5058 host->unique_id = instance->unique_id;
ae09a6c1 5059 host->can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS		 5060 host->this_id = instance->init_id;
5061 host->sg_tablesize = instance->max_num_sge;
42a8d2b3
AR		 5062
5063 if (instance->fw_support_ieee)
5064 instance->max_sectors_per_req = MEGASAS_MAX_SECTORS_IEEE;
5065
1fd10685
YB		 5066 /*
5067 * Check if the module parameter value for max_sectors can be used
5068 */
5069 if (max_sectors && max_sectors < instance->max_sectors_per_req)
5070 instance->max_sectors_per_req = max_sectors;
5071 else {
5072 if (max_sectors) {
5073 if (((instance->pdev->device ==
5074 PCI_DEVICE_ID_LSI_SAS1078GEN2) ||
5075 (instance->pdev->device ==
5076 PCI_DEVICE_ID_LSI_SAS0079GEN2)) &&
5077 (max_sectors <= MEGASAS_MAX_SECTORS)) {
5078 instance->max_sectors_per_req = max_sectors;
5079 } else {
1be18254 5080 dev_info(&instance->pdev->dev, "max_sectors should be > 0"
1fd10685
YB		 5081 "and <= %d (or < 1MB for GEN2 controller)\n",
5082 instance->max_sectors_per_req);
5083 }
5084 }
5085 }
5086
c4a3e0a5 5087 host->max_sectors = instance->max_sectors_per_req;
9c915a8c 5088 host->cmd_per_lun = MEGASAS_DEFAULT_CMD_PER_LUN;
c4a3e0a5
BS		 5089 host->max_channel = MEGASAS_MAX_CHANNELS - 1;
5090 host->max_id = MEGASAS_MAX_DEV_PER_CHANNEL;
5091 host->max_lun = MEGASAS_MAX_LUN;
122da302 5092 host->max_cmd_len = 16;
c4a3e0a5 5093
9c915a8c 5094 /* Fusion only supports host reset */
36807e67 5095 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c 5096 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
21d3c710
SS		 5097 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
5098 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) {
9c915a8c
AR		 5099 host->hostt->eh_device_reset_handler = NULL;
5100 host->hostt->eh_bus_reset_handler = NULL;
5101 }
4026e9aa
SS		 5102 error = scsi_init_shared_tag_map(host, host->can_queue);
5103 if (error) {
5104 dev_err(&instance->pdev->dev,
5105 "Failed to shared tag from %s %d\n",
5106 __func__, __LINE__);
5107 return -ENODEV;
5108 }
9c915a8c 5109
c4a3e0a5
BS		 5110 /*
5111 * Notify the mid-layer about the new controller
5112 */
5113 if (scsi_add_host(host, &instance->pdev->dev)) {
4026e9aa
SS		 5114 dev_err(&instance->pdev->dev,
5115 "Failed to add host from %s %d\n",
5116 __func__, __LINE__);
c4a3e0a5
BS		 5117 return -ENODEV;
5118 }
5119
c4a3e0a5
BS		 5120 return 0;
5121}
5122
31ea7088 5123static int
5124megasas_set_dma_mask(struct pci_dev *pdev)
5125{
5126 /*
da0dc9fb 5127 * All our controllers are capable of performing 64-bit DMA
31ea7088 5128 */
5129 if (IS_DMA64) {
6a35528a 5130 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
31ea7088 5131
284901a9 5132 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5133 goto fail_set_dma_mask;
5134 }
5135 } else {
284901a9 5136 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5137 goto fail_set_dma_mask;
5138 }
46de63e2
SS		 5139 /*
5140 * Ensure that all data structures are allocated in 32-bit
5141 * memory.
5142 */
5143 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
5144 /* Try 32bit DMA mask and 32 bit Consistent dma mask */
5145 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
5146 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
5147 dev_info(&pdev->dev, "set 32bit DMA mask"
5148 "and 32 bit consistent mask\n");
5149 else
5150 goto fail_set_dma_mask;
5151 }
94cd65dd 5152
31ea7088 5153 return 0;
5154
5155fail_set_dma_mask:
5156 return 1;
5157}
5158
c4a3e0a5
BS		 5159/**
5160 * megasas_probe_one - PCI hotplug entry point
5161 * @pdev: PCI device structure
0d49016b 5162 * @id: PCI ids of supported hotplugged adapter
c4a3e0a5 5163 */
6f039790
GKH		 5164static int megasas_probe_one(struct pci_dev *pdev,
5165 const struct pci_device_id *id)
c4a3e0a5 5166{
d3557fc8 5167 int rval, pos;
c4a3e0a5
BS		 5168 struct Scsi_Host *host;
5169 struct megasas_instance *instance;
66192dfe 5170 u16 control = 0;
51087a86 5171 struct fusion_context *fusion = NULL;
66192dfe
AR		 5172
5173 /* Reset MSI-X in the kdump kernel */
5174 if (reset_devices) {
5175 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
5176 if (pos) {
99369065 5177 pci_read_config_word(pdev, pos + PCI_MSIX_FLAGS,
66192dfe
AR		 5178 &control);
5179 if (control & PCI_MSIX_FLAGS_ENABLE) {
5180 dev_info(&pdev->dev, "resetting MSI-X\n");
5181 pci_write_config_word(pdev,
99369065 5182 pos + PCI_MSIX_FLAGS,
66192dfe
AR		 5183 control &
5184 ~PCI_MSIX_FLAGS_ENABLE);
5185 }
5186 }
5187 }
c4a3e0a5 5188
c4a3e0a5
BS		 5189 /*
5190 * PCI prepping: enable device set bus mastering and dma mask
5191 */
aeab3fd7 5192 rval = pci_enable_device_mem(pdev);
c4a3e0a5
BS		 5193
5194 if (rval) {
5195 return rval;
5196 }
5197
5198 pci_set_master(pdev);
5199
31ea7088 5200 if (megasas_set_dma_mask(pdev))
5201 goto fail_set_dma_mask;
c4a3e0a5
BS		 5202
5203 host = scsi_host_alloc(&megasas_template,
5204 sizeof(struct megasas_instance));
5205
5206 if (!host) {
1be18254 5207 dev_printk(KERN_DEBUG, &pdev->dev, "scsi_host_alloc failed\n");
c4a3e0a5
BS		 5208 goto fail_alloc_instance;
5209 }
5210
5211 instance = (struct megasas_instance *)host->hostdata;
5212 memset(instance, 0, sizeof(*instance));
da0dc9fb 5213 atomic_set(&instance->fw_reset_no_pci_access, 0);
9c915a8c 5214 instance->pdev = pdev;
c4a3e0a5 5215
9c915a8c
AR		 5216 switch (instance->pdev->device) {
5217 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 5218 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 5219 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 5220 case PCI_DEVICE_ID_LSI_FURY:
9c915a8c 5221 {
51087a86
SS		 5222 instance->ctrl_context_pages =
5223 get_order(sizeof(struct fusion_context));
5224 instance->ctrl_context = (void *)__get_free_pages(GFP_KERNEL,
5225 instance->ctrl_context_pages);
9c915a8c 5226 if (!instance->ctrl_context) {
1be18254 5227 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate "
9c915a8c
AR		 5228 "memory for Fusion context info\n");
5229 goto fail_alloc_dma_buf;
5230 }
5231 fusion = instance->ctrl_context;
d009b576
SS		 5232 memset(fusion, 0,
5233 ((1 << PAGE_SHIFT) << instance->ctrl_context_pages));
9c915a8c
AR		 5234 }
5235 break;
5236 default: /* For all other supported controllers */
5237
5238 instance->producer =
5239 pci_alloc_consistent(pdev, sizeof(u32),
5240 &instance->producer_h);
5241 instance->consumer =
5242 pci_alloc_consistent(pdev, sizeof(u32),
5243 &instance->consumer_h);
5244
5245 if (!instance->producer || !instance->consumer) {
1be18254 5246 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate"
9c915a8c
AR		 5247 "memory for producer, consumer\n");
5248 goto fail_alloc_dma_buf;
5249 }
c4a3e0a5 5250
9c915a8c
AR		 5251 *instance->producer = 0;
5252 *instance->consumer = 0;
5253 break;
c4a3e0a5
BS		 5254 }
5255
5765c5b8
SS		 5256 instance->system_info_buf = pci_zalloc_consistent(pdev,
5257 sizeof(struct MR_DRV_SYSTEM_INFO),
5258 &instance->system_info_h);
5259
5260 if (!instance->system_info_buf)
5261 dev_info(&instance->pdev->dev, "Can't allocate system info buffer\n");
5262
fc62b3fc
SS		 5263 /* Crash dump feature related initialisation*/
5264 instance->drv_buf_index = 0;
5265 instance->drv_buf_alloc = 0;
5266 instance->crash_dump_fw_support = 0;
5267 instance->crash_dump_app_support = 0;
5268 instance->fw_crash_state = UNAVAILABLE;
5269 spin_lock_init(&instance->crashdump_lock);
5270 instance->crash_dump_buf = NULL;
5271
5272 if (!reset_devices)
5273 instance->crash_dump_buf = pci_alloc_consistent(pdev,
5274 CRASH_DMA_BUF_SIZE,
5275 &instance->crash_dump_h);
5276 if (!instance->crash_dump_buf)
1be18254 5277 dev_err(&pdev->dev, "Can't allocate Firmware "
fc62b3fc
SS		 5278 "crash dump DMA buffer\n");
5279
c3518837 5280 megasas_poll_wait_aen = 0;
f4c9a131 5281 instance->flag_ieee = 0;
7e8a75f4 5282 instance->ev = NULL;
39a98554 5283 instance->issuepend_done = 1;
5284 instance->adprecovery = MEGASAS_HBA_OPERATIONAL;
404a8a1a 5285 instance->is_imr = 0;
c4a3e0a5
BS		 5286
5287 instance->evt_detail = pci_alloc_consistent(pdev,
5288 sizeof(struct
5289 megasas_evt_detail),
5290 &instance->evt_detail_h);
5291
5292 if (!instance->evt_detail) {
1be18254 5293 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate memory for "
c4a3e0a5
BS		 5294 "event detail structure\n");
5295 goto fail_alloc_dma_buf;
5296 }
5297
5298 /*
5299 * Initialize locks and queues
5300 */
5301 INIT_LIST_HEAD(&instance->cmd_pool);
39a98554 5302 INIT_LIST_HEAD(&instance->internal_reset_pending_q);
c4a3e0a5 5303
e4a082c7
SP		 5304 atomic_set(&instance->fw_outstanding,0);
5305
c4a3e0a5
BS		 5306 init_waitqueue_head(&instance->int_cmd_wait_q);
5307 init_waitqueue_head(&instance->abort_cmd_wait_q);
5308
90dc9d98 5309 spin_lock_init(&instance->mfi_pool_lock);
39a98554 5310 spin_lock_init(&instance->hba_lock);
7343eb65 5311 spin_lock_init(&instance->completion_lock);
c4a3e0a5 5312
e5a69e27 5313 mutex_init(&instance->aen_mutex);
9c915a8c 5314 mutex_init(&instance->reset_mutex);
c4a3e0a5
BS		 5315
5316 /*
5317 * Initialize PCI related and misc parameters
5318 */
c4a3e0a5
BS		 5319 instance->host = host;
5320 instance->unique_id = pdev->bus->number << 8 | pdev->devfn;
5321 instance->init_id = MEGASAS_DEFAULT_INIT_ID;
51087a86 5322 instance->ctrl_info = NULL;
c4a3e0a5 5323
ae09a6c1 5324
7bebf5c7 5325 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
ae09a6c1 5326 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY))
f4c9a131 5327 instance->flag_ieee = 1;
7bebf5c7 5328
658dcedb 5329 megasas_dbg_lvl = 0;
05e9ebbe 5330 instance->flag = 0;
0c79e681 5331 instance->unload = 1;
05e9ebbe 5332 instance->last_time = 0;
39a98554 5333 instance->disableOnlineCtrlReset = 1;
bc93d425 5334 instance->UnevenSpanSupport = 0;
39a98554 5335
36807e67 5336 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c 5337 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
21d3c710 5338 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
fc62b3fc 5339 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) {
9c915a8c 5340 INIT_WORK(&instance->work_init, megasas_fusion_ocr_wq);
fc62b3fc
SS		 5341 INIT_WORK(&instance->crash_init, megasas_fusion_crash_dump_wq);
5342 } else
9c915a8c 5343 INIT_WORK(&instance->work_init, process_fw_state_change_wq);
658dcedb 5344
0a77066a
AR		 5345 /*
5346 * Initialize MFI Firmware
5347 */
5348 if (megasas_init_fw(instance))
5349 goto fail_init_mfi;
5350
229fe47c
AR		 5351 if (instance->requestorId) {
5352 if (instance->PlasmaFW111) {
5353 instance->vf_affiliation_111 =
5354 pci_alloc_consistent(pdev, sizeof(struct MR_LD_VF_AFFILIATION_111),
5355 &instance->vf_affiliation_111_h);
5356 if (!instance->vf_affiliation_111)
1be18254 5357 dev_warn(&pdev->dev, "Can't allocate "
229fe47c
AR		 5358 "memory for VF affiliation buffer\n");
5359 } else {
5360 instance->vf_affiliation =
5361 pci_alloc_consistent(pdev,
5362 (MAX_LOGICAL_DRIVES + 1) *
5363 sizeof(struct MR_LD_VF_AFFILIATION),
5364 &instance->vf_affiliation_h);
5365 if (!instance->vf_affiliation)
1be18254 5366 dev_warn(&pdev->dev, "Can't allocate "
229fe47c
AR		 5367 "memory for VF affiliation buffer\n");
5368 }
5369 }
5370
c4a3e0a5
BS		 5371 /*
5372 * Store instance in PCI softstate
5373 */
5374 pci_set_drvdata(pdev, instance);
5375
5376 /*
5377 * Add this controller to megasas_mgmt_info structure so that it
5378 * can be exported to management applications
5379 */
5380 megasas_mgmt_info.count++;
5381 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = instance;
5382 megasas_mgmt_info.max_index++;
5383
541f90b7
AR		 5384 /*
5385 * Register with SCSI mid-layer
5386 */
5387 if (megasas_io_attach(instance))
5388 goto fail_io_attach;
5389
5390 instance->unload = 0;
aa00832b
SS		 5391 /*
5392 * Trigger SCSI to scan our drives
5393 */
5394 scsi_scan_host(host);
541f90b7 5395
c4a3e0a5
BS		 5396 /*
5397 * Initiate AEN (Asynchronous Event Notification)
5398 */
5399 if (megasas_start_aen(instance)) {
1be18254 5400 dev_printk(KERN_DEBUG, &pdev->dev, "start aen failed\n");
c4a3e0a5
BS		 5401 goto fail_start_aen;
5402 }
5403
9ea81f81
AR		 5404 /* Get current SR-IOV LD/VF affiliation */
5405 if (instance->requestorId)
5406 megasas_get_ld_vf_affiliation(instance, 1);
5407
c4a3e0a5
BS		 5408 return 0;
5409
da0dc9fb
BH		 5410fail_start_aen:
5411fail_io_attach:
c4a3e0a5
BS		 5412 megasas_mgmt_info.count--;
5413 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = NULL;
5414 megasas_mgmt_info.max_index--;
5415
d46a3ad6 5416 instance->instancet->disable_intr(instance);
d3557fc8
SS		 5417 megasas_destroy_irqs(instance);
5418
36807e67 5419 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c 5420 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
21d3c710
SS		 5421 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
5422 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
eb1b1237
AR		 5423 megasas_release_fusion(instance);
5424 else
5425 megasas_release_mfi(instance);
c8e858fe 5426 if (instance->msix_vectors)
0a77066a 5427 pci_disable_msix(instance->pdev);
d3557fc8 5428fail_init_mfi:
da0dc9fb 5429fail_alloc_dma_buf:
c4a3e0a5
BS		 5430 if (instance->evt_detail)
5431 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
5432 instance->evt_detail,
5433 instance->evt_detail_h);
5434
eb1b1237 5435 if (instance->producer)
c4a3e0a5
BS		 5436 pci_free_consistent(pdev, sizeof(u32), instance->producer,
5437 instance->producer_h);
5438 if (instance->consumer)
5439 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
5440 instance->consumer_h);
5441 scsi_host_put(host);
5442
da0dc9fb
BH		 5443fail_alloc_instance:
5444fail_set_dma_mask:
c4a3e0a5
BS		 5445 pci_disable_device(pdev);
5446
5447 return -ENODEV;
5448}
5449
5450/**
5451 * megasas_flush_cache - Requests FW to flush all its caches
5452 * @instance: Adapter soft state
5453 */
5454static void megasas_flush_cache(struct megasas_instance *instance)
5455{
5456 struct megasas_cmd *cmd;
5457 struct megasas_dcmd_frame *dcmd;
5458
39a98554 5459 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR)
5460 return;
5461
c4a3e0a5
BS		 5462 cmd = megasas_get_cmd(instance);
5463
5464 if (!cmd)
5465 return;
5466
5467 dcmd = &cmd->frame->dcmd;
5468
5469 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5470
5471 dcmd->cmd = MFI_CMD_DCMD;
5472 dcmd->cmd_status = 0x0;
5473 dcmd->sge_count = 0;
94cd65dd 5474 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 5475 dcmd->timeout = 0;
780a3762 5476 dcmd->pad_0 = 0;
c4a3e0a5 5477 dcmd->data_xfer_len = 0;
94cd65dd 5478 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_CACHE_FLUSH);
c4a3e0a5
BS		 5479 dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
5480
cfbe7554
SS		 5481 if (megasas_issue_blocked_cmd(instance, cmd, 30))
5482 dev_err(&instance->pdev->dev, "Command timedout"
5483 " from %s\n", __func__);
c4a3e0a5 5484
4026e9aa 5485 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 5486}
5487
5488/**
5489 * megasas_shutdown_controller - Instructs FW to shutdown the controller
5490 * @instance: Adapter soft state
31ea7088 5491 * @opcode: Shutdown/Hibernate
c4a3e0a5 5492 */
31ea7088 5493static void megasas_shutdown_controller(struct megasas_instance *instance,
5494 u32 opcode)
c4a3e0a5
BS		 5495{
5496 struct megasas_cmd *cmd;
5497 struct megasas_dcmd_frame *dcmd;
5498
39a98554 5499 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR)
5500 return;
5501
c4a3e0a5
BS		 5502 cmd = megasas_get_cmd(instance);
5503
5504 if (!cmd)
5505 return;
5506
5507 if (instance->aen_cmd)
cfbe7554 5508 megasas_issue_blocked_abort_cmd(instance,
e0bd0874 5509 instance->aen_cmd, MEGASAS_BLOCKED_CMD_TIMEOUT);
9c915a8c
AR		 5510 if (instance->map_update_cmd)
5511 megasas_issue_blocked_abort_cmd(instance,
e0bd0874 5512 instance->map_update_cmd, MEGASAS_BLOCKED_CMD_TIMEOUT);
c4a3e0a5
BS		 5513 dcmd = &cmd->frame->dcmd;
5514
5515 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5516
5517 dcmd->cmd = MFI_CMD_DCMD;
5518 dcmd->cmd_status = 0x0;
5519 dcmd->sge_count = 0;
94cd65dd 5520 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 5521 dcmd->timeout = 0;
780a3762 5522 dcmd->pad_0 = 0;
c4a3e0a5 5523 dcmd->data_xfer_len = 0;
94cd65dd 5524 dcmd->opcode = cpu_to_le32(opcode);
c4a3e0a5 5525
cfbe7554
SS		 5526 if (megasas_issue_blocked_cmd(instance, cmd, 30))
5527 dev_err(&instance->pdev->dev, "Command timedout"
5528 "from %s\n", __func__);
c4a3e0a5 5529
4026e9aa 5530 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 5531}
5532
33139b21 5533#ifdef CONFIG_PM
31ea7088 5534/**
ad84db2e 5535 * megasas_suspend - driver suspend entry point
5536 * @pdev: PCI device structure
31ea7088 5537 * @state: PCI power state to suspend routine
5538 */
33139b21 5539static int
31ea7088 5540megasas_suspend(struct pci_dev *pdev, pm_message_t state)
5541{
5542 struct Scsi_Host *host;
5543 struct megasas_instance *instance;
5544
5545 instance = pci_get_drvdata(pdev);
5546 host = instance->host;
0c79e681 5547 instance->unload = 1;
31ea7088 5548
229fe47c
AR		 5549 /* Shutdown SR-IOV heartbeat timer */
5550 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
5551 del_timer_sync(&instance->sriov_heartbeat_timer);
5552
31ea7088 5553 megasas_flush_cache(instance);
5554 megasas_shutdown_controller(instance, MR_DCMD_HIBERNATE_SHUTDOWN);
7e8a75f4
YB		 5555
5556 /* cancel the delayed work if this work still in queue */
5557 if (instance->ev != NULL) {
5558 struct megasas_aen_event *ev = instance->ev;
c1d390d8 5559 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 5560 instance->ev = NULL;
5561 }
5562
31ea7088 5563 tasklet_kill(&instance->isr_tasklet);
5564
5565 pci_set_drvdata(instance->pdev, instance);
d46a3ad6 5566 instance->instancet->disable_intr(instance);
c8e858fe 5567
d3557fc8
SS		 5568 megasas_destroy_irqs(instance);
5569
c8e858fe 5570 if (instance->msix_vectors)
80d9da98 5571 pci_disable_msix(instance->pdev);
31ea7088 5572
5573 pci_save_state(pdev);
5574 pci_disable_device(pdev);
5575
5576 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5577
5578 return 0;
5579}
5580
5581/**
5582 * megasas_resume- driver resume entry point
5583 * @pdev: PCI device structure
5584 */
33139b21 5585static int
31ea7088 5586megasas_resume(struct pci_dev *pdev)
5587{
d3557fc8 5588 int rval;
31ea7088 5589 struct Scsi_Host *host;
5590 struct megasas_instance *instance;
5591
5592 instance = pci_get_drvdata(pdev);
5593 host = instance->host;
5594 pci_set_power_state(pdev, PCI_D0);
5595 pci_enable_wake(pdev, PCI_D0, 0);
5596 pci_restore_state(pdev);
5597
5598 /*
5599 * PCI prepping: enable device set bus mastering and dma mask
5600 */
aeab3fd7 5601 rval = pci_enable_device_mem(pdev);
31ea7088 5602
5603 if (rval) {
1be18254 5604 dev_err(&pdev->dev, "Enable device failed\n");
31ea7088 5605 return rval;
5606 }
5607
5608 pci_set_master(pdev);
5609
5610 if (megasas_set_dma_mask(pdev))
5611 goto fail_set_dma_mask;
5612
5613 /*
5614 * Initialize MFI Firmware
5615 */
5616
31ea7088 5617 atomic_set(&instance->fw_outstanding, 0);
5618
5619 /*
5620 * We expect the FW state to be READY
5621 */
058a8fac 5622 if (megasas_transition_to_ready(instance, 0))
31ea7088 5623 goto fail_ready_state;
5624
3f1abce4 5625 /* Now re-enable MSI-X */
dd088128 5626 if (instance->msix_vectors &&
8ae80ed1
AG		 5627 pci_enable_msix_exact(instance->pdev, instance->msixentry,
5628 instance->msix_vectors))
dd088128 5629 goto fail_reenable_msix;
3f1abce4 5630
9c915a8c
AR		 5631 switch (instance->pdev->device) {
5632 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 5633 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 5634 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 5635 case PCI_DEVICE_ID_LSI_FURY:
9c915a8c
AR		 5636 {
5637 megasas_reset_reply_desc(instance);
5638 if (megasas_ioc_init_fusion(instance)) {
5639 megasas_free_cmds(instance);
5640 megasas_free_cmds_fusion(instance);
5641 goto fail_init_mfi;
5642 }
5643 if (!megasas_get_map_info(instance))
5644 megasas_sync_map_info(instance);
5645 }
5646 break;
5647 default:
5648 *instance->producer = 0;
5649 *instance->consumer = 0;
5650 if (megasas_issue_init_mfi(instance))
5651 goto fail_init_mfi;
5652 break;
5653 }
31ea7088 5654
9c915a8c
AR		 5655 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
5656 (unsigned long)instance);
31ea7088 5657
d3557fc8
SS		 5658 if (instance->msix_vectors ?
5659 megasas_setup_irqs_msix(instance, 0) :
5660 megasas_setup_irqs_ioapic(instance))
5661 goto fail_init_mfi;
31ea7088 5662
229fe47c
AR		 5663 /* Re-launch SR-IOV heartbeat timer */
5664 if (instance->requestorId) {
5665 if (!megasas_sriov_start_heartbeat(instance, 0))
5666 megasas_start_timer(instance,
5667 &instance->sriov_heartbeat_timer,
5668 megasas_sriov_heartbeat_handler,
5669 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
5765c5b8 5670 else {
229fe47c 5671 instance->skip_heartbeat_timer_del = 1;
5765c5b8
SS		 5672 goto fail_init_mfi;
5673 }
229fe47c
AR		 5674 }
5675
d46a3ad6 5676 instance->instancet->enable_intr(instance);
0c79e681
YB		 5677 instance->unload = 0;
5678
541f90b7
AR		 5679 /*
5680 * Initiate AEN (Asynchronous Event Notification)
5681 */
5682 if (megasas_start_aen(instance))
1be18254 5683 dev_err(&instance->pdev->dev, "Start AEN failed\n");
541f90b7 5684
31ea7088 5685 return 0;
5686
31ea7088 5687fail_init_mfi:
5688 if (instance->evt_detail)
5689 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
5690 instance->evt_detail,
5691 instance->evt_detail_h);
5692
5693 if (instance->producer)
5694 pci_free_consistent(pdev, sizeof(u32), instance->producer,
5695 instance->producer_h);
5696 if (instance->consumer)
5697 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
5698 instance->consumer_h);
5699 scsi_host_put(host);
5700
5701fail_set_dma_mask:
5702fail_ready_state:
dd088128 5703fail_reenable_msix:
31ea7088 5704
5705 pci_disable_device(pdev);
5706
5707 return -ENODEV;
5708}
33139b21
JS		 5709#else
5710#define megasas_suspend NULL
5711#define megasas_resume NULL
5712#endif
31ea7088 5713
c4a3e0a5
BS		 5714/**
5715 * megasas_detach_one - PCI hot"un"plug entry point
5716 * @pdev: PCI device structure
5717 */
6f039790 5718static void megasas_detach_one(struct pci_dev *pdev)
c4a3e0a5
BS		 5719{
5720 int i;
5721 struct Scsi_Host *host;
5722 struct megasas_instance *instance;
9c915a8c 5723 struct fusion_context *fusion;
c4a3e0a5
BS		 5724
5725 instance = pci_get_drvdata(pdev);
c3518837 5726 instance->unload = 1;
c4a3e0a5 5727 host = instance->host;
9c915a8c 5728 fusion = instance->ctrl_context;
c4a3e0a5 5729
229fe47c
AR		 5730 /* Shutdown SR-IOV heartbeat timer */
5731 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
5732 del_timer_sync(&instance->sriov_heartbeat_timer);
5733
fc62b3fc
SS		 5734 if (instance->fw_crash_state != UNAVAILABLE)
5735 megasas_free_host_crash_buffer(instance);
c4a3e0a5
BS		 5736 scsi_remove_host(instance->host);
5737 megasas_flush_cache(instance);
31ea7088 5738 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
7e8a75f4
YB		 5739
5740 /* cancel the delayed work if this work still in queue*/
5741 if (instance->ev != NULL) {
5742 struct megasas_aen_event *ev = instance->ev;
c1d390d8 5743 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 5744 instance->ev = NULL;
5745 }
5746
cfbe7554
SS		 5747 /* cancel all wait events */
5748 wake_up_all(&instance->int_cmd_wait_q);
5749
5d018ad0 5750 tasklet_kill(&instance->isr_tasklet);
c4a3e0a5
BS		 5751
5752 /*
5753 * Take the instance off the instance array. Note that we will not
5754 * decrement the max_index. We let this array be sparse array
5755 */
5756 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
5757 if (megasas_mgmt_info.instance[i] == instance) {
5758 megasas_mgmt_info.count--;
5759 megasas_mgmt_info.instance[i] = NULL;
5760
5761 break;
5762 }
5763 }
5764
d46a3ad6 5765 instance->instancet->disable_intr(instance);
c4a3e0a5 5766
d3557fc8
SS		 5767 megasas_destroy_irqs(instance);
5768
c8e858fe 5769 if (instance->msix_vectors)
80d9da98 5770 pci_disable_msix(instance->pdev);
c4a3e0a5 5771
9c915a8c
AR		 5772 switch (instance->pdev->device) {
5773 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 5774 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 5775 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 5776 case PCI_DEVICE_ID_LSI_FURY:
9c915a8c 5777 megasas_release_fusion(instance);
51087a86 5778 for (i = 0; i < 2 ; i++) {
9c915a8c
AR		 5779 if (fusion->ld_map[i])
5780 dma_free_coherent(&instance->pdev->dev,
51087a86 5781 fusion->max_map_sz,
9c915a8c 5782 fusion->ld_map[i],
51087a86
SS		 5783 fusion->ld_map_phys[i]);
5784 if (fusion->ld_drv_map[i])
5785 free_pages((ulong)fusion->ld_drv_map[i],
5786 fusion->drv_map_pages);
5787 }
5788 free_pages((ulong)instance->ctrl_context,
5789 instance->ctrl_context_pages);
9c915a8c
AR		 5790 break;
5791 default:
5792 megasas_release_mfi(instance);
9c915a8c
AR		 5793 pci_free_consistent(pdev, sizeof(u32),
5794 instance->producer,
5795 instance->producer_h);
5796 pci_free_consistent(pdev, sizeof(u32),
5797 instance->consumer,
5798 instance->consumer_h);
5799 break;
5800 }
c4a3e0a5 5801
51087a86
SS		 5802 kfree(instance->ctrl_info);
5803
105900d5
SS		 5804 if (instance->evt_detail)
5805 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
5806 instance->evt_detail, instance->evt_detail_h);
229fe47c
AR		 5807
5808 if (instance->vf_affiliation)
5809 pci_free_consistent(pdev, (MAX_LOGICAL_DRIVES + 1) *
5810 sizeof(struct MR_LD_VF_AFFILIATION),
5811 instance->vf_affiliation,
5812 instance->vf_affiliation_h);
5813
5814 if (instance->vf_affiliation_111)
5815 pci_free_consistent(pdev,
5816 sizeof(struct MR_LD_VF_AFFILIATION_111),
5817 instance->vf_affiliation_111,
5818 instance->vf_affiliation_111_h);
5819
5820 if (instance->hb_host_mem)
5821 pci_free_consistent(pdev, sizeof(struct MR_CTRL_HB_HOST_MEM),
5822 instance->hb_host_mem,
5823 instance->hb_host_mem_h);
5824
fc62b3fc
SS		 5825 if (instance->crash_dump_buf)
5826 pci_free_consistent(pdev, CRASH_DMA_BUF_SIZE,
5827 instance->crash_dump_buf, instance->crash_dump_h);
5828
5765c5b8
SS		 5829 if (instance->system_info_buf)
5830 pci_free_consistent(pdev, sizeof(struct MR_DRV_SYSTEM_INFO),
5831 instance->system_info_buf, instance->system_info_h);
5832
c4a3e0a5
BS		 5833 scsi_host_put(host);
5834
c4a3e0a5 5835 pci_disable_device(pdev);
c4a3e0a5
BS		 5836}
5837
5838/**
5839 * megasas_shutdown - Shutdown entry point
5840 * @device: Generic device structure
5841 */
5842static void megasas_shutdown(struct pci_dev *pdev)
5843{
5844 struct megasas_instance *instance = pci_get_drvdata(pdev);
c8e858fe 5845
0c79e681 5846 instance->unload = 1;
c4a3e0a5 5847 megasas_flush_cache(instance);
530e6fc1 5848 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
d46a3ad6 5849 instance->instancet->disable_intr(instance);
d3557fc8
SS		 5850 megasas_destroy_irqs(instance);
5851
c8e858fe 5852 if (instance->msix_vectors)
46fd256e 5853 pci_disable_msix(instance->pdev);
c4a3e0a5
BS		 5854}
5855
5856/**
5857 * megasas_mgmt_open - char node "open" entry point
5858 */
5859static int megasas_mgmt_open(struct inode *inode, struct file *filep)
5860{
5861 /*
5862 * Allow only those users with admin rights
5863 */
5864 if (!capable(CAP_SYS_ADMIN))
5865 return -EACCES;
5866
5867 return 0;
5868}
5869
c4a3e0a5
BS		 5870/**
5871 * megasas_mgmt_fasync - Async notifier registration from applications
5872 *
5873 * This function adds the calling process to a driver global queue. When an
5874 * event occurs, SIGIO will be sent to all processes in this queue.
5875 */
5876static int megasas_mgmt_fasync(int fd, struct file *filep, int mode)
5877{
5878 int rc;
5879
0b950672 5880 mutex_lock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 5881
5882 rc = fasync_helper(fd, filep, mode, &megasas_async_queue);
5883
0b950672 5884 mutex_unlock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 5885
5886 if (rc >= 0) {
5887 /* For sanity check when we get ioctl */
5888 filep->private_data = filep;
5889 return 0;
5890 }
5891
5892 printk(KERN_DEBUG "megasas: fasync_helper failed [%d]\n", rc);
5893
5894 return rc;
5895}
5896
c3518837
YB		 5897/**
5898 * megasas_mgmt_poll - char node "poll" entry point
5899 * */
5900static unsigned int megasas_mgmt_poll(struct file *file, poll_table *wait)
5901{
5902 unsigned int mask;
5903 unsigned long flags;
da0dc9fb 5904
c3518837
YB		 5905 poll_wait(file, &megasas_poll_wait, wait);
5906 spin_lock_irqsave(&poll_aen_lock, flags);
5907 if (megasas_poll_wait_aen)
da0dc9fb 5908 mask = (POLLIN | POLLRDNORM);
c3518837
YB		 5909 else
5910 mask = 0;
51087a86 5911 megasas_poll_wait_aen = 0;
c3518837
YB		 5912 spin_unlock_irqrestore(&poll_aen_lock, flags);
5913 return mask;
5914}
5915
fc62b3fc
SS		 5916/*
5917 * megasas_set_crash_dump_params_ioctl:
5918 * Send CRASH_DUMP_MODE DCMD to all controllers
5919 * @cmd: MFI command frame
5920 */
5921
da0dc9fb 5922static int megasas_set_crash_dump_params_ioctl(struct megasas_cmd *cmd)
fc62b3fc
SS		 5923{
5924 struct megasas_instance *local_instance;
5925 int i, error = 0;
5926 int crash_support;
5927
5928 crash_support = cmd->frame->dcmd.mbox.w[0];
5929
5930 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
5931 local_instance = megasas_mgmt_info.instance[i];
5932 if (local_instance && local_instance->crash_dump_drv_support) {
5933 if ((local_instance->adprecovery ==
5934 MEGASAS_HBA_OPERATIONAL) &&
5935 !megasas_set_crash_dump_params(local_instance,
5936 crash_support)) {
5937 local_instance->crash_dump_app_support =
5938 crash_support;
5939 dev_info(&local_instance->pdev->dev,
5940 "Application firmware crash "
5941 "dump mode set success\n");
5942 error = 0;
5943 } else {
5944 dev_info(&local_instance->pdev->dev,
5945 "Application firmware crash "
5946 "dump mode set failed\n");
5947 error = -1;
5948 }
5949 }
5950 }
5951 return error;
5952}
5953
c4a3e0a5
BS		 5954/**
5955 * megasas_mgmt_fw_ioctl - Issues management ioctls to FW
5956 * @instance: Adapter soft state
5957 * @argp: User's ioctl packet
5958 */
5959static int
5960megasas_mgmt_fw_ioctl(struct megasas_instance *instance,
5961 struct megasas_iocpacket __user * user_ioc,
5962 struct megasas_iocpacket *ioc)
5963{
5964 struct megasas_sge32 *kern_sge32;
5965 struct megasas_cmd *cmd;
5966 void *kbuff_arr[MAX_IOCTL_SGE];
5967 dma_addr_t buf_handle = 0;
5968 int error = 0, i;
5969 void *sense = NULL;
5970 dma_addr_t sense_handle;
7b2519af 5971 unsigned long *sense_ptr;
c4a3e0a5
BS		 5972
5973 memset(kbuff_arr, 0, sizeof(kbuff_arr));
5974
5975 if (ioc->sge_count > MAX_IOCTL_SGE) {
1be18254 5976 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SGE count [%d] > max limit [%d]\n",
c4a3e0a5
BS		 5977 ioc->sge_count, MAX_IOCTL_SGE);
5978 return -EINVAL;
5979 }
5980
5981 cmd = megasas_get_cmd(instance);
5982 if (!cmd) {
1be18254 5983 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a cmd packet\n");
c4a3e0a5
BS		 5984 return -ENOMEM;
5985 }
5986
5987 /*
5988 * User's IOCTL packet has 2 frames (maximum). Copy those two
5989 * frames into our cmd's frames. cmd->frame's context will get
5990 * overwritten when we copy from user's frames. So set that value
5991 * alone separately
5992 */
5993 memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE);
94cd65dd 5994 cmd->frame->hdr.context = cpu_to_le32(cmd->index);
c3518837 5995 cmd->frame->hdr.pad_0 = 0;
94cd65dd
SS		 5996 cmd->frame->hdr.flags &= cpu_to_le16(~(MFI_FRAME_IEEE |
5997 MFI_FRAME_SGL64 |
5998 MFI_FRAME_SENSE64));
c4a3e0a5 5999
fc62b3fc
SS		 6000 if (cmd->frame->dcmd.opcode == MR_DRIVER_SET_APP_CRASHDUMP_MODE) {
6001 error = megasas_set_crash_dump_params_ioctl(cmd);
6002 megasas_return_cmd(instance, cmd);
6003 return error;
6004 }
6005
c4a3e0a5
BS		 6006 /*
6007 * The management interface between applications and the fw uses
6008 * MFI frames. E.g, RAID configuration changes, LD property changes
6009 * etc are accomplishes through different kinds of MFI frames. The
6010 * driver needs to care only about substituting user buffers with
6011 * kernel buffers in SGLs. The location of SGL is embedded in the
6012 * struct iocpacket itself.
6013 */
6014 kern_sge32 = (struct megasas_sge32 *)
6015 ((unsigned long)cmd->frame + ioc->sgl_off);
6016
6017 /*
6018 * For each user buffer, create a mirror buffer and copy in
6019 */
6020 for (i = 0; i < ioc->sge_count; i++) {
98cb7e44
BM		 6021 if (!ioc->sgl[i].iov_len)
6022 continue;
6023
9f35fa8a 6024 kbuff_arr[i] = dma_alloc_coherent(&instance->pdev->dev,
c4a3e0a5 6025 ioc->sgl[i].iov_len,
9f35fa8a 6026 &buf_handle, GFP_KERNEL);
c4a3e0a5 6027 if (!kbuff_arr[i]) {
1be18254
BH		 6028 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc "
6029 "kernel SGL buffer for IOCTL\n");
c4a3e0a5
BS		 6030 error = -ENOMEM;
6031 goto out;
6032 }
6033
6034 /*
6035 * We don't change the dma_coherent_mask, so
6036 * pci_alloc_consistent only returns 32bit addresses
6037 */
94cd65dd
SS		 6038 kern_sge32[i].phys_addr = cpu_to_le32(buf_handle);
6039 kern_sge32[i].length = cpu_to_le32(ioc->sgl[i].iov_len);
c4a3e0a5
BS		 6040
6041 /*
6042 * We created a kernel buffer corresponding to the
6043 * user buffer. Now copy in from the user buffer
6044 */
6045 if (copy_from_user(kbuff_arr[i], ioc->sgl[i].iov_base,
6046 (u32) (ioc->sgl[i].iov_len))) {
6047 error = -EFAULT;
6048 goto out;
6049 }
6050 }
6051
6052 if (ioc->sense_len) {
9f35fa8a
SP		 6053 sense = dma_alloc_coherent(&instance->pdev->dev, ioc->sense_len,
6054 &sense_handle, GFP_KERNEL);
c4a3e0a5
BS		 6055 if (!sense) {
6056 error = -ENOMEM;
6057 goto out;
6058 }
6059
6060 sense_ptr =
7b2519af 6061 (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off);
94cd65dd 6062 *sense_ptr = cpu_to_le32(sense_handle);
c4a3e0a5
BS		 6063 }
6064
6065 /*
6066 * Set the sync_cmd flag so that the ISR knows not to complete this
6067 * cmd to the SCSI mid-layer
6068 */
6069 cmd->sync_cmd = 1;
cfbe7554 6070 megasas_issue_blocked_cmd(instance, cmd, 0);
c4a3e0a5
BS		 6071 cmd->sync_cmd = 0;
6072
aa00832b
SS		 6073 if (instance->unload == 1) {
6074 dev_info(&instance->pdev->dev, "Driver unload is in progress "
6075 "don't submit data to application\n");
6076 goto out;
6077 }
c4a3e0a5
BS		 6078 /*
6079 * copy out the kernel buffers to user buffers
6080 */
6081 for (i = 0; i < ioc->sge_count; i++) {
6082 if (copy_to_user(ioc->sgl[i].iov_base, kbuff_arr[i],
6083 ioc->sgl[i].iov_len)) {
6084 error = -EFAULT;
6085 goto out;
6086 }
6087 }
6088
6089 /*
6090 * copy out the sense
6091 */
6092 if (ioc->sense_len) {
6093 /*
b70a41e0 6094 * sense_ptr points to the location that has the user
c4a3e0a5
BS		 6095 * sense buffer address
6096 */
7b2519af
YB		 6097 sense_ptr = (unsigned long *) ((unsigned long)ioc->frame.raw +
6098 ioc->sense_off);
c4a3e0a5 6099
b70a41e0 6100 if (copy_to_user((void __user *)((unsigned long)(*sense_ptr)),
6101 sense, ioc->sense_len)) {
1be18254 6102 dev_err(&instance->pdev->dev, "Failed to copy out to user "
b10c36a5 6103 "sense data\n");
c4a3e0a5
BS		 6104 error = -EFAULT;
6105 goto out;
6106 }
6107 }
6108
6109 /*
6110 * copy the status codes returned by the fw
6111 */
6112 if (copy_to_user(&user_ioc->frame.hdr.cmd_status,
6113 &cmd->frame->hdr.cmd_status, sizeof(u8))) {
1be18254 6114 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error copying out cmd_status\n");
c4a3e0a5
BS		 6115 error = -EFAULT;
6116 }
6117
da0dc9fb 6118out:
c4a3e0a5 6119 if (sense) {
9f35fa8a 6120 dma_free_coherent(&instance->pdev->dev, ioc->sense_len,
c4a3e0a5
BS		 6121 sense, sense_handle);
6122 }
6123
7a6a731b
BM		 6124 for (i = 0; i < ioc->sge_count; i++) {
6125 if (kbuff_arr[i])
6126 dma_free_coherent(&instance->pdev->dev,
94cd65dd 6127 le32_to_cpu(kern_sge32[i].length),
7a6a731b 6128 kbuff_arr[i],
94cd65dd 6129 le32_to_cpu(kern_sge32[i].phys_addr));
90dc9d98 6130 kbuff_arr[i] = NULL;
c4a3e0a5
BS		 6131 }
6132
4026e9aa 6133 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 6134 return error;
6135}
6136
c4a3e0a5
BS		 6137static int megasas_mgmt_ioctl_fw(struct file *file, unsigned long arg)
6138{
6139 struct megasas_iocpacket __user *user_ioc =
6140 (struct megasas_iocpacket __user *)arg;
6141 struct megasas_iocpacket *ioc;
6142 struct megasas_instance *instance;
6143 int error;
39a98554 6144 int i;
6145 unsigned long flags;
6146 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 6147
6148 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
6149 if (!ioc)
6150 return -ENOMEM;
6151
6152 if (copy_from_user(ioc, user_ioc, sizeof(*ioc))) {
6153 error = -EFAULT;
6154 goto out_kfree_ioc;
6155 }
6156
6157 instance = megasas_lookup_instance(ioc->host_no);
6158 if (!instance) {
6159 error = -ENODEV;
6160 goto out_kfree_ioc;
6161 }
6162
229fe47c
AR		 6163 /* Adjust ioctl wait time for VF mode */
6164 if (instance->requestorId)
6165 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
6166
6167 /* Block ioctls in VF mode */
6168 if (instance->requestorId && !allow_vf_ioctls) {
6169 error = -ENODEV;
6170 goto out_kfree_ioc;
6171 }
6172
39a98554 6173 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 6174 dev_err(&instance->pdev->dev, "Controller in crit error\n");
0c79e681
YB		 6175 error = -ENODEV;
6176 goto out_kfree_ioc;
6177 }
6178
6179 if (instance->unload == 1) {
6180 error = -ENODEV;
6181 goto out_kfree_ioc;
6182 }
6183
c4a3e0a5
BS		 6184 if (down_interruptible(&instance->ioctl_sem)) {
6185 error = -ERESTARTSYS;
6186 goto out_kfree_ioc;
6187 }
39a98554 6188
6189 for (i = 0; i < wait_time; i++) {
6190
6191 spin_lock_irqsave(&instance->hba_lock, flags);
6192 if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL) {
6193 spin_unlock_irqrestore(&instance->hba_lock, flags);
6194 break;
6195 }
6196 spin_unlock_irqrestore(&instance->hba_lock, flags);
6197
6198 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6199 dev_notice(&instance->pdev->dev, "waiting"
39a98554 6200 "for controller reset to finish\n");
6201 }
6202
6203 msleep(1000);
6204 }
6205
6206 spin_lock_irqsave(&instance->hba_lock, flags);
6207 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
6208 spin_unlock_irqrestore(&instance->hba_lock, flags);
6209
1be18254 6210 dev_err(&instance->pdev->dev, "timed out while"
39a98554 6211 "waiting for HBA to recover\n");
6212 error = -ENODEV;
c64e483e 6213 goto out_up;
39a98554 6214 }
6215 spin_unlock_irqrestore(&instance->hba_lock, flags);
6216
c4a3e0a5 6217 error = megasas_mgmt_fw_ioctl(instance, user_ioc, ioc);
da0dc9fb 6218out_up:
c4a3e0a5
BS		 6219 up(&instance->ioctl_sem);
6220
da0dc9fb 6221out_kfree_ioc:
c4a3e0a5
BS		 6222 kfree(ioc);
6223 return error;
6224}
6225
6226static int megasas_mgmt_ioctl_aen(struct file *file, unsigned long arg)
6227{
6228 struct megasas_instance *instance;
6229 struct megasas_aen aen;
6230 int error;
39a98554 6231 int i;
6232 unsigned long flags;
6233 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 6234
6235 if (file->private_data != file) {
6236 printk(KERN_DEBUG "megasas: fasync_helper was not "
6237 "called first\n");
6238 return -EINVAL;
6239 }
6240
6241 if (copy_from_user(&aen, (void __user *)arg, sizeof(aen)))
6242 return -EFAULT;
6243
6244 instance = megasas_lookup_instance(aen.host_no);
6245
6246 if (!instance)
6247 return -ENODEV;
6248
39a98554 6249 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
6250 return -ENODEV;
0c79e681
YB		 6251 }
6252
6253 if (instance->unload == 1) {
6254 return -ENODEV;
6255 }
6256
39a98554 6257 for (i = 0; i < wait_time; i++) {
6258
6259 spin_lock_irqsave(&instance->hba_lock, flags);
6260 if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL) {
6261 spin_unlock_irqrestore(&instance->hba_lock,
6262 flags);
6263 break;
6264 }
6265
6266 spin_unlock_irqrestore(&instance->hba_lock, flags);
6267
6268 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6269 dev_notice(&instance->pdev->dev, "waiting for"
39a98554 6270 "controller reset to finish\n");
6271 }
6272
6273 msleep(1000);
6274 }
6275
6276 spin_lock_irqsave(&instance->hba_lock, flags);
6277 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
6278 spin_unlock_irqrestore(&instance->hba_lock, flags);
1be18254
BH		 6279 dev_err(&instance->pdev->dev, "timed out while waiting"
6280 "for HBA to recover\n");
39a98554 6281 return -ENODEV;
6282 }
6283 spin_unlock_irqrestore(&instance->hba_lock, flags);
6284
e5a69e27 6285 mutex_lock(&instance->aen_mutex);
c4a3e0a5
BS		 6286 error = megasas_register_aen(instance, aen.seq_num,
6287 aen.class_locale_word);
e5a69e27 6288 mutex_unlock(&instance->aen_mutex);
c4a3e0a5
BS		 6289 return error;
6290}
6291
6292/**
6293 * megasas_mgmt_ioctl - char node ioctl entry point
6294 */
6295static long
6296megasas_mgmt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
6297{
6298 switch (cmd) {
6299 case MEGASAS_IOC_FIRMWARE:
6300 return megasas_mgmt_ioctl_fw(file, arg);
6301
6302 case MEGASAS_IOC_GET_AEN:
6303 return megasas_mgmt_ioctl_aen(file, arg);
6304 }
6305
6306 return -ENOTTY;
6307}
6308
6309#ifdef CONFIG_COMPAT
6310static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg)
6311{
6312 struct compat_megasas_iocpacket __user *cioc =
6313 (struct compat_megasas_iocpacket __user *)arg;
6314 struct megasas_iocpacket __user *ioc =
6315 compat_alloc_user_space(sizeof(struct megasas_iocpacket));
6316 int i;
6317 int error = 0;
b3dc1a21 6318 compat_uptr_t ptr;
c4a3e0a5 6319
83aabc1b
JG		 6320 if (clear_user(ioc, sizeof(*ioc)))
6321 return -EFAULT;
c4a3e0a5
BS		 6322
6323 if (copy_in_user(&ioc->host_no, &cioc->host_no, sizeof(u16)) ||
6324 copy_in_user(&ioc->sgl_off, &cioc->sgl_off, sizeof(u32)) ||
6325 copy_in_user(&ioc->sense_off, &cioc->sense_off, sizeof(u32)) ||
6326 copy_in_user(&ioc->sense_len, &cioc->sense_len, sizeof(u32)) ||
6327 copy_in_user(ioc->frame.raw, cioc->frame.raw, 128) ||
6328 copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32)))
6329 return -EFAULT;
6330
b3dc1a21
TH		 6331 /*
6332 * The sense_ptr is used in megasas_mgmt_fw_ioctl only when
6333 * sense_len is not null, so prepare the 64bit value under
6334 * the same condition.
6335 */
6336 if (ioc->sense_len) {
6337 void __user **sense_ioc_ptr =
6338 (void __user **)(ioc->frame.raw + ioc->sense_off);
6339 compat_uptr_t *sense_cioc_ptr =
6340 (compat_uptr_t *)(cioc->frame.raw + cioc->sense_off);
6341 if (get_user(ptr, sense_cioc_ptr) ||
6342 put_user(compat_ptr(ptr), sense_ioc_ptr))
6343 return -EFAULT;
6344 }
c4a3e0a5 6345
b3dc1a21 6346 for (i = 0; i < MAX_IOCTL_SGE; i++) {
c4a3e0a5
BS		 6347 if (get_user(ptr, &cioc->sgl[i].iov_base) ||
6348 put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) ||
6349 copy_in_user(&ioc->sgl[i].iov_len,
6350 &cioc->sgl[i].iov_len, sizeof(compat_size_t)))
6351 return -EFAULT;
6352 }
6353
6354 error = megasas_mgmt_ioctl_fw(file, (unsigned long)ioc);
6355
6356 if (copy_in_user(&cioc->frame.hdr.cmd_status,
6357 &ioc->frame.hdr.cmd_status, sizeof(u8))) {
6358 printk(KERN_DEBUG "megasas: error copy_in_user cmd_status\n");
6359 return -EFAULT;
6360 }
6361 return error;
6362}
6363
6364static long
6365megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd,
6366 unsigned long arg)
6367{
6368 switch (cmd) {
cb59aa6a
SP		 6369 case MEGASAS_IOC_FIRMWARE32:
6370 return megasas_mgmt_compat_ioctl_fw(file, arg);
c4a3e0a5
BS		 6371 case MEGASAS_IOC_GET_AEN:
6372 return megasas_mgmt_ioctl_aen(file, arg);
6373 }
6374
6375 return -ENOTTY;
6376}
6377#endif
6378
6379/*
6380 * File operations structure for management interface
6381 */
00977a59 6382static const struct file_operations megasas_mgmt_fops = {
c4a3e0a5
BS		 6383 .owner = THIS_MODULE,
6384 .open = megasas_mgmt_open,
c4a3e0a5
BS		 6385 .fasync = megasas_mgmt_fasync,
6386 .unlocked_ioctl = megasas_mgmt_ioctl,
c3518837 6387 .poll = megasas_mgmt_poll,
c4a3e0a5
BS		 6388#ifdef CONFIG_COMPAT
6389 .compat_ioctl = megasas_mgmt_compat_ioctl,
6390#endif
6038f373 6391 .llseek = noop_llseek,
c4a3e0a5
BS		 6392};
6393
6394/*
6395 * PCI hotplug support registration structure
6396 */
6397static struct pci_driver megasas_pci_driver = {
6398
6399 .name = "megaraid_sas",
6400 .id_table = megasas_pci_table,
6401 .probe = megasas_probe_one,
6f039790 6402 .remove = megasas_detach_one,
31ea7088 6403 .suspend = megasas_suspend,
6404 .resume = megasas_resume,
c4a3e0a5
BS		 6405 .shutdown = megasas_shutdown,
6406};
6407
6408/*
6409 * Sysfs driver attributes
6410 */
6411static ssize_t megasas_sysfs_show_version(struct device_driver *dd, char *buf)
6412{
6413 return snprintf(buf, strlen(MEGASAS_VERSION) + 2, "%s\n",
6414 MEGASAS_VERSION);
6415}
6416
6417static DRIVER_ATTR(version, S_IRUGO, megasas_sysfs_show_version, NULL);
6418
09fced19
SS		 6419static ssize_t
6420megasas_sysfs_show_release_date(struct device_driver *dd, char *buf)
6421{
6422 return snprintf(buf, strlen(MEGASAS_RELDATE) + 2, "%s\n",
6423 MEGASAS_RELDATE);
6424}
6425
6426static DRIVER_ATTR(release_date, S_IRUGO, megasas_sysfs_show_release_date, NULL);
6427
72c4fd36
YB		 6428static ssize_t
6429megasas_sysfs_show_support_poll_for_event(struct device_driver *dd, char *buf)
6430{
6431 return sprintf(buf, "%u\n", support_poll_for_event);
6432}
6433
6434static DRIVER_ATTR(support_poll_for_event, S_IRUGO,
6435 megasas_sysfs_show_support_poll_for_event, NULL);
6436
837f5fe8
YB		 6437 static ssize_t
6438megasas_sysfs_show_support_device_change(struct device_driver *dd, char *buf)
6439{
6440 return sprintf(buf, "%u\n", support_device_change);
6441}
6442
6443static DRIVER_ATTR(support_device_change, S_IRUGO,
6444 megasas_sysfs_show_support_device_change, NULL);
6445
658dcedb
SP		 6446static ssize_t
6447megasas_sysfs_show_dbg_lvl(struct device_driver *dd, char *buf)
6448{
ad84db2e 6449 return sprintf(buf, "%u\n", megasas_dbg_lvl);
658dcedb
SP		 6450}
6451
6452static ssize_t
6453megasas_sysfs_set_dbg_lvl(struct device_driver *dd, const char *buf, size_t count)
6454{
6455 int retval = count;
da0dc9fb
BH		 6456
6457 if (sscanf(buf, "%u", &megasas_dbg_lvl) < 1) {
658dcedb
SP		 6458 printk(KERN_ERR "megasas: could not set dbg_lvl\n");
6459 retval = -EINVAL;
6460 }
6461 return retval;
6462}
6463
66dca9b8 6464static DRIVER_ATTR(dbg_lvl, S_IRUGO|S_IWUSR, megasas_sysfs_show_dbg_lvl,
ad84db2e 6465 megasas_sysfs_set_dbg_lvl);
6466
7e8a75f4
YB		 6467static void
6468megasas_aen_polling(struct work_struct *work)
6469{
6470 struct megasas_aen_event *ev =
c1d390d8 6471 container_of(work, struct megasas_aen_event, hotplug_work.work);
7e8a75f4
YB		 6472 struct megasas_instance *instance = ev->instance;
6473 union megasas_evt_class_locale class_locale;
6474 struct Scsi_Host *host;
6475 struct scsi_device *sdev1;
6476 u16 pd_index = 0;
c9786842 6477 u16 ld_index = 0;
7e8a75f4 6478 int i, j, doscan = 0;
229fe47c 6479 u32 seq_num, wait_time = MEGASAS_RESET_WAIT_TIME;
7e8a75f4
YB		 6480 int error;
6481
6482 if (!instance) {
6483 printk(KERN_ERR "invalid instance!\n");
6484 kfree(ev);
6485 return;
6486 }
229fe47c
AR		 6487
6488 /* Adjust event workqueue thread wait time for VF mode */
6489 if (instance->requestorId)
6490 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
6491
6492 /* Don't run the event workqueue thread if OCR is running */
6493 for (i = 0; i < wait_time; i++) {
6494 if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL)
6495 break;
6496 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6497 dev_notice(&instance->pdev->dev, "%s waiting for "
229fe47c
AR		 6498 "controller reset to finish for scsi%d\n",
6499 __func__, instance->host->host_no);
6500 }
6501 msleep(1000);
6502 }
6503
7e8a75f4
YB		 6504 instance->ev = NULL;
6505 host = instance->host;
6506 if (instance->evt_detail) {
6507
94cd65dd 6508 switch (le32_to_cpu(instance->evt_detail->code)) {
7e8a75f4 6509 case MR_EVT_PD_INSERTED:
c9786842
YB		 6510 if (megasas_get_pd_list(instance) == 0) {
6511 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
6512 for (j = 0;
6513 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6514 j++) {
6515
6516 pd_index =
6517 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6518
da0dc9fb 6519 sdev1 = scsi_device_lookup(host, i, j, 0);
c9786842
YB		 6520
6521 if (instance->pd_list[pd_index].driveState
6522 == MR_PD_STATE_SYSTEM) {
da0dc9fb 6523 if (!sdev1)
c9786842 6524 scsi_add_device(host, i, j, 0);
c9786842
YB		 6525
6526 if (sdev1)
6527 scsi_device_put(sdev1);
6528 }
6529 }
6530 }
6531 }
6532 doscan = 0;
6533 break;
6534
7e8a75f4 6535 case MR_EVT_PD_REMOVED:
c9786842 6536 if (megasas_get_pd_list(instance) == 0) {
c9786842
YB		 6537 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
6538 for (j = 0;
6539 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6540 j++) {
6541
6542 pd_index =
6543 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6544
da0dc9fb 6545 sdev1 = scsi_device_lookup(host, i, j, 0);
c9786842
YB		 6546
6547 if (instance->pd_list[pd_index].driveState
6548 == MR_PD_STATE_SYSTEM) {
da0dc9fb 6549 if (sdev1)
c9786842 6550 scsi_device_put(sdev1);
c9786842
YB		 6551 } else {
6552 if (sdev1) {
6553 scsi_remove_device(sdev1);
6554 scsi_device_put(sdev1);
6555 }
6556 }
6557 }
6558 }
6559 }
6560 doscan = 0;
6561 break;
6562
6563 case MR_EVT_LD_OFFLINE:
4c598b23 6564 case MR_EVT_CFG_CLEARED:
c9786842 6565 case MR_EVT_LD_DELETED:
229fe47c
AR		 6566 if (!instance->requestorId ||
6567 (instance->requestorId &&
6568 megasas_get_ld_vf_affiliation(instance, 0))) {
6569 if (megasas_ld_list_query(instance,
6570 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
6571 megasas_get_ld_list(instance);
6572 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
6573 for (j = 0;
6574 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6575 j++) {
6576
6577 ld_index =
6578 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6579
6580 sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6581
6582 if (instance->ld_ids[ld_index]
6583 != 0xff) {
6584 if (sdev1)
6585 scsi_device_put(sdev1);
6586 } else {
6587 if (sdev1) {
6588 scsi_remove_device(sdev1);
6589 scsi_device_put(sdev1);
6590 }
6591 }
c9786842
YB		 6592 }
6593 }
229fe47c 6594 doscan = 0;
c9786842 6595 }
c9786842
YB		 6596 break;
6597 case MR_EVT_LD_CREATED:
229fe47c
AR		 6598 if (!instance->requestorId ||
6599 (instance->requestorId &&
6600 megasas_get_ld_vf_affiliation(instance, 0))) {
6601 if (megasas_ld_list_query(instance,
6602 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
6603 megasas_get_ld_list(instance);
6604 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
6605 for (j = 0;
6606 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6607 j++) {
6608 ld_index =
6609 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6610
6611 sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6612
6613 if (instance->ld_ids[ld_index]
6614 != 0xff) {
6615 if (!sdev1)
6616 scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
c9786842 6617 }
229fe47c
AR		 6618 if (sdev1)
6619 scsi_device_put(sdev1);
c9786842
YB		 6620 }
6621 }
229fe47c 6622 doscan = 0;
c9786842 6623 }
c9786842 6624 break;
7e8a75f4 6625 case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED:
c9786842 6626 case MR_EVT_FOREIGN_CFG_IMPORTED:
9c915a8c 6627 case MR_EVT_LD_STATE_CHANGE:
7e8a75f4
YB		 6628 doscan = 1;
6629 break;
6630 default:
6631 doscan = 0;
6632 break;
6633 }
6634 } else {
1be18254 6635 dev_err(&instance->pdev->dev, "invalid evt_detail!\n");
7e8a75f4
YB		 6636 kfree(ev);
6637 return;
6638 }
6639
6640 if (doscan) {
1be18254 6641 dev_info(&instance->pdev->dev, "scanning for scsi%d...\n",
229fe47c 6642 instance->host->host_no);
58968fc8
HR		 6643 if (megasas_get_pd_list(instance) == 0) {
6644 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
6645 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
6646 pd_index = i*MEGASAS_MAX_DEV_PER_CHANNEL + j;
6647 sdev1 = scsi_device_lookup(host, i, j, 0);
6648 if (instance->pd_list[pd_index].driveState ==
6649 MR_PD_STATE_SYSTEM) {
6650 if (!sdev1) {
6651 scsi_add_device(host, i, j, 0);
6652 }
6653 if (sdev1)
6654 scsi_device_put(sdev1);
6655 } else {
6656 if (sdev1) {
6657 scsi_remove_device(sdev1);
6658 scsi_device_put(sdev1);
6659 }
7e8a75f4
YB		 6660 }
6661 }
6662 }
6663 }
c9786842 6664
229fe47c
AR		 6665 if (!instance->requestorId ||
6666 (instance->requestorId &&
6667 megasas_get_ld_vf_affiliation(instance, 0))) {
6668 if (megasas_ld_list_query(instance,
6669 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
6670 megasas_get_ld_list(instance);
6671 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
6672 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL;
6673 j++) {
6674 ld_index =
6675 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
c9786842 6676
229fe47c
AR		 6677 sdev1 = scsi_device_lookup(host,
6678 MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6679 if (instance->ld_ids[ld_index]
6680 != 0xff) {
6681 if (!sdev1)
6682 scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6683 else
6684 scsi_device_put(sdev1);
c9786842 6685 } else {
229fe47c
AR		 6686 if (sdev1) {
6687 scsi_remove_device(sdev1);
6688 scsi_device_put(sdev1);
6689 }
c9786842
YB		 6690 }
6691 }
6692 }
6693 }
7e8a75f4
YB		 6694 }
6695
da0dc9fb 6696 if (instance->aen_cmd != NULL) {
7e8a75f4
YB		 6697 kfree(ev);
6698 return ;
6699 }
6700
94cd65dd 6701 seq_num = le32_to_cpu(instance->evt_detail->seq_num) + 1;
7e8a75f4
YB		 6702
6703 /* Register AEN with FW for latest sequence number plus 1 */
6704 class_locale.members.reserved = 0;
6705 class_locale.members.locale = MR_EVT_LOCALE_ALL;
6706 class_locale.members.class = MR_EVT_CLASS_DEBUG;
6707 mutex_lock(&instance->aen_mutex);
6708 error = megasas_register_aen(instance, seq_num,
6709 class_locale.word);
6710 mutex_unlock(&instance->aen_mutex);
6711
6712 if (error)
1be18254 6713 dev_err(&instance->pdev->dev, "register aen failed error %x\n", error);
7e8a75f4
YB		 6714
6715 kfree(ev);
6716}
6717
c4a3e0a5
BS		 6718/**
6719 * megasas_init - Driver load entry point
6720 */
6721static int __init megasas_init(void)
6722{
6723 int rval;
6724
6725 /*
6726 * Announce driver version and other information
6727 */
d98a6deb 6728 pr_info("megasas: %s\n", MEGASAS_VERSION);
c4a3e0a5 6729
bd8d6dd4
KD		 6730 spin_lock_init(&poll_aen_lock);
6731
72c4fd36 6732 support_poll_for_event = 2;
837f5fe8 6733 support_device_change = 1;
72c4fd36 6734
c4a3e0a5
BS		 6735 memset(&megasas_mgmt_info, 0, sizeof(megasas_mgmt_info));
6736
6737 /*
6738 * Register character device node
6739 */
6740 rval = register_chrdev(0, "megaraid_sas_ioctl", &megasas_mgmt_fops);
6741
6742 if (rval < 0) {
6743 printk(KERN_DEBUG "megasas: failed to open device node\n");
6744 return rval;
6745 }
6746
6747 megasas_mgmt_majorno = rval;
6748
6749 /*
6750 * Register ourselves as PCI hotplug module
6751 */
4041b9cd 6752 rval = pci_register_driver(&megasas_pci_driver);
c4a3e0a5
BS		 6753
6754 if (rval) {
6774def6 6755 printk(KERN_DEBUG "megasas: PCI hotplug registration failed \n");
83aabc1b
JG		 6756 goto err_pcidrv;
6757 }
6758
6759 rval = driver_create_file(&megasas_pci_driver.driver,
6760 &driver_attr_version);
6761 if (rval)
6762 goto err_dcf_attr_ver;
72c4fd36 6763
09fced19
SS		 6764 rval = driver_create_file(&megasas_pci_driver.driver,
6765 &driver_attr_release_date);
6766 if (rval)
6767 goto err_dcf_rel_date;
6768
72c4fd36
YB		 6769 rval = driver_create_file(&megasas_pci_driver.driver,
6770 &driver_attr_support_poll_for_event);
6771 if (rval)
6772 goto err_dcf_support_poll_for_event;
6773
83aabc1b
JG		 6774 rval = driver_create_file(&megasas_pci_driver.driver,
6775 &driver_attr_dbg_lvl);
6776 if (rval)
6777 goto err_dcf_dbg_lvl;
837f5fe8
YB		 6778 rval = driver_create_file(&megasas_pci_driver.driver,
6779 &driver_attr_support_device_change);
6780 if (rval)
6781 goto err_dcf_support_device_change;
6782
c4a3e0a5 6783 return rval;
ad84db2e 6784
837f5fe8 6785err_dcf_support_device_change:
ad84db2e 6786 driver_remove_file(&megasas_pci_driver.driver,
6787 &driver_attr_dbg_lvl);
83aabc1b 6788err_dcf_dbg_lvl:
72c4fd36
YB		 6789 driver_remove_file(&megasas_pci_driver.driver,
6790 &driver_attr_support_poll_for_event);
72c4fd36 6791err_dcf_support_poll_for_event:
09fced19
SS		 6792 driver_remove_file(&megasas_pci_driver.driver,
6793 &driver_attr_release_date);
6794err_dcf_rel_date:
83aabc1b
JG		 6795 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
6796err_dcf_attr_ver:
6797 pci_unregister_driver(&megasas_pci_driver);
6798err_pcidrv:
6799 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
0d49016b 6800 return rval;
c4a3e0a5
BS		 6801}
6802
6803/**
6804 * megasas_exit - Driver unload entry point
6805 */
6806static void __exit megasas_exit(void)
6807{
658dcedb
SP		 6808 driver_remove_file(&megasas_pci_driver.driver,
6809 &driver_attr_dbg_lvl);
837f5fe8
YB		 6810 driver_remove_file(&megasas_pci_driver.driver,
6811 &driver_attr_support_poll_for_event);
6812 driver_remove_file(&megasas_pci_driver.driver,
6813 &driver_attr_support_device_change);
09fced19
SS		 6814 driver_remove_file(&megasas_pci_driver.driver,
6815 &driver_attr_release_date);
83aabc1b 6816 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
c4a3e0a5
BS		 6817
6818 pci_unregister_driver(&megasas_pci_driver);
6819 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
6820}
6821
6822module_init(megasas_init);
6823module_exit(megasas_exit);
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