]> git.ipfire.org Git - thirdparty/linux.git/blame - drivers/scsi/qla2xxx/qla_attr.c
projects / thirdparty / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge tag 'io_uring-5.7-2020-05-22' of git://git.kernel.dk/linux-block
[thirdparty/linux.git] / drivers / scsi / qla2xxx / qla_attr.c
CommitLineData
8482e118 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
bd21eaf9 3 * Copyright (c) 2003-2014 QLogic Corporation
8482e118 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
8482e118
AV		 6 */
7#include "qla_def.h"
2d70c103 8#include "qla_target.h"
8482e118 9
2c3dfe3f 10#include <linux/kthread.h>
7aaef27b 11#include <linux/vmalloc.h>
5a0e3ad6 12#include <linux/slab.h>
00eabe7c 13#include <linux/delay.h>
8482e118 14
a824ebb3 15static int qla24xx_vport_disable(struct fc_vport *, bool);
6e98016c 16
8482e118
AV		 17/* SYSFS attributes --------------------------------------------------------- */
18
19static ssize_t
2c3c8bea 20qla2x00_sysfs_read_fw_dump(struct file *filp, struct kobject *kobj,
91a69029
ZR		 21 struct bin_attribute *bin_attr,
22 char *buf, loff_t off, size_t count)
8482e118 23{
7b867cf7 24 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
8482e118 25 struct device, kobj)));
7b867cf7 26 struct qla_hw_data *ha = vha->hw;
08de2844 27 int rval = 0;
8482e118 28
81178772 29 if (!(ha->fw_dump_reading || ha->mctp_dump_reading))
8482e118 30 return 0;
8482e118 31
a6b95d1c 32 mutex_lock(&ha->optrom_mutex);
7ec0effd 33 if (IS_P3P_TYPE(ha)) {
08de2844
GM		 34 if (off < ha->md_template_size) {
35 rval = memory_read_from_buffer(buf, count,
36 &off, ha->md_tmplt_hdr, ha->md_template_size);
a6b95d1c
QT		 37 } else {
38 off -= ha->md_template_size;
39 rval = memory_read_from_buffer(buf, count,
40 &off, ha->md_dump, ha->md_dump_size);
08de2844 41 }
a6b95d1c
QT		 42 } else if (ha->mctp_dumped && ha->mctp_dump_reading) {
43 rval = memory_read_from_buffer(buf, count, &off, ha->mctp_dump,
81178772 44 MCTP_DUMP_SIZE);
a6b95d1c
QT		 45 } else if (ha->fw_dump_reading) {
46 rval = memory_read_from_buffer(buf, count, &off, ha->fw_dump,
b3dc9088 47 ha->fw_dump_len);
a6b95d1c
QT		 48 } else {
49 rval = 0;
50 }
51 mutex_unlock(&ha->optrom_mutex);
52 return rval;
8482e118
AV		 53}
54
55static ssize_t
2c3c8bea 56qla2x00_sysfs_write_fw_dump(struct file *filp, struct kobject *kobj,
91a69029
ZR		 57 struct bin_attribute *bin_attr,
58 char *buf, loff_t off, size_t count)
8482e118 59{
7b867cf7 60 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
8482e118 61 struct device, kobj)));
7b867cf7 62 struct qla_hw_data *ha = vha->hw;
8482e118 63 int reading;
8482e118
AV		 64
65 if (off != 0)
66 return (0);
67
68 reading = simple_strtol(buf, NULL, 10);
69 switch (reading) {
70 case 0:
a7a167bf
AV		 71 if (!ha->fw_dump_reading)
72 break;
8482e118 73
7c3df132 74 ql_log(ql_log_info, vha, 0x705d,
7b867cf7 75 "Firmware dump cleared on (%ld).\n", vha->host_no);
a7a167bf 76
7ec0effd 77 if (IS_P3P_TYPE(ha)) {
08de2844
GM		 78 qla82xx_md_free(vha);
79 qla82xx_md_prep(vha);
80 }
a7a167bf
AV		 81 ha->fw_dump_reading = 0;
82 ha->fw_dumped = 0;
8482e118
AV		 83 break;
84 case 1:
d4e3e04d 85 if (ha->fw_dumped && !ha->fw_dump_reading) {
8482e118
AV		 86 ha->fw_dump_reading = 1;
87
7c3df132 88 ql_log(ql_log_info, vha, 0x705e,
a7a167bf 89 "Raw firmware dump ready for read on (%ld).\n",
7b867cf7 90 vha->host_no);
8482e118
AV		 91 }
92 break;
a7a167bf 93 case 2:
7b867cf7 94 qla2x00_alloc_fw_dump(vha);
a7a167bf 95 break;
68af0811 96 case 3:
08de2844
GM		 97 if (IS_QLA82XX(ha)) {
98 qla82xx_idc_lock(ha);
99 qla82xx_set_reset_owner(vha);
100 qla82xx_idc_unlock(ha);
7ec0effd
AD		 101 } else if (IS_QLA8044(ha)) {
102 qla8044_idc_lock(ha);
103 qla82xx_set_reset_owner(vha);
104 qla8044_idc_unlock(ha);
d52cd774
QT		 105 } else {
106 ha->fw_dump_mpi = 1;
08de2844 107 qla2x00_system_error(vha);
d52cd774 108 }
08de2844
GM		 109 break;
110 case 4:
7ec0effd 111 if (IS_P3P_TYPE(ha)) {
08de2844
GM		 112 if (ha->md_tmplt_hdr)
113 ql_dbg(ql_dbg_user, vha, 0x705b,
114 "MiniDump supported with this firmware.\n");
115 else
116 ql_dbg(ql_dbg_user, vha, 0x709d,
117 "MiniDump not supported with this firmware.\n");
118 }
119 break;
120 case 5:
7ec0effd 121 if (IS_P3P_TYPE(ha))
08de2844 122 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
68af0811 123 break;
81178772
SK		 124 case 6:
125 if (!ha->mctp_dump_reading)
126 break;
127 ql_log(ql_log_info, vha, 0x70c1,
128 "MCTP dump cleared on (%ld).\n", vha->host_no);
129 ha->mctp_dump_reading = 0;
130 ha->mctp_dumped = 0;
131 break;
132 case 7:
133 if (ha->mctp_dumped && !ha->mctp_dump_reading) {
134 ha->mctp_dump_reading = 1;
135 ql_log(ql_log_info, vha, 0x70c2,
136 "Raw mctp dump ready for read on (%ld).\n",
137 vha->host_no);
138 }
139 break;
8482e118 140 }
71dfe9e7 141 return count;
8482e118
AV		 142}
143
144static struct bin_attribute sysfs_fw_dump_attr = {
145 .attr = {
146 .name = "fw_dump",
147 .mode = S_IRUSR | S_IWUSR,
8482e118
AV		 148 },
149 .size = 0,
150 .read = qla2x00_sysfs_read_fw_dump,
151 .write = qla2x00_sysfs_write_fw_dump,
152};
153
154static ssize_t
2c3c8bea 155qla2x00_sysfs_read_nvram(struct file *filp, struct kobject *kobj,
91a69029
ZR		 156 struct bin_attribute *bin_attr,
157 char *buf, loff_t off, size_t count)
8482e118 158{
7b867cf7 159 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
8482e118 160 struct device, kobj)));
7b867cf7 161 struct qla_hw_data *ha = vha->hw;
5fa8774c
JC		 162 uint32_t faddr;
163 struct active_regions active_regions = { };
8482e118 164
b3dc9088 165 if (!capable(CAP_SYS_ADMIN))
8482e118
AV		 166 return 0;
167
b6faaaf7
QT		 168 mutex_lock(&ha->optrom_mutex);
169 if (qla2x00_chip_is_down(vha)) {
170 mutex_unlock(&ha->optrom_mutex);
171 return -EAGAIN;
172 }
173
5fa8774c
JC		 174 if (!IS_NOCACHE_VPD_TYPE(ha)) {
175 mutex_unlock(&ha->optrom_mutex);
176 goto skip;
177 }
178
179 faddr = ha->flt_region_nvram;
180 if (IS_QLA28XX(ha)) {
4e71dcae 181 qla28xx_get_aux_images(vha, &active_regions);
5fa8774c
JC		 182 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
183 faddr = ha->flt_region_nvram_sec;
184 }
185 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
186
b6faaaf7
QT		 187 mutex_unlock(&ha->optrom_mutex);
188
5fa8774c 189skip:
b3dc9088
AM		 190 return memory_read_from_buffer(buf, count, &off, ha->nvram,
191 ha->nvram_size);
8482e118
AV		 192}
193
194static ssize_t
2c3c8bea 195qla2x00_sysfs_write_nvram(struct file *filp, struct kobject *kobj,
91a69029
ZR		 196 struct bin_attribute *bin_attr,
197 char *buf, loff_t off, size_t count)
8482e118 198{
7b867cf7 199 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
8482e118 200 struct device, kobj)));
7b867cf7 201 struct qla_hw_data *ha = vha->hw;
8482e118 202 uint16_t cnt;
8482e118 203
3d79038f
AV		 204 if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->nvram_size ||
205 !ha->isp_ops->write_nvram)
b668ae37 206 return -EINVAL;
8482e118
AV		 207
208 /* Checksum NVRAM. */
e428924c 209 if (IS_FWI2_CAPABLE(ha)) {
459c5378
AV		 210 uint32_t *iter;
211 uint32_t chksum;
212
213 iter = (uint32_t *)buf;
214 chksum = 0;
da08ef5c
JC		 215 for (cnt = 0; cnt < ((count >> 2) - 1); cnt++, iter++)
216 chksum += le32_to_cpu(*iter);
459c5378
AV		 217 chksum = ~chksum + 1;
218 *iter = cpu_to_le32(chksum);
219 } else {
220 uint8_t *iter;
221 uint8_t chksum;
222
223 iter = (uint8_t *)buf;
224 chksum = 0;
225 for (cnt = 0; cnt < count - 1; cnt++)
226 chksum += *iter++;
227 chksum = ~chksum + 1;
228 *iter = chksum;
229 }
8482e118 230
2533cf67 231 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
7c3df132 232 ql_log(ql_log_warn, vha, 0x705f,
2533cf67
LC		 233 "HBA not online, failing NVRAM update.\n");
234 return -EAGAIN;
235 }
236
b6faaaf7
QT		 237 mutex_lock(&ha->optrom_mutex);
238 if (qla2x00_chip_is_down(vha)) {
109a5987 239 mutex_unlock(&ha->optrom_mutex);
b6faaaf7
QT		 240 return -EAGAIN;
241 }
242
8482e118 243 /* Write NVRAM. */
3695310e
JC		 244 ha->isp_ops->write_nvram(vha, buf, ha->nvram_base, count);
245 ha->isp_ops->read_nvram(vha, ha->nvram, ha->nvram_base,
246 count);
b6faaaf7 247 mutex_unlock(&ha->optrom_mutex);
8482e118 248
7c3df132
SK		 249 ql_dbg(ql_dbg_user, vha, 0x7060,
250 "Setting ISP_ABORT_NEEDED\n");
2533cf67 251 /* NVRAM settings take effect immediately. */
7b867cf7 252 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2533cf67
LC		 253 qla2xxx_wake_dpc(vha);
254 qla2x00_wait_for_chip_reset(vha);
26b8d348 255
b668ae37 256 return count;
8482e118
AV		 257}
258
259static struct bin_attribute sysfs_nvram_attr = {
260 .attr = {
261 .name = "nvram",
262 .mode = S_IRUSR | S_IWUSR,
8482e118 263 },
1b3f6365 264 .size = 512,
8482e118
AV		 265 .read = qla2x00_sysfs_read_nvram,
266 .write = qla2x00_sysfs_write_nvram,
267};
268
854165f4 269static ssize_t
2c3c8bea 270qla2x00_sysfs_read_optrom(struct file *filp, struct kobject *kobj,
91a69029
ZR		 271 struct bin_attribute *bin_attr,
272 char *buf, loff_t off, size_t count)
854165f4 273{
7b867cf7 274 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
854165f4 275 struct device, kobj)));
7b867cf7 276 struct qla_hw_data *ha = vha->hw;
7a8ab9c8 277 ssize_t rval = 0;
854165f4 278
c7702b8c
MG		 279 mutex_lock(&ha->optrom_mutex);
280
854165f4 281 if (ha->optrom_state != QLA_SREADING)
c7702b8c 282 goto out;
854165f4 283
7a8ab9c8
CD		 284 rval = memory_read_from_buffer(buf, count, &off, ha->optrom_buffer,
285 ha->optrom_region_size);
c7702b8c
MG		 286
287out:
7a8ab9c8
CD		 288 mutex_unlock(&ha->optrom_mutex);
289
290 return rval;
854165f4
AV		 291}
292
293static ssize_t
2c3c8bea 294qla2x00_sysfs_write_optrom(struct file *filp, struct kobject *kobj,
91a69029
ZR		 295 struct bin_attribute *bin_attr,
296 char *buf, loff_t off, size_t count)
854165f4 297{
7b867cf7 298 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
854165f4 299 struct device, kobj)));
7b867cf7 300 struct qla_hw_data *ha = vha->hw;
854165f4 301
c7702b8c
MG		 302 mutex_lock(&ha->optrom_mutex);
303
304 if (ha->optrom_state != QLA_SWRITING) {
305 mutex_unlock(&ha->optrom_mutex);
854165f4 306 return -EINVAL;
c7702b8c
MG		 307 }
308 if (off > ha->optrom_region_size) {
309 mutex_unlock(&ha->optrom_mutex);
854165f4 310 return -ERANGE;
c7702b8c 311 }
b7cc176c
JC		 312 if (off + count > ha->optrom_region_size)
313 count = ha->optrom_region_size - off;
854165f4
AV		 314
315 memcpy(&ha->optrom_buffer[off], buf, count);
7a8ab9c8 316 mutex_unlock(&ha->optrom_mutex);
854165f4
AV		 317
318 return count;
319}
320
321static struct bin_attribute sysfs_optrom_attr = {
322 .attr = {
323 .name = "optrom",
324 .mode = S_IRUSR | S_IWUSR,
854165f4 325 },
c3a2f0df 326 .size = 0,
854165f4
AV		 327 .read = qla2x00_sysfs_read_optrom,
328 .write = qla2x00_sysfs_write_optrom,
329};
330
331static ssize_t
2c3c8bea 332qla2x00_sysfs_write_optrom_ctl(struct file *filp, struct kobject *kobj,
91a69029
ZR		 333 struct bin_attribute *bin_attr,
334 char *buf, loff_t off, size_t count)
854165f4 335{
7b867cf7 336 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
854165f4 337 struct device, kobj)));
7b867cf7 338 struct qla_hw_data *ha = vha->hw;
b7cc176c
JC		 339 uint32_t start = 0;
340 uint32_t size = ha->optrom_size;
341 int val, valid;
7a8ab9c8 342 ssize_t rval = count;
854165f4
AV		 343
344 if (off)
b668ae37 345 return -EINVAL;
854165f4 346
85880801 347 if (unlikely(pci_channel_offline(ha->pdev)))
b668ae37 348 return -EAGAIN;
85880801 349
b7cc176c
JC		 350 if (sscanf(buf, "%d:%x:%x", &val, &start, &size) < 1)
351 return -EINVAL;
352 if (start > ha->optrom_size)
854165f4 353 return -EINVAL;
e6f77540
DC		 354 if (size > ha->optrom_size - start)
355 size = ha->optrom_size - start;
854165f4 356
7a8ab9c8 357 mutex_lock(&ha->optrom_mutex);
b6faaaf7
QT		 358 if (qla2x00_chip_is_down(vha)) {
359 mutex_unlock(&ha->optrom_mutex);
360 return -EAGAIN;
361 }
854165f4
AV		 362 switch (val) {
363 case 0:
364 if (ha->optrom_state != QLA_SREADING &&
7a8ab9c8
CD		 365 ha->optrom_state != QLA_SWRITING) {
366 rval = -EINVAL;
367 goto out;
368 }
854165f4 369 ha->optrom_state = QLA_SWAITING;
b7cc176c 370
7c3df132 371 ql_dbg(ql_dbg_user, vha, 0x7061,
b7cc176c 372 "Freeing flash region allocation -- 0x%x bytes.\n",
7c3df132 373 ha->optrom_region_size);
b7cc176c 374
854165f4
AV		 375 vfree(ha->optrom_buffer);
376 ha->optrom_buffer = NULL;
377 break;
378 case 1:
7a8ab9c8
CD		 379 if (ha->optrom_state != QLA_SWAITING) {
380 rval = -EINVAL;
381 goto out;
382 }
854165f4 383
b7cc176c 384 ha->optrom_region_start = start;
5cbdae10 385 ha->optrom_region_size = size;
b7cc176c 386
854165f4 387 ha->optrom_state = QLA_SREADING;
56cc8fae 388 ha->optrom_buffer = vzalloc(ha->optrom_region_size);
854165f4 389 if (ha->optrom_buffer == NULL) {
7c3df132 390 ql_log(ql_log_warn, vha, 0x7062,
854165f4 391 "Unable to allocate memory for optrom retrieval "
b7cc176c 392 "(%x).\n", ha->optrom_region_size);
854165f4
AV		 393
394 ha->optrom_state = QLA_SWAITING;
7a8ab9c8
CD		 395 rval = -ENOMEM;
396 goto out;
854165f4
AV		 397 }
398
86fbee86 399 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
7c3df132
SK		 400 ql_log(ql_log_warn, vha, 0x7063,
401 "HBA not online, failing NVRAM update.\n");
7a8ab9c8
CD		 402 rval = -EAGAIN;
403 goto out;
86fbee86
LC		 404 }
405
7c3df132 406 ql_dbg(ql_dbg_user, vha, 0x7064,
b7cc176c 407 "Reading flash region -- 0x%x/0x%x.\n",
7c3df132 408 ha->optrom_region_start, ha->optrom_region_size);
b7cc176c 409
7b867cf7 410 ha->isp_ops->read_optrom(vha, ha->optrom_buffer,
b7cc176c 411 ha->optrom_region_start, ha->optrom_region_size);
854165f4
AV		 412 break;
413 case 2:
7a8ab9c8
CD		 414 if (ha->optrom_state != QLA_SWAITING) {
415 rval = -EINVAL;
416 goto out;
417 }
854165f4 418
b7cc176c
JC		 419 /*
420 * We need to be more restrictive on which FLASH regions are
421 * allowed to be updated via user-space. Regions accessible
422 * via this method include:
423 *
424 * ISP21xx/ISP22xx/ISP23xx type boards:
425 *
426 * 0x000000 -> 0x020000 -- Boot code.
427 *
428 * ISP2322/ISP24xx type boards:
429 *
430 * 0x000000 -> 0x07ffff -- Boot code.
431 * 0x080000 -> 0x0fffff -- Firmware.
432 *
433 * ISP25xx type boards:
434 *
435 * 0x000000 -> 0x07ffff -- Boot code.
436 * 0x080000 -> 0x0fffff -- Firmware.
437 * 0x120000 -> 0x12ffff -- VPD and HBA parameters.
e81d1bcb
AV		 438 *
439 * > ISP25xx type boards:
440 *
441 * None -- should go through BSG.
b7cc176c
JC		 442 */
443 valid = 0;
444 if (ha->optrom_size == OPTROM_SIZE_2300 && start == 0)
445 valid = 1;
e81d1bcb 446 else if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
a9083016 447 valid = 1;
b7cc176c 448 if (!valid) {
7c3df132 449 ql_log(ql_log_warn, vha, 0x7065,
b7cc176c 450 "Invalid start region 0x%x/0x%x.\n", start, size);
7a8ab9c8
CD		 451 rval = -EINVAL;
452 goto out;
b7cc176c
JC		 453 }
454
455 ha->optrom_region_start = start;
5cbdae10 456 ha->optrom_region_size = size;
b7cc176c 457
854165f4 458 ha->optrom_state = QLA_SWRITING;
56cc8fae 459 ha->optrom_buffer = vzalloc(ha->optrom_region_size);
854165f4 460 if (ha->optrom_buffer == NULL) {
7c3df132 461 ql_log(ql_log_warn, vha, 0x7066,
854165f4 462 "Unable to allocate memory for optrom update "
7c3df132 463 "(%x)\n", ha->optrom_region_size);
854165f4
AV		 464
465 ha->optrom_state = QLA_SWAITING;
7a8ab9c8
CD		 466 rval = -ENOMEM;
467 goto out;
854165f4 468 }
b7cc176c 469
7c3df132 470 ql_dbg(ql_dbg_user, vha, 0x7067,
b7cc176c 471 "Staging flash region write -- 0x%x/0x%x.\n",
7c3df132 472 ha->optrom_region_start, ha->optrom_region_size);
b7cc176c 473
854165f4
AV		 474 break;
475 case 3:
7a8ab9c8
CD		 476 if (ha->optrom_state != QLA_SWRITING) {
477 rval = -EINVAL;
478 goto out;
479 }
854165f4 480
2533cf67 481 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
7c3df132 482 ql_log(ql_log_warn, vha, 0x7068,
2533cf67 483 "HBA not online, failing flash update.\n");
7a8ab9c8
CD		 484 rval = -EAGAIN;
485 goto out;
2533cf67
LC		 486 }
487
7c3df132 488 ql_dbg(ql_dbg_user, vha, 0x7069,
b7cc176c 489 "Writing flash region -- 0x%x/0x%x.\n",
7c3df132 490 ha->optrom_region_start, ha->optrom_region_size);
b7cc176c 491
8d8b83f5 492 rval = ha->isp_ops->write_optrom(vha, ha->optrom_buffer,
b7cc176c 493 ha->optrom_region_start, ha->optrom_region_size);
8d8b83f5
QT		 494 if (rval)
495 rval = -EIO;
854165f4 496 break;
b7cc176c 497 default:
7a8ab9c8 498 rval = -EINVAL;
854165f4 499 }
7a8ab9c8
CD		 500
501out:
502 mutex_unlock(&ha->optrom_mutex);
503 return rval;
854165f4
AV		 504}
505
506static struct bin_attribute sysfs_optrom_ctl_attr = {
507 .attr = {
508 .name = "optrom_ctl",
509 .mode = S_IWUSR,
854165f4
AV		 510 },
511 .size = 0,
512 .write = qla2x00_sysfs_write_optrom_ctl,
513};
514
6f641790 515static ssize_t
2c3c8bea 516qla2x00_sysfs_read_vpd(struct file *filp, struct kobject *kobj,
91a69029
ZR		 517 struct bin_attribute *bin_attr,
518 char *buf, loff_t off, size_t count)
6f641790 519{
7b867cf7 520 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
6f641790 521 struct device, kobj)));
7b867cf7 522 struct qla_hw_data *ha = vha->hw;
4243c115 523 uint32_t faddr;
5fa8774c 524 struct active_regions active_regions = { };
6f641790 525
85880801 526 if (unlikely(pci_channel_offline(ha->pdev)))
b668ae37 527 return -EAGAIN;
85880801 528
b3dc9088 529 if (!capable(CAP_SYS_ADMIN))
b668ae37 530 return -EINVAL;
6f641790 531
3695310e
JC		 532 if (IS_NOCACHE_VPD_TYPE(ha))
533 goto skip;
4243c115 534
3695310e 535 faddr = ha->flt_region_vpd << 2;
4243c115 536
5fa8774c
JC		 537 if (IS_QLA28XX(ha)) {
538 qla28xx_get_aux_images(vha, &active_regions);
539 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
540 faddr = ha->flt_region_vpd_sec << 2;
541
542 ql_dbg(ql_dbg_init, vha, 0x7070,
543 "Loading %s nvram image.\n",
544 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
545 "primary" : "secondary");
546 }
3695310e
JC		 547
548 mutex_lock(&ha->optrom_mutex);
549 if (qla2x00_chip_is_down(vha)) {
b6faaaf7 550 mutex_unlock(&ha->optrom_mutex);
3695310e 551 return -EAGAIN;
4243c115 552 }
3695310e
JC		 553
554 ha->isp_ops->read_optrom(vha, ha->vpd, faddr, ha->vpd_size);
555 mutex_unlock(&ha->optrom_mutex);
5fa8774c
JC		 556
557 ha->isp_ops->read_optrom(vha, ha->vpd, faddr, ha->vpd_size);
3695310e 558skip:
b3dc9088 559 return memory_read_from_buffer(buf, count, &off, ha->vpd, ha->vpd_size);
6f641790
AV		 560}
561
562static ssize_t
2c3c8bea 563qla2x00_sysfs_write_vpd(struct file *filp, struct kobject *kobj,
91a69029
ZR		 564 struct bin_attribute *bin_attr,
565 char *buf, loff_t off, size_t count)
6f641790 566{
7b867cf7 567 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
6f641790 568 struct device, kobj)));
7b867cf7 569 struct qla_hw_data *ha = vha->hw;
d0c3eefa 570 uint8_t *tmp_data;
6f641790 571
85880801
AV		 572 if (unlikely(pci_channel_offline(ha->pdev)))
573 return 0;
574
b726d99d
QT		 575 if (qla2x00_chip_is_down(vha))
576 return 0;
577
3d79038f
AV		 578 if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->vpd_size ||
579 !ha->isp_ops->write_nvram)
6f641790
AV		 580 return 0;
581
2533cf67 582 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
7c3df132 583 ql_log(ql_log_warn, vha, 0x706a,
2533cf67
LC		 584 "HBA not online, failing VPD update.\n");
585 return -EAGAIN;
586 }
587
b6faaaf7
QT		 588 mutex_lock(&ha->optrom_mutex);
589 if (qla2x00_chip_is_down(vha)) {
590 mutex_unlock(&ha->optrom_mutex);
591 return -EAGAIN;
592 }
593
6f641790 594 /* Write NVRAM. */
3695310e
JC		 595 ha->isp_ops->write_nvram(vha, buf, ha->vpd_base, count);
596 ha->isp_ops->read_nvram(vha, ha->vpd, ha->vpd_base, count);
6f641790 597
d0c3eefa 598 /* Update flash version information for 4Gb & above. */
b6faaaf7
QT		 599 if (!IS_FWI2_CAPABLE(ha)) {
600 mutex_unlock(&ha->optrom_mutex);
b668ae37 601 return -EINVAL;
b6faaaf7 602 }
d0c3eefa
LC		 603
604 tmp_data = vmalloc(256);
605 if (!tmp_data) {
b6faaaf7 606 mutex_unlock(&ha->optrom_mutex);
7c3df132 607 ql_log(ql_log_warn, vha, 0x706b,
d0c3eefa 608 "Unable to allocate memory for VPD information update.\n");
b668ae37 609 return -ENOMEM;
d0c3eefa
LC		 610 }
611 ha->isp_ops->get_flash_version(vha, tmp_data);
612 vfree(tmp_data);
b668ae37 613
b6faaaf7
QT		 614 mutex_unlock(&ha->optrom_mutex);
615
6f641790
AV		 616 return count;
617}
618
619static struct bin_attribute sysfs_vpd_attr = {
620 .attr = {
621 .name = "vpd",
622 .mode = S_IRUSR | S_IWUSR,
6f641790
AV		 623 },
624 .size = 0,
625 .read = qla2x00_sysfs_read_vpd,
626 .write = qla2x00_sysfs_write_vpd,
627};
628
88729e53 629static ssize_t
2c3c8bea 630qla2x00_sysfs_read_sfp(struct file *filp, struct kobject *kobj,
91a69029
ZR		 631 struct bin_attribute *bin_attr,
632 char *buf, loff_t off, size_t count)
88729e53 633{
7b867cf7 634 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
88729e53 635 struct device, kobj)));
88729e53
AV		 636 int rval;
637
e4e3a2ce 638 if (!capable(CAP_SYS_ADMIN) || off != 0 || count < SFP_DEV_SIZE)
88729e53
AV		 639 return 0;
640
b6faaaf7
QT		 641 mutex_lock(&vha->hw->optrom_mutex);
642 if (qla2x00_chip_is_down(vha)) {
643 mutex_unlock(&vha->hw->optrom_mutex);
e8711085 644 return 0;
b6faaaf7 645 }
7c3df132 646
e4e3a2ce 647 rval = qla2x00_read_sfp_dev(vha, buf, count);
b6faaaf7
QT		 648 mutex_unlock(&vha->hw->optrom_mutex);
649
e4e3a2ce
QT		 650 if (rval)
651 return -EIO;
88729e53
AV		 652
653 return count;
654}
655
656static struct bin_attribute sysfs_sfp_attr = {
657 .attr = {
658 .name = "sfp",
659 .mode = S_IRUSR | S_IWUSR,
88729e53 660 },
e4e3a2ce 661 .size = SFP_DEV_SIZE,
88729e53
AV		 662 .read = qla2x00_sysfs_read_sfp,
663};
664
6e181be5 665static ssize_t
2c3c8bea 666qla2x00_sysfs_write_reset(struct file *filp, struct kobject *kobj,
6e181be5
LC		 667 struct bin_attribute *bin_attr,
668 char *buf, loff_t off, size_t count)
669{
670 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
671 struct device, kobj)));
672 struct qla_hw_data *ha = vha->hw;
a9083016 673 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6e181be5 674 int type;
7d613ac6 675 uint32_t idc_control;
8c2cf7d4 676 uint8_t *tmp_data = NULL;
bd432bb5 677
6e181be5 678 if (off != 0)
b668ae37 679 return -EINVAL;
6e181be5
LC		 680
681 type = simple_strtol(buf, NULL, 10);
682 switch (type) {
683 case 0x2025c:
7c3df132
SK		 684 ql_log(ql_log_info, vha, 0x706e,
685 "Issuing ISP reset.\n");
6e181be5
LC		 686
687 scsi_block_requests(vha->host);
08de2844 688 if (IS_QLA82XX(ha)) {
b6d0d9d5 689 ha->flags.isp82xx_no_md_cap = 1;
08de2844
GM		 690 qla82xx_idc_lock(ha);
691 qla82xx_set_reset_owner(vha);
692 qla82xx_idc_unlock(ha);
7ec0effd
AD		 693 } else if (IS_QLA8044(ha)) {
694 qla8044_idc_lock(ha);
695 idc_control = qla8044_rd_reg(ha,
696 QLA8044_IDC_DRV_CTRL);
697 qla8044_wr_reg(ha, QLA8044_IDC_DRV_CTRL,
698 (idc_control | GRACEFUL_RESET_BIT1));
699 qla82xx_set_reset_owner(vha);
700 qla8044_idc_unlock(ha);
701 } else {
702 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
703 qla2xxx_wake_dpc(vha);
08de2844 704 }
6e181be5
LC		 705 qla2x00_wait_for_chip_reset(vha);
706 scsi_unblock_requests(vha->host);
707 break;
708 case 0x2025d:
7d613ac6 709 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha))
b668ae37 710 return -EPERM;
6e181be5 711
7c3df132
SK		 712 ql_log(ql_log_info, vha, 0x706f,
713 "Issuing MPI reset.\n");
6e181be5 714
ecc89f25 715 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
7d613ac6
SV		 716 uint32_t idc_control;
717
718 qla83xx_idc_lock(vha, 0);
719 __qla83xx_get_idc_control(vha, &idc_control);
720 idc_control |= QLA83XX_IDC_GRACEFUL_RESET;
721 __qla83xx_set_idc_control(vha, idc_control);
722 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
723 QLA8XXX_DEV_NEED_RESET);
724 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
725 qla83xx_idc_unlock(vha, 0);
726 break;
727 } else {
728 /* Make sure FC side is not in reset */
e6803efa
BVA		 729 WARN_ON_ONCE(qla2x00_wait_for_hba_online(vha) !=
730 QLA_SUCCESS);
7d613ac6
SV		 731
732 /* Issue MPI reset */
733 scsi_block_requests(vha->host);
734 if (qla81xx_restart_mpi_firmware(vha) != QLA_SUCCESS)
735 ql_log(ql_log_warn, vha, 0x7070,
736 "MPI reset failed.\n");
737 scsi_unblock_requests(vha->host);
738 break;
739 }
a9083016 740 case 0x2025e:
7ec0effd 741 if (!IS_P3P_TYPE(ha) || vha != base_vha) {
7c3df132 742 ql_log(ql_log_info, vha, 0x7071,
5a68a1c2 743 "FCoE ctx reset not supported.\n");
b668ae37 744 return -EPERM;
a9083016
GM		 745 }
746
7c3df132
SK		 747 ql_log(ql_log_info, vha, 0x7072,
748 "Issuing FCoE ctx reset.\n");
a9083016
GM		 749 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
750 qla2xxx_wake_dpc(vha);
751 qla2x00_wait_for_fcoe_ctx_reset(vha);
752 break;
7d613ac6
SV		 753 case 0x2025f:
754 if (!IS_QLA8031(ha))
755 return -EPERM;
756 ql_log(ql_log_info, vha, 0x70bc,
757 "Disabling Reset by IDC control\n");
758 qla83xx_idc_lock(vha, 0);
759 __qla83xx_get_idc_control(vha, &idc_control);
760 idc_control |= QLA83XX_IDC_RESET_DISABLED;
761 __qla83xx_set_idc_control(vha, idc_control);
762 qla83xx_idc_unlock(vha, 0);
763 break;
764 case 0x20260:
765 if (!IS_QLA8031(ha))
766 return -EPERM;
767 ql_log(ql_log_info, vha, 0x70bd,
768 "Enabling Reset by IDC control\n");
769 qla83xx_idc_lock(vha, 0);
770 __qla83xx_get_idc_control(vha, &idc_control);
771 idc_control &= ~QLA83XX_IDC_RESET_DISABLED;
772 __qla83xx_set_idc_control(vha, idc_control);
773 qla83xx_idc_unlock(vha, 0);
774 break;
8c2cf7d4
SC		 775 case 0x20261:
776 ql_dbg(ql_dbg_user, vha, 0x70e0,
777 "Updating cache versions without reset ");
778
779 tmp_data = vmalloc(256);
780 if (!tmp_data) {
781 ql_log(ql_log_warn, vha, 0x70e1,
782 "Unable to allocate memory for VPD information update.\n");
783 return -ENOMEM;
784 }
785 ha->isp_ops->get_flash_version(vha, tmp_data);
786 vfree(tmp_data);
787 break;
6e181be5
LC		 788 }
789 return count;
790}
791
792static struct bin_attribute sysfs_reset_attr = {
793 .attr = {
794 .name = "reset",
795 .mode = S_IWUSR,
796 },
797 .size = 0,
798 .write = qla2x00_sysfs_write_reset,
799};
800
6eb54715
HM		 801static ssize_t
802qla2x00_issue_logo(struct file *filp, struct kobject *kobj,
803 struct bin_attribute *bin_attr,
804 char *buf, loff_t off, size_t count)
805{
806 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
807 struct device, kobj)));
808 int type;
6eb54715
HM		 809 port_id_t did;
810
22ebde16
QT		 811 if (!capable(CAP_SYS_ADMIN))
812 return 0;
813
814 if (unlikely(pci_channel_offline(vha->hw->pdev)))
815 return 0;
816
817 if (qla2x00_chip_is_down(vha))
818 return 0;
819
6eb54715
HM		 820 type = simple_strtol(buf, NULL, 10);
821
822 did.b.domain = (type & 0x00ff0000) >> 16;
823 did.b.area = (type & 0x0000ff00) >> 8;
824 did.b.al_pa = (type & 0x000000ff);
825
83548fe2 826 ql_log(ql_log_info, vha, 0xd04d, "portid=%02x%02x%02x done\n",
6eb54715
HM		 827 did.b.domain, did.b.area, did.b.al_pa);
828
829 ql_log(ql_log_info, vha, 0x70e4, "%s: %d\n", __func__, type);
830
91f42b33 831 qla24xx_els_dcmd_iocb(vha, ELS_DCMD_LOGO, did);
6eb54715
HM		 832 return count;
833}
834
835static struct bin_attribute sysfs_issue_logo_attr = {
836 .attr = {
837 .name = "issue_logo",
838 .mode = S_IWUSR,
839 },
840 .size = 0,
841 .write = qla2x00_issue_logo,
842};
843
ce0423f4 844static ssize_t
2c3c8bea 845qla2x00_sysfs_read_xgmac_stats(struct file *filp, struct kobject *kobj,
ce0423f4
AV		 846 struct bin_attribute *bin_attr,
847 char *buf, loff_t off, size_t count)
848{
849 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
850 struct device, kobj)));
851 struct qla_hw_data *ha = vha->hw;
852 int rval;
853 uint16_t actual_size;
854
855 if (!capable(CAP_SYS_ADMIN) || off != 0 || count > XGMAC_DATA_SIZE)
856 return 0;
857
22ebde16
QT		 858 if (unlikely(pci_channel_offline(ha->pdev)))
859 return 0;
b6faaaf7
QT		 860 mutex_lock(&vha->hw->optrom_mutex);
861 if (qla2x00_chip_is_down(vha)) {
862 mutex_unlock(&vha->hw->optrom_mutex);
22ebde16 863 return 0;
b6faaaf7 864 }
22ebde16 865
ce0423f4
AV		 866 if (ha->xgmac_data)
867 goto do_read;
868
869 ha->xgmac_data = dma_alloc_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
870 &ha->xgmac_data_dma, GFP_KERNEL);
871 if (!ha->xgmac_data) {
b6faaaf7 872 mutex_unlock(&vha->hw->optrom_mutex);
7c3df132 873 ql_log(ql_log_warn, vha, 0x7076,
ce0423f4
AV		 874 "Unable to allocate memory for XGMAC read-data.\n");
875 return 0;
876 }
877
878do_read:
879 actual_size = 0;
880 memset(ha->xgmac_data, 0, XGMAC_DATA_SIZE);
881
882 rval = qla2x00_get_xgmac_stats(vha, ha->xgmac_data_dma,
883 XGMAC_DATA_SIZE, &actual_size);
b6faaaf7
QT		 884
885 mutex_unlock(&vha->hw->optrom_mutex);
ce0423f4 886 if (rval != QLA_SUCCESS) {
7c3df132 887 ql_log(ql_log_warn, vha, 0x7077,
ce0423f4
AV		 888 "Unable to read XGMAC data (%x).\n", rval);
889 count = 0;
890 }
891
58e2753c 892 count = actual_size > count ? count : actual_size;
ce0423f4
AV		 893 memcpy(buf, ha->xgmac_data, count);
894
895 return count;
896}
897
898static struct bin_attribute sysfs_xgmac_stats_attr = {
899 .attr = {
900 .name = "xgmac_stats",
901 .mode = S_IRUSR,
902 },
903 .size = 0,
904 .read = qla2x00_sysfs_read_xgmac_stats,
905};
906
11bbc1d8 907static ssize_t
2c3c8bea 908qla2x00_sysfs_read_dcbx_tlv(struct file *filp, struct kobject *kobj,
11bbc1d8
AV		 909 struct bin_attribute *bin_attr,
910 char *buf, loff_t off, size_t count)
911{
912 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
913 struct device, kobj)));
914 struct qla_hw_data *ha = vha->hw;
915 int rval;
11bbc1d8
AV		 916
917 if (!capable(CAP_SYS_ADMIN) || off != 0 || count > DCBX_TLV_DATA_SIZE)
918 return 0;
919
920 if (ha->dcbx_tlv)
921 goto do_read;
b6faaaf7
QT		 922 mutex_lock(&vha->hw->optrom_mutex);
923 if (qla2x00_chip_is_down(vha)) {
924 mutex_unlock(&vha->hw->optrom_mutex);
22ebde16 925 return 0;
b6faaaf7 926 }
22ebde16 927
11bbc1d8
AV		 928 ha->dcbx_tlv = dma_alloc_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
929 &ha->dcbx_tlv_dma, GFP_KERNEL);
930 if (!ha->dcbx_tlv) {
b6faaaf7 931 mutex_unlock(&vha->hw->optrom_mutex);
7c3df132 932 ql_log(ql_log_warn, vha, 0x7078,
11bbc1d8 933 "Unable to allocate memory for DCBX TLV read-data.\n");
b668ae37 934 return -ENOMEM;
11bbc1d8
AV		 935 }
936
937do_read:
11bbc1d8
AV		 938 memset(ha->dcbx_tlv, 0, DCBX_TLV_DATA_SIZE);
939
940 rval = qla2x00_get_dcbx_params(vha, ha->dcbx_tlv_dma,
941 DCBX_TLV_DATA_SIZE);
b6faaaf7
QT		 942
943 mutex_unlock(&vha->hw->optrom_mutex);
944
11bbc1d8 945 if (rval != QLA_SUCCESS) {
7c3df132
SK		 946 ql_log(ql_log_warn, vha, 0x7079,
947 "Unable to read DCBX TLV (%x).\n", rval);
b668ae37 948 return -EIO;
11bbc1d8
AV		 949 }
950
951 memcpy(buf, ha->dcbx_tlv, count);
952
953 return count;
954}
955
956static struct bin_attribute sysfs_dcbx_tlv_attr = {
957 .attr = {
958 .name = "dcbx_tlv",
959 .mode = S_IRUSR,
960 },
961 .size = 0,
962 .read = qla2x00_sysfs_read_dcbx_tlv,
963};
964
f1663ad5
AV		 965static struct sysfs_entry {
966 char *name;
967 struct bin_attribute *attr;
3695310e 968 int type;
f1663ad5
AV		 969} bin_file_entries[] = {
970 { "fw_dump", &sysfs_fw_dump_attr, },
971 { "nvram", &sysfs_nvram_attr, },
972 { "optrom", &sysfs_optrom_attr, },
973 { "optrom_ctl", &sysfs_optrom_ctl_attr, },
974 { "vpd", &sysfs_vpd_attr, 1 },
975 { "sfp", &sysfs_sfp_attr, 1 },
6e181be5 976 { "reset", &sysfs_reset_attr, },
6eb54715 977 { "issue_logo", &sysfs_issue_logo_attr, },
ce0423f4 978 { "xgmac_stats", &sysfs_xgmac_stats_attr, 3 },
11bbc1d8 979 { "dcbx_tlv", &sysfs_dcbx_tlv_attr, 3 },
46ddab7b 980 { NULL },
f1663ad5
AV		 981};
982
8482e118 983void
7b867cf7 984qla2x00_alloc_sysfs_attr(scsi_qla_host_t *vha)
8482e118 985{
7b867cf7 986 struct Scsi_Host *host = vha->host;
f1663ad5
AV		 987 struct sysfs_entry *iter;
988 int ret;
8482e118 989
f1663ad5 990 for (iter = bin_file_entries; iter->name; iter++) {
3695310e 991 if (iter->type && !IS_FWI2_CAPABLE(vha->hw))
f1663ad5 992 continue;
3695310e 993 if (iter->type == 2 && !IS_QLA25XX(vha->hw))
ad0ecd61 994 continue;
3695310e 995 if (iter->type == 3 && !(IS_CNA_CAPABLE(vha->hw)))
ce0423f4 996 continue;
f1663ad5
AV		 997
998 ret = sysfs_create_bin_file(&host->shost_gendev.kobj,
999 iter->attr);
1000 if (ret)
7c3df132
SK		 1001 ql_log(ql_log_warn, vha, 0x00f3,
1002 "Unable to create sysfs %s binary attribute (%d).\n",
1003 iter->name, ret);
1004 else
1005 ql_dbg(ql_dbg_init, vha, 0x00f4,
0bf0efa1 1006 "Successfully created sysfs %s binary attribute.\n",
7c3df132 1007 iter->name);
7914d004 1008 }
8482e118
AV		 1009}
1010
1011void
fe1b806f 1012qla2x00_free_sysfs_attr(scsi_qla_host_t *vha, bool stop_beacon)
8482e118 1013{
7b867cf7 1014 struct Scsi_Host *host = vha->host;
f1663ad5 1015 struct sysfs_entry *iter;
7b867cf7 1016 struct qla_hw_data *ha = vha->hw;
f1663ad5
AV		 1017
1018 for (iter = bin_file_entries; iter->name; iter++) {
3695310e 1019 if (iter->type && !IS_FWI2_CAPABLE(ha))
f1663ad5 1020 continue;
3695310e 1021 if (iter->type == 2 && !IS_QLA25XX(ha))
ad0ecd61 1022 continue;
3695310e 1023 if (iter->type == 3 && !(IS_CNA_CAPABLE(ha)))
ce0423f4 1024 continue;
3695310e
JC		 1025 if (iter->type == 0x27 &&
1026 (!IS_QLA27XX(ha) || !IS_QLA28XX(ha)))
7473952e 1027 continue;
8482e118 1028
88729e53 1029 sysfs_remove_bin_file(&host->shost_gendev.kobj,
f1663ad5 1030 iter->attr);
7914d004 1031 }
f6df144c 1032
fe1b806f 1033 if (stop_beacon && ha->beacon_blink_led == 1)
7b867cf7 1034 ha->isp_ops->beacon_off(vha);
8482e118
AV		 1035}
1036
afb046e2
AV		 1037/* Scsi_Host attributes. */
1038
1039static ssize_t
50b81275 1040qla2x00_driver_version_show(struct device *dev,
ee959b00 1041 struct device_attribute *attr, char *buf)
afb046e2 1042{
15904d76 1043 return scnprintf(buf, PAGE_SIZE, "%s\n", qla2x00_version_str);
afb046e2
AV		 1044}
1045
1046static ssize_t
ee959b00
TJ		 1047qla2x00_fw_version_show(struct device *dev,
1048 struct device_attribute *attr, char *buf)
afb046e2 1049{
7b867cf7
AC		 1050 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1051 struct qla_hw_data *ha = vha->hw;
1052 char fw_str[128];
afb046e2 1053
15904d76 1054 return scnprintf(buf, PAGE_SIZE, "%s\n",
df57caba 1055 ha->isp_ops->fw_version_str(vha, fw_str, sizeof(fw_str)));
afb046e2
AV		 1056}
1057
1058static ssize_t
ee959b00
TJ		 1059qla2x00_serial_num_show(struct device *dev, struct device_attribute *attr,
1060 char *buf)
afb046e2 1061{
7b867cf7
AC		 1062 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1063 struct qla_hw_data *ha = vha->hw;
afb046e2
AV		 1064 uint32_t sn;
1065
8ae6d9c7 1066 if (IS_QLAFX00(vha->hw)) {
15904d76 1067 return scnprintf(buf, PAGE_SIZE, "%s\n",
8ae6d9c7
GM		 1068 vha->hw->mr.serial_num);
1069 } else if (IS_FWI2_CAPABLE(ha)) {
ad5fa025
JC		 1070 qla2xxx_get_vpd_field(vha, "SN", buf, PAGE_SIZE - 1);
1071 return strlen(strcat(buf, "\n"));
1ee27146 1072 }
8b7afc2a 1073
afb046e2 1074 sn = ((ha->serial0 & 0x1f) << 16) | (ha->serial2 << 8) | ha->serial1;
15904d76 1075 return scnprintf(buf, PAGE_SIZE, "%c%05d\n", 'A' + sn / 100000,
afb046e2
AV		 1076 sn % 100000);
1077}
1078
1079static ssize_t
ee959b00
TJ		 1080qla2x00_isp_name_show(struct device *dev, struct device_attribute *attr,
1081 char *buf)
afb046e2 1082{
7b867cf7 1083 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
bd432bb5 1084
15904d76 1085 return scnprintf(buf, PAGE_SIZE, "ISP%04X\n", vha->hw->pdev->device);
afb046e2
AV		 1086}
1087
1088static ssize_t
ee959b00
TJ		 1089qla2x00_isp_id_show(struct device *dev, struct device_attribute *attr,
1090 char *buf)
afb046e2 1091{
7b867cf7
AC		 1092 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1093 struct qla_hw_data *ha = vha->hw;
8ae6d9c7
GM		 1094
1095 if (IS_QLAFX00(vha->hw))
15904d76 1096 return scnprintf(buf, PAGE_SIZE, "%s\n",
8ae6d9c7
GM		 1097 vha->hw->mr.hw_version);
1098
15904d76 1099 return scnprintf(buf, PAGE_SIZE, "%04x %04x %04x %04x\n",
afb046e2
AV		 1100 ha->product_id[0], ha->product_id[1], ha->product_id[2],
1101 ha->product_id[3]);
1102}
1103
1104static ssize_t
ee959b00
TJ		 1105qla2x00_model_name_show(struct device *dev, struct device_attribute *attr,
1106 char *buf)
afb046e2 1107{
7b867cf7 1108 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
8ae6d9c7 1109
15904d76 1110 return scnprintf(buf, PAGE_SIZE, "%s\n", vha->hw->model_number);
afb046e2
AV		 1111}
1112
1113static ssize_t
ee959b00
TJ		 1114qla2x00_model_desc_show(struct device *dev, struct device_attribute *attr,
1115 char *buf)
afb046e2 1116{
7b867cf7 1117 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
bd432bb5 1118
82e6afd4 1119 return scnprintf(buf, PAGE_SIZE, "%s\n", vha->hw->model_desc);
afb046e2
AV		 1120}
1121
1122static ssize_t
ee959b00
TJ		 1123qla2x00_pci_info_show(struct device *dev, struct device_attribute *attr,
1124 char *buf)
afb046e2 1125{
7b867cf7 1126 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
afb046e2
AV		 1127 char pci_info[30];
1128
15904d76 1129 return scnprintf(buf, PAGE_SIZE, "%s\n",
dc6d6d34
BVA		 1130 vha->hw->isp_ops->pci_info_str(vha, pci_info,
1131 sizeof(pci_info)));
afb046e2
AV		 1132}
1133
1134static ssize_t
bbd1ae41
HR		 1135qla2x00_link_state_show(struct device *dev, struct device_attribute *attr,
1136 char *buf)
afb046e2 1137{
7b867cf7
AC		 1138 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1139 struct qla_hw_data *ha = vha->hw;
afb046e2
AV		 1140 int len = 0;
1141
7b867cf7 1142 if (atomic_read(&vha->loop_state) == LOOP_DOWN ||
62542f4b
AV		 1143 atomic_read(&vha->loop_state) == LOOP_DEAD ||
1144 vha->device_flags & DFLG_NO_CABLE)
15904d76 1145 len = scnprintf(buf, PAGE_SIZE, "Link Down\n");
7b867cf7 1146 else if (atomic_read(&vha->loop_state) != LOOP_READY ||
22ebde16 1147 qla2x00_chip_is_down(vha))
15904d76 1148 len = scnprintf(buf, PAGE_SIZE, "Unknown Link State\n");
afb046e2 1149 else {
15904d76 1150 len = scnprintf(buf, PAGE_SIZE, "Link Up - ");
afb046e2
AV		 1151
1152 switch (ha->current_topology) {
1153 case ISP_CFG_NL:
15904d76 1154 len += scnprintf(buf + len, PAGE_SIZE-len, "Loop\n");
afb046e2
AV		 1155 break;
1156 case ISP_CFG_FL:
15904d76 1157 len += scnprintf(buf + len, PAGE_SIZE-len, "FL_Port\n");
afb046e2
AV		 1158 break;
1159 case ISP_CFG_N:
15904d76 1160 len += scnprintf(buf + len, PAGE_SIZE-len,
afb046e2
AV		 1161 "N_Port to N_Port\n");
1162 break;
1163 case ISP_CFG_F:
15904d76 1164 len += scnprintf(buf + len, PAGE_SIZE-len, "F_Port\n");
afb046e2
AV		 1165 break;
1166 default:
15904d76 1167 len += scnprintf(buf + len, PAGE_SIZE-len, "Loop\n");
afb046e2
AV		 1168 break;
1169 }
1170 }
1171 return len;
1172}
1173
4fdfefe5 1174static ssize_t
ee959b00
TJ		 1175qla2x00_zio_show(struct device *dev, struct device_attribute *attr,
1176 char *buf)
4fdfefe5 1177{
7b867cf7 1178 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
4fdfefe5
AV		 1179 int len = 0;
1180
7b867cf7 1181 switch (vha->hw->zio_mode) {
4fdfefe5 1182 case QLA_ZIO_MODE_6:
15904d76 1183 len += scnprintf(buf + len, PAGE_SIZE-len, "Mode 6\n");
4fdfefe5
AV		 1184 break;
1185 case QLA_ZIO_DISABLED:
15904d76 1186 len += scnprintf(buf + len, PAGE_SIZE-len, "Disabled\n");
4fdfefe5
AV		 1187 break;
1188 }
1189 return len;
1190}
1191
1192static ssize_t
ee959b00
TJ		 1193qla2x00_zio_store(struct device *dev, struct device_attribute *attr,
1194 const char *buf, size_t count)
4fdfefe5 1195{
7b867cf7
AC		 1196 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1197 struct qla_hw_data *ha = vha->hw;
4fdfefe5
AV		 1198 int val = 0;
1199 uint16_t zio_mode;
1200
4a59f71d
AV		 1201 if (!IS_ZIO_SUPPORTED(ha))
1202 return -ENOTSUPP;
1203
4fdfefe5
AV		 1204 if (sscanf(buf, "%d", &val) != 1)
1205 return -EINVAL;
1206
4a59f71d 1207 if (val)
4fdfefe5 1208 zio_mode = QLA_ZIO_MODE_6;
4a59f71d 1209 else
4fdfefe5 1210 zio_mode = QLA_ZIO_DISABLED;
4fdfefe5
AV		 1211
1212 /* Update per-hba values and queue a reset. */
1213 if (zio_mode != QLA_ZIO_DISABLED || ha->zio_mode != QLA_ZIO_DISABLED) {
1214 ha->zio_mode = zio_mode;
7b867cf7 1215 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4fdfefe5
AV		 1216 }
1217 return strlen(buf);
1218}
1219
1220static ssize_t
ee959b00
TJ		 1221qla2x00_zio_timer_show(struct device *dev, struct device_attribute *attr,
1222 char *buf)
4fdfefe5 1223{
7b867cf7 1224 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
4fdfefe5 1225
15904d76 1226 return scnprintf(buf, PAGE_SIZE, "%d us\n", vha->hw->zio_timer * 100);
4fdfefe5
AV		 1227}
1228
1229static ssize_t
ee959b00
TJ		 1230qla2x00_zio_timer_store(struct device *dev, struct device_attribute *attr,
1231 const char *buf, size_t count)
4fdfefe5 1232{
7b867cf7 1233 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
4fdfefe5
AV		 1234 int val = 0;
1235 uint16_t zio_timer;
1236
1237 if (sscanf(buf, "%d", &val) != 1)
1238 return -EINVAL;
1239 if (val > 25500 || val < 100)
1240 return -ERANGE;
1241
1242 zio_timer = (uint16_t)(val / 100);
7b867cf7 1243 vha->hw->zio_timer = zio_timer;
4fdfefe5
AV		 1244
1245 return strlen(buf);
1246}
1247
8b4673ba
QT		 1248static ssize_t
1249qla_zio_threshold_show(struct device *dev, struct device_attribute *attr,
1250 char *buf)
1251{
1252 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1253
1254 return scnprintf(buf, PAGE_SIZE, "%d exchanges\n",
1255 vha->hw->last_zio_threshold);
1256}
1257
1258static ssize_t
1259qla_zio_threshold_store(struct device *dev, struct device_attribute *attr,
1260 const char *buf, size_t count)
1261{
1262 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1263 int val = 0;
1264
1265 if (vha->hw->zio_mode != QLA_ZIO_MODE_6)
1266 return -EINVAL;
1267 if (sscanf(buf, "%d", &val) != 1)
1268 return -EINVAL;
1703659d 1269 if (val < 0 || val > 256)
8b4673ba
QT		 1270 return -ERANGE;
1271
1272 atomic_set(&vha->hw->zio_threshold, val);
1273 return strlen(buf);
1274}
1275
f6df144c 1276static ssize_t
ee959b00
TJ		 1277qla2x00_beacon_show(struct device *dev, struct device_attribute *attr,
1278 char *buf)
f6df144c 1279{
7b867cf7 1280 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
f6df144c
AV		 1281 int len = 0;
1282
7b867cf7 1283 if (vha->hw->beacon_blink_led)
15904d76 1284 len += scnprintf(buf + len, PAGE_SIZE-len, "Enabled\n");
f6df144c 1285 else
15904d76 1286 len += scnprintf(buf + len, PAGE_SIZE-len, "Disabled\n");
f6df144c
AV		 1287 return len;
1288}
1289
1290static ssize_t
ee959b00
TJ		 1291qla2x00_beacon_store(struct device *dev, struct device_attribute *attr,
1292 const char *buf, size_t count)
f6df144c 1293{
7b867cf7
AC		 1294 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1295 struct qla_hw_data *ha = vha->hw;
f6df144c
AV		 1296 int val = 0;
1297 int rval;
1298
1299 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1300 return -EPERM;
1301
b6faaaf7
QT		 1302 if (sscanf(buf, "%d", &val) != 1)
1303 return -EINVAL;
1304
1305 mutex_lock(&vha->hw->optrom_mutex);
22ebde16 1306 if (qla2x00_chip_is_down(vha)) {
b6faaaf7 1307 mutex_unlock(&vha->hw->optrom_mutex);
7c3df132 1308 ql_log(ql_log_warn, vha, 0x707a,
f6df144c
AV		 1309 "Abort ISP active -- ignoring beacon request.\n");
1310 return -EBUSY;
1311 }
1312
f6df144c 1313 if (val)
7b867cf7 1314 rval = ha->isp_ops->beacon_on(vha);
f6df144c 1315 else
7b867cf7 1316 rval = ha->isp_ops->beacon_off(vha);
f6df144c
AV		 1317
1318 if (rval != QLA_SUCCESS)
1319 count = 0;
1320
b6faaaf7
QT		 1321 mutex_unlock(&vha->hw->optrom_mutex);
1322
f6df144c
AV		 1323 return count;
1324}
1325
07553b1e
JC		 1326static ssize_t
1327qla2x00_beacon_config_show(struct device *dev, struct device_attribute *attr,
1328 char *buf)
1329{
1330 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1331 struct qla_hw_data *ha = vha->hw;
1332 uint16_t led[3] = { 0 };
1333
1334 if (!IS_QLA2031(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
1335 return -EPERM;
1336
1337 if (ql26xx_led_config(vha, 0, led))
1338 return scnprintf(buf, PAGE_SIZE, "\n");
1339
1340 return scnprintf(buf, PAGE_SIZE, "%#04hx %#04hx %#04hx\n",
1341 led[0], led[1], led[2]);
1342}
1343
1344static ssize_t
1345qla2x00_beacon_config_store(struct device *dev, struct device_attribute *attr,
1346 const char *buf, size_t count)
1347{
1348 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1349 struct qla_hw_data *ha = vha->hw;
1350 uint16_t options = BIT_0;
1351 uint16_t led[3] = { 0 };
1352 uint16_t word[4];
1353 int n;
1354
1355 if (!IS_QLA2031(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
1356 return -EPERM;
1357
1358 n = sscanf(buf, "%hx %hx %hx %hx", word+0, word+1, word+2, word+3);
1359 if (n == 4) {
1360 if (word[0] == 3) {
1361 options |= BIT_3|BIT_2|BIT_1;
1362 led[0] = word[1];
1363 led[1] = word[2];
1364 led[2] = word[3];
1365 goto write;
1366 }
1367 return -EINVAL;
1368 }
1369
1370 if (n == 2) {
1371 /* check led index */
1372 if (word[0] == 0) {
1373 options |= BIT_2;
1374 led[0] = word[1];
1375 goto write;
1376 }
1377 if (word[0] == 1) {
1378 options |= BIT_3;
1379 led[1] = word[1];
1380 goto write;
1381 }
1382 if (word[0] == 2) {
1383 options |= BIT_1;
1384 led[2] = word[1];
1385 goto write;
1386 }
1387 return -EINVAL;
1388 }
1389
1390 return -EINVAL;
1391
1392write:
1393 if (ql26xx_led_config(vha, options, led))
1394 return -EFAULT;
1395
1396 return count;
1397}
1398
30c47662 1399static ssize_t
ee959b00
TJ		 1400qla2x00_optrom_bios_version_show(struct device *dev,
1401 struct device_attribute *attr, char *buf)
30c47662 1402{
7b867cf7
AC		 1403 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1404 struct qla_hw_data *ha = vha->hw;
bd432bb5 1405
15904d76 1406 return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->bios_revision[1],
30c47662
AV		 1407 ha->bios_revision[0]);
1408}
1409
1410static ssize_t
ee959b00
TJ		 1411qla2x00_optrom_efi_version_show(struct device *dev,
1412 struct device_attribute *attr, char *buf)
30c47662 1413{
7b867cf7
AC		 1414 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1415 struct qla_hw_data *ha = vha->hw;
bd432bb5 1416
15904d76 1417 return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->efi_revision[1],
30c47662
AV		 1418 ha->efi_revision[0]);
1419}
1420
1421static ssize_t
ee959b00
TJ		 1422qla2x00_optrom_fcode_version_show(struct device *dev,
1423 struct device_attribute *attr, char *buf)
30c47662 1424{
7b867cf7
AC		 1425 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1426 struct qla_hw_data *ha = vha->hw;
bd432bb5 1427
15904d76 1428 return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->fcode_revision[1],
30c47662
AV		 1429 ha->fcode_revision[0]);
1430}
1431
1432static ssize_t
ee959b00
TJ		 1433qla2x00_optrom_fw_version_show(struct device *dev,
1434 struct device_attribute *attr, char *buf)
30c47662 1435{
7b867cf7
AC		 1436 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1437 struct qla_hw_data *ha = vha->hw;
bd432bb5 1438
15904d76 1439 return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d %d\n",
30c47662
AV		 1440 ha->fw_revision[0], ha->fw_revision[1], ha->fw_revision[2],
1441 ha->fw_revision[3]);
1442}
1443
0f2d962f
MI		 1444static ssize_t
1445qla2x00_optrom_gold_fw_version_show(struct device *dev,
1446 struct device_attribute *attr, char *buf)
1447{
1448 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1449 struct qla_hw_data *ha = vha->hw;
1450
ecc89f25
JC		 1451 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
1452 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
15904d76 1453 return scnprintf(buf, PAGE_SIZE, "\n");
0f2d962f 1454
15904d76 1455 return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d (%d)\n",
0f2d962f
MI		 1456 ha->gold_fw_version[0], ha->gold_fw_version[1],
1457 ha->gold_fw_version[2], ha->gold_fw_version[3]);
1458}
1459
e5f5f6f7
HZ		 1460static ssize_t
1461qla2x00_total_isp_aborts_show(struct device *dev,
1462 struct device_attribute *attr, char *buf)
1463{
7b867cf7 1464 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
bd432bb5 1465
15904d76 1466 return scnprintf(buf, PAGE_SIZE, "%d\n",
2be21fa2 1467 vha->qla_stats.total_isp_aborts);
e5f5f6f7
HZ		 1468}
1469
9a069e19
GM		 1470static ssize_t
1471qla24xx_84xx_fw_version_show(struct device *dev,
1472 struct device_attribute *attr, char *buf)
1473{
1474 int rval = QLA_SUCCESS;
3695310e 1475 uint16_t status[2] = { 0 };
9a069e19
GM		 1476 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1477 struct qla_hw_data *ha = vha->hw;
1478
0b9dae6a 1479 if (!IS_QLA84XX(ha))
15904d76 1480 return scnprintf(buf, PAGE_SIZE, "\n");
0b9dae6a 1481
3695310e 1482 if (!ha->cs84xx->op_fw_version) {
0b9dae6a 1483 rval = qla84xx_verify_chip(vha, status);
9a069e19 1484
3695310e
JC		 1485 if (!rval && !status[0])
1486 return scnprintf(buf, PAGE_SIZE, "%u\n",
1487 (uint32_t)ha->cs84xx->op_fw_version);
1488 }
9a069e19 1489
15904d76 1490 return scnprintf(buf, PAGE_SIZE, "\n");
9a069e19
GM		 1491}
1492
2a3192a3
JC		 1493static ssize_t
1494qla2x00_serdes_version_show(struct device *dev, struct device_attribute *attr,
1495 char *buf)
1496{
1497 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1498 struct qla_hw_data *ha = vha->hw;
1499
1500 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
1501 return scnprintf(buf, PAGE_SIZE, "\n");
1502
1503 return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d\n",
1504 ha->serdes_version[0], ha->serdes_version[1],
1505 ha->serdes_version[2]);
1506}
1507
3a03eb79
AV		 1508static ssize_t
1509qla2x00_mpi_version_show(struct device *dev, struct device_attribute *attr,
1510 char *buf)
1511{
1512 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1513 struct qla_hw_data *ha = vha->hw;
1514
03aa868c 1515 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha) && !IS_QLA8044(ha) &&
ecc89f25 1516 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
15904d76 1517 return scnprintf(buf, PAGE_SIZE, "\n");
3a03eb79 1518
15904d76 1519 return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d (%x)\n",
3a03eb79 1520 ha->mpi_version[0], ha->mpi_version[1], ha->mpi_version[2],
55a96158
AV		 1521 ha->mpi_capabilities);
1522}
1523
1524static ssize_t
1525qla2x00_phy_version_show(struct device *dev, struct device_attribute *attr,
1526 char *buf)
1527{
1528 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1529 struct qla_hw_data *ha = vha->hw;
1530
f863f603 1531 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
15904d76 1532 return scnprintf(buf, PAGE_SIZE, "\n");
55a96158 1533
15904d76 1534 return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d\n",
55a96158 1535 ha->phy_version[0], ha->phy_version[1], ha->phy_version[2]);
3a03eb79
AV		 1536}
1537
fbcbb5d0
LC		 1538static ssize_t
1539qla2x00_flash_block_size_show(struct device *dev,
1540 struct device_attribute *attr, char *buf)
1541{
1542 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1543 struct qla_hw_data *ha = vha->hw;
1544
15904d76 1545 return scnprintf(buf, PAGE_SIZE, "0x%x\n", ha->fdt_block_size);
fbcbb5d0
LC		 1546}
1547
bad7001c
AV		 1548static ssize_t
1549qla2x00_vlan_id_show(struct device *dev, struct device_attribute *attr,
1550 char *buf)
1551{
1552 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1553
6246b8a1 1554 if (!IS_CNA_CAPABLE(vha->hw))
15904d76 1555 return scnprintf(buf, PAGE_SIZE, "\n");
bad7001c 1556
15904d76 1557 return scnprintf(buf, PAGE_SIZE, "%d\n", vha->fcoe_vlan_id);
bad7001c
AV		 1558}
1559
1560static ssize_t
1561qla2x00_vn_port_mac_address_show(struct device *dev,
1562 struct device_attribute *attr, char *buf)
1563{
1564 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1565
6246b8a1 1566 if (!IS_CNA_CAPABLE(vha->hw))
15904d76 1567 return scnprintf(buf, PAGE_SIZE, "\n");
bad7001c 1568
15904d76 1569 return scnprintf(buf, PAGE_SIZE, "%pMR\n", vha->fcoe_vn_port_mac);
bad7001c
AV		 1570}
1571
7f774025
AV		 1572static ssize_t
1573qla2x00_fabric_param_show(struct device *dev, struct device_attribute *attr,
1574 char *buf)
1575{
1576 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1577
15904d76 1578 return scnprintf(buf, PAGE_SIZE, "%d\n", vha->hw->switch_cap);
7f774025
AV		 1579}
1580
794a5691
AV		 1581static ssize_t
1582qla2x00_thermal_temp_show(struct device *dev,
1583 struct device_attribute *attr, char *buf)
1584{
1585 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
fe52f6e1 1586 uint16_t temp = 0;
b6faaaf7 1587 int rc;
794a5691 1588
b6faaaf7 1589 mutex_lock(&vha->hw->optrom_mutex);
22ebde16 1590 if (qla2x00_chip_is_down(vha)) {
b6faaaf7 1591 mutex_unlock(&vha->hw->optrom_mutex);
fe52f6e1
JC		 1592 ql_log(ql_log_warn, vha, 0x70dc, "ISP reset active.\n");
1593 goto done;
1594 }
1595
1596 if (vha->hw->flags.eeh_busy) {
b6faaaf7 1597 mutex_unlock(&vha->hw->optrom_mutex);
fe52f6e1
JC		 1598 ql_log(ql_log_warn, vha, 0x70dd, "PCI EEH busy.\n");
1599 goto done;
1600 }
1601
b6faaaf7
QT		 1602 rc = qla2x00_get_thermal_temp(vha, &temp);
1603 mutex_unlock(&vha->hw->optrom_mutex);
1604 if (rc == QLA_SUCCESS)
15904d76 1605 return scnprintf(buf, PAGE_SIZE, "%d\n", temp);
794a5691 1606
fe52f6e1 1607done:
15904d76 1608 return scnprintf(buf, PAGE_SIZE, "\n");
794a5691
AV		 1609}
1610
656e8912
AV		 1611static ssize_t
1612qla2x00_fw_state_show(struct device *dev, struct device_attribute *attr,
1613 char *buf)
1614{
1615 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
85880801 1616 int rval = QLA_FUNCTION_FAILED;
b5a340dd 1617 uint16_t state[6];
8ae6d9c7
GM		 1618 uint32_t pstate;
1619
1620 if (IS_QLAFX00(vha->hw)) {
1621 pstate = qlafx00_fw_state_show(dev, attr, buf);
15904d76 1622 return scnprintf(buf, PAGE_SIZE, "0x%x\n", pstate);
8ae6d9c7 1623 }
656e8912 1624
b6faaaf7
QT		 1625 mutex_lock(&vha->hw->optrom_mutex);
1626 if (qla2x00_chip_is_down(vha)) {
1627 mutex_unlock(&vha->hw->optrom_mutex);
7c3df132
SK		 1628 ql_log(ql_log_warn, vha, 0x707c,
1629 "ISP reset active.\n");
b6faaaf7
QT		 1630 goto out;
1631 } else if (vha->hw->flags.eeh_busy) {
1632 mutex_unlock(&vha->hw->optrom_mutex);
1633 goto out;
1634 }
1635
1636 rval = qla2x00_get_firmware_state(vha, state);
1637 mutex_unlock(&vha->hw->optrom_mutex);
1638out:
1639 if (rval != QLA_SUCCESS) {
656e8912 1640 memset(state, -1, sizeof(state));
b6faaaf7
QT		 1641 rval = qla2x00_get_firmware_state(vha, state);
1642 }
656e8912 1643
b5a340dd
JC		 1644 return scnprintf(buf, PAGE_SIZE, "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
1645 state[0], state[1], state[2], state[3], state[4], state[5]);
656e8912
AV		 1646}
1647
a9b6f722
SK		 1648static ssize_t
1649qla2x00_diag_requests_show(struct device *dev,
1650 struct device_attribute *attr, char *buf)
1651{
1652 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1653
1654 if (!IS_BIDI_CAPABLE(vha->hw))
15904d76 1655 return scnprintf(buf, PAGE_SIZE, "\n");
a9b6f722 1656
15904d76 1657 return scnprintf(buf, PAGE_SIZE, "%llu\n", vha->bidi_stats.io_count);
a9b6f722
SK		 1658}
1659
1660static ssize_t
1661qla2x00_diag_megabytes_show(struct device *dev,
1662 struct device_attribute *attr, char *buf)
1663{
1664 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1665
1666 if (!IS_BIDI_CAPABLE(vha->hw))
15904d76 1667 return scnprintf(buf, PAGE_SIZE, "\n");
a9b6f722 1668
15904d76 1669 return scnprintf(buf, PAGE_SIZE, "%llu\n",
a9b6f722
SK		 1670 vha->bidi_stats.transfer_bytes >> 20);
1671}
1672
40129a4c
HZ		 1673static ssize_t
1674qla2x00_fw_dump_size_show(struct device *dev, struct device_attribute *attr,
1675 char *buf)
1676{
1677 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1678 struct qla_hw_data *ha = vha->hw;
1679 uint32_t size;
1680
1681 if (!ha->fw_dumped)
1682 size = 0;
cf3af76b 1683 else if (IS_P3P_TYPE(ha))
40129a4c
HZ		 1684 size = ha->md_template_size + ha->md_dump_size;
1685 else
1686 size = ha->fw_dump_len;
1687
15904d76 1688 return scnprintf(buf, PAGE_SIZE, "%d\n", size);
40129a4c
HZ		 1689}
1690
a1b23c5a
CD		 1691static ssize_t
1692qla2x00_allow_cna_fw_dump_show(struct device *dev,
1693 struct device_attribute *attr, char *buf)
1694{
1695 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1696
1697 if (!IS_P3P_TYPE(vha->hw))
1698 return scnprintf(buf, PAGE_SIZE, "\n");
1699 else
1700 return scnprintf(buf, PAGE_SIZE, "%s\n",
1701 vha->hw->allow_cna_fw_dump ? "true" : "false");
1702}
1703
1704static ssize_t
1705qla2x00_allow_cna_fw_dump_store(struct device *dev,
1706 struct device_attribute *attr, const char *buf, size_t count)
1707{
1708 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1709 int val = 0;
1710
1711 if (!IS_P3P_TYPE(vha->hw))
1712 return -EINVAL;
1713
1714 if (sscanf(buf, "%d", &val) != 1)
1715 return -EINVAL;
1716
1717 vha->hw->allow_cna_fw_dump = val != 0;
1718
1719 return strlen(buf);
1720}
1721
03aa868c
SC		 1722static ssize_t
1723qla2x00_pep_version_show(struct device *dev, struct device_attribute *attr,
1724 char *buf)
1725{
1726 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1727 struct qla_hw_data *ha = vha->hw;
1728
ecc89f25 1729 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
03aa868c
SC		 1730 return scnprintf(buf, PAGE_SIZE, "\n");
1731
1732 return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d\n",
1733 ha->pep_version[0], ha->pep_version[1], ha->pep_version[2]);
1734}
1735
92d4408e 1736static ssize_t
72a92df2
JC		 1737qla2x00_min_supported_speed_show(struct device *dev,
1738 struct device_attribute *attr, char *buf)
92d4408e
SC		 1739{
1740 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1741 struct qla_hw_data *ha = vha->hw;
1742
ecc89f25 1743 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
92d4408e
SC		 1744 return scnprintf(buf, PAGE_SIZE, "\n");
1745
1746 return scnprintf(buf, PAGE_SIZE, "%s\n",
72a92df2
JC		 1747 ha->min_supported_speed == 6 ? "64Gps" :
1748 ha->min_supported_speed == 5 ? "32Gps" :
1749 ha->min_supported_speed == 4 ? "16Gps" :
1750 ha->min_supported_speed == 3 ? "8Gps" :
1751 ha->min_supported_speed == 2 ? "4Gps" :
1752 ha->min_supported_speed != 0 ? "unknown" : "");
92d4408e
SC		 1753}
1754
1755static ssize_t
72a92df2
JC		 1756qla2x00_max_supported_speed_show(struct device *dev,
1757 struct device_attribute *attr, char *buf)
92d4408e
SC		 1758{
1759 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1760 struct qla_hw_data *ha = vha->hw;
1761
ecc89f25 1762 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
92d4408e
SC		 1763 return scnprintf(buf, PAGE_SIZE, "\n");
1764
1765 return scnprintf(buf, PAGE_SIZE, "%s\n",
72a92df2
JC		 1766 ha->max_supported_speed == 2 ? "64Gps" :
1767 ha->max_supported_speed == 1 ? "32Gps" :
1768 ha->max_supported_speed == 0 ? "16Gps" : "unknown");
92d4408e
SC		 1769}
1770
4910b524
AG		 1771static ssize_t
1772qla2x00_port_speed_store(struct device *dev, struct device_attribute *attr,
1773 const char *buf, size_t count)
1774{
1775 struct scsi_qla_host *vha = shost_priv(dev_to_shost(dev));
1776 ulong type, speed;
1777 int oldspeed, rval;
1778 int mode = QLA_SET_DATA_RATE_LR;
1779 struct qla_hw_data *ha = vha->hw;
1780
ecc89f25 1781 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) {
4910b524
AG		 1782 ql_log(ql_log_warn, vha, 0x70d8,
1783 "Speed setting not supported \n");
1784 return -EINVAL;
1785 }
1786
1787 rval = kstrtol(buf, 10, &type);
b8870ec6
DC		 1788 if (rval)
1789 return rval;
4910b524
AG		 1790 speed = type;
1791 if (type == 40 || type == 80 || type == 160 ||
1792 type == 320) {
1793 ql_dbg(ql_dbg_user, vha, 0x70d9,
1794 "Setting will be affected after a loss of sync\n");
1795 type = type/10;
1796 mode = QLA_SET_DATA_RATE_NOLR;
1797 }
1798
1799 oldspeed = ha->set_data_rate;
1800
1801 switch (type) {
1802 case 0:
1803 ha->set_data_rate = PORT_SPEED_AUTO;
1804 break;
1805 case 4:
1806 ha->set_data_rate = PORT_SPEED_4GB;
1807 break;
1808 case 8:
1809 ha->set_data_rate = PORT_SPEED_8GB;
1810 break;
1811 case 16:
1812 ha->set_data_rate = PORT_SPEED_16GB;
1813 break;
1814 case 32:
1815 ha->set_data_rate = PORT_SPEED_32GB;
1816 break;
1817 default:
1818 ql_log(ql_log_warn, vha, 0x1199,
1819 "Unrecognized speed setting:%lx. Setting Autoneg\n",
1820 speed);
1821 ha->set_data_rate = PORT_SPEED_AUTO;
1822 }
1823
1824 if (qla2x00_chip_is_down(vha) || (oldspeed == ha->set_data_rate))
1825 return -EINVAL;
1826
1827 ql_log(ql_log_info, vha, 0x70da,
1828 "Setting speed to %lx Gbps \n", type);
1829
1830 rval = qla2x00_set_data_rate(vha, mode);
1831 if (rval != QLA_SUCCESS)
1832 return -EIO;
1833
1834 return strlen(buf);
1835}
1836
1837static ssize_t
1838qla2x00_port_speed_show(struct device *dev, struct device_attribute *attr,
1839 char *buf)
1840{
1841 struct scsi_qla_host *vha = shost_priv(dev_to_shost(dev));
1842 struct qla_hw_data *ha = vha->hw;
1843 ssize_t rval;
1844 char *spd[7] = {"0", "0", "0", "4", "8", "16", "32"};
1845
1846 rval = qla2x00_get_data_rate(vha);
1847 if (rval != QLA_SUCCESS) {
1848 ql_log(ql_log_warn, vha, 0x70db,
1849 "Unable to get port speed rval:%zd\n", rval);
1850 return -EINVAL;
1851 }
1852
1853 ql_log(ql_log_info, vha, 0x70d6,
1854 "port speed:%d\n", ha->link_data_rate);
1855
1856 return scnprintf(buf, PAGE_SIZE, "%s\n", spd[ha->link_data_rate]);
1857}
1858
0645cb83
QT		 1859/* ----- */
1860
1861static ssize_t
1862qlini_mode_show(struct device *dev, struct device_attribute *attr, char *buf)
1863{
1864 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1865 int len = 0;
1866
1867 len += scnprintf(buf + len, PAGE_SIZE-len,
1868 "Supported options: enabled | disabled | dual | exclusive\n");
1869
1870 /* --- */
1871 len += scnprintf(buf + len, PAGE_SIZE-len, "Current selection: ");
1872
1873 switch (vha->qlini_mode) {
1874 case QLA2XXX_INI_MODE_EXCLUSIVE:
1875 len += scnprintf(buf + len, PAGE_SIZE-len,
1876 QLA2XXX_INI_MODE_STR_EXCLUSIVE);
1877 break;
1878 case QLA2XXX_INI_MODE_DISABLED:
1879 len += scnprintf(buf + len, PAGE_SIZE-len,
1880 QLA2XXX_INI_MODE_STR_DISABLED);
1881 break;
1882 case QLA2XXX_INI_MODE_ENABLED:
1883 len += scnprintf(buf + len, PAGE_SIZE-len,
1884 QLA2XXX_INI_MODE_STR_ENABLED);
1885 break;
1886 case QLA2XXX_INI_MODE_DUAL:
1887 len += scnprintf(buf + len, PAGE_SIZE-len,
1888 QLA2XXX_INI_MODE_STR_DUAL);
1889 break;
1890 }
1891 len += scnprintf(buf + len, PAGE_SIZE-len, "\n");
1892
1893 return len;
1894}
1895
1896static char *mode_to_str[] = {
1897 "exclusive",
1898 "disabled",
1899 "enabled",
1900 "dual",
1901};
1902
1903#define NEED_EXCH_OFFLOAD(_exchg) ((_exchg) > FW_DEF_EXCHANGES_CNT)
1904static int qla_set_ini_mode(scsi_qla_host_t *vha, int op)
1905{
1906 int rc = 0;
1907 enum {
1908 NO_ACTION,
1909 MODE_CHANGE_ACCEPT,
1910 MODE_CHANGE_NO_ACTION,
1911 TARGET_STILL_ACTIVE,
1912 };
1913 int action = NO_ACTION;
1914 int set_mode = 0;
1915 u8 eo_toggle = 0; /* exchange offload flipped */
1916
1917 switch (vha->qlini_mode) {
1918 case QLA2XXX_INI_MODE_DISABLED:
1919 switch (op) {
1920 case QLA2XXX_INI_MODE_DISABLED:
1921 if (qla_tgt_mode_enabled(vha)) {
1922 if (NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld) !=
1923 vha->hw->flags.exchoffld_enabled)
1924 eo_toggle = 1;
1925 if (((vha->ql2xexchoffld !=
1926 vha->u_ql2xexchoffld) &&
1927 NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld)) ||
1928 eo_toggle) {
1929 /*
1930 * The number of exchange to be offload
1931 * was tweaked or offload option was
1932 * flipped
1933 */
1934 action = MODE_CHANGE_ACCEPT;
1935 } else {
1936 action = MODE_CHANGE_NO_ACTION;
1937 }
1938 } else {
1939 action = MODE_CHANGE_NO_ACTION;
1940 }
1941 break;
1942 case QLA2XXX_INI_MODE_EXCLUSIVE:
1943 if (qla_tgt_mode_enabled(vha)) {
1944 if (NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld) !=
1945 vha->hw->flags.exchoffld_enabled)
1946 eo_toggle = 1;
1947 if (((vha->ql2xexchoffld !=
1948 vha->u_ql2xexchoffld) &&
1949 NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld)) ||
1950 eo_toggle) {
1951 /*
1952 * The number of exchange to be offload
1953 * was tweaked or offload option was
1954 * flipped
1955 */
1956 action = MODE_CHANGE_ACCEPT;
1957 } else {
1958 action = MODE_CHANGE_NO_ACTION;
1959 }
1960 } else {
1961 action = MODE_CHANGE_ACCEPT;
1962 }
1963 break;
1964 case QLA2XXX_INI_MODE_DUAL:
1965 action = MODE_CHANGE_ACCEPT;
1966 /* active_mode is target only, reset it to dual */
1967 if (qla_tgt_mode_enabled(vha)) {
1968 set_mode = 1;
1969 action = MODE_CHANGE_ACCEPT;
1970 } else {
1971 action = MODE_CHANGE_NO_ACTION;
1972 }
1973 break;
1974
1975 case QLA2XXX_INI_MODE_ENABLED:
1976 if (qla_tgt_mode_enabled(vha))
1977 action = TARGET_STILL_ACTIVE;
1978 else {
1979 action = MODE_CHANGE_ACCEPT;
1980 set_mode = 1;
1981 }
1982 break;
1983 }
1984 break;
1985
1986 case QLA2XXX_INI_MODE_EXCLUSIVE:
1987 switch (op) {
1988 case QLA2XXX_INI_MODE_EXCLUSIVE:
1989 if (qla_tgt_mode_enabled(vha)) {
1990 if (NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld) !=
1991 vha->hw->flags.exchoffld_enabled)
1992 eo_toggle = 1;
1993 if (((vha->ql2xexchoffld !=
1994 vha->u_ql2xexchoffld) &&
1995 NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld)) ||
1996 eo_toggle)
1997 /*
1998 * The number of exchange to be offload
1999 * was tweaked or offload option was
2000 * flipped
2001 */
2002 action = MODE_CHANGE_ACCEPT;
2003 else
2004 action = NO_ACTION;
2005 } else
2006 action = NO_ACTION;
2007
2008 break;
2009
2010 case QLA2XXX_INI_MODE_DISABLED:
2011 if (qla_tgt_mode_enabled(vha)) {
2012 if (NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld) !=
2013 vha->hw->flags.exchoffld_enabled)
2014 eo_toggle = 1;
2015 if (((vha->ql2xexchoffld !=
2016 vha->u_ql2xexchoffld) &&
2017 NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld)) ||
2018 eo_toggle)
2019 action = MODE_CHANGE_ACCEPT;
2020 else
2021 action = MODE_CHANGE_NO_ACTION;
2022 } else
2023 action = MODE_CHANGE_NO_ACTION;
2024 break;
2025
2026 case QLA2XXX_INI_MODE_DUAL: /* exclusive -> dual */
2027 if (qla_tgt_mode_enabled(vha)) {
2028 action = MODE_CHANGE_ACCEPT;
2029 set_mode = 1;
2030 } else
2031 action = MODE_CHANGE_ACCEPT;
2032 break;
2033
2034 case QLA2XXX_INI_MODE_ENABLED:
2035 if (qla_tgt_mode_enabled(vha))
2036 action = TARGET_STILL_ACTIVE;
2037 else {
2038 if (vha->hw->flags.fw_started)
2039 action = MODE_CHANGE_NO_ACTION;
2040 else
2041 action = MODE_CHANGE_ACCEPT;
2042 }
2043 break;
2044 }
2045 break;
2046
2047 case QLA2XXX_INI_MODE_ENABLED:
2048 switch (op) {
2049 case QLA2XXX_INI_MODE_ENABLED:
2050 if (NEED_EXCH_OFFLOAD(vha->u_ql2xiniexchg) !=
2051 vha->hw->flags.exchoffld_enabled)
2052 eo_toggle = 1;
2053 if (((vha->ql2xiniexchg != vha->u_ql2xiniexchg) &&
2054 NEED_EXCH_OFFLOAD(vha->u_ql2xiniexchg)) ||
2055 eo_toggle)
2056 action = MODE_CHANGE_ACCEPT;
2057 else
2058 action = NO_ACTION;
2059 break;
2060 case QLA2XXX_INI_MODE_DUAL:
2061 case QLA2XXX_INI_MODE_DISABLED:
2062 action = MODE_CHANGE_ACCEPT;
2063 break;
2064 default:
2065 action = MODE_CHANGE_NO_ACTION;
2066 break;
2067 }
2068 break;
2069
2070 case QLA2XXX_INI_MODE_DUAL:
2071 switch (op) {
2072 case QLA2XXX_INI_MODE_DUAL:
2073 if (qla_tgt_mode_enabled(vha) ||
2074 qla_dual_mode_enabled(vha)) {
2075 if (NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld +
2076 vha->u_ql2xiniexchg) !=
2077 vha->hw->flags.exchoffld_enabled)
2078 eo_toggle = 1;
2079
2080 if ((((vha->ql2xexchoffld +
2081 vha->ql2xiniexchg) !=
2082 (vha->u_ql2xiniexchg +
2083 vha->u_ql2xexchoffld)) &&
2084 NEED_EXCH_OFFLOAD(vha->u_ql2xiniexchg +
2085 vha->u_ql2xexchoffld)) || eo_toggle)
2086 action = MODE_CHANGE_ACCEPT;
2087 else
2088 action = NO_ACTION;
2089 } else {
2090 if (NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld +
2091 vha->u_ql2xiniexchg) !=
2092 vha->hw->flags.exchoffld_enabled)
2093 eo_toggle = 1;
2094
2095 if ((((vha->ql2xexchoffld + vha->ql2xiniexchg)
2096 != (vha->u_ql2xiniexchg +
2097 vha->u_ql2xexchoffld)) &&
2098 NEED_EXCH_OFFLOAD(vha->u_ql2xiniexchg +
2099 vha->u_ql2xexchoffld)) || eo_toggle)
2100 action = MODE_CHANGE_NO_ACTION;
2101 else
2102 action = NO_ACTION;
2103 }
2104 break;
2105
2106 case QLA2XXX_INI_MODE_DISABLED:
2107 if (qla_tgt_mode_enabled(vha) ||
2108 qla_dual_mode_enabled(vha)) {
2109 /* turning off initiator mode */
2110 set_mode = 1;
2111 action = MODE_CHANGE_ACCEPT;
2112 } else {
2113 action = MODE_CHANGE_NO_ACTION;
2114 }
2115 break;
2116
2117 case QLA2XXX_INI_MODE_EXCLUSIVE:
2118 if (qla_tgt_mode_enabled(vha) ||
2119 qla_dual_mode_enabled(vha)) {
2120 set_mode = 1;
2121 action = MODE_CHANGE_ACCEPT;
2122 } else {
2123 action = MODE_CHANGE_ACCEPT;
2124 }
2125 break;
2126
2127 case QLA2XXX_INI_MODE_ENABLED:
2128 if (qla_tgt_mode_enabled(vha) ||
2129 qla_dual_mode_enabled(vha)) {
2130 action = TARGET_STILL_ACTIVE;
2131 } else {
2132 action = MODE_CHANGE_ACCEPT;
2133 }
2134 }
2135 break;
2136 }
2137
2138 switch (action) {
2139 case MODE_CHANGE_ACCEPT:
2140 ql_log(ql_log_warn, vha, 0xffff,
2141 "Mode change accepted. From %s to %s, Tgt exchg %d|%d. ini exchg %d|%d\n",
2142 mode_to_str[vha->qlini_mode], mode_to_str[op],
2143 vha->ql2xexchoffld, vha->u_ql2xexchoffld,
2144 vha->ql2xiniexchg, vha->u_ql2xiniexchg);
2145
2146 vha->qlini_mode = op;
2147 vha->ql2xexchoffld = vha->u_ql2xexchoffld;
2148 vha->ql2xiniexchg = vha->u_ql2xiniexchg;
2149 if (set_mode)
2150 qlt_set_mode(vha);
2151 vha->flags.online = 1;
2152 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2153 break;
2154
2155 case MODE_CHANGE_NO_ACTION:
2156 ql_log(ql_log_warn, vha, 0xffff,
2157 "Mode is set. No action taken. From %s to %s, Tgt exchg %d|%d. ini exchg %d|%d\n",
2158 mode_to_str[vha->qlini_mode], mode_to_str[op],
2159 vha->ql2xexchoffld, vha->u_ql2xexchoffld,
2160 vha->ql2xiniexchg, vha->u_ql2xiniexchg);
2161 vha->qlini_mode = op;
2162 vha->ql2xexchoffld = vha->u_ql2xexchoffld;
2163 vha->ql2xiniexchg = vha->u_ql2xiniexchg;
2164 break;
2165
2166 case TARGET_STILL_ACTIVE:
2167 ql_log(ql_log_warn, vha, 0xffff,
2168 "Target Mode is active. Unable to change Mode.\n");
2169 break;
2170
2171 case NO_ACTION:
2172 default:
2173 ql_log(ql_log_warn, vha, 0xffff,
2174 "Mode unchange. No action taken. %d|%d pct %d|%d.\n",
2175 vha->qlini_mode, op,
2176 vha->ql2xexchoffld, vha->u_ql2xexchoffld);
2177 break;
2178 }
2179
2180 return rc;
2181}
2182
2183static ssize_t
2184qlini_mode_store(struct device *dev, struct device_attribute *attr,
2185 const char *buf, size_t count)
2186{
2187 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2188 int ini;
2189
2190 if (!buf)
2191 return -EINVAL;
2192
2193 if (strncasecmp(QLA2XXX_INI_MODE_STR_EXCLUSIVE, buf,
2194 strlen(QLA2XXX_INI_MODE_STR_EXCLUSIVE)) == 0)
2195 ini = QLA2XXX_INI_MODE_EXCLUSIVE;
2196 else if (strncasecmp(QLA2XXX_INI_MODE_STR_DISABLED, buf,
2197 strlen(QLA2XXX_INI_MODE_STR_DISABLED)) == 0)
2198 ini = QLA2XXX_INI_MODE_DISABLED;
2199 else if (strncasecmp(QLA2XXX_INI_MODE_STR_ENABLED, buf,
2200 strlen(QLA2XXX_INI_MODE_STR_ENABLED)) == 0)
2201 ini = QLA2XXX_INI_MODE_ENABLED;
2202 else if (strncasecmp(QLA2XXX_INI_MODE_STR_DUAL, buf,
2203 strlen(QLA2XXX_INI_MODE_STR_DUAL)) == 0)
2204 ini = QLA2XXX_INI_MODE_DUAL;
2205 else
2206 return -EINVAL;
2207
2208 qla_set_ini_mode(vha, ini);
2209 return strlen(buf);
2210}
2211
2212static ssize_t
2213ql2xexchoffld_show(struct device *dev, struct device_attribute *attr,
2214 char *buf)
2215{
2216 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2217 int len = 0;
2218
2219 len += scnprintf(buf + len, PAGE_SIZE-len,
2220 "target exchange: new %d : current: %d\n\n",
2221 vha->u_ql2xexchoffld, vha->ql2xexchoffld);
2222
2223 len += scnprintf(buf + len, PAGE_SIZE-len,
2224 "Please (re)set operating mode via \"/sys/class/scsi_host/host%ld/qlini_mode\" to load new setting.\n",
2225 vha->host_no);
2226
2227 return len;
2228}
2229
2230static ssize_t
2231ql2xexchoffld_store(struct device *dev, struct device_attribute *attr,
2232 const char *buf, size_t count)
2233{
2234 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2235 int val = 0;
2236
2237 if (sscanf(buf, "%d", &val) != 1)
2238 return -EINVAL;
2239
2240 if (val > FW_MAX_EXCHANGES_CNT)
2241 val = FW_MAX_EXCHANGES_CNT;
2242 else if (val < 0)
2243 val = 0;
2244
2245 vha->u_ql2xexchoffld = val;
2246 return strlen(buf);
2247}
2248
2249static ssize_t
2250ql2xiniexchg_show(struct device *dev, struct device_attribute *attr,
2251 char *buf)
2252{
2253 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2254 int len = 0;
2255
2256 len += scnprintf(buf + len, PAGE_SIZE-len,
2257 "target exchange: new %d : current: %d\n\n",
2258 vha->u_ql2xiniexchg, vha->ql2xiniexchg);
2259
2260 len += scnprintf(buf + len, PAGE_SIZE-len,
2261 "Please (re)set operating mode via \"/sys/class/scsi_host/host%ld/qlini_mode\" to load new setting.\n",
2262 vha->host_no);
2263
2264 return len;
2265}
2266
2267static ssize_t
2268ql2xiniexchg_store(struct device *dev, struct device_attribute *attr,
2269 const char *buf, size_t count)
2270{
2271 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2272 int val = 0;
2273
2274 if (sscanf(buf, "%d", &val) != 1)
2275 return -EINVAL;
2276
2277 if (val > FW_MAX_EXCHANGES_CNT)
2278 val = FW_MAX_EXCHANGES_CNT;
2279 else if (val < 0)
2280 val = 0;
2281
2282 vha->u_ql2xiniexchg = val;
2283 return strlen(buf);
2284}
2285
50b81275
GM		 2286static ssize_t
2287qla2x00_dif_bundle_statistics_show(struct device *dev,
2288 struct device_attribute *attr, char *buf)
2289{
2290 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2291 struct qla_hw_data *ha = vha->hw;
2292
2293 return scnprintf(buf, PAGE_SIZE,
2294 "cross=%llu read=%llu write=%llu kalloc=%llu dma_alloc=%llu unusable=%u\n",
2295 ha->dif_bundle_crossed_pages, ha->dif_bundle_reads,
2296 ha->dif_bundle_writes, ha->dif_bundle_kallocs,
2297 ha->dif_bundle_dma_allocs, ha->pool.unusable.count);
2298}
2299
df617ffb
JC		 2300static ssize_t
2301qla2x00_fw_attr_show(struct device *dev,
2302 struct device_attribute *attr, char *buf)
2303{
2304 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2305 struct qla_hw_data *ha = vha->hw;
2306
ecc89f25 2307 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
df617ffb
JC		 2308 return scnprintf(buf, PAGE_SIZE, "\n");
2309
2310 return scnprintf(buf, PAGE_SIZE, "%llx\n",
2311 (uint64_t)ha->fw_attributes_ext[1] << 48 |
2312 (uint64_t)ha->fw_attributes_ext[0] << 32 |
2313 (uint64_t)ha->fw_attributes_h << 16 |
2314 (uint64_t)ha->fw_attributes);
2315}
2316
2317static ssize_t
2318qla2x00_port_no_show(struct device *dev, struct device_attribute *attr,
2319 char *buf)
2320{
2321 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2322
2323 return scnprintf(buf, PAGE_SIZE, "%u\n", vha->hw->port_no);
2324}
2325
e6ad2b79
JC		 2326static ssize_t
2327qla2x00_dport_diagnostics_show(struct device *dev,
2328 struct device_attribute *attr, char *buf)
2329{
2330 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2331
2332 if (!IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw) &&
2333 !IS_QLA28XX(vha->hw))
2334 return scnprintf(buf, PAGE_SIZE, "\n");
2335
2336 if (!*vha->dport_data)
2337 return scnprintf(buf, PAGE_SIZE, "\n");
2338
2339 return scnprintf(buf, PAGE_SIZE, "%04x %04x %04x %04x\n",
2340 vha->dport_data[0], vha->dport_data[1],
2341 vha->dport_data[2], vha->dport_data[3]);
2342}
2343static DEVICE_ATTR(dport_diagnostics, 0444,
2344 qla2x00_dport_diagnostics_show, NULL);
2345
50b81275 2346static DEVICE_ATTR(driver_version, S_IRUGO, qla2x00_driver_version_show, NULL);
ee959b00
TJ		 2347static DEVICE_ATTR(fw_version, S_IRUGO, qla2x00_fw_version_show, NULL);
2348static DEVICE_ATTR(serial_num, S_IRUGO, qla2x00_serial_num_show, NULL);
2349static DEVICE_ATTR(isp_name, S_IRUGO, qla2x00_isp_name_show, NULL);
2350static DEVICE_ATTR(isp_id, S_IRUGO, qla2x00_isp_id_show, NULL);
2351static DEVICE_ATTR(model_name, S_IRUGO, qla2x00_model_name_show, NULL);
2352static DEVICE_ATTR(model_desc, S_IRUGO, qla2x00_model_desc_show, NULL);
2353static DEVICE_ATTR(pci_info, S_IRUGO, qla2x00_pci_info_show, NULL);
bbd1ae41 2354static DEVICE_ATTR(link_state, S_IRUGO, qla2x00_link_state_show, NULL);
ee959b00
TJ		 2355static DEVICE_ATTR(zio, S_IRUGO | S_IWUSR, qla2x00_zio_show, qla2x00_zio_store);
2356static DEVICE_ATTR(zio_timer, S_IRUGO | S_IWUSR, qla2x00_zio_timer_show,
2357 qla2x00_zio_timer_store);
2358static DEVICE_ATTR(beacon, S_IRUGO | S_IWUSR, qla2x00_beacon_show,
2359 qla2x00_beacon_store);
07553b1e
JC		 2360static DEVICE_ATTR(beacon_config, 0644, qla2x00_beacon_config_show,
2361 qla2x00_beacon_config_store);
ee959b00
TJ		 2362static DEVICE_ATTR(optrom_bios_version, S_IRUGO,
2363 qla2x00_optrom_bios_version_show, NULL);
2364static DEVICE_ATTR(optrom_efi_version, S_IRUGO,
2365 qla2x00_optrom_efi_version_show, NULL);
2366static DEVICE_ATTR(optrom_fcode_version, S_IRUGO,
2367 qla2x00_optrom_fcode_version_show, NULL);
2368static DEVICE_ATTR(optrom_fw_version, S_IRUGO, qla2x00_optrom_fw_version_show,
2369 NULL);
0f2d962f
MI		 2370static DEVICE_ATTR(optrom_gold_fw_version, S_IRUGO,
2371 qla2x00_optrom_gold_fw_version_show, NULL);
9a069e19
GM		 2372static DEVICE_ATTR(84xx_fw_version, S_IRUGO, qla24xx_84xx_fw_version_show,
2373 NULL);
e5f5f6f7
HZ		 2374static DEVICE_ATTR(total_isp_aborts, S_IRUGO, qla2x00_total_isp_aborts_show,
2375 NULL);
2a3192a3 2376static DEVICE_ATTR(serdes_version, 0444, qla2x00_serdes_version_show, NULL);
3a03eb79 2377static DEVICE_ATTR(mpi_version, S_IRUGO, qla2x00_mpi_version_show, NULL);
55a96158 2378static DEVICE_ATTR(phy_version, S_IRUGO, qla2x00_phy_version_show, NULL);
fbcbb5d0
LC		 2379static DEVICE_ATTR(flash_block_size, S_IRUGO, qla2x00_flash_block_size_show,
2380 NULL);
bad7001c
AV		 2381static DEVICE_ATTR(vlan_id, S_IRUGO, qla2x00_vlan_id_show, NULL);
2382static DEVICE_ATTR(vn_port_mac_address, S_IRUGO,
2383 qla2x00_vn_port_mac_address_show, NULL);
7f774025 2384static DEVICE_ATTR(fabric_param, S_IRUGO, qla2x00_fabric_param_show, NULL);
656e8912 2385static DEVICE_ATTR(fw_state, S_IRUGO, qla2x00_fw_state_show, NULL);
794a5691 2386static DEVICE_ATTR(thermal_temp, S_IRUGO, qla2x00_thermal_temp_show, NULL);
a9b6f722
SK		 2387static DEVICE_ATTR(diag_requests, S_IRUGO, qla2x00_diag_requests_show, NULL);
2388static DEVICE_ATTR(diag_megabytes, S_IRUGO, qla2x00_diag_megabytes_show, NULL);
40129a4c 2389static DEVICE_ATTR(fw_dump_size, S_IRUGO, qla2x00_fw_dump_size_show, NULL);
a1b23c5a
CD		 2390static DEVICE_ATTR(allow_cna_fw_dump, S_IRUGO | S_IWUSR,
2391 qla2x00_allow_cna_fw_dump_show,
2392 qla2x00_allow_cna_fw_dump_store);
03aa868c 2393static DEVICE_ATTR(pep_version, S_IRUGO, qla2x00_pep_version_show, NULL);
72a92df2
JC		 2394static DEVICE_ATTR(min_supported_speed, 0444,
2395 qla2x00_min_supported_speed_show, NULL);
2396static DEVICE_ATTR(max_supported_speed, 0444,
2397 qla2x00_max_supported_speed_show, NULL);
8b4673ba
QT		 2398static DEVICE_ATTR(zio_threshold, 0644,
2399 qla_zio_threshold_show,
2400 qla_zio_threshold_store);
0645cb83
QT		 2401static DEVICE_ATTR_RW(qlini_mode);
2402static DEVICE_ATTR_RW(ql2xexchoffld);
2403static DEVICE_ATTR_RW(ql2xiniexchg);
50b81275
GM		 2404static DEVICE_ATTR(dif_bundle_statistics, 0444,
2405 qla2x00_dif_bundle_statistics_show, NULL);
4910b524
AG		 2406static DEVICE_ATTR(port_speed, 0644, qla2x00_port_speed_show,
2407 qla2x00_port_speed_store);
df617ffb
JC		 2408static DEVICE_ATTR(port_no, 0444, qla2x00_port_no_show, NULL);
2409static DEVICE_ATTR(fw_attr, 0444, qla2x00_fw_attr_show, NULL);
0645cb83 2410
ee959b00
TJ		 2411
2412struct device_attribute *qla2x00_host_attrs[] = {
2413 &dev_attr_driver_version,
2414 &dev_attr_fw_version,
2415 &dev_attr_serial_num,
2416 &dev_attr_isp_name,
2417 &dev_attr_isp_id,
2418 &dev_attr_model_name,
2419 &dev_attr_model_desc,
2420 &dev_attr_pci_info,
bbd1ae41 2421 &dev_attr_link_state,
ee959b00
TJ		 2422 &dev_attr_zio,
2423 &dev_attr_zio_timer,
2424 &dev_attr_beacon,
07553b1e 2425 &dev_attr_beacon_config,
ee959b00
TJ		 2426 &dev_attr_optrom_bios_version,
2427 &dev_attr_optrom_efi_version,
2428 &dev_attr_optrom_fcode_version,
2429 &dev_attr_optrom_fw_version,
9a069e19 2430 &dev_attr_84xx_fw_version,
e5f5f6f7 2431 &dev_attr_total_isp_aborts,
2a3192a3 2432 &dev_attr_serdes_version,
3a03eb79 2433 &dev_attr_mpi_version,
55a96158 2434 &dev_attr_phy_version,
fbcbb5d0 2435 &dev_attr_flash_block_size,
bad7001c
AV		 2436 &dev_attr_vlan_id,
2437 &dev_attr_vn_port_mac_address,
7f774025 2438 &dev_attr_fabric_param,
656e8912 2439 &dev_attr_fw_state,
0f2d962f 2440 &dev_attr_optrom_gold_fw_version,
794a5691 2441 &dev_attr_thermal_temp,
a9b6f722
SK		 2442 &dev_attr_diag_requests,
2443 &dev_attr_diag_megabytes,
40129a4c 2444 &dev_attr_fw_dump_size,
a1b23c5a 2445 &dev_attr_allow_cna_fw_dump,
03aa868c 2446 &dev_attr_pep_version,
72a92df2
JC		 2447 &dev_attr_min_supported_speed,
2448 &dev_attr_max_supported_speed,
8b4673ba 2449 &dev_attr_zio_threshold,
50b81275 2450 &dev_attr_dif_bundle_statistics,
4910b524 2451 &dev_attr_port_speed,
df617ffb
JC		 2452 &dev_attr_port_no,
2453 &dev_attr_fw_attr,
e6ad2b79 2454 &dev_attr_dport_diagnostics,
0645cb83
QT		 2455 NULL, /* reserve for qlini_mode */
2456 NULL, /* reserve for ql2xiniexchg */
2457 NULL, /* reserve for ql2xexchoffld */
afb046e2
AV		 2458 NULL,
2459};
2460
0645cb83
QT		 2461void qla_insert_tgt_attrs(void)
2462{
2463 struct device_attribute **attr;
2464
2465 /* advance to empty slot */
2466 for (attr = &qla2x00_host_attrs[0]; *attr; ++attr)
2467 continue;
2468
2469 *attr = &dev_attr_qlini_mode;
2470 attr++;
2471 *attr = &dev_attr_ql2xiniexchg;
2472 attr++;
2473 *attr = &dev_attr_ql2xexchoffld;
2474}
2475
8482e118
AV		 2476/* Host attributes. */
2477
2478static void
2479qla2x00_get_host_port_id(struct Scsi_Host *shost)
2480{
7b867cf7 2481 scsi_qla_host_t *vha = shost_priv(shost);
8482e118 2482
7b867cf7
AC		 2483 fc_host_port_id(shost) = vha->d_id.b.domain << 16 |
2484 vha->d_id.b.area << 8 | vha->d_id.b.al_pa;
8482e118
AV		 2485}
2486
04414013
AV		 2487static void
2488qla2x00_get_host_speed(struct Scsi_Host *shost)
2489{
2a3192a3
JC		 2490 scsi_qla_host_t *vha = shost_priv(shost);
2491 u32 speed;
04414013 2492
2a3192a3 2493 if (IS_QLAFX00(vha->hw)) {
8ae6d9c7
GM		 2494 qlafx00_get_host_speed(shost);
2495 return;
2496 }
2497
2a3192a3 2498 switch (vha->hw->link_data_rate) {
d8b45213 2499 case PORT_SPEED_1GB:
2ae2b370 2500 speed = FC_PORTSPEED_1GBIT;
04414013 2501 break;
d8b45213 2502 case PORT_SPEED_2GB:
2ae2b370 2503 speed = FC_PORTSPEED_2GBIT;
04414013 2504 break;
d8b45213 2505 case PORT_SPEED_4GB:
2ae2b370 2506 speed = FC_PORTSPEED_4GBIT;
04414013 2507 break;
da4541b6 2508 case PORT_SPEED_8GB:
2ae2b370 2509 speed = FC_PORTSPEED_8GBIT;
da4541b6 2510 break;
3a03eb79
AV		 2511 case PORT_SPEED_10GB:
2512 speed = FC_PORTSPEED_10GBIT;
2513 break;
6246b8a1
GM		 2514 case PORT_SPEED_16GB:
2515 speed = FC_PORTSPEED_16GBIT;
2516 break;
f73cb695
CD		 2517 case PORT_SPEED_32GB:
2518 speed = FC_PORTSPEED_32GBIT;
2519 break;
ecc89f25
JC		 2520 case PORT_SPEED_64GB:
2521 speed = FC_PORTSPEED_64GBIT;
2522 break;
2a3192a3
JC		 2523 default:
2524 speed = FC_PORTSPEED_UNKNOWN;
2525 break;
04414013 2526 }
2a3192a3 2527
04414013
AV		 2528 fc_host_speed(shost) = speed;
2529}
2530
8d067623
AV		 2531static void
2532qla2x00_get_host_port_type(struct Scsi_Host *shost)
2533{
7b867cf7 2534 scsi_qla_host_t *vha = shost_priv(shost);
2a3192a3 2535 uint32_t port_type;
8d067623 2536
7b867cf7 2537 if (vha->vp_idx) {
2f2fa13d
SS		 2538 fc_host_port_type(shost) = FC_PORTTYPE_NPIV;
2539 return;
2540 }
7b867cf7 2541 switch (vha->hw->current_topology) {
8d067623
AV		 2542 case ISP_CFG_NL:
2543 port_type = FC_PORTTYPE_LPORT;
2544 break;
2545 case ISP_CFG_FL:
2546 port_type = FC_PORTTYPE_NLPORT;
2547 break;
2548 case ISP_CFG_N:
2549 port_type = FC_PORTTYPE_PTP;
2550 break;
2551 case ISP_CFG_F:
2552 port_type = FC_PORTTYPE_NPORT;
2553 break;
2a3192a3
JC		 2554 default:
2555 port_type = FC_PORTTYPE_UNKNOWN;
2556 break;
8d067623 2557 }
2a3192a3 2558
8d067623
AV		 2559 fc_host_port_type(shost) = port_type;
2560}
2561
8482e118
AV		 2562static void
2563qla2x00_get_starget_node_name(struct scsi_target *starget)
2564{
2565 struct Scsi_Host *host = dev_to_shost(starget->dev.parent);
7b867cf7 2566 scsi_qla_host_t *vha = shost_priv(host);
bdf79621 2567 fc_port_t *fcport;
f8b02a85 2568 u64 node_name = 0;
8482e118 2569
7b867cf7 2570 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5ab5a4dd
AV		 2571 if (fcport->rport &&
2572 starget->id == fcport->rport->scsi_target_id) {
f8b02a85 2573 node_name = wwn_to_u64(fcport->node_name);
bdf79621
AV		 2574 break;
2575 }
2576 }
2577
f8b02a85 2578 fc_starget_node_name(starget) = node_name;
8482e118
AV		 2579}
2580
2581static void
2582qla2x00_get_starget_port_name(struct scsi_target *starget)
2583{
2584 struct Scsi_Host *host = dev_to_shost(starget->dev.parent);
7b867cf7 2585 scsi_qla_host_t *vha = shost_priv(host);
bdf79621 2586 fc_port_t *fcport;
f8b02a85 2587 u64 port_name = 0;
8482e118 2588
7b867cf7 2589 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5ab5a4dd
AV		 2590 if (fcport->rport &&
2591 starget->id == fcport->rport->scsi_target_id) {
f8b02a85 2592 port_name = wwn_to_u64(fcport->port_name);
bdf79621
AV		 2593 break;
2594 }
2595 }
2596
f8b02a85 2597 fc_starget_port_name(starget) = port_name;
8482e118
AV		 2598}
2599
2600static void
2601qla2x00_get_starget_port_id(struct scsi_target *starget)
2602{
2603 struct Scsi_Host *host = dev_to_shost(starget->dev.parent);
7b867cf7 2604 scsi_qla_host_t *vha = shost_priv(host);
bdf79621
AV		 2605 fc_port_t *fcport;
2606 uint32_t port_id = ~0U;
2607
7b867cf7 2608 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5ab5a4dd
AV		 2609 if (fcport->rport &&
2610 starget->id == fcport->rport->scsi_target_id) {
bdf79621
AV		 2611 port_id = fcport->d_id.b.domain << 16 |
2612 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
2613 break;
2614 }
2615 }
8482e118 2616
8482e118
AV		 2617 fc_starget_port_id(starget) = port_id;
2618}
2619
2a3192a3 2620static inline void
8482e118
AV		 2621qla2x00_set_rport_loss_tmo(struct fc_rport *rport, uint32_t timeout)
2622{
2a3192a3 2623 rport->dev_loss_tmo = timeout ? timeout : 1;
8482e118
AV		 2624}
2625
5f3a9a20
SJ		 2626static void
2627qla2x00_dev_loss_tmo_callbk(struct fc_rport *rport)
2628{
2629 struct Scsi_Host *host = rport_to_shost(rport);
2630 fc_port_t *fcport = *(fc_port_t **)rport->dd_data;
044d78e1 2631 unsigned long flags;
5f3a9a20 2632
3c01b4f9
SJ		 2633 if (!fcport)
2634 return;
2635
38170fa8
GM		 2636 /* Now that the rport has been deleted, set the fcport state to
2637 FCS_DEVICE_DEAD */
ec426e10 2638 qla2x00_set_fcport_state(fcport, FCS_DEVICE_DEAD);
38170fa8 2639
5f3a9a20
SJ		 2640 /*
2641 * Transport has effectively 'deleted' the rport, clear
2642 * all local references.
2643 */
044d78e1 2644 spin_lock_irqsave(host->host_lock, flags);
3fadb80b 2645 fcport->rport = fcport->drport = NULL;
5f3a9a20 2646 *((fc_port_t **)rport->dd_data) = NULL;
044d78e1 2647 spin_unlock_irqrestore(host->host_lock, flags);
3fadb80b
GM		 2648
2649 if (test_bit(ABORT_ISP_ACTIVE, &fcport->vha->dpc_flags))
2650 return;
2651
2652 if (unlikely(pci_channel_offline(fcport->vha->hw->pdev))) {
2653 qla2x00_abort_all_cmds(fcport->vha, DID_NO_CONNECT << 16);
2654 return;
2655 }
5f3a9a20
SJ		 2656}
2657
2658static void
2659qla2x00_terminate_rport_io(struct fc_rport *rport)
2660{
2661 fc_port_t *fcport = *(fc_port_t **)rport->dd_data;
2662
3c01b4f9
SJ		 2663 if (!fcport)
2664 return;
2665
a465537a
SC		 2666 if (test_bit(UNLOADING, &fcport->vha->dpc_flags))
2667 return;
2668
85880801
AV		 2669 if (test_bit(ABORT_ISP_ACTIVE, &fcport->vha->dpc_flags))
2670 return;
2671
b9b12f73
SJ		 2672 if (unlikely(pci_channel_offline(fcport->vha->hw->pdev))) {
2673 qla2x00_abort_all_cmds(fcport->vha, DID_NO_CONNECT << 16);
2674 return;
2675 }
6390d1f3
AV		 2676 /*
2677 * At this point all fcport's software-states are cleared. Perform any
2678 * final cleanup of firmware resources (PCBs and XCBs).
2679 */
220d36b4 2680 if (fcport->loop_id != FC_NO_LOOP_ID) {
af11f64d
AV		 2681 if (IS_FWI2_CAPABLE(fcport->vha->hw))
2682 fcport->vha->hw->isp_ops->fabric_logout(fcport->vha,
2683 fcport->loop_id, fcport->d_id.b.domain,
2684 fcport->d_id.b.area, fcport->d_id.b.al_pa);
2685 else
2686 qla2x00_port_logout(fcport->vha, fcport);
2687 }
5f3a9a20
SJ		 2688}
2689
91ca7b01
AV		 2690static int
2691qla2x00_issue_lip(struct Scsi_Host *shost)
2692{
7b867cf7 2693 scsi_qla_host_t *vha = shost_priv(shost);
91ca7b01 2694
8ae6d9c7
GM		 2695 if (IS_QLAFX00(vha->hw))
2696 return 0;
2697
7b867cf7 2698 qla2x00_loop_reset(vha);
91ca7b01
AV		 2699 return 0;
2700}
2701
392e2f65
AV		 2702static struct fc_host_statistics *
2703qla2x00_get_fc_host_stats(struct Scsi_Host *shost)
2704{
7b867cf7
AC		 2705 scsi_qla_host_t *vha = shost_priv(shost);
2706 struct qla_hw_data *ha = vha->hw;
2707 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
392e2f65 2708 int rval;
43ef0580
AV		 2709 struct link_statistics *stats;
2710 dma_addr_t stats_dma;
fc90adaf 2711 struct fc_host_statistics *p = &vha->fc_host_stat;
392e2f65 2712
fc90adaf 2713 memset(p, -1, sizeof(*p));
392e2f65 2714
8ae6d9c7
GM		 2715 if (IS_QLAFX00(vha->hw))
2716 goto done;
2717
85880801
AV		 2718 if (test_bit(UNLOADING, &vha->dpc_flags))
2719 goto done;
2720
2721 if (unlikely(pci_channel_offline(ha->pdev)))
2722 goto done;
2723
22ebde16 2724 if (qla2x00_chip_is_down(vha))
8fbfe2d2
CD		 2725 goto done;
2726
750afb08
LC		 2727 stats = dma_alloc_coherent(&ha->pdev->dev, sizeof(*stats), &stats_dma,
2728 GFP_KERNEL);
c6dc9905 2729 if (!stats) {
7c3df132
SK		 2730 ql_log(ql_log_warn, vha, 0x707d,
2731 "Failed to allocate memory for stats.\n");
43ef0580
AV		 2732 goto done;
2733 }
43ef0580
AV		 2734
2735 rval = QLA_FUNCTION_FAILED;
e428924c 2736 if (IS_FWI2_CAPABLE(ha)) {
c6dc9905 2737 rval = qla24xx_get_isp_stats(base_vha, stats, stats_dma, 0);
7b867cf7 2738 } else if (atomic_read(&base_vha->loop_state) == LOOP_READY &&
8fbfe2d2 2739 !ha->dpc_active) {
178779a6 2740 /* Must be in a 'READY' state for statistics retrieval. */
7b867cf7
AC		 2741 rval = qla2x00_get_link_status(base_vha, base_vha->loop_id,
2742 stats, stats_dma);
392e2f65 2743 }
178779a6
AV		 2744
2745 if (rval != QLA_SUCCESS)
43ef0580
AV		 2746 goto done_free;
2747
974c0860
JC		 2748 p->link_failure_count = le32_to_cpu(stats->link_fail_cnt);
2749 p->loss_of_sync_count = le32_to_cpu(stats->loss_sync_cnt);
2750 p->loss_of_signal_count = le32_to_cpu(stats->loss_sig_cnt);
2751 p->prim_seq_protocol_err_count = le32_to_cpu(stats->prim_seq_err_cnt);
2752 p->invalid_tx_word_count = le32_to_cpu(stats->inval_xmit_word_cnt);
2753 p->invalid_crc_count = le32_to_cpu(stats->inval_crc_cnt);
43ef0580 2754 if (IS_FWI2_CAPABLE(ha)) {
974c0860
JC		 2755 p->lip_count = le32_to_cpu(stats->lip_cnt);
2756 p->tx_frames = le32_to_cpu(stats->tx_frames);
2757 p->rx_frames = le32_to_cpu(stats->rx_frames);
2758 p->dumped_frames = le32_to_cpu(stats->discarded_frames);
2759 p->nos_count = le32_to_cpu(stats->nos_rcvd);
fc90adaf 2760 p->error_frames =
974c0860
JC		 2761 le32_to_cpu(stats->dropped_frames) +
2762 le32_to_cpu(stats->discarded_frames);
2763 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
2764 p->rx_words = le64_to_cpu(stats->fpm_recv_word_cnt);
2765 p->tx_words = le64_to_cpu(stats->fpm_xmit_word_cnt);
2766 } else {
2767 p->rx_words = vha->qla_stats.input_bytes;
2768 p->tx_words = vha->qla_stats.output_bytes;
2769 }
43ef0580 2770 }
fc90adaf
JC		 2771 p->fcp_control_requests = vha->qla_stats.control_requests;
2772 p->fcp_input_requests = vha->qla_stats.input_requests;
2773 p->fcp_output_requests = vha->qla_stats.output_requests;
2774 p->fcp_input_megabytes = vha->qla_stats.input_bytes >> 20;
2775 p->fcp_output_megabytes = vha->qla_stats.output_bytes >> 20;
2776 p->seconds_since_last_reset =
974c0860 2777 get_jiffies_64() - vha->qla_stats.jiffies_at_last_reset;
fc90adaf 2778 do_div(p->seconds_since_last_reset, HZ);
392e2f65 2779
43ef0580 2780done_free:
243de676
HZ		 2781 dma_free_coherent(&ha->pdev->dev, sizeof(struct link_statistics),
2782 stats, stats_dma);
178779a6 2783done:
fc90adaf 2784 return p;
392e2f65
AV		 2785}
2786
fabbb8df
JC		 2787static void
2788qla2x00_reset_host_stats(struct Scsi_Host *shost)
2789{
2790 scsi_qla_host_t *vha = shost_priv(shost);
c6dc9905
JC		 2791 struct qla_hw_data *ha = vha->hw;
2792 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2793 struct link_statistics *stats;
2794 dma_addr_t stats_dma;
fabbb8df 2795
fc90adaf 2796 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
fabbb8df
JC		 2797 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2798
2799 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
c6dc9905
JC		 2800
2801 if (IS_FWI2_CAPABLE(ha)) {
2802 stats = dma_alloc_coherent(&ha->pdev->dev,
2803 sizeof(*stats), &stats_dma, GFP_KERNEL);
2804 if (!stats) {
2805 ql_log(ql_log_warn, vha, 0x70d7,
2806 "Failed to allocate memory for stats.\n");
2807 return;
2808 }
2809
2810 /* reset firmware statistics */
2811 qla24xx_get_isp_stats(base_vha, stats, stats_dma, BIT_0);
2812
2813 dma_free_coherent(&ha->pdev->dev, sizeof(*stats),
2814 stats, stats_dma);
2815 }
fabbb8df
JC		 2816}
2817
1620f7c2
AV		 2818static void
2819qla2x00_get_host_symbolic_name(struct Scsi_Host *shost)
2820{
7b867cf7 2821 scsi_qla_host_t *vha = shost_priv(shost);
1620f7c2 2822
df57caba
HM		 2823 qla2x00_get_sym_node_name(vha, fc_host_symbolic_name(shost),
2824 sizeof(fc_host_symbolic_name(shost)));
1620f7c2
AV		 2825}
2826
a740a3f0
AV		 2827static void
2828qla2x00_set_host_system_hostname(struct Scsi_Host *shost)
2829{
7b867cf7 2830 scsi_qla_host_t *vha = shost_priv(shost);
a740a3f0 2831
7b867cf7 2832 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
a740a3f0
AV		 2833}
2834
90991c85
AV		 2835static void
2836qla2x00_get_host_fabric_name(struct Scsi_Host *shost)
2837{
7b867cf7 2838 scsi_qla_host_t *vha = shost_priv(shost);
c02ee1e5
BVA		 2839 static const uint8_t node_name[WWN_SIZE] = {
2840 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
2841 };
35e0cbd4 2842 u64 fabric_name = wwn_to_u64(node_name);
90991c85 2843
7b867cf7 2844 if (vha->device_flags & SWITCH_FOUND)
35e0cbd4 2845 fabric_name = wwn_to_u64(vha->fabric_node_name);
90991c85 2846
35e0cbd4 2847 fc_host_fabric_name(shost) = fabric_name;
90991c85
AV		 2848}
2849
7047fcdd
AV		 2850static void
2851qla2x00_get_host_port_state(struct Scsi_Host *shost)
2852{
7b867cf7
AC		 2853 scsi_qla_host_t *vha = shost_priv(shost);
2854 struct scsi_qla_host *base_vha = pci_get_drvdata(vha->hw->pdev);
7047fcdd 2855
49e85c23 2856 if (!base_vha->flags.online) {
7047fcdd 2857 fc_host_port_state(shost) = FC_PORTSTATE_OFFLINE;
49e85c23
SK		 2858 return;
2859 }
2860
2861 switch (atomic_read(&base_vha->loop_state)) {
2862 case LOOP_UPDATE:
2863 fc_host_port_state(shost) = FC_PORTSTATE_DIAGNOSTICS;
2864 break;
2865 case LOOP_DOWN:
2866 if (test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags))
2867 fc_host_port_state(shost) = FC_PORTSTATE_DIAGNOSTICS;
2868 else
2869 fc_host_port_state(shost) = FC_PORTSTATE_LINKDOWN;
2870 break;
2871 case LOOP_DEAD:
2872 fc_host_port_state(shost) = FC_PORTSTATE_LINKDOWN;
2873 break;
2874 case LOOP_READY:
7047fcdd 2875 fc_host_port_state(shost) = FC_PORTSTATE_ONLINE;
49e85c23
SK		 2876 break;
2877 default:
2878 fc_host_port_state(shost) = FC_PORTSTATE_UNKNOWN;
2879 break;
2880 }
7047fcdd
AV		 2881}
2882
2c3dfe3f
SJ		 2883static int
2884qla24xx_vport_create(struct fc_vport *fc_vport, bool disable)
2885{
2886 int ret = 0;
2afa19a9 2887 uint8_t qos = 0;
7b867cf7
AC		 2888 scsi_qla_host_t *base_vha = shost_priv(fc_vport->shost);
2889 scsi_qla_host_t *vha = NULL;
73208dfd 2890 struct qla_hw_data *ha = base_vha->hw;
2afa19a9 2891 int cnt;
59e0b8b0 2892 struct req_que *req = ha->req_q_map[0];
d7459527 2893 struct qla_qpair *qpair;
2c3dfe3f
SJ		 2894
2895 ret = qla24xx_vport_create_req_sanity_check(fc_vport);
2896 if (ret) {
7c3df132
SK		 2897 ql_log(ql_log_warn, vha, 0x707e,
2898 "Vport sanity check failed, status %x\n", ret);
2c3dfe3f
SJ		 2899 return (ret);
2900 }
2901
2902 vha = qla24xx_create_vhost(fc_vport);
2903 if (vha == NULL) {
7c3df132 2904 ql_log(ql_log_warn, vha, 0x707f, "Vport create host failed.\n");
2c3dfe3f
SJ		 2905 return FC_VPORT_FAILED;
2906 }
2907 if (disable) {
2908 atomic_set(&vha->vp_state, VP_OFFLINE);
2909 fc_vport_set_state(fc_vport, FC_VPORT_DISABLED);
2910 } else
2911 atomic_set(&vha->vp_state, VP_FAILED);
2912
2913 /* ready to create vport */
7c3df132
SK		 2914 ql_log(ql_log_info, vha, 0x7080,
2915 "VP entry id %d assigned.\n", vha->vp_idx);
2c3dfe3f
SJ		 2916
2917 /* initialized vport states */
2918 atomic_set(&vha->loop_state, LOOP_DOWN);
58e2753c
BVA		 2919 vha->vp_err_state = VP_ERR_PORTDWN;
2920 vha->vp_prev_err_state = VP_ERR_UNKWN;
2c3dfe3f 2921 /* Check if physical ha port is Up */
7b867cf7
AC		 2922 if (atomic_read(&base_vha->loop_state) == LOOP_DOWN ||
2923 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
2c3dfe3f 2924 /* Don't retry or attempt login of this virtual port */
7c3df132
SK		 2925 ql_dbg(ql_dbg_user, vha, 0x7081,
2926 "Vport loop state is not UP.\n");
2c3dfe3f
SJ		 2927 atomic_set(&vha->loop_state, LOOP_DEAD);
2928 if (!disable)
2929 fc_vport_set_state(fc_vport, FC_VPORT_LINKDOWN);
2930 }
2931
e02587d7 2932 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
bad75002 2933 if (ha->fw_attributes & BIT_4) {
9e522cd8 2934 int prot = 0, guard;
bd432bb5 2935
bad75002 2936 vha->flags.difdix_supported = 1;
7c3df132
SK		 2937 ql_dbg(ql_dbg_user, vha, 0x7082,
2938 "Registered for DIF/DIX type 1 and 3 protection.\n");
8cb2049c
AE		 2939 if (ql2xenabledif == 1)
2940 prot = SHOST_DIX_TYPE0_PROTECTION;
bad75002 2941 scsi_host_set_prot(vha->host,
8cb2049c 2942 prot | SHOST_DIF_TYPE1_PROTECTION
0c470874 2943 | SHOST_DIF_TYPE2_PROTECTION
bad75002
AE		 2944 | SHOST_DIF_TYPE3_PROTECTION
2945 | SHOST_DIX_TYPE1_PROTECTION
0c470874 2946 | SHOST_DIX_TYPE2_PROTECTION
bad75002 2947 | SHOST_DIX_TYPE3_PROTECTION);
9e522cd8
AE		 2948
2949 guard = SHOST_DIX_GUARD_CRC;
2950
2951 if (IS_PI_IPGUARD_CAPABLE(ha) &&
2952 (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2953 guard |= SHOST_DIX_GUARD_IP;
2954
2955 scsi_host_set_guard(vha->host, guard);
bad75002
AE		 2956 } else
2957 vha->flags.difdix_supported = 0;
2958 }
2959
d139b9bd
JB		 2960 if (scsi_add_host_with_dma(vha->host, &fc_vport->dev,
2961 &ha->pdev->dev)) {
7c3df132
SK		 2962 ql_dbg(ql_dbg_user, vha, 0x7083,
2963 "scsi_add_host failure for VP[%d].\n", vha->vp_idx);
2c3dfe3f
SJ		 2964 goto vport_create_failed_2;
2965 }
2966
2967 /* initialize attributes */
d2b5f10e 2968 fc_host_dev_loss_tmo(vha->host) = ha->port_down_retry_count;
2c3dfe3f
SJ		 2969 fc_host_node_name(vha->host) = wwn_to_u64(vha->node_name);
2970 fc_host_port_name(vha->host) = wwn_to_u64(vha->port_name);
2971 fc_host_supported_classes(vha->host) =
7b867cf7 2972 fc_host_supported_classes(base_vha->host);
2c3dfe3f 2973 fc_host_supported_speeds(vha->host) =
7b867cf7 2974 fc_host_supported_speeds(base_vha->host);
2c3dfe3f 2975
2d70c103 2976 qlt_vport_create(vha, ha);
2c3dfe3f
SJ		 2977 qla24xx_vport_disable(fc_vport, disable);
2978
d7459527 2979 if (!ql2xmqsupport || !ha->npiv_info)
2afa19a9 2980 goto vport_queue;
d7459527 2981
2afa19a9 2982 /* Create a request queue in QoS mode for the vport */
40859ae5
AC		 2983 for (cnt = 0; cnt < ha->nvram_npiv_size; cnt++) {
2984 if (memcmp(ha->npiv_info[cnt].port_name, vha->port_name, 8) == 0
2985 && memcmp(ha->npiv_info[cnt].node_name, vha->node_name,
59e0b8b0 2986 8) == 0) {
2afa19a9
AC		 2987 qos = ha->npiv_info[cnt].q_qos;
2988 break;
73208dfd 2989 }
2afa19a9 2990 }
6246b8a1 2991
2afa19a9 2992 if (qos) {
82de802a 2993 qpair = qla2xxx_create_qpair(vha, qos, vha->vp_idx, true);
d7459527 2994 if (!qpair)
7c3df132 2995 ql_log(ql_log_warn, vha, 0x7084,
d7459527 2996 "Can't create qpair for VP[%d]\n",
7c3df132 2997 vha->vp_idx);
59e0b8b0 2998 else {
7c3df132 2999 ql_dbg(ql_dbg_multiq, vha, 0xc001,
d7459527
MH		 3000 "Queue pair: %d Qos: %d) created for VP[%d]\n",
3001 qpair->id, qos, vha->vp_idx);
7c3df132 3002 ql_dbg(ql_dbg_user, vha, 0x7085,
d7459527
MH		 3003 "Queue Pair: %d Qos: %d) created for VP[%d]\n",
3004 qpair->id, qos, vha->vp_idx);
3005 req = qpair->req;
3006 vha->qpair = qpair;
59e0b8b0 3007 }
73208dfd
AC		 3008 }
3009
2afa19a9 3010vport_queue:
59e0b8b0 3011 vha->req = req;
2c3dfe3f 3012 return 0;
2afa19a9 3013
2c3dfe3f
SJ		 3014vport_create_failed_2:
3015 qla24xx_disable_vp(vha);
3016 qla24xx_deallocate_vp_id(vha);
2c3dfe3f
SJ		 3017 scsi_host_put(vha->host);
3018 return FC_VPORT_FAILED;
3019}
3020
a824ebb3 3021static int
2c3dfe3f
SJ		 3022qla24xx_vport_delete(struct fc_vport *fc_vport)
3023{
2c3dfe3f 3024 scsi_qla_host_t *vha = fc_vport->dd_data;
73208dfd
AC		 3025 struct qla_hw_data *ha = vha->hw;
3026 uint16_t id = vha->vp_idx;
c9c5ced9 3027
f5187b7d
QT		 3028 set_bit(VPORT_DELETE, &vha->dpc_flags);
3029
c9c5ced9 3030 while (test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags) ||
7b867cf7 3031 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags))
c9c5ced9 3032 msleep(1000);
2c3dfe3f 3033
835aa4f2 3034
2c3dfe3f 3035 qla24xx_disable_vp(vha);
efa93f48 3036 qla2x00_wait_for_sess_deletion(vha);
2c3dfe3f 3037
c48f849d 3038 qla_nvme_delete(vha);
feafb7b1
AE		 3039 vha->flags.delete_progress = 1;
3040
0e8cd71c
SK		 3041 qlt_remove_target(ha, vha);
3042
7b867cf7
AC		 3043 fc_remove_host(vha->host);
3044
3045 scsi_remove_host(vha->host);
3046
9f40682e
AE		 3047 /* Allow timer to run to drain queued items, when removing vp */
3048 qla24xx_deallocate_vp_id(vha);
3049
feafb7b1
AE		 3050 if (vha->timer_active) {
3051 qla2x00_vp_stop_timer(vha);
7c3df132
SK		 3052 ql_dbg(ql_dbg_user, vha, 0x7086,
3053 "Timer for the VP[%d] has stopped\n", vha->vp_idx);
feafb7b1 3054 }
7b867cf7 3055
feafb7b1
AE		 3056 qla2x00_free_fcports(vha);
3057
0d6e61bc
AV		 3058 mutex_lock(&ha->vport_lock);
3059 ha->cur_vport_count--;
3060 clear_bit(vha->vp_idx, ha->vp_idx_map);
3061 mutex_unlock(&ha->vport_lock);
3062
726b8548
QT		 3063 dma_free_coherent(&ha->pdev->dev, vha->gnl.size, vha->gnl.l,
3064 vha->gnl.ldma);
3065
26fa656e
BK		 3066 vha->gnl.l = NULL;
3067
a4239945
QT		 3068 vfree(vha->scan.l);
3069
c4a9b538 3070 if (vha->qpair && vha->qpair->vp_idx == vha->vp_idx) {
d7459527 3071 if (qla2xxx_delete_qpair(vha, vha->qpair) != QLA_SUCCESS)
7c3df132 3072 ql_log(ql_log_warn, vha, 0x7087,
d7459527 3073 "Queue Pair delete failed.\n");
cf5a1631
AC		 3074 }
3075
7c3df132 3076 ql_log(ql_log_info, vha, 0x7088, "VP[%d] deleted.\n", id);
cfb0919c 3077 scsi_host_put(vha->host);
2c3dfe3f
SJ		 3078 return 0;
3079}
3080
a824ebb3 3081static int
2c3dfe3f
SJ		 3082qla24xx_vport_disable(struct fc_vport *fc_vport, bool disable)
3083{
3084 scsi_qla_host_t *vha = fc_vport->dd_data;
3085
3086 if (disable)
3087 qla24xx_disable_vp(vha);
3088 else
3089 qla24xx_enable_vp(vha);
3090
3091 return 0;
3092}
3093
1c97a12a 3094struct fc_function_template qla2xxx_transport_functions = {
8482e118
AV		 3095
3096 .show_host_node_name = 1,
3097 .show_host_port_name = 1,
ad3e0eda 3098 .show_host_supported_classes = 1,
2ae2b370 3099 .show_host_supported_speeds = 1,
ad3e0eda 3100
8482e118
AV		 3101 .get_host_port_id = qla2x00_get_host_port_id,
3102 .show_host_port_id = 1,
04414013
AV		 3103 .get_host_speed = qla2x00_get_host_speed,
3104 .show_host_speed = 1,
8d067623
AV		 3105 .get_host_port_type = qla2x00_get_host_port_type,
3106 .show_host_port_type = 1,
1620f7c2
AV		 3107 .get_host_symbolic_name = qla2x00_get_host_symbolic_name,
3108 .show_host_symbolic_name = 1,
a740a3f0
AV		 3109 .set_host_system_hostname = qla2x00_set_host_system_hostname,
3110 .show_host_system_hostname = 1,
90991c85
AV		 3111 .get_host_fabric_name = qla2x00_get_host_fabric_name,
3112 .show_host_fabric_name = 1,
7047fcdd
AV		 3113 .get_host_port_state = qla2x00_get_host_port_state,
3114 .show_host_port_state = 1,
8482e118 3115
bdf79621 3116 .dd_fcrport_size = sizeof(struct fc_port *),
ad3e0eda 3117 .show_rport_supported_classes = 1,
8482e118
AV		 3118
3119 .get_starget_node_name = qla2x00_get_starget_node_name,
3120 .show_starget_node_name = 1,
3121 .get_starget_port_name = qla2x00_get_starget_port_name,
3122 .show_starget_port_name = 1,
3123 .get_starget_port_id = qla2x00_get_starget_port_id,
3124 .show_starget_port_id = 1,
3125
8482e118
AV		 3126 .set_rport_dev_loss_tmo = qla2x00_set_rport_loss_tmo,
3127 .show_rport_dev_loss_tmo = 1,
3128
91ca7b01 3129 .issue_fc_host_lip = qla2x00_issue_lip,
5f3a9a20
SJ		 3130 .dev_loss_tmo_callbk = qla2x00_dev_loss_tmo_callbk,
3131 .terminate_rport_io = qla2x00_terminate_rport_io,
392e2f65 3132 .get_fc_host_stats = qla2x00_get_fc_host_stats,
fabbb8df 3133 .reset_fc_host_stats = qla2x00_reset_host_stats,
2c3dfe3f
SJ		 3134
3135 .vport_create = qla24xx_vport_create,
3136 .vport_disable = qla24xx_vport_disable,
3137 .vport_delete = qla24xx_vport_delete,
9a069e19
GM		 3138 .bsg_request = qla24xx_bsg_request,
3139 .bsg_timeout = qla24xx_bsg_timeout,
2c3dfe3f
SJ		 3140};
3141
3142struct fc_function_template qla2xxx_transport_vport_functions = {
3143
3144 .show_host_node_name = 1,
3145 .show_host_port_name = 1,
3146 .show_host_supported_classes = 1,
3147
3148 .get_host_port_id = qla2x00_get_host_port_id,
3149 .show_host_port_id = 1,
3150 .get_host_speed = qla2x00_get_host_speed,
3151 .show_host_speed = 1,
3152 .get_host_port_type = qla2x00_get_host_port_type,
3153 .show_host_port_type = 1,
3154 .get_host_symbolic_name = qla2x00_get_host_symbolic_name,
3155 .show_host_symbolic_name = 1,
3156 .set_host_system_hostname = qla2x00_set_host_system_hostname,
3157 .show_host_system_hostname = 1,
3158 .get_host_fabric_name = qla2x00_get_host_fabric_name,
3159 .show_host_fabric_name = 1,
3160 .get_host_port_state = qla2x00_get_host_port_state,
3161 .show_host_port_state = 1,
3162
3163 .dd_fcrport_size = sizeof(struct fc_port *),
3164 .show_rport_supported_classes = 1,
3165
3166 .get_starget_node_name = qla2x00_get_starget_node_name,
3167 .show_starget_node_name = 1,
3168 .get_starget_port_name = qla2x00_get_starget_port_name,
3169 .show_starget_port_name = 1,
3170 .get_starget_port_id = qla2x00_get_starget_port_id,
3171 .show_starget_port_id = 1,
3172
2c3dfe3f
SJ		 3173 .set_rport_dev_loss_tmo = qla2x00_set_rport_loss_tmo,
3174 .show_rport_dev_loss_tmo = 1,
3175
3176 .issue_fc_host_lip = qla2x00_issue_lip,
5f3a9a20
SJ		 3177 .dev_loss_tmo_callbk = qla2x00_dev_loss_tmo_callbk,
3178 .terminate_rport_io = qla2x00_terminate_rport_io,
2c3dfe3f 3179 .get_fc_host_stats = qla2x00_get_fc_host_stats,
fabbb8df
JC		 3180 .reset_fc_host_stats = qla2x00_reset_host_stats,
3181
9a069e19
GM		 3182 .bsg_request = qla24xx_bsg_request,
3183 .bsg_timeout = qla24xx_bsg_timeout,
8482e118
AV		 3184};
3185
8482e118 3186void
7b867cf7 3187qla2x00_init_host_attr(scsi_qla_host_t *vha)
8482e118 3188{
7b867cf7 3189 struct qla_hw_data *ha = vha->hw;
72a92df2 3190 u32 speeds = FC_PORTSPEED_UNKNOWN;
2ae2b370 3191
d2b5f10e 3192 fc_host_dev_loss_tmo(vha->host) = ha->port_down_retry_count;
7b867cf7
AC		 3193 fc_host_node_name(vha->host) = wwn_to_u64(vha->node_name);
3194 fc_host_port_name(vha->host) = wwn_to_u64(vha->port_name);
7c3f8fd1 3195 fc_host_supported_classes(vha->host) = ha->base_qpair->enable_class_2 ?
2d70c103 3196 (FC_COS_CLASS2|FC_COS_CLASS3) : FC_COS_CLASS3;
7b867cf7
AC		 3197 fc_host_max_npiv_vports(vha->host) = ha->max_npiv_vports;
3198 fc_host_npiv_vports_inuse(vha->host) = ha->cur_vport_count;
2ae2b370 3199
6246b8a1 3200 if (IS_CNA_CAPABLE(ha))
72a92df2
JC		 3201 speeds = FC_PORTSPEED_10GBIT;
3202 else if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) {
3203 if (ha->max_supported_speed == 2) {
3204 if (ha->min_supported_speed <= 6)
3205 speeds |= FC_PORTSPEED_64GBIT;
3206 }
3207 if (ha->max_supported_speed == 2 ||
3208 ha->max_supported_speed == 1) {
3209 if (ha->min_supported_speed <= 5)
3210 speeds |= FC_PORTSPEED_32GBIT;
3211 }
3212 if (ha->max_supported_speed == 2 ||
3213 ha->max_supported_speed == 1 ||
3214 ha->max_supported_speed == 0) {
3215 if (ha->min_supported_speed <= 4)
3216 speeds |= FC_PORTSPEED_16GBIT;
3217 }
3218 if (ha->max_supported_speed == 1 ||
3219 ha->max_supported_speed == 0) {
3220 if (ha->min_supported_speed <= 3)
3221 speeds |= FC_PORTSPEED_8GBIT;
3222 }
3223 if (ha->max_supported_speed == 0) {
3224 if (ha->min_supported_speed <= 2)
3225 speeds |= FC_PORTSPEED_4GBIT;
3226 }
3227 } else if (IS_QLA2031(ha))
3228 speeds = FC_PORTSPEED_16GBIT|FC_PORTSPEED_8GBIT|
3229 FC_PORTSPEED_4GBIT;
3230 else if (IS_QLA25XX(ha) || IS_QLAFX00(ha))
3231 speeds = FC_PORTSPEED_8GBIT|FC_PORTSPEED_4GBIT|
3232 FC_PORTSPEED_2GBIT|FC_PORTSPEED_1GBIT;
4d4df193 3233 else if (IS_QLA24XX_TYPE(ha))
72a92df2
JC		 3234 speeds = FC_PORTSPEED_4GBIT|FC_PORTSPEED_2GBIT|
3235 FC_PORTSPEED_1GBIT;
2ae2b370 3236 else if (IS_QLA23XX(ha))
72a92df2 3237 speeds = FC_PORTSPEED_2GBIT|FC_PORTSPEED_1GBIT;
2ae2b370 3238 else
72a92df2
JC		 3239 speeds = FC_PORTSPEED_1GBIT;
3240
3241 fc_host_supported_speeds(vha->host) = speeds;
8482e118 3242}
A mirror of Linus' kernel repository