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[people/ms/u-boot.git] / drivers / serial / mcfuart.c
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8e585f02 1/*
2bd806fe 2 * (C) Copyright 2004-2007 Freescale Semiconductor, Inc.
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3 * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25/*
26 * Minimal serial functions needed to use one of the uart ports
27 * as serial console interface.
28 */
29
30#include <common.h>
3e66c078 31
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32#include <asm/immap.h>
33#include <asm/uart.h>
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34
35DECLARE_GLOBAL_DATA_PTR;
36
fa9da596 37extern void uart_port_conf(int port);
8d1d66af 38
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39int serial_init(void)
40{
41 volatile uart_t *uart;
42 u32 counter;
43
6d0f6bcf 44 uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
8e585f02 45
fa9da596 46 uart_port_conf(CONFIG_SYS_UART_PORT);
8d1d66af 47
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48 /* write to SICR: SIM2 = uart mode,dcd does not affect rx */
49 uart->ucr = UART_UCR_RESET_RX;
50 uart->ucr = UART_UCR_RESET_TX;
51 uart->ucr = UART_UCR_RESET_ERROR;
52 uart->ucr = UART_UCR_RESET_MR;
53 __asm__("nop");
54
55 uart->uimr = 0;
56
57 /* write to CSR: RX/TX baud rate from timers */
58 uart->ucsr = (UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK);
59
60 uart->umr = (UART_UMR_BC_8 | UART_UMR_PM_NONE);
61 uart->umr = UART_UMR_SB_STOP_BITS_1;
62
63 /* Setting up BaudRate */
81cc3232
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64 counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2));
65 counter = counter / gd->baudrate;
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66
67 /* write to CTUR: divide counter upper byte */
68 uart->ubg1 = (u8) ((counter & 0xff00) >> 8);
69 /* write to CTLR: divide counter lower byte */
70 uart->ubg2 = (u8) (counter & 0x00ff);
71
72 uart->ucr = (UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED);
73
74 return (0);
75}
76
77void serial_putc(const char c)
78{
6d0f6bcf 79 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
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80
81 if (c == '\n')
82 serial_putc('\r');
83
84 /* Wait for last character to go. */
85 while (!(uart->usr & UART_USR_TXRDY)) ;
86
87 uart->utb = c;
88}
89
90void serial_puts(const char *s)
91{
92 while (*s) {
93 serial_putc(*s++);
94 }
95}
96
97int serial_getc(void)
98{
6d0f6bcf 99 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
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100
101 /* Wait for a character to arrive. */
102 while (!(uart->usr & UART_USR_RXRDY)) ;
103 return uart->urb;
104}
105
106int serial_tstc(void)
107{
6d0f6bcf 108 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
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109
110 return (uart->usr & UART_USR_RXRDY);
111}
112
113void serial_setbrg(void)
114{
6d0f6bcf 115 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
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116 u32 counter;
117
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118 /* Setting up BaudRate */
119 counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2));
120 counter = counter / gd->baudrate;
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121
122 /* write to CTUR: divide counter upper byte */
123 uart->ubg1 = ((counter & 0xff00) >> 8);
124 /* write to CTLR: divide counter lower byte */
125 uart->ubg2 = (counter & 0x00ff);
126
127 uart->ucr = UART_UCR_RESET_RX;
128 uart->ucr = UART_UCR_RESET_TX;
129
130 uart->ucr = UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED;
131}