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281e00a3 WD |
1 | /* |
2 | * (C) Copyright 2002 | |
792a09eb | 3 | * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
281e00a3 WD |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
c609719b WD |
16 | * along with this program; if not, write to the Free Software |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <common.h> | |
ac67804f | 22 | #include <asm/arch/s3c24x0_cpu.h> |
c609719b | 23 | |
d87080b7 WD |
24 | DECLARE_GLOBAL_DATA_PTR; |
25 | ||
48b42616 WD |
26 | #ifdef CONFIG_SERIAL1 |
27 | #define UART_NR S3C24X0_UART0 | |
28 | ||
42dfe7a1 | 29 | #elif defined(CONFIG_SERIAL2) |
48b42616 | 30 | # if defined(CONFIG_TRAB) |
f54ebdfa | 31 | # error "TRAB supports only CONFIG_SERIAL1" |
48b42616 WD |
32 | # endif |
33 | #define UART_NR S3C24X0_UART1 | |
34 | ||
42dfe7a1 | 35 | #elif defined(CONFIG_SERIAL3) |
48b42616 | 36 | # if defined(CONFIG_TRAB) |
eb0ae7f5 | 37 | # error "TRAB supports only CONFIG_SERIAL1" |
48b42616 WD |
38 | # endif |
39 | #define UART_NR S3C24X0_UART2 | |
40 | ||
41 | #else | |
42 | #error "Bad: you didn't configure serial ..." | |
43 | #endif | |
c609719b | 44 | |
eb0ae7f5 | 45 | #include <asm/io.h> |
46 | ||
a7c185ed HW |
47 | #if defined(CONFIG_SERIAL_MULTI) |
48 | #include <serial.h> | |
49 | ||
50 | /* Multi serial device functions */ | |
51 | #define DECLARE_S3C_SERIAL_FUNCTIONS(port) \ | |
eb0ae7f5 | 52 | int s3serial##port##_init(void) \ |
53 | { \ | |
54 | return serial_init_dev(port); \ | |
55 | } \ | |
56 | void s3serial##port##_setbrg(void) \ | |
57 | { \ | |
58 | serial_setbrg_dev(port); \ | |
59 | } \ | |
60 | int s3serial##port##_getc(void) \ | |
61 | { \ | |
62 | return serial_getc_dev(port); \ | |
63 | } \ | |
64 | int s3serial##port##_tstc(void) \ | |
65 | { \ | |
66 | return serial_tstc_dev(port); \ | |
67 | } \ | |
68 | void s3serial##port##_putc(const char c) \ | |
69 | { \ | |
70 | serial_putc_dev(port, c); \ | |
71 | } \ | |
72 | void s3serial##port##_puts(const char *s) \ | |
73 | { \ | |
74 | serial_puts_dev(port, s); \ | |
75 | } | |
76 | ||
77 | #define INIT_S3C_SERIAL_STRUCTURE(port, name, bus) { \ | |
78 | name, \ | |
79 | bus, \ | |
80 | s3serial##port##_init, \ | |
81 | s3serial##port##_setbrg, \ | |
82 | s3serial##port##_getc, \ | |
83 | s3serial##port##_tstc, \ | |
84 | s3serial##port##_putc, \ | |
85 | s3serial##port##_puts, \ | |
86 | } | |
a7c185ed HW |
87 | |
88 | #endif /* CONFIG_SERIAL_MULTI */ | |
89 | ||
eb0ae7f5 | 90 | #ifdef CONFIG_HWFLOW |
91 | static int hwflow; | |
92 | #endif | |
93 | ||
a7c185ed | 94 | void _serial_setbrg(const int dev_index) |
c609719b | 95 | { |
eb0ae7f5 | 96 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
c609719b | 97 | unsigned int reg = 0; |
a7c185ed | 98 | int i; |
c609719b WD |
99 | |
100 | /* value is calculated so : (int)(PCLK/16./baudrate) -1 */ | |
101 | reg = get_PCLK() / (16 * gd->baudrate) - 1; | |
102 | ||
eb0ae7f5 | 103 | writel(reg, &uart->UBRDIV); |
104 | for (i = 0; i < 100; i++) | |
105 | /* Delay */ ; | |
a7c185ed | 106 | } |
eb0ae7f5 | 107 | |
a7c185ed | 108 | #if defined(CONFIG_SERIAL_MULTI) |
eb0ae7f5 | 109 | static inline void serial_setbrg_dev(unsigned int dev_index) |
a7c185ed HW |
110 | { |
111 | _serial_setbrg(dev_index); | |
112 | } | |
113 | #else | |
114 | void serial_setbrg(void) | |
115 | { | |
116 | _serial_setbrg(UART_NR); | |
117 | } | |
118 | #endif | |
119 | ||
120 | ||
121 | /* Initialise the serial port. The settings are always 8 data bits, no parity, | |
122 | * 1 stop bit, no start bits. | |
123 | */ | |
124 | static int serial_init_dev(const int dev_index) | |
125 | { | |
eb0ae7f5 | 126 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
127 | ||
128 | #ifdef CONFIG_HWFLOW | |
129 | hwflow = 0; /* turned off by default */ | |
130 | #endif | |
a7c185ed | 131 | |
c609719b | 132 | /* FIFO enable, Tx/Rx FIFO clear */ |
eb0ae7f5 | 133 | writel(0x07, &uart->UFCON); |
134 | writel(0x0, &uart->UMCON); | |
a7c185ed | 135 | |
c609719b | 136 | /* Normal,No parity,1 stop,8 bit */ |
eb0ae7f5 | 137 | writel(0x3, &uart->ULCON); |
c609719b WD |
138 | /* |
139 | * tx=level,rx=edge,disable timeout int.,enable rx error int., | |
140 | * normal,interrupt or polling | |
141 | */ | |
eb0ae7f5 | 142 | writel(0x245, &uart->UCON); |
c609719b WD |
143 | |
144 | #ifdef CONFIG_HWFLOW | |
eb0ae7f5 | 145 | writel(0x1, &uart->UMCON); /* RTS up */ |
c609719b | 146 | #endif |
a7c185ed HW |
147 | |
148 | /* FIXME: This is sooooooooooooooooooo ugly */ | |
149 | #if defined(CONFIG_ARCH_GTA02_v1) || defined(CONFIG_ARCH_GTA02_v2) | |
150 | /* we need auto hw flow control on the gsm and gps port */ | |
151 | if (dev_index == 0 || dev_index == 1) | |
eb0ae7f5 | 152 | writel(0x10, &uart->UMCON); |
a7c185ed HW |
153 | #endif |
154 | _serial_setbrg(dev_index); | |
155 | ||
156 | return (0); | |
c609719b WD |
157 | } |
158 | ||
a7c185ed HW |
159 | #if !defined(CONFIG_SERIAL_MULTI) |
160 | /* Initialise the serial port. The settings are always 8 data bits, no parity, | |
161 | * 1 stop bit, no start bits. | |
c609719b | 162 | */ |
eb0ae7f5 | 163 | int serial_init(void) |
c609719b | 164 | { |
a7c185ed | 165 | return serial_init_dev(UART_NR); |
c609719b | 166 | } |
a7c185ed | 167 | #endif |
c609719b WD |
168 | |
169 | /* | |
170 | * Read a single byte from the serial port. Returns 1 on success, 0 | |
171 | * otherwise. When the function is succesfull, the character read is | |
172 | * written into its argument c. | |
173 | */ | |
eb0ae7f5 | 174 | int _serial_getc(const int dev_index) |
c609719b | 175 | { |
eb0ae7f5 | 176 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
8bde7f77 | 177 | |
eb0ae7f5 | 178 | while (!(readl(&uart->UTRSTAT) & 0x1)) |
179 | /* wait for character to arrive */ ; | |
c609719b | 180 | |
eb0ae7f5 | 181 | return readb(&uart->URXH) & 0xff; |
c609719b | 182 | } |
eb0ae7f5 | 183 | |
a7c185ed HW |
184 | #if defined(CONFIG_SERIAL_MULTI) |
185 | static inline int serial_getc_dev(unsigned int dev_index) | |
186 | { | |
187 | return _serial_getc(dev_index); | |
188 | } | |
189 | #else | |
eb0ae7f5 | 190 | int serial_getc(void) |
a7c185ed HW |
191 | { |
192 | return _serial_getc(UART_NR); | |
193 | } | |
194 | #endif | |
c609719b WD |
195 | |
196 | #ifdef CONFIG_HWFLOW | |
c609719b WD |
197 | int hwflow_onoff(int on) |
198 | { | |
eb0ae7f5 | 199 | switch (on) { |
c609719b WD |
200 | case 0: |
201 | default: | |
eb0ae7f5 | 202 | break; /* return current */ |
c609719b | 203 | case 1: |
eb0ae7f5 | 204 | hwflow = 1; /* turn on */ |
c609719b WD |
205 | break; |
206 | case -1: | |
eb0ae7f5 | 207 | hwflow = 0; /* turn off */ |
c609719b WD |
208 | break; |
209 | } | |
210 | return hwflow; | |
211 | } | |
212 | #endif | |
213 | ||
214 | #ifdef CONFIG_MODEM_SUPPORT | |
215 | static int be_quiet = 0; | |
216 | void disable_putc(void) | |
217 | { | |
218 | be_quiet = 1; | |
219 | } | |
220 | ||
221 | void enable_putc(void) | |
222 | { | |
223 | be_quiet = 0; | |
224 | } | |
225 | #endif | |
226 | ||
227 | ||
228 | /* | |
229 | * Output a single byte to the serial port. | |
230 | */ | |
eb0ae7f5 | 231 | void _serial_putc(const char c, const int dev_index) |
c609719b | 232 | { |
eb0ae7f5 | 233 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
c609719b WD |
234 | #ifdef CONFIG_MODEM_SUPPORT |
235 | if (be_quiet) | |
236 | return; | |
237 | #endif | |
238 | ||
eb0ae7f5 | 239 | while (!(readl(&uart->UTRSTAT) & 0x2)) |
240 | /* wait for room in the tx FIFO */ ; | |
c609719b WD |
241 | |
242 | #ifdef CONFIG_HWFLOW | |
eb0ae7f5 | 243 | while (hwflow && !(readl(&uart->UMSTAT) & 0x1)) |
244 | /* Wait for CTS up */ ; | |
c609719b WD |
245 | #endif |
246 | ||
eb0ae7f5 | 247 | writeb(c, &uart->UTXH); |
c609719b WD |
248 | |
249 | /* If \n, also do \r */ | |
250 | if (c == '\n') | |
eb0ae7f5 | 251 | serial_putc('\r'); |
c609719b | 252 | } |
eb0ae7f5 | 253 | |
a7c185ed HW |
254 | #if defined(CONFIG_SERIAL_MULTI) |
255 | static inline void serial_putc_dev(unsigned int dev_index, const char c) | |
256 | { | |
257 | _serial_putc(c, dev_index); | |
258 | } | |
259 | #else | |
260 | void serial_putc(const char c) | |
261 | { | |
262 | _serial_putc(c, UART_NR); | |
263 | } | |
264 | #endif | |
265 | ||
c609719b WD |
266 | |
267 | /* | |
268 | * Test whether a character is in the RX buffer | |
269 | */ | |
a7c185ed | 270 | int _serial_tstc(const int dev_index) |
c609719b | 271 | { |
eb0ae7f5 | 272 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
48b42616 | 273 | |
eb0ae7f5 | 274 | return readl(&uart->UTRSTAT) & 0x1; |
c609719b | 275 | } |
eb0ae7f5 | 276 | |
a7c185ed | 277 | #if defined(CONFIG_SERIAL_MULTI) |
eb0ae7f5 | 278 | static inline int serial_tstc_dev(unsigned int dev_index) |
a7c185ed HW |
279 | { |
280 | return _serial_tstc(dev_index); | |
281 | } | |
282 | #else | |
283 | int serial_tstc(void) | |
284 | { | |
285 | return _serial_tstc(UART_NR); | |
286 | } | |
287 | #endif | |
c609719b | 288 | |
a7c185ed | 289 | void _serial_puts(const char *s, const int dev_index) |
c609719b WD |
290 | { |
291 | while (*s) { | |
eb0ae7f5 | 292 | _serial_putc(*s++, dev_index); |
c609719b WD |
293 | } |
294 | } | |
eb0ae7f5 | 295 | |
a7c185ed | 296 | #if defined(CONFIG_SERIAL_MULTI) |
eb0ae7f5 | 297 | static inline void serial_puts_dev(int dev_index, const char *s) |
a7c185ed HW |
298 | { |
299 | _serial_puts(s, dev_index); | |
300 | } | |
301 | #else | |
eb0ae7f5 | 302 | void serial_puts(const char *s) |
a7c185ed HW |
303 | { |
304 | _serial_puts(s, UART_NR); | |
305 | } | |
306 | #endif | |
307 | ||
308 | #if defined(CONFIG_SERIAL_MULTI) | |
309 | DECLARE_S3C_SERIAL_FUNCTIONS(0); | |
310 | struct serial_device s3c24xx_serial0_device = | |
eb0ae7f5 | 311 | INIT_S3C_SERIAL_STRUCTURE(0, "s3ser0", "S3UART1"); |
a7c185ed HW |
312 | DECLARE_S3C_SERIAL_FUNCTIONS(1); |
313 | struct serial_device s3c24xx_serial1_device = | |
eb0ae7f5 | 314 | INIT_S3C_SERIAL_STRUCTURE(1, "s3ser1", "S3UART2"); |
a7c185ed HW |
315 | DECLARE_S3C_SERIAL_FUNCTIONS(2); |
316 | struct serial_device s3c24xx_serial2_device = | |
eb0ae7f5 | 317 | INIT_S3C_SERIAL_STRUCTURE(2, "s3ser2", "S3UART3"); |
a7c185ed | 318 | #endif /* CONFIG_SERIAL_MULTI */ |