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281e00a3 WD |
1 | /* |
2 | * (C) Copyright 2002 | |
792a09eb | 3 | * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
281e00a3 WD |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
c609719b WD |
16 | * along with this program; if not, write to the Free Software |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <common.h> | |
ac67804f | 22 | #include <asm/arch/s3c24x0_cpu.h> |
c609719b | 23 | |
d87080b7 WD |
24 | DECLARE_GLOBAL_DATA_PTR; |
25 | ||
48b42616 WD |
26 | #ifdef CONFIG_SERIAL1 |
27 | #define UART_NR S3C24X0_UART0 | |
28 | ||
42dfe7a1 | 29 | #elif defined(CONFIG_SERIAL2) |
48b42616 | 30 | # if defined(CONFIG_TRAB) |
f54ebdfa | 31 | # error "TRAB supports only CONFIG_SERIAL1" |
48b42616 WD |
32 | # endif |
33 | #define UART_NR S3C24X0_UART1 | |
34 | ||
42dfe7a1 | 35 | #elif defined(CONFIG_SERIAL3) |
48b42616 | 36 | # if defined(CONFIG_TRAB) |
eb0ae7f5 | 37 | # error "TRAB supports only CONFIG_SERIAL1" |
48b42616 WD |
38 | # endif |
39 | #define UART_NR S3C24X0_UART2 | |
40 | ||
41 | #else | |
42 | #error "Bad: you didn't configure serial ..." | |
43 | #endif | |
c609719b | 44 | |
eb0ae7f5 | 45 | #include <asm/io.h> |
46 | ||
a7c185ed HW |
47 | #if defined(CONFIG_SERIAL_MULTI) |
48 | #include <serial.h> | |
49 | ||
50 | /* Multi serial device functions */ | |
51 | #define DECLARE_S3C_SERIAL_FUNCTIONS(port) \ | |
eb0ae7f5 | 52 | int s3serial##port##_init(void) \ |
53 | { \ | |
54 | return serial_init_dev(port); \ | |
55 | } \ | |
56 | void s3serial##port##_setbrg(void) \ | |
57 | { \ | |
58 | serial_setbrg_dev(port); \ | |
59 | } \ | |
60 | int s3serial##port##_getc(void) \ | |
61 | { \ | |
62 | return serial_getc_dev(port); \ | |
63 | } \ | |
64 | int s3serial##port##_tstc(void) \ | |
65 | { \ | |
66 | return serial_tstc_dev(port); \ | |
67 | } \ | |
68 | void s3serial##port##_putc(const char c) \ | |
69 | { \ | |
70 | serial_putc_dev(port, c); \ | |
71 | } \ | |
72 | void s3serial##port##_puts(const char *s) \ | |
73 | { \ | |
74 | serial_puts_dev(port, s); \ | |
75 | } | |
76 | ||
77 | #define INIT_S3C_SERIAL_STRUCTURE(port, name, bus) { \ | |
78 | name, \ | |
79 | bus, \ | |
80 | s3serial##port##_init, \ | |
fbb0030e | 81 | NULL,\ |
eb0ae7f5 | 82 | s3serial##port##_setbrg, \ |
83 | s3serial##port##_getc, \ | |
84 | s3serial##port##_tstc, \ | |
85 | s3serial##port##_putc, \ | |
86 | s3serial##port##_puts, \ | |
87 | } | |
a7c185ed HW |
88 | |
89 | #endif /* CONFIG_SERIAL_MULTI */ | |
90 | ||
eb0ae7f5 | 91 | #ifdef CONFIG_HWFLOW |
92 | static int hwflow; | |
93 | #endif | |
94 | ||
a7c185ed | 95 | void _serial_setbrg(const int dev_index) |
c609719b | 96 | { |
eb0ae7f5 | 97 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
c609719b | 98 | unsigned int reg = 0; |
a7c185ed | 99 | int i; |
c609719b WD |
100 | |
101 | /* value is calculated so : (int)(PCLK/16./baudrate) -1 */ | |
102 | reg = get_PCLK() / (16 * gd->baudrate) - 1; | |
103 | ||
eb0ae7f5 | 104 | writel(reg, &uart->UBRDIV); |
105 | for (i = 0; i < 100; i++) | |
106 | /* Delay */ ; | |
a7c185ed | 107 | } |
eb0ae7f5 | 108 | |
a7c185ed | 109 | #if defined(CONFIG_SERIAL_MULTI) |
eb0ae7f5 | 110 | static inline void serial_setbrg_dev(unsigned int dev_index) |
a7c185ed HW |
111 | { |
112 | _serial_setbrg(dev_index); | |
113 | } | |
114 | #else | |
115 | void serial_setbrg(void) | |
116 | { | |
117 | _serial_setbrg(UART_NR); | |
118 | } | |
119 | #endif | |
120 | ||
121 | ||
122 | /* Initialise the serial port. The settings are always 8 data bits, no parity, | |
123 | * 1 stop bit, no start bits. | |
124 | */ | |
125 | static int serial_init_dev(const int dev_index) | |
126 | { | |
eb0ae7f5 | 127 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
128 | ||
129 | #ifdef CONFIG_HWFLOW | |
130 | hwflow = 0; /* turned off by default */ | |
131 | #endif | |
a7c185ed | 132 | |
c609719b | 133 | /* FIFO enable, Tx/Rx FIFO clear */ |
eb0ae7f5 | 134 | writel(0x07, &uart->UFCON); |
135 | writel(0x0, &uart->UMCON); | |
a7c185ed | 136 | |
c609719b | 137 | /* Normal,No parity,1 stop,8 bit */ |
eb0ae7f5 | 138 | writel(0x3, &uart->ULCON); |
c609719b WD |
139 | /* |
140 | * tx=level,rx=edge,disable timeout int.,enable rx error int., | |
141 | * normal,interrupt or polling | |
142 | */ | |
eb0ae7f5 | 143 | writel(0x245, &uart->UCON); |
c609719b WD |
144 | |
145 | #ifdef CONFIG_HWFLOW | |
eb0ae7f5 | 146 | writel(0x1, &uart->UMCON); /* RTS up */ |
c609719b | 147 | #endif |
a7c185ed HW |
148 | |
149 | /* FIXME: This is sooooooooooooooooooo ugly */ | |
150 | #if defined(CONFIG_ARCH_GTA02_v1) || defined(CONFIG_ARCH_GTA02_v2) | |
151 | /* we need auto hw flow control on the gsm and gps port */ | |
152 | if (dev_index == 0 || dev_index == 1) | |
eb0ae7f5 | 153 | writel(0x10, &uart->UMCON); |
a7c185ed HW |
154 | #endif |
155 | _serial_setbrg(dev_index); | |
156 | ||
157 | return (0); | |
c609719b WD |
158 | } |
159 | ||
a7c185ed HW |
160 | #if !defined(CONFIG_SERIAL_MULTI) |
161 | /* Initialise the serial port. The settings are always 8 data bits, no parity, | |
162 | * 1 stop bit, no start bits. | |
c609719b | 163 | */ |
eb0ae7f5 | 164 | int serial_init(void) |
c609719b | 165 | { |
a7c185ed | 166 | return serial_init_dev(UART_NR); |
c609719b | 167 | } |
a7c185ed | 168 | #endif |
c609719b WD |
169 | |
170 | /* | |
171 | * Read a single byte from the serial port. Returns 1 on success, 0 | |
172 | * otherwise. When the function is succesfull, the character read is | |
173 | * written into its argument c. | |
174 | */ | |
eb0ae7f5 | 175 | int _serial_getc(const int dev_index) |
c609719b | 176 | { |
eb0ae7f5 | 177 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
8bde7f77 | 178 | |
eb0ae7f5 | 179 | while (!(readl(&uart->UTRSTAT) & 0x1)) |
180 | /* wait for character to arrive */ ; | |
c609719b | 181 | |
eb0ae7f5 | 182 | return readb(&uart->URXH) & 0xff; |
c609719b | 183 | } |
eb0ae7f5 | 184 | |
a7c185ed HW |
185 | #if defined(CONFIG_SERIAL_MULTI) |
186 | static inline int serial_getc_dev(unsigned int dev_index) | |
187 | { | |
188 | return _serial_getc(dev_index); | |
189 | } | |
190 | #else | |
eb0ae7f5 | 191 | int serial_getc(void) |
a7c185ed HW |
192 | { |
193 | return _serial_getc(UART_NR); | |
194 | } | |
195 | #endif | |
c609719b WD |
196 | |
197 | #ifdef CONFIG_HWFLOW | |
c609719b WD |
198 | int hwflow_onoff(int on) |
199 | { | |
eb0ae7f5 | 200 | switch (on) { |
c609719b WD |
201 | case 0: |
202 | default: | |
eb0ae7f5 | 203 | break; /* return current */ |
c609719b | 204 | case 1: |
eb0ae7f5 | 205 | hwflow = 1; /* turn on */ |
c609719b WD |
206 | break; |
207 | case -1: | |
eb0ae7f5 | 208 | hwflow = 0; /* turn off */ |
c609719b WD |
209 | break; |
210 | } | |
211 | return hwflow; | |
212 | } | |
213 | #endif | |
214 | ||
215 | #ifdef CONFIG_MODEM_SUPPORT | |
216 | static int be_quiet = 0; | |
217 | void disable_putc(void) | |
218 | { | |
219 | be_quiet = 1; | |
220 | } | |
221 | ||
222 | void enable_putc(void) | |
223 | { | |
224 | be_quiet = 0; | |
225 | } | |
226 | #endif | |
227 | ||
228 | ||
229 | /* | |
230 | * Output a single byte to the serial port. | |
231 | */ | |
eb0ae7f5 | 232 | void _serial_putc(const char c, const int dev_index) |
c609719b | 233 | { |
eb0ae7f5 | 234 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
c609719b WD |
235 | #ifdef CONFIG_MODEM_SUPPORT |
236 | if (be_quiet) | |
237 | return; | |
238 | #endif | |
239 | ||
eb0ae7f5 | 240 | while (!(readl(&uart->UTRSTAT) & 0x2)) |
241 | /* wait for room in the tx FIFO */ ; | |
c609719b WD |
242 | |
243 | #ifdef CONFIG_HWFLOW | |
eb0ae7f5 | 244 | while (hwflow && !(readl(&uart->UMSTAT) & 0x1)) |
245 | /* Wait for CTS up */ ; | |
c609719b WD |
246 | #endif |
247 | ||
eb0ae7f5 | 248 | writeb(c, &uart->UTXH); |
c609719b WD |
249 | |
250 | /* If \n, also do \r */ | |
251 | if (c == '\n') | |
eb0ae7f5 | 252 | serial_putc('\r'); |
c609719b | 253 | } |
eb0ae7f5 | 254 | |
a7c185ed HW |
255 | #if defined(CONFIG_SERIAL_MULTI) |
256 | static inline void serial_putc_dev(unsigned int dev_index, const char c) | |
257 | { | |
258 | _serial_putc(c, dev_index); | |
259 | } | |
260 | #else | |
261 | void serial_putc(const char c) | |
262 | { | |
263 | _serial_putc(c, UART_NR); | |
264 | } | |
265 | #endif | |
266 | ||
c609719b WD |
267 | |
268 | /* | |
269 | * Test whether a character is in the RX buffer | |
270 | */ | |
a7c185ed | 271 | int _serial_tstc(const int dev_index) |
c609719b | 272 | { |
eb0ae7f5 | 273 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
48b42616 | 274 | |
eb0ae7f5 | 275 | return readl(&uart->UTRSTAT) & 0x1; |
c609719b | 276 | } |
eb0ae7f5 | 277 | |
a7c185ed | 278 | #if defined(CONFIG_SERIAL_MULTI) |
eb0ae7f5 | 279 | static inline int serial_tstc_dev(unsigned int dev_index) |
a7c185ed HW |
280 | { |
281 | return _serial_tstc(dev_index); | |
282 | } | |
283 | #else | |
284 | int serial_tstc(void) | |
285 | { | |
286 | return _serial_tstc(UART_NR); | |
287 | } | |
288 | #endif | |
c609719b | 289 | |
a7c185ed | 290 | void _serial_puts(const char *s, const int dev_index) |
c609719b WD |
291 | { |
292 | while (*s) { | |
eb0ae7f5 | 293 | _serial_putc(*s++, dev_index); |
c609719b WD |
294 | } |
295 | } | |
eb0ae7f5 | 296 | |
a7c185ed | 297 | #if defined(CONFIG_SERIAL_MULTI) |
eb0ae7f5 | 298 | static inline void serial_puts_dev(int dev_index, const char *s) |
a7c185ed HW |
299 | { |
300 | _serial_puts(s, dev_index); | |
301 | } | |
302 | #else | |
eb0ae7f5 | 303 | void serial_puts(const char *s) |
a7c185ed HW |
304 | { |
305 | _serial_puts(s, UART_NR); | |
306 | } | |
307 | #endif | |
308 | ||
309 | #if defined(CONFIG_SERIAL_MULTI) | |
310 | DECLARE_S3C_SERIAL_FUNCTIONS(0); | |
311 | struct serial_device s3c24xx_serial0_device = | |
eb0ae7f5 | 312 | INIT_S3C_SERIAL_STRUCTURE(0, "s3ser0", "S3UART1"); |
a7c185ed HW |
313 | DECLARE_S3C_SERIAL_FUNCTIONS(1); |
314 | struct serial_device s3c24xx_serial1_device = | |
eb0ae7f5 | 315 | INIT_S3C_SERIAL_STRUCTURE(1, "s3ser1", "S3UART2"); |
a7c185ed HW |
316 | DECLARE_S3C_SERIAL_FUNCTIONS(2); |
317 | struct serial_device s3c24xx_serial2_device = | |
eb0ae7f5 | 318 | INIT_S3C_SERIAL_STRUCTURE(2, "s3ser2", "S3UART3"); |
a7c185ed | 319 | #endif /* CONFIG_SERIAL_MULTI */ |