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1/*
2 * (C) Copyright 2009 SAMSUNG Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Heungjun Kim <riverful.kim@samsung.com>
5 *
6 * based on drivers/serial/s3c64xx.c
7 *
1a459660 8 * SPDX-License-Identifier: GPL-2.0+
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9 */
10
11#include <common.h>
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12#include <dm.h>
13#include <errno.h>
d4ec8f08 14#include <fdtdec.h>
6c768ca7 15#include <linux/compiler.h>
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16#include <asm/io.h>
17#include <asm/arch/uart.h>
18#include <asm/arch/clk.h>
19#include <serial.h>
20
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21DECLARE_GLOBAL_DATA_PTR;
22
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23#define RX_FIFO_COUNT_SHIFT 0
24#define RX_FIFO_COUNT_MASK (0xff << RX_FIFO_COUNT_SHIFT)
25#define RX_FIFO_FULL (1 << 8)
26#define TX_FIFO_COUNT_SHIFT 16
27#define TX_FIFO_COUNT_MASK (0xff << TX_FIFO_COUNT_SHIFT)
28#define TX_FIFO_FULL (1 << 24)
ffbff1dd 29
d4ec8f08 30/* Information about a serial port */
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31struct s5p_serial_platdata {
32 struct s5p_uart *reg; /* address of registers in physical memory */
d4ec8f08 33 u8 port_id; /* uart port number */
73e256c2 34};
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35
36/*
46a3b5c8 37 * The coefficient, used to calculate the baudrate on S5P UARTs is
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38 * calculated as
39 * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
40 * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
41 * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants:
42 */
43static const int udivslot[] = {
44 0,
45 0x0080,
46 0x0808,
47 0x0888,
48 0x2222,
49 0x4924,
50 0x4a52,
51 0x54aa,
52 0x5555,
53 0xd555,
54 0xd5d5,
55 0xddd5,
56 0xdddd,
57 0xdfdd,
58 0xdfdf,
59 0xffdf,
60};
61
73e256c2 62int s5p_serial_setbrg(struct udevice *dev, int baudrate)
dd2c9e6a 63{
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64 struct s5p_serial_platdata *plat = dev->platdata;
65 struct s5p_uart *const uart = plat->reg;
66 u32 uclk = get_uart_clk(plat->port_id);
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67 u32 val;
68
f70409af 69 val = uclk / baudrate;
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70
71 writel(val / 16 - 1, &uart->ubrdiv);
1628cfc4 72
e0617c62 73 if (s5p_uart_divslot())
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74 writew(udivslot[val % 16], &uart->rest.slot);
75 else
76 writeb(val % 16, &uart->rest.value);
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77
78 return 0;
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79}
80
73e256c2 81static int s5p_serial_probe(struct udevice *dev)
dd2c9e6a 82{
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83 struct s5p_serial_platdata *plat = dev->platdata;
84 struct s5p_uart *const uart = plat->reg;
dd2c9e6a 85
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86 /* enable FIFOs, auto clear Rx FIFO */
87 writel(0x3, &uart->ufcon);
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88 writel(0, &uart->umcon);
89 /* 8N1 */
90 writel(0x3, &uart->ulcon);
91 /* No interrupts, no DMA, pure polling */
92 writel(0x245, &uart->ucon);
93
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94 return 0;
95}
96
73e256c2 97static int serial_err_check(const struct s5p_uart *const uart, int op)
dd2c9e6a 98{
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99 unsigned int mask;
100
101 /*
102 * UERSTAT
103 * Break Detect [3]
104 * Frame Err [2] : receive operation
105 * Parity Err [1] : receive operation
106 * Overrun Err [0] : receive operation
107 */
108 if (op)
109 mask = 0x8;
110 else
111 mask = 0xf;
dd2c9e6a 112
94003226 113 return readl(&uart->uerstat) & mask;
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114}
115
73e256c2 116static int s5p_serial_getc(struct udevice *dev)
dd2c9e6a 117{
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118 struct s5p_serial_platdata *plat = dev->platdata;
119 struct s5p_uart *const uart = plat->reg;
d4ec8f08 120
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121 if (!(readl(&uart->ufstat) & RX_FIFO_COUNT_MASK))
122 return -EAGAIN;
dd2c9e6a 123
73e256c2 124 serial_err_check(uart, 0);
1a4106dd 125 return (int)(readb(&uart->urxh) & 0xff);
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126}
127
73e256c2 128static int s5p_serial_putc(struct udevice *dev, const char ch)
dd2c9e6a 129{
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130 struct s5p_serial_platdata *plat = dev->platdata;
131 struct s5p_uart *const uart = plat->reg;
dd2c9e6a 132
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133 if (readl(&uart->ufstat) & TX_FIFO_FULL)
134 return -EAGAIN;
dd2c9e6a 135
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136 writeb(ch, &uart->utxh);
137 serial_err_check(uart, 1);
dd2c9e6a 138
73e256c2 139 return 0;
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140}
141
73e256c2 142static int s5p_serial_pending(struct udevice *dev, bool input)
dd2c9e6a 143{
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144 struct s5p_serial_platdata *plat = dev->platdata;
145 struct s5p_uart *const uart = plat->reg;
146 uint32_t ufstat = readl(&uart->ufstat);
dd2c9e6a 147
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148 if (input)
149 return (ufstat & RX_FIFO_COUNT_MASK) >> RX_FIFO_COUNT_SHIFT;
150 else
151 return (ufstat & TX_FIFO_COUNT_MASK) >> TX_FIFO_COUNT_SHIFT;
90bad891 152}
dd2c9e6a 153
73e256c2 154static int s5p_serial_ofdata_to_platdata(struct udevice *dev)
d4ec8f08 155{
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156 struct s5p_serial_platdata *plat = dev->platdata;
157 fdt_addr_t addr;
d4ec8f08 158
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159 addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
160 if (addr == FDT_ADDR_T_NONE)
161 return -EINVAL;
d4ec8f08 162
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163 plat->reg = (struct s5p_uart *)addr;
164 plat->port_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "id", -1);
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165
166 return 0;
167}
d4ec8f08 168
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169static const struct dm_serial_ops s5p_serial_ops = {
170 .putc = s5p_serial_putc,
171 .pending = s5p_serial_pending,
172 .getc = s5p_serial_getc,
173 .setbrg = s5p_serial_setbrg,
174};
b4980515 175
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176static const struct udevice_id s5p_serial_ids[] = {
177 { .compatible = "samsung,exynos4210-uart" },
178 { }
179};
180
181U_BOOT_DRIVER(serial_s5p) = {
182 .name = "serial_s5p",
183 .id = UCLASS_SERIAL,
184 .of_match = s5p_serial_ids,
185 .ofdata_to_platdata = s5p_serial_ofdata_to_platdata,
186 .platdata_auto_alloc_size = sizeof(struct s5p_serial_platdata),
187 .probe = s5p_serial_probe,
188 .ops = &s5p_serial_ops,
189 .flags = DM_FLAG_PRE_RELOC,
190};