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[thirdparty/u-boot.git] / drivers / serial / serial_s5p.c
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83d290c5 1// SPDX-License-Identifier: GPL-2.0+
dd2c9e6a
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2/*
3 * (C) Copyright 2009 SAMSUNG Electronics
4 * Minkyu Kang <mk7.kang@samsung.com>
5 * Heungjun Kim <riverful.kim@samsung.com>
6 *
7 * based on drivers/serial/s3c64xx.c
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8 */
9
10#include <common.h>
73e256c2
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11#include <dm.h>
12#include <errno.h>
d4ec8f08 13#include <fdtdec.h>
6c768ca7 14#include <linux/compiler.h>
dd2c9e6a 15#include <asm/io.h>
dd2c9e6a 16#include <asm/arch/clk.h>
89ca9351 17#include <asm/arch/uart.h>
dd2c9e6a 18#include <serial.h>
cf75cdf9 19#include <clk.h>
dd2c9e6a 20
29565326
JR
21DECLARE_GLOBAL_DATA_PTR;
22
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23#define RX_FIFO_COUNT_SHIFT 0
24#define RX_FIFO_COUNT_MASK (0xff << RX_FIFO_COUNT_SHIFT)
25#define RX_FIFO_FULL (1 << 8)
26#define TX_FIFO_COUNT_SHIFT 16
27#define TX_FIFO_COUNT_MASK (0xff << TX_FIFO_COUNT_SHIFT)
28#define TX_FIFO_FULL (1 << 24)
ffbff1dd 29
d4ec8f08 30/* Information about a serial port */
73e256c2
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31struct s5p_serial_platdata {
32 struct s5p_uart *reg; /* address of registers in physical memory */
d4ec8f08 33 u8 port_id; /* uart port number */
73e256c2 34};
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35
36/*
46a3b5c8 37 * The coefficient, used to calculate the baudrate on S5P UARTs is
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38 * calculated as
39 * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
40 * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
41 * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants:
42 */
43static const int udivslot[] = {
44 0,
45 0x0080,
46 0x0808,
47 0x0888,
48 0x2222,
49 0x4924,
50 0x4a52,
51 0x54aa,
52 0x5555,
53 0xd555,
54 0xd5d5,
55 0xddd5,
56 0xdddd,
57 0xdfdd,
58 0xdfdf,
59 0xffdf,
60};
61
89ca9351
SG
62static void __maybe_unused s5p_serial_init(struct s5p_uart *uart)
63{
64 /* enable FIFOs, auto clear Rx FIFO */
65 writel(0x3, &uart->ufcon);
66 writel(0, &uart->umcon);
67 /* 8N1 */
68 writel(0x3, &uart->ulcon);
69 /* No interrupts, no DMA, pure polling */
70 writel(0x245, &uart->ucon);
71}
72
73static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk,
74 int baudrate)
dd2c9e6a 75{
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76 u32 val;
77
f70409af 78 val = uclk / baudrate;
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79
80 writel(val / 16 - 1, &uart->ubrdiv);
1628cfc4 81
e0617c62 82 if (s5p_uart_divslot())
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83 writew(udivslot[val % 16], &uart->rest.slot);
84 else
85 writeb(val % 16, &uart->rest.value);
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86}
87
7fb57396 88#ifndef CONFIG_SPL_BUILD
89ca9351
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89int s5p_serial_setbrg(struct udevice *dev, int baudrate)
90{
91 struct s5p_serial_platdata *plat = dev->platdata;
92 struct s5p_uart *const uart = plat->reg;
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93 u32 uclk;
94
95#ifdef CONFIG_CLK_EXYNOS
135aa950 96 struct clk clk;
cf75cdf9
TA
97 u32 ret;
98
135aa950 99 ret = clk_get_by_index(dev, 1, &clk);
cf75cdf9
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100 if (ret < 0)
101 return ret;
135aa950 102 uclk = clk_get_rate(&clk);
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103#else
104 uclk = get_uart_clk(plat->port_id);
105#endif
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106
107 s5p_serial_baud(uart, uclk, baudrate);
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108
109 return 0;
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110}
111
73e256c2 112static int s5p_serial_probe(struct udevice *dev)
dd2c9e6a 113{
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114 struct s5p_serial_platdata *plat = dev->platdata;
115 struct s5p_uart *const uart = plat->reg;
dd2c9e6a 116
89ca9351 117 s5p_serial_init(uart);
dd2c9e6a 118
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119 return 0;
120}
121
73e256c2 122static int serial_err_check(const struct s5p_uart *const uart, int op)
dd2c9e6a 123{
94003226
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124 unsigned int mask;
125
126 /*
127 * UERSTAT
128 * Break Detect [3]
129 * Frame Err [2] : receive operation
130 * Parity Err [1] : receive operation
131 * Overrun Err [0] : receive operation
132 */
133 if (op)
134 mask = 0x8;
135 else
136 mask = 0xf;
dd2c9e6a 137
94003226 138 return readl(&uart->uerstat) & mask;
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139}
140
73e256c2 141static int s5p_serial_getc(struct udevice *dev)
dd2c9e6a 142{
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143 struct s5p_serial_platdata *plat = dev->platdata;
144 struct s5p_uart *const uart = plat->reg;
d4ec8f08 145
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146 if (!(readl(&uart->ufstat) & RX_FIFO_COUNT_MASK))
147 return -EAGAIN;
dd2c9e6a 148
73e256c2 149 serial_err_check(uart, 0);
1a4106dd 150 return (int)(readb(&uart->urxh) & 0xff);
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151}
152
73e256c2 153static int s5p_serial_putc(struct udevice *dev, const char ch)
dd2c9e6a 154{
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155 struct s5p_serial_platdata *plat = dev->platdata;
156 struct s5p_uart *const uart = plat->reg;
dd2c9e6a 157
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158 if (readl(&uart->ufstat) & TX_FIFO_FULL)
159 return -EAGAIN;
dd2c9e6a 160
73e256c2
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161 writeb(ch, &uart->utxh);
162 serial_err_check(uart, 1);
dd2c9e6a 163
73e256c2 164 return 0;
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165}
166
73e256c2 167static int s5p_serial_pending(struct udevice *dev, bool input)
dd2c9e6a 168{
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169 struct s5p_serial_platdata *plat = dev->platdata;
170 struct s5p_uart *const uart = plat->reg;
171 uint32_t ufstat = readl(&uart->ufstat);
dd2c9e6a 172
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173 if (input)
174 return (ufstat & RX_FIFO_COUNT_MASK) >> RX_FIFO_COUNT_SHIFT;
175 else
176 return (ufstat & TX_FIFO_COUNT_MASK) >> TX_FIFO_COUNT_SHIFT;
90bad891 177}
dd2c9e6a 178
73e256c2 179static int s5p_serial_ofdata_to_platdata(struct udevice *dev)
d4ec8f08 180{
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SG
181 struct s5p_serial_platdata *plat = dev->platdata;
182 fdt_addr_t addr;
d4ec8f08 183
a821c4af 184 addr = devfdt_get_addr(dev);
73e256c2
SG
185 if (addr == FDT_ADDR_T_NONE)
186 return -EINVAL;
d4ec8f08 187
73e256c2 188 plat->reg = (struct s5p_uart *)addr;
e160f7d4 189 plat->port_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
5ab6c4df 190 "id", dev->seq);
d4ec8f08
RS
191 return 0;
192}
d4ec8f08 193
73e256c2
SG
194static const struct dm_serial_ops s5p_serial_ops = {
195 .putc = s5p_serial_putc,
196 .pending = s5p_serial_pending,
197 .getc = s5p_serial_getc,
198 .setbrg = s5p_serial_setbrg,
199};
b4980515 200
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SG
201static const struct udevice_id s5p_serial_ids[] = {
202 { .compatible = "samsung,exynos4210-uart" },
203 { }
204};
205
206U_BOOT_DRIVER(serial_s5p) = {
207 .name = "serial_s5p",
208 .id = UCLASS_SERIAL,
209 .of_match = s5p_serial_ids,
210 .ofdata_to_platdata = s5p_serial_ofdata_to_platdata,
211 .platdata_auto_alloc_size = sizeof(struct s5p_serial_platdata),
212 .probe = s5p_serial_probe,
213 .ops = &s5p_serial_ops,
73e256c2 214};
7fb57396 215#endif
bf6e7022
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216
217#ifdef CONFIG_DEBUG_UART_S5P
218
219#include <debug_uart.h>
220
97b05973 221static inline void _debug_uart_init(void)
bf6e7022
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222{
223 struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
224
225 s5p_serial_init(uart);
226 s5p_serial_baud(uart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
227}
228
229static inline void _debug_uart_putc(int ch)
230{
231 struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
232
233 while (readl(&uart->ufstat) & TX_FIFO_FULL);
234
235 writeb(ch, &uart->utxh);
236}
237
238DEBUG_UART_FUNCS
239
240#endif