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[people/ms/u-boot.git] / drivers / serial / serial_stm32.c
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ab3f0c7d 1/*
2 * (C) Copyright 2015
66562414 3 * Kamil Lulko, <kamil.lulko@gmail.com>
ab3f0c7d 4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
66562414 9#include <dm.h>
ab3f0c7d 10#include <asm/io.h>
11#include <serial.h>
12#include <asm/arch/stm32.h>
66562414 13#include <dm/platform_data/serial_stm32.h>
ab3f0c7d 14
66562414 15struct stm32_usart {
ab3f0c7d 16 u32 sr;
17 u32 dr;
18 u32 brr;
19 u32 cr1;
20 u32 cr2;
21 u32 cr3;
22 u32 gtpr;
23};
24
66562414
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25#define USART_CR1_RE (1 << 2)
26#define USART_CR1_TE (1 << 3)
27#define USART_CR1_UE (1 << 13)
ab3f0c7d 28
29#define USART_SR_FLAG_RXNE (1 << 5)
66562414 30#define USART_SR_FLAG_TXE (1 << 7)
ab3f0c7d 31
66562414 32#define USART_BRR_F_MASK 0xF
ab3f0c7d 33#define USART_BRR_M_SHIFT 4
34#define USART_BRR_M_MASK 0xFFF0
35
36DECLARE_GLOBAL_DATA_PTR;
37
66562414 38static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
ab3f0c7d 39{
66562414
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40 struct stm32_serial_platdata *plat = dev->platdata;
41 struct stm32_usart *const usart = plat->base;
42 u32 clock, int_div, frac_div, tmp;
ab3f0c7d 43
66562414 44 if (((u32)usart & STM32_BUS_MASK) == STM32_APB1PERIPH_BASE)
ab3f0c7d 45 clock = clock_get(CLOCK_APB1);
66562414 46 else if (((u32)usart & STM32_BUS_MASK) == STM32_APB2PERIPH_BASE)
ab3f0c7d 47 clock = clock_get(CLOCK_APB2);
66562414
KL
48 else
49 return -EINVAL;
ab3f0c7d 50
66562414 51 int_div = (25 * clock) / (4 * baudrate);
ab3f0c7d 52 tmp = ((int_div / 100) << USART_BRR_M_SHIFT) & USART_BRR_M_MASK;
53 frac_div = int_div - (100 * (tmp >> USART_BRR_M_SHIFT));
54 tmp |= (((frac_div * 16) + 50) / 100) & USART_BRR_F_MASK;
ab3f0c7d 55 writel(tmp, &usart->brr);
ab3f0c7d 56
57 return 0;
58}
59
66562414 60static int stm32_serial_getc(struct udevice *dev)
ab3f0c7d 61{
66562414
KL
62 struct stm32_serial_platdata *plat = dev->platdata;
63 struct stm32_usart *const usart = plat->base;
64
65 if ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0)
66 return -EAGAIN;
67
ab3f0c7d 68 return readl(&usart->dr);
69}
70
66562414 71static int stm32_serial_putc(struct udevice *dev, const char c)
ab3f0c7d 72{
66562414
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73 struct stm32_serial_platdata *plat = dev->platdata;
74 struct stm32_usart *const usart = plat->base;
85e5f5b7 75
66562414
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76 if ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0)
77 return -EAGAIN;
445614cc 78
ab3f0c7d 79 writel(c, &usart->dr);
66562414
KL
80
81 return 0;
ab3f0c7d 82}
83
66562414 84static int stm32_serial_pending(struct udevice *dev, bool input)
ab3f0c7d 85{
66562414
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86 struct stm32_serial_platdata *plat = dev->platdata;
87 struct stm32_usart *const usart = plat->base;
ab3f0c7d 88
66562414
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89 if (input)
90 return readl(&usart->sr) & USART_SR_FLAG_RXNE ? 1 : 0;
91 else
92 return readl(&usart->sr) & USART_SR_FLAG_TXE ? 0 : 1;
ab3f0c7d 93}
94
66562414 95static int stm32_serial_probe(struct udevice *dev)
ab3f0c7d 96{
66562414
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97 struct stm32_serial_platdata *plat = dev->platdata;
98 struct stm32_usart *const usart = plat->base;
66562414
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99 setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
100
101 return 0;
ab3f0c7d 102}
66562414
KL
103
104static const struct dm_serial_ops stm32_serial_ops = {
105 .putc = stm32_serial_putc,
106 .pending = stm32_serial_pending,
107 .getc = stm32_serial_getc,
108 .setbrg = stm32_serial_setbrg,
109};
110
111U_BOOT_DRIVER(serial_stm32) = {
112 .name = "serial_stm32",
113 .id = UCLASS_SERIAL,
114 .ops = &stm32_serial_ops,
115 .probe = stm32_serial_probe,
116 .flags = DM_FLAG_PRE_RELOC,
117};