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6a12cebd VM |
1 | /* |
2 | * (C) Copyright 2016 | |
3 | * Vikas Manocha, <vikas.manocha@st.com> | |
4 | * | |
5 | * SPDX-License-Identifier: GPL-2.0+ | |
6 | */ | |
7 | ||
8 | #ifndef _SERIAL_STM32_X7_ | |
9 | #define _SERIAL_STM32_X7_ | |
10 | ||
11 | struct stm32_usart { | |
12 | u32 cr1; | |
13 | u32 cr2; | |
14 | u32 cr3; | |
15 | u32 brr; | |
16 | u32 gtpr; | |
17 | u32 rtor; | |
18 | u32 rqr; | |
19 | u32 sr; | |
20 | u32 icr; | |
21 | u32 rd_dr; | |
22 | u32 tx_dr; | |
23 | }; | |
24 | ||
122b2d47 PC |
25 | /* Information about a serial port */ |
26 | struct stm32x7_serial_platdata { | |
27 | struct stm32_usart *base; /* address of registers in physical memory */ | |
27265cee | 28 | unsigned long int clock_rate; |
122b2d47 | 29 | }; |
6a12cebd | 30 | |
1afcf9cb | 31 | #define USART_CR1_OVER8 (1 << 15) |
6a12cebd | 32 | #define USART_CR1_TE (1 << 3) |
1afcf9cb | 33 | #define USART_CR1_RE (1 << 2) |
6a12cebd VM |
34 | #define USART_CR1_UE (1 << 0) |
35 | ||
6c0c3ce8 VM |
36 | #define USART_CR3_OVRDIS (1 << 12) |
37 | ||
6a12cebd VM |
38 | #define USART_SR_FLAG_RXNE (1 << 5) |
39 | #define USART_SR_FLAG_TXE (1 << 7) | |
40 | ||
41 | #define USART_BRR_F_MASK 0xFF | |
42 | #define USART_BRR_M_SHIFT 4 | |
43 | #define USART_BRR_M_MASK 0xFFF0 | |
44 | ||
45 | #endif |