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858530a8 SG |
1 | /* |
2 | * Copyright (c) 2014 Google, Inc | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
8 | #include <dm.h> | |
9 | #include <ns16550.h> | |
10 | #include <serial.h> | |
11 | ||
bc0b2842 | 12 | #ifdef CONFIG_OF_CONTROL |
858530a8 SG |
13 | static const struct udevice_id tegra_serial_ids[] = { |
14 | { .compatible = "nvidia,tegra20-uart" }, | |
15 | { } | |
16 | }; | |
17 | ||
18 | static int tegra_serial_ofdata_to_platdata(struct udevice *dev) | |
19 | { | |
20 | struct ns16550_platdata *plat = dev_get_platdata(dev); | |
21 | int ret; | |
22 | ||
23 | ret = ns16550_serial_ofdata_to_platdata(dev); | |
24 | if (ret) | |
25 | return ret; | |
26 | plat->clock = V_NS16550_CLK; | |
27 | ||
28 | return 0; | |
29 | } | |
bc0b2842 SG |
30 | #else |
31 | struct ns16550_platdata tegra_serial = { | |
32 | .base = CONFIG_SYS_NS16550_COM1, | |
33 | .reg_shift = 2, | |
34 | .clock = V_NS16550_CLK, | |
35 | }; | |
36 | ||
37 | U_BOOT_DEVICE(ns16550_serial) = { | |
38 | "serial_tegra20", &tegra_serial | |
39 | }; | |
40 | #endif | |
41 | ||
858530a8 SG |
42 | U_BOOT_DRIVER(serial_ns16550) = { |
43 | .name = "serial_tegra20", | |
44 | .id = UCLASS_SERIAL, | |
bc0b2842 | 45 | #ifdef CONFIG_OF_CONTROL |
858530a8 SG |
46 | .of_match = tegra_serial_ids, |
47 | .ofdata_to_platdata = tegra_serial_ofdata_to_platdata, | |
48 | .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), | |
bc0b2842 | 49 | #endif |
858530a8 SG |
50 | .priv_auto_alloc_size = sizeof(struct NS16550), |
51 | .probe = ns16550_serial_probe, | |
52 | .ops = &ns16550_serial_ops, | |
bc0b2842 | 53 | .flags = DM_FLAG_PRE_RELOC, |
858530a8 | 54 | }; |