]> git.ipfire.org Git - people/ms/u-boot.git/blame - drivers/serial_pl010.c
Files include/linux/byteorder/{big,little}_endian.h define
[people/ms/u-boot.git] / drivers / serial_pl010.c
CommitLineData
3d3befa7
WD
1/*
2 * (C) Copyright 2000
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
5 * (C) Copyright 2004
6 * ARM Ltd.
7 * Philippe Robin, <philippe.robin@arm.com>
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28/* Simple U-Boot driver for the PrimeCell PL011 UARTs on the IntegratorCP */
29/* Should be fairly simple to make it work with the PL010 as well */
30
31#include <common.h>
32
33#ifdef CFG_PL010_SERIAL
34
35#include "serial_pl011.h"
36
37#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val))
38#define IO_READ(addr) (*(volatile unsigned int *)(addr))
39
40/* Integrator AP has two UARTs, we use the first one, at 38400-8-N-1 */
3d3befa7
WD
41#define CONSOLE_PORT CONFIG_CONS_INDEX
42#define baudRate CONFIG_BAUDRATE
6705d81e
WD
43static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
44#define NUM_PORTS (sizeof(port)/sizeof(port[0]))
3d3befa7
WD
45
46
42dfe7a1
WD
47static void pl010_putc (int portnum, char c);
48static int pl010_getc (int portnum);
49static int pl010_tstc (int portnum);
3d3befa7
WD
50
51
52int serial_init (void)
53{
42dfe7a1
WD
54 unsigned int divisor;
55
56 /*
57 ** First, disable everything.
58 */
59 IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, 0x0);
60
61 /*
62 ** Set baud rate
63 **
64 */
65 switch (baudRate) {
66 case 9600:
67 divisor = UART_PL010_BAUD_9600;
68 break;
69
70 case 19200:
71 divisor = UART_PL010_BAUD_9600;
72 break;
73
74 case 38400:
75 divisor = UART_PL010_BAUD_38400;
76 break;
77
78 case 57600:
79 divisor = UART_PL010_BAUD_57600;
80 break;
81
82 case 115200:
83 divisor = UART_PL010_BAUD_115200;
84 break;
85
86 default:
87 divisor = UART_PL010_BAUD_38400;
88 }
89
90 IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRM,
91 ((divisor & 0xf00) >> 8));
92 IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRL, (divisor & 0xff));
93
94 /*
95 ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
96 */
97 IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRH,
98 (UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN));
99
100 /*
101 ** Finally, enable the UART
102 */
103 IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN));
104
105 return (0);
3d3befa7
WD
106}
107
42dfe7a1 108void serial_putc (const char c)
3d3befa7
WD
109{
110 if (c == '\n')
42dfe7a1 111 pl010_putc (CONSOLE_PORT, '\r');
3d3befa7 112
42dfe7a1 113 pl010_putc (CONSOLE_PORT, c);
3d3befa7
WD
114}
115
42dfe7a1 116void serial_puts (const char *s)
3d3befa7
WD
117{
118 while (*s) {
119 serial_putc (*s++);
120 }
121}
122
42dfe7a1 123int serial_getc (void)
3d3befa7 124{
42dfe7a1 125 return pl010_getc (CONSOLE_PORT);
3d3befa7
WD
126}
127
42dfe7a1 128int serial_tstc (void)
3d3befa7 129{
42dfe7a1 130 return pl010_tstc (CONSOLE_PORT);
3d3befa7
WD
131}
132
42dfe7a1 133void serial_setbrg (void)
3d3befa7
WD
134{
135}
136
42dfe7a1 137static void pl010_putc (int portnum, char c)
3d3befa7 138{
42dfe7a1
WD
139 /* Wait until there is space in the FIFO */
140 while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF);
141
142 /* Send the character */
143 IO_WRITE (port[portnum] + UART_PL01x_DR, c);
3d3befa7
WD
144}
145
42dfe7a1 146static int pl010_getc (int portnum)
3d3befa7 147{
42dfe7a1
WD
148 unsigned int data;
149
150 /* Wait until there is data in the FIFO */
151 while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE);
152
153 data = IO_READ (port[portnum] + UART_PL01x_DR);
154
155 /* Check for an error flag */
156 if (data & 0xFFFFFF00) {
157 /* Clear the error */
158 IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF);
159 return -1;
160 }
161
162 return (int) data;
3d3befa7
WD
163}
164
42dfe7a1 165static int pl010_tstc (int portnum)
3d3befa7 166{
42dfe7a1
WD
167 return !(IO_READ (port[portnum] + UART_PL01x_FR) &
168 UART_PL01x_FR_RXFE);
3d3befa7
WD
169}
170
171#endif