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Commit | Line | Data |
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f1b1f770 AF |
1 | menuconfig SPI |
2 | bool "SPI Support" | |
0c8e6056 JT |
3 | help |
4 | The "Serial Peripheral Interface" is a low level synchronous | |
5 | protocol. Chips that support SPI can have data transfer rates | |
6 | up to several tens of Mbit/sec. Chips are addressed with a | |
7 | controller and a chipselect. Most SPI slaves don't support | |
8 | dynamic device discovery; some are even write-only or read-only. | |
9 | ||
10 | SPI is widely used by microcontrollers to talk with sensors, | |
11 | eeprom and flash memory, codecs and various other controller | |
12 | chips, analog to digital (and d-to-a) converters, and more. | |
13 | MMC and SD cards can be accessed using SPI protocol; and for | |
14 | DataFlash cards used in MMC sockets, SPI must always be used. | |
15 | ||
16 | SPI is one of a family of similar protocols using a four wire | |
17 | interface (select, clock, data in, data out) including Microwire | |
18 | (half duplex), SSP, SSI, and PSP. This driver framework should | |
19 | work with most such devices and controllers. | |
f1b1f770 AF |
20 | |
21 | if SPI | |
de823053 | 22 | |
da333ae7 MY |
23 | config DM_SPI |
24 | bool "Enable Driver Model for SPI drivers" | |
25 | depends on DM | |
26 | help | |
f94a1bed SG |
27 | Enable driver model for SPI. The SPI slave interface |
28 | (spi_setup_slave(), spi_xfer(), etc.) is then implemented by | |
29 | the SPI uclass. Drivers provide methods to access the SPI | |
30 | buses that they control. The uclass interface is defined in | |
31 | include/spi.h. The existing spi_slave structure is attached | |
32 | as 'parent data' to every slave on each bus. Slaves | |
33 | typically use driver-private data instead of extending the | |
34 | spi_slave structure. | |
892cac72 | 35 | |
d13f5b25 BB |
36 | config SPI_MEM |
37 | bool "SPI memory extension" | |
38 | help | |
39 | Enable this option if you want to enable the SPI memory extension. | |
40 | This extension is meant to simplify interaction with SPI memories | |
41 | by providing an high-level interface to send memory-like commands. | |
42 | ||
f7e1de4c CTK |
43 | config SPI_DIRMAP |
44 | bool "SPI direct mapping" | |
45 | depends on SPI_MEM | |
46 | help | |
47 | Enable the SPI direct mapping API. Most modern SPI controllers can | |
48 | directly map a SPI memory (or a portion of the SPI memory) in the CPU | |
49 | address space. Most of the time this brings significant performance | |
50 | improvements as it automates the whole process of sending SPI memory | |
51 | operations every time a new region is accessed. | |
52 | ||
6430eea6 V |
53 | if DM_SPI |
54 | ||
15a56f9c TC |
55 | config ALTERA_SPI |
56 | bool "Altera SPI driver" | |
57 | help | |
58 | Enable the Altera SPI driver. This driver can be used to | |
59 | access the SPI NOR flash on platforms embedding this Altera | |
60 | IP core. Please find details on the "Embedded Peripherals IP | |
61 | User Guide" of Altera. | |
62 | ||
7184e299 MK |
63 | config APPLE_SPI |
64 | bool "Apple SPI driver" | |
65 | default y if ARCH_APPLE | |
66 | help | |
67 | Enable the Apple SPI driver. This driver can be used to | |
68 | access the SPI flash and keyboard on machines based on Apple SoCs. | |
69 | ||
15927aef JT |
70 | config ATCSPI200_SPI |
71 | bool "Andestech ATCSPI200 SPI driver" | |
72 | help | |
73 | Enable the Andestech ATCSPI200 SPI driver. This driver can be | |
74 | used to access the SPI flash on AE3XX and AE250 platforms embedding | |
75 | this Andestech IP core. | |
76 | ||
b85dc460 WW |
77 | config ATH79_SPI |
78 | bool "Atheros SPI driver" | |
79 | depends on ARCH_ATH79 | |
80 | help | |
81 | Enable the Atheros ar7xxx/ar9xxx SoC SPI driver, it was used | |
82 | to access SPI NOR flash and other SPI peripherals. This driver | |
83 | uses driver model and requires a device tree binding to operate. | |
84 | please refer to doc/device-tree-bindings/spi/spi-ath79.txt. | |
85 | ||
24c8ff46 TA |
86 | config ATMEL_QSPI |
87 | bool "Atmel Quad SPI Controller" | |
88 | depends on ARCH_AT91 | |
89 | help | |
90 | Enable the Atmel Quad SPI controller in master mode. This driver | |
91 | does not support generic SPI. The implementation supports only the | |
92 | spi-mem interface. | |
93 | ||
0eafd4b7 WY |
94 | config ATMEL_SPI |
95 | bool "Atmel SPI driver" | |
89d4fc15 | 96 | default y if ARCH_AT91 |
0eafd4b7 WY |
97 | help |
98 | This enables driver for the Atmel SPI Controller, present on | |
daab59ac AS |
99 | many AT91 (ARM) chips. This driver can be used to access |
100 | the SPI Flash, such as AT25DF321. | |
0eafd4b7 | 101 | |
29cc4368 ÁFR |
102 | config BCM63XX_HSSPI |
103 | bool "BCM63XX HSSPI driver" | |
937b49e9 | 104 | depends on (ARCH_BMIPS || ARCH_BCMBCA) |
29cc4368 | 105 | help |
937b49e9 | 106 | Enable the BCM63XX HSSPI driver. This driver can be used to |
29cc4368 ÁFR |
107 | access the SPI NOR flash on platforms embedding this Broadcom |
108 | SPI core. | |
109 | ||
55c0144b WZ |
110 | config BCMBCA_HSSPI |
111 | bool "BCMBCA HSSPI driver" | |
112 | depends on ARCH_BCMBCA && HAVE_SPI_CS_CTRL | |
113 | help | |
114 | This enables support for the High Speed SPI controller present on | |
115 | newer Broadcom BCMBCA SoCs. These SoCs include an updated SPI controller | |
116 | that adds the capability to allow the driver to control chip select | |
117 | explicitly. | |
118 | ||
5ac07d29 ÁFR |
119 | config BCM63XX_SPI |
120 | bool "BCM6348 SPI driver" | |
121 | depends on ARCH_BMIPS | |
122 | help | |
123 | Enable the BCM6348/BCM6358 SPI driver. This driver can be used to | |
124 | access the SPI NOR flash on platforms embedding these Broadcom | |
125 | SPI cores. | |
126 | ||
894c3ad2 TF |
127 | config BCMSTB_SPI |
128 | bool "BCMSTB SPI driver" | |
129 | help | |
130 | Enable the Broadcom set-top box SPI driver. This driver can | |
131 | be used to access the SPI flash on platforms embedding this | |
132 | Broadcom SPI core. | |
133 | ||
24f27942 PC |
134 | config CORTINA_SFLASH |
135 | bool "Cortina-Access Serial Flash controller driver" | |
136 | depends on DM_SPI && SPI_MEM | |
137 | help | |
138 | Enable the Cortina-Access Serial Flash controller driver. This driver | |
139 | can be used to access the SPI NOR/NAND flash on platforms embedding this | |
140 | Cortina-Access IP core. | |
141 | ||
e4976af8 JT |
142 | config CADENCE_QSPI |
143 | bool "Cadence QSPI driver" | |
144 | help | |
145 | Enable the Cadence Quad-SPI (QSPI) driver. This driver can be | |
146 | used to access the SPI NOR flash on platforms embedding this | |
147 | Cadence IP core. | |
148 | ||
55b3ba4c TR |
149 | config HAS_CQSPI_REF_CLK |
150 | bool "Cadence QSPI static reference clock" | |
151 | depends on CADENCE_QSPI | |
152 | ||
153 | config CQSPI_REF_CLK | |
154 | int "Cadence QSPI reference clock value in Hz" | |
155 | depends on HAS_CQSPI_REF_CLK | |
156 | ||
cf553bf2 KR |
157 | config CADENCE_OSPI_VERSAL |
158 | bool "Configure Versal OSPI" | |
1e681448 | 159 | depends on (ARCH_VERSAL || ARCH_VERSAL_NET) && CADENCE_QSPI |
cf553bf2 KR |
160 | imply DM_GPIO |
161 | help | |
162 | This option is used to enable Versal OSPI DMA operations which | |
163 | are used for ospi flash read using cadence qspi controller. | |
164 | ||
610e316d AD |
165 | config CF_SPI |
166 | bool "ColdFire SPI driver" | |
167 | help | |
168 | Enable the ColdFire SPI driver. This driver can be used on | |
169 | some m68k SoCs. | |
170 | ||
807f0ff6 JT |
171 | config DAVINCI_SPI |
172 | bool "Davinci & Keystone SPI driver" | |
173 | depends on ARCH_DAVINCI || ARCH_KEYSTONE | |
174 | help | |
175 | Enable the Davinci SPI driver | |
176 | ||
e4976af8 JT |
177 | config DESIGNWARE_SPI |
178 | bool "Designware SPI driver" | |
179 | help | |
180 | Enable the Designware SPI driver. This driver can be used to | |
181 | access the SPI NOR flash on platforms embedding this Designware | |
182 | IP core. | |
183 | ||
c354eee8 JT |
184 | config EXYNOS_SPI |
185 | bool "Samsung Exynos SPI driver" | |
186 | help | |
187 | Enable the Samsung Exynos SPI driver. This driver can be used to | |
188 | access the SPI NOR flash on platforms embedding this Samsung | |
189 | Exynos IP core. | |
190 | ||
94ea308d JT |
191 | config FSL_DSPI |
192 | bool "Freescale DSPI driver" | |
193 | help | |
194 | Enable the Freescale DSPI driver. This driver can be used to | |
195 | access the SPI NOR flash and SPI Data flash on platforms embedding | |
196 | this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms | |
197 | use this driver. | |
198 | ||
e24241c3 JT |
199 | config FSL_QSPI |
200 | bool "Freescale QSPI driver" | |
201 | imply SPI_FLASH_BAR | |
202 | help | |
203 | Enable the Freescale Quad-SPI (QSPI) driver. This driver can be | |
204 | used to access the SPI NOR flash on platforms embedding this | |
205 | Freescale IP core. | |
206 | ||
def88bce YL |
207 | config FSL_QSPI_AHB_FULL_MAP |
208 | bool "Use full AHB memory map space" | |
209 | depends on FSL_QSPI | |
210 | default y if ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_IMX8M | |
211 | help | |
212 | Enable the Freescale QSPI driver to use full AHB memory map space for | |
213 | flash access. | |
214 | ||
4f689b3d NH |
215 | config GXP_SPI |
216 | bool "SPI driver for GXP" | |
217 | imply SPI_FLASH_BAR | |
218 | help | |
219 | Enable support for SPI on GXP. | |
220 | ||
45636010 JT |
221 | config ICH_SPI |
222 | bool "Intel ICH SPI driver" | |
223 | help | |
224 | Enable the Intel ICH SPI driver. This driver can be used to | |
225 | access the SPI NOR flash on platforms embedding this Intel | |
226 | ICH IP core. | |
227 | ||
2ba1bd1e RK |
228 | config IPROC_QSPI |
229 | bool "Broadcom iProc QSPI Flash Controller driver" | |
230 | help | |
231 | Enable Broadcom iProc QSPI Flash Controller driver. | |
232 | This driver can be used to access the SPI NOR flash. | |
233 | ||
a58c7ffc BS |
234 | config KIRKWOOD_SPI |
235 | bool "Marvell Kirkwood SPI Driver" | |
236 | help | |
237 | Enable support for SPI on various Marvell SoCs, such as | |
238 | Kirkwood and Armada 375. | |
239 | ||
9d26506a NA |
240 | config MESON_SPIFC |
241 | bool "Amlogic Meson SPI Flash Controller driver" | |
242 | depends on ARCH_MESON | |
243 | help | |
244 | Enable the Amlogic Meson SPI Flash Controller SPIFC) driver. | |
245 | This driver can be used to access the SPI NOR flash chips on | |
246 | Amlogic Meson SoCs. | |
247 | ||
eac3bbe5 PB |
248 | config MICROCHIP_COREQSPI |
249 | bool "Microchip FPGA QSPI Controller driver" | |
250 | help | |
251 | Enable the QSPI driver for Microchip FPGA QSPI controllers. | |
252 | This driver can be used on Polarfire SoC. | |
253 | ||
b59b0ce1 IP |
254 | config MESON_SPIFC_A1 |
255 | bool "Amlogic Meson A1 SPI Flash Controller driver" | |
256 | depends on ARCH_MESON | |
257 | help | |
258 | Enable the Amlogic A1 SPI Flash Controller (SPIFC) driver. | |
259 | This driver can be used to access the SPI NOR/NAND flash chips | |
260 | with STR mode frequency up to 98MHz. Dual and quad modes are | |
261 | supported by controller. | |
262 | ||
f34d0315 CL |
263 | config MPC8XX_SPI |
264 | bool "MPC8XX SPI Driver" | |
265 | depends on MPC8xx | |
266 | help | |
267 | Enable support for SPI on MPC8XX | |
268 | ||
c1a3f1ee JT |
269 | config MPC8XXX_SPI |
270 | bool "MPC8XXX SPI Driver" | |
271 | help | |
272 | Enable support for SPI on the MPC8XXX PowerPC SoCs. | |
273 | ||
e24241c3 JT |
274 | config MSCC_BB_SPI |
275 | bool "MSCC bitbang SPI driver" | |
276 | depends on SOC_VCOREIII | |
277 | help | |
278 | Enable MSCC bitbang SPI driver. This driver can be used on | |
279 | MSCC SOCs. | |
280 | ||
2db6fba0 WG |
281 | config MT7620_SPI |
282 | bool "MediaTek MT7620 SPI driver" | |
283 | depends on SOC_MT7620 | |
284 | help | |
285 | Enable the MT7620 SPI driver. This driver can be used to access | |
286 | generic SPI devices on MediaTek MT7620 SoC. | |
287 | ||
5eee9dee SR |
288 | config MT7621_SPI |
289 | bool "MediaTek MT7621 SPI driver" | |
d2002fa7 | 290 | depends on SOC_MT7621 || SOC_MT7628 |
5eee9dee SR |
291 | help |
292 | Enable the MT7621 SPI driver. This driver can be used to access | |
293 | the SPI NOR flash on platforms embedding this Ralink / MediaTek | |
294 | SPI core, like MT7621/7628/7688. | |
295 | ||
7a49d617 SH |
296 | config MTK_SNOR |
297 | bool "Mediatek SPI-NOR controller driver" | |
298 | depends on SPI_MEM | |
299 | help | |
300 | Enable the Mediatek SPINOR controller driver. This driver has | |
301 | better read/write performance with NOR. | |
302 | ||
603fcd16 WG |
303 | config MTK_SNFI_SPI |
304 | bool "Mediatek SPI memory controller driver" | |
305 | depends on SPI_MEM | |
306 | help | |
307 | Enable the Mediatek SPI memory controller driver. This driver is | |
308 | originally based on the MediaTek SNFI IP core. It can only be | |
309 | used to access SPI memory devices like SPI-NOR or SPI-NAND on | |
310 | platforms embedding this IP core, like MT7622/M7629. | |
311 | ||
b34a2368 WG |
312 | config MTK_SPIM |
313 | bool "Mediatek SPI-MEM master controller driver" | |
314 | depends on SPI_MEM | |
315 | help | |
316 | Enable MediaTek SPI-MEM master controller driver. This driver mainly | |
317 | supports SPI flashes. You can use single, dual or quad mode | |
318 | transmission on this controller. | |
319 | ||
3fda4ef3 SR |
320 | config MVEBU_A3700_SPI |
321 | bool "Marvell Armada 3700 SPI driver" | |
dbbd5bdd | 322 | select CLK_ARMADA_3720 |
3fda4ef3 SR |
323 | help |
324 | Enable the Marvell Armada 3700 SPI driver. This driver can be | |
325 | used to access the SPI NOR flash on platforms embedding this | |
326 | Marvell IP core. | |
327 | ||
c9a9823f JT |
328 | config MXS_SPI |
329 | bool "MXS SPI Driver" | |
330 | help | |
331 | Enable the MXS SPI controller driver. This driver can be used | |
332 | on the i.MX23 and i.MX28 SoCs. | |
333 | ||
0d7066bc Z |
334 | config SPI_MXIC |
335 | bool "Macronix MX25F0A SPI controller" | |
336 | help | |
337 | Enable the Macronix MX25F0A SPI controller driver. This driver | |
338 | can be used to access the SPI flash on platforms embedding | |
339 | this Macronix IP core. | |
340 | ||
aaf2dbc8 JL |
341 | config NPCM_FIU_SPI |
342 | bool "FIU driver for Nuvoton NPCM SoC" | |
343 | help | |
344 | This enables support for the Flash Interface Unit SPI controller | |
345 | in master mode. | |
346 | ||
c1dc8473 JL |
347 | config NPCM_PSPI |
348 | bool "PSPI driver for Nuvoton NPCM SoC" | |
349 | help | |
350 | PSPI driver for NPCM SoC | |
351 | ||
383fded7 MW |
352 | config NXP_FSPI |
353 | bool "NXP FlexSPI driver" | |
354 | depends on SPI_MEM | |
355 | help | |
356 | Enable the NXP FlexSPI (FSPI) driver. This driver can be used to | |
357 | access the SPI NOR flash on platforms embedding this NXP IP core. | |
358 | ||
7853cc05 SG |
359 | config OCTEON_SPI |
360 | bool "Octeon SPI driver" | |
3232bdf0 | 361 | depends on ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2 |
7853cc05 SG |
362 | help |
363 | Enable the Octeon SPI driver. This driver can be used to | |
364 | access the SPI NOR flash on Octeon II/III and OcteonTX/TX2 | |
365 | SoC platforms. | |
366 | ||
5d128129 JT |
367 | config OMAP3_SPI |
368 | bool "McSPI driver for OMAP" | |
369 | help | |
370 | SPI master controller for OMAP24XX and later Multichannel SPI | |
371 | (McSPI). This driver be used to access SPI chips on platforms | |
372 | embedding this OMAP3 McSPI IP core. | |
373 | ||
e19b9004 PCM |
374 | config PIC32_SPI |
375 | bool "Microchip PIC32 SPI driver" | |
376 | depends on MACH_PIC32 | |
377 | help | |
378 | Enable the Microchip PIC32 SPI driver. This driver can be used | |
379 | to access the SPI NOR flash, MMC-over-SPI on platforms based on | |
380 | Microchip PIC32 family devices. | |
381 | ||
8a4791fa QS |
382 | config PL022_SPI |
383 | bool "ARM AMBA PL022 SSP controller driver" | |
384 | depends on ARM | |
385 | help | |
386 | This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP | |
387 | controller. If you have an embedded system with an AMBA(R) | |
388 | bus and a PL022 controller, say Y or M here. | |
389 | ||
367ea426 RM |
390 | config SPI_QUP |
391 | bool "Qualcomm SPI controller with QUP interface" | |
392 | depends on ARCH_IPQ40XX | |
393 | help | |
394 | Qualcomm Universal Peripheral (QUP) core is an AHB slave that | |
395 | provides a common data path (an output FIFO and an input FIFO) | |
396 | for serial peripheral interface (SPI) mini-core. SPI in master | |
397 | mode supports up to 50MHz, up to four chip selects, programmable | |
398 | data path from 4 bits to 32 bits and numerous protocol variants. | |
399 | ||
fbebea27 MV |
400 | config RENESAS_RPC_SPI |
401 | bool "Renesas RPC SPI driver" | |
72f27810 | 402 | depends on RCAR_64 || RZA1 |
89208dba | 403 | imply SPI_FLASH_SFDP_SUPPORT |
fbebea27 MV |
404 | help |
405 | Enable the Renesas RPC SPI driver, used to access SPI NOR flash | |
406 | on Renesas RCar Gen3 SoCs. This uses driver model and requires a | |
407 | device tree binding to operate. | |
408 | ||
3fb08a21 CM |
409 | config ROCKCHIP_SFC |
410 | bool "Rockchip SFC Driver" | |
411 | help | |
412 | Enable the Rockchip SFC Driver for SPI NOR flash. This device is | |
413 | a limited purpose SPI controller for driving NOR flash on certain | |
414 | Rockchip SoCs. This uses driver model and requires a device tree | |
415 | binding to operate. | |
416 | ||
1b2fd5bf SG |
417 | config ROCKCHIP_SPI |
418 | bool "Rockchip SPI driver" | |
419 | help | |
420 | Enable the Rockchip SPI driver, used to access SPI NOR flash and | |
421 | other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs. | |
422 | This uses driver model and requires a device tree binding to | |
423 | operate. | |
424 | ||
892cac72 SG |
425 | config SANDBOX_SPI |
426 | bool "Sandbox SPI driver" | |
427 | depends on SANDBOX && DM | |
428 | help | |
429 | Enable SPI support for sandbox. This is an emulation of a real SPI | |
430 | bus. Devices can be attached to the bus using the device tree | |
431 | which specifies the driver to use. As an example, see this device | |
432 | tree fragment from sandbox.dts. It shows that the SPI bus has a | |
433 | single flash device on chip select 0 which is emulated by the driver | |
434 | for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c. | |
435 | ||
436 | spi@0 { | |
437 | #address-cells = <1>; | |
438 | #size-cells = <0>; | |
439 | reg = <0>; | |
440 | compatible = "sandbox,spi"; | |
441 | cs-gpios = <0>, <&gpio_a 0>; | |
442 | flash@0 { | |
443 | reg = <0>; | |
24c2776b | 444 | compatible = "spansion,m25p16", "jedec,spi-nor"; |
892cac72 SG |
445 | spi-max-frequency = <40000000>; |
446 | sandbox,filename = "spi.bin"; | |
447 | }; | |
e4976af8 | 448 | }; |
f924a209 | 449 | |
c4659715 TR |
450 | config SANDBOX_SPI_MAX_BUS |
451 | int | |
452 | depends on SANDBOX | |
453 | default 1 | |
454 | ||
455 | config SANDBOX_SPI_MAX_CS | |
456 | int | |
457 | depends on SANDBOX | |
458 | default 10 | |
459 | ||
4daa6bb6 CTK |
460 | config SPI_ASPEED_SMC |
461 | bool "ASPEED SPI flash controller driver" | |
462 | depends on DM_SPI && SPI_MEM | |
4daa6bb6 CTK |
463 | help |
464 | Enable ASPEED SPI flash controller driver for AST2500 | |
465 | and AST2600 SoCs. | |
466 | ||
a2f32bfd BS |
467 | config SPI_SIFIVE |
468 | bool "SiFive SPI driver" | |
469 | help | |
470 | This driver supports the SiFive SPI IP. If unsure say N. | |
471 | Enable the SiFive SPI controller driver. | |
472 | ||
473 | The SiFive SPI controller driver is found on various SiFive SoCs. | |
474 | ||
726c0343 JT |
475 | config SOFT_SPI |
476 | bool "Soft SPI driver" | |
477 | help | |
478 | Enable Soft SPI driver. This driver is to use GPIO simulate | |
479 | the SPI protocol. | |
480 | ||
358f803a KH |
481 | config SPI_SN_F_OSPI |
482 | tristate "Socionext F_OSPI SPI flash controller" | |
483 | depends on SPI_MEM | |
484 | help | |
485 | This enables support for the Socionext F_OSPI controller | |
486 | for connecting an SPI flash memory over up to 8-bit wide bus. | |
487 | It supports indirect access mode only. | |
488 | ||
a51cd54e JT |
489 | config SPI_SUNXI |
490 | bool "Allwinner SoC SPI controllers" | |
dc738248 | 491 | default ARCH_SUNXI |
a51cd54e JT |
492 | help |
493 | Enable the Allwinner SoC SPi controller driver. | |
494 | ||
495 | Same controller driver can reuse in all Allwinner SoC variants. | |
496 | ||
d4363baa MK |
497 | config STM32_QSPI |
498 | bool "STM32F7 QSPI driver" | |
351d2fef | 499 | depends on STM32F4 || STM32F7 || ARCH_STM32MP |
d4363baa MK |
500 | help |
501 | Enable the STM32F7 Quad-SPI (QSPI) driver. This driver can be | |
502 | used to access the SPI NOR flash chips on platforms embedding | |
503 | this ST IP core. | |
504 | ||
a2a89b2e PC |
505 | config STM32_SPI |
506 | bool "STM32 SPI driver" | |
507 | depends on ARCH_STM32MP | |
508 | help | |
509 | Enable the STM32 Serial Peripheral Interface (SPI) driver for STM32MP | |
510 | SoCs. This uses driver model and requires a device tree binding to | |
511 | operate. | |
512 | ||
5bf9a2d3 JT |
513 | config TEGRA114_SPI |
514 | bool "nVidia Tegra114 SPI driver" | |
515 | help | |
516 | Enable the nVidia Tegra114 SPI driver. This driver can be used to | |
517 | access the SPI NOR flash on platforms embedding this nVidia Tegra114 | |
518 | IP core. | |
519 | ||
520 | This controller is different than the older SoCs SPI controller and | |
521 | also register interface get changed with this controller. | |
522 | ||
2f3e6f8c JT |
523 | config TEGRA20_SFLASH |
524 | bool "nVidia Tegra20 Serial Flash controller driver" | |
525 | help | |
526 | Enable the nVidia Tegra20 Serial Flash controller driver. This driver | |
527 | can be used to access the SPI NOR flash on platforms embedding this | |
528 | nVidia Tegra20 IP core. | |
529 | ||
4495830c JT |
530 | config TEGRA20_SLINK |
531 | bool "nVidia Tegra20/Tegra30 SLINK driver" | |
532 | help | |
533 | Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can | |
534 | be used to access the SPI NOR flash on platforms embedding this | |
535 | nVidia Tegra20/Tegra30 IP cores. | |
536 | ||
4e675ff2 TW |
537 | config TEGRA210_QSPI |
538 | bool "nVidia Tegra210 QSPI driver" | |
539 | help | |
540 | Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver | |
541 | be used to access SPI chips on platforms embedding this | |
542 | NVIDIA Tegra210 IP core. | |
543 | ||
61ae9782 VR |
544 | config TI_QSPI |
545 | bool "TI QSPI driver" | |
546 | imply TI_EDMA3 | |
547 | help | |
548 | Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms. | |
549 | This driver support spi flash single, quad and memory reads. | |
550 | ||
9424ecd7 KH |
551 | config UNIPHIER_SPI |
552 | bool "Socionext UniPhier SPI driver" | |
553 | depends on ARCH_UNIPHIER | |
554 | help | |
555 | Enable the Socionext UniPhier SPI driver. This driver can | |
556 | be used to access SPI chips on platforms embedding this | |
557 | UniPhier IP core. | |
558 | ||
075143d3 JT |
559 | config XILINX_SPI |
560 | bool "Xilinx SPI driver" | |
075143d3 JT |
561 | help |
562 | Enable the Xilinx SPI driver from the Xilinx EDK. This SPI | |
563 | controller support 8 bit SPI transfers only, with or w/o FIFO. | |
564 | For more info on Xilinx SPI Register Definitions and Overview | |
565 | see driver file - drivers/spi/xilinx_spi.c | |
566 | ||
df30a425 JT |
567 | config ZYNQ_SPI |
568 | bool "Zynq SPI driver" | |
df30a425 JT |
569 | help |
570 | Enable the Zynq SPI driver. This driver can be used to | |
571 | access the SPI NOR flash on platforms embedding this Zynq | |
572 | SPI IP core. | |
de823053 | 573 | |
78a025ac JT |
574 | config ZYNQ_QSPI |
575 | bool "Zynq QSPI driver" | |
6d825178 | 576 | imply SPI_FLASH_BAR |
78a025ac JT |
577 | help |
578 | Enable the Zynq Quad-SPI (QSPI) driver. This driver can be | |
579 | used to access the SPI NOR flash on platforms embedding this | |
580 | Zynq QSPI IP core. This IP is used to connect the flash in | |
581 | 4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel. | |
582 | ||
22cca173 SDPP |
583 | config ZYNQMP_GQSPI |
584 | bool "Configure ZynqMP Generic QSPI" | |
22cca173 SDPP |
585 | help |
586 | This option is used to enable ZynqMP QSPI controller driver which | |
587 | is used to communicate with qspi flash devices. | |
588 | ||
e4976af8 JT |
589 | endif # if DM_SPI |
590 | ||
3debffa7 JT |
591 | config FSL_ESPI |
592 | bool "Freescale eSPI driver" | |
1172e258 | 593 | depends on MPC85xx |
56e6f810 | 594 | imply SPI_FLASH_BAR |
3debffa7 JT |
595 | help |
596 | Enable the Freescale eSPI driver. This driver can be used to | |
597 | access the SPI interface and SPI NOR flash on platforms embedding | |
598 | this Freescale eSPI IP core. | |
599 | ||
a5dfabea TT |
600 | config SH_QSPI |
601 | bool "Renesas Quad SPI driver" | |
602 | help | |
603 | Enable the Renesas Quad SPI controller driver. This driver can be | |
604 | used on Renesas SoCs. | |
605 | ||
60e54562 TT |
606 | config MXC_SPI |
607 | bool "MXC SPI Driver" | |
608 | help | |
609 | Enable the MXC SPI controller driver. This driver can be used | |
610 | on various i.MX SoCs such as i.MX31/35/51/6/7. | |
611 | ||
971a3442 JB |
612 | config SYNQUACER_SPI |
613 | bool "Socionext SynQuacer HS-SPI driver" | |
614 | depends on ARCH_SYNQUACER | |
615 | help | |
616 | Enable the Socionext HS-SPI driver for SynQuacer. This driver can | |
617 | be used to access the SPI interface and SPI NOR flash on platforms | |
618 | embedding this HS-SPI IP core. | |
619 | ||
f1b1f770 | 620 | endif # menu "SPI Support" |