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spi: Support high CS when using descriptors
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b445bfcb 1// SPDX-License-Identifier: GPL-2.0-or-later
787f4889
MB
2// SPI init/core code
3//
4// Copyright (C) 2005 David Brownell
5// Copyright (C) 2008 Secret Lab Technologies Ltd.
8ae12a0d 6
8ae12a0d
DB
7#include <linux/kernel.h>
8#include <linux/device.h>
9#include <linux/init.h>
10#include <linux/cache.h>
99adef31
MB
11#include <linux/dma-mapping.h>
12#include <linux/dmaengine.h>
94040828 13#include <linux/mutex.h>
2b7a32f7 14#include <linux/of_device.h>
d57a4282 15#include <linux/of_irq.h>
86be408b 16#include <linux/clk/clk-conf.h>
5a0e3ad6 17#include <linux/slab.h>
e0626e38 18#include <linux/mod_devicetable.h>
8ae12a0d 19#include <linux/spi/spi.h>
b5932f5c 20#include <linux/spi/spi-mem.h>
74317984 21#include <linux/of_gpio.h>
f3186dd8 22#include <linux/gpio/consumer.h>
3ae22e8c 23#include <linux/pm_runtime.h>
f48c767c 24#include <linux/pm_domain.h>
826cf175 25#include <linux/property.h>
025ed130 26#include <linux/export.h>
8bd75c77 27#include <linux/sched/rt.h>
ae7e81c0 28#include <uapi/linux/sched/types.h>
ffbbdd21
LW
29#include <linux/delay.h>
30#include <linux/kthread.h>
64bee4d2
MW
31#include <linux/ioport.h>
32#include <linux/acpi.h>
b1b8153c 33#include <linux/highmem.h>
9b61e302 34#include <linux/idr.h>
8a2e487e 35#include <linux/platform_data/x86/apple.h>
8ae12a0d 36
56ec1978
MB
37#define CREATE_TRACE_POINTS
38#include <trace/events/spi.h>
9b61e302 39
46336966
BB
40#include "internals.h"
41
9b61e302 42static DEFINE_IDR(spi_master_idr);
56ec1978 43
8ae12a0d
DB
44static void spidev_release(struct device *dev)
45{
0ffa0285 46 struct spi_device *spi = to_spi_device(dev);
8ae12a0d 47
8caab75f
GU
48 /* spi controllers may cleanup for released devices */
49 if (spi->controller->cleanup)
50 spi->controller->cleanup(spi);
8ae12a0d 51
8caab75f 52 spi_controller_put(spi->controller);
5039563e 53 kfree(spi->driver_override);
07a389fe 54 kfree(spi);
8ae12a0d
DB
55}
56
57static ssize_t
58modalias_show(struct device *dev, struct device_attribute *a, char *buf)
59{
60 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR
61 int len;
62
63 len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1);
64 if (len != -ENODEV)
65 return len;
8ae12a0d 66
d8e328b3 67 return sprintf(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d 68}
aa7da564 69static DEVICE_ATTR_RO(modalias);
8ae12a0d 70
5039563e
TP
71static ssize_t driver_override_store(struct device *dev,
72 struct device_attribute *a,
73 const char *buf, size_t count)
74{
75 struct spi_device *spi = to_spi_device(dev);
76 const char *end = memchr(buf, '\n', count);
77 const size_t len = end ? end - buf : count;
78 const char *driver_override, *old;
79
80 /* We need to keep extra room for a newline when displaying value */
81 if (len >= (PAGE_SIZE - 1))
82 return -EINVAL;
83
84 driver_override = kstrndup(buf, len, GFP_KERNEL);
85 if (!driver_override)
86 return -ENOMEM;
87
88 device_lock(dev);
89 old = spi->driver_override;
90 if (len) {
91 spi->driver_override = driver_override;
92 } else {
93 /* Emptry string, disable driver override */
94 spi->driver_override = NULL;
95 kfree(driver_override);
96 }
97 device_unlock(dev);
98 kfree(old);
99
100 return count;
101}
102
103static ssize_t driver_override_show(struct device *dev,
104 struct device_attribute *a, char *buf)
105{
106 const struct spi_device *spi = to_spi_device(dev);
107 ssize_t len;
108
109 device_lock(dev);
110 len = snprintf(buf, PAGE_SIZE, "%s\n", spi->driver_override ? : "");
111 device_unlock(dev);
112 return len;
113}
114static DEVICE_ATTR_RW(driver_override);
115
eca2ebc7 116#define SPI_STATISTICS_ATTRS(field, file) \
8caab75f
GU
117static ssize_t spi_controller_##field##_show(struct device *dev, \
118 struct device_attribute *attr, \
119 char *buf) \
eca2ebc7 120{ \
8caab75f
GU
121 struct spi_controller *ctlr = container_of(dev, \
122 struct spi_controller, dev); \
123 return spi_statistics_##field##_show(&ctlr->statistics, buf); \
eca2ebc7 124} \
8caab75f 125static struct device_attribute dev_attr_spi_controller_##field = { \
ad25c92e 126 .attr = { .name = file, .mode = 0444 }, \
8caab75f 127 .show = spi_controller_##field##_show, \
eca2ebc7
MS
128}; \
129static ssize_t spi_device_##field##_show(struct device *dev, \
130 struct device_attribute *attr, \
131 char *buf) \
132{ \
d1eba93b 133 struct spi_device *spi = to_spi_device(dev); \
eca2ebc7
MS
134 return spi_statistics_##field##_show(&spi->statistics, buf); \
135} \
136static struct device_attribute dev_attr_spi_device_##field = { \
ad25c92e 137 .attr = { .name = file, .mode = 0444 }, \
eca2ebc7
MS
138 .show = spi_device_##field##_show, \
139}
140
141#define SPI_STATISTICS_SHOW_NAME(name, file, field, format_string) \
142static ssize_t spi_statistics_##name##_show(struct spi_statistics *stat, \
143 char *buf) \
144{ \
145 unsigned long flags; \
146 ssize_t len; \
147 spin_lock_irqsave(&stat->lock, flags); \
148 len = sprintf(buf, format_string, stat->field); \
149 spin_unlock_irqrestore(&stat->lock, flags); \
150 return len; \
151} \
152SPI_STATISTICS_ATTRS(name, file)
153
154#define SPI_STATISTICS_SHOW(field, format_string) \
155 SPI_STATISTICS_SHOW_NAME(field, __stringify(field), \
156 field, format_string)
157
158SPI_STATISTICS_SHOW(messages, "%lu");
159SPI_STATISTICS_SHOW(transfers, "%lu");
160SPI_STATISTICS_SHOW(errors, "%lu");
161SPI_STATISTICS_SHOW(timedout, "%lu");
162
163SPI_STATISTICS_SHOW(spi_sync, "%lu");
164SPI_STATISTICS_SHOW(spi_sync_immediate, "%lu");
165SPI_STATISTICS_SHOW(spi_async, "%lu");
166
167SPI_STATISTICS_SHOW(bytes, "%llu");
168SPI_STATISTICS_SHOW(bytes_rx, "%llu");
169SPI_STATISTICS_SHOW(bytes_tx, "%llu");
170
6b7bc061
MS
171#define SPI_STATISTICS_TRANSFER_BYTES_HISTO(index, number) \
172 SPI_STATISTICS_SHOW_NAME(transfer_bytes_histo##index, \
173 "transfer_bytes_histo_" number, \
174 transfer_bytes_histo[index], "%lu")
175SPI_STATISTICS_TRANSFER_BYTES_HISTO(0, "0-1");
176SPI_STATISTICS_TRANSFER_BYTES_HISTO(1, "2-3");
177SPI_STATISTICS_TRANSFER_BYTES_HISTO(2, "4-7");
178SPI_STATISTICS_TRANSFER_BYTES_HISTO(3, "8-15");
179SPI_STATISTICS_TRANSFER_BYTES_HISTO(4, "16-31");
180SPI_STATISTICS_TRANSFER_BYTES_HISTO(5, "32-63");
181SPI_STATISTICS_TRANSFER_BYTES_HISTO(6, "64-127");
182SPI_STATISTICS_TRANSFER_BYTES_HISTO(7, "128-255");
183SPI_STATISTICS_TRANSFER_BYTES_HISTO(8, "256-511");
184SPI_STATISTICS_TRANSFER_BYTES_HISTO(9, "512-1023");
185SPI_STATISTICS_TRANSFER_BYTES_HISTO(10, "1024-2047");
186SPI_STATISTICS_TRANSFER_BYTES_HISTO(11, "2048-4095");
187SPI_STATISTICS_TRANSFER_BYTES_HISTO(12, "4096-8191");
188SPI_STATISTICS_TRANSFER_BYTES_HISTO(13, "8192-16383");
189SPI_STATISTICS_TRANSFER_BYTES_HISTO(14, "16384-32767");
190SPI_STATISTICS_TRANSFER_BYTES_HISTO(15, "32768-65535");
191SPI_STATISTICS_TRANSFER_BYTES_HISTO(16, "65536+");
192
d9f12122
MS
193SPI_STATISTICS_SHOW(transfers_split_maxsize, "%lu");
194
aa7da564
GKH
195static struct attribute *spi_dev_attrs[] = {
196 &dev_attr_modalias.attr,
5039563e 197 &dev_attr_driver_override.attr,
aa7da564 198 NULL,
8ae12a0d 199};
eca2ebc7
MS
200
201static const struct attribute_group spi_dev_group = {
202 .attrs = spi_dev_attrs,
203};
204
205static struct attribute *spi_device_statistics_attrs[] = {
206 &dev_attr_spi_device_messages.attr,
207 &dev_attr_spi_device_transfers.attr,
208 &dev_attr_spi_device_errors.attr,
209 &dev_attr_spi_device_timedout.attr,
210 &dev_attr_spi_device_spi_sync.attr,
211 &dev_attr_spi_device_spi_sync_immediate.attr,
212 &dev_attr_spi_device_spi_async.attr,
213 &dev_attr_spi_device_bytes.attr,
214 &dev_attr_spi_device_bytes_rx.attr,
215 &dev_attr_spi_device_bytes_tx.attr,
6b7bc061
MS
216 &dev_attr_spi_device_transfer_bytes_histo0.attr,
217 &dev_attr_spi_device_transfer_bytes_histo1.attr,
218 &dev_attr_spi_device_transfer_bytes_histo2.attr,
219 &dev_attr_spi_device_transfer_bytes_histo3.attr,
220 &dev_attr_spi_device_transfer_bytes_histo4.attr,
221 &dev_attr_spi_device_transfer_bytes_histo5.attr,
222 &dev_attr_spi_device_transfer_bytes_histo6.attr,
223 &dev_attr_spi_device_transfer_bytes_histo7.attr,
224 &dev_attr_spi_device_transfer_bytes_histo8.attr,
225 &dev_attr_spi_device_transfer_bytes_histo9.attr,
226 &dev_attr_spi_device_transfer_bytes_histo10.attr,
227 &dev_attr_spi_device_transfer_bytes_histo11.attr,
228 &dev_attr_spi_device_transfer_bytes_histo12.attr,
229 &dev_attr_spi_device_transfer_bytes_histo13.attr,
230 &dev_attr_spi_device_transfer_bytes_histo14.attr,
231 &dev_attr_spi_device_transfer_bytes_histo15.attr,
232 &dev_attr_spi_device_transfer_bytes_histo16.attr,
d9f12122 233 &dev_attr_spi_device_transfers_split_maxsize.attr,
eca2ebc7
MS
234 NULL,
235};
236
237static const struct attribute_group spi_device_statistics_group = {
238 .name = "statistics",
239 .attrs = spi_device_statistics_attrs,
240};
241
242static const struct attribute_group *spi_dev_groups[] = {
243 &spi_dev_group,
244 &spi_device_statistics_group,
245 NULL,
246};
247
8caab75f
GU
248static struct attribute *spi_controller_statistics_attrs[] = {
249 &dev_attr_spi_controller_messages.attr,
250 &dev_attr_spi_controller_transfers.attr,
251 &dev_attr_spi_controller_errors.attr,
252 &dev_attr_spi_controller_timedout.attr,
253 &dev_attr_spi_controller_spi_sync.attr,
254 &dev_attr_spi_controller_spi_sync_immediate.attr,
255 &dev_attr_spi_controller_spi_async.attr,
256 &dev_attr_spi_controller_bytes.attr,
257 &dev_attr_spi_controller_bytes_rx.attr,
258 &dev_attr_spi_controller_bytes_tx.attr,
259 &dev_attr_spi_controller_transfer_bytes_histo0.attr,
260 &dev_attr_spi_controller_transfer_bytes_histo1.attr,
261 &dev_attr_spi_controller_transfer_bytes_histo2.attr,
262 &dev_attr_spi_controller_transfer_bytes_histo3.attr,
263 &dev_attr_spi_controller_transfer_bytes_histo4.attr,
264 &dev_attr_spi_controller_transfer_bytes_histo5.attr,
265 &dev_attr_spi_controller_transfer_bytes_histo6.attr,
266 &dev_attr_spi_controller_transfer_bytes_histo7.attr,
267 &dev_attr_spi_controller_transfer_bytes_histo8.attr,
268 &dev_attr_spi_controller_transfer_bytes_histo9.attr,
269 &dev_attr_spi_controller_transfer_bytes_histo10.attr,
270 &dev_attr_spi_controller_transfer_bytes_histo11.attr,
271 &dev_attr_spi_controller_transfer_bytes_histo12.attr,
272 &dev_attr_spi_controller_transfer_bytes_histo13.attr,
273 &dev_attr_spi_controller_transfer_bytes_histo14.attr,
274 &dev_attr_spi_controller_transfer_bytes_histo15.attr,
275 &dev_attr_spi_controller_transfer_bytes_histo16.attr,
276 &dev_attr_spi_controller_transfers_split_maxsize.attr,
eca2ebc7
MS
277 NULL,
278};
279
8caab75f 280static const struct attribute_group spi_controller_statistics_group = {
eca2ebc7 281 .name = "statistics",
8caab75f 282 .attrs = spi_controller_statistics_attrs,
eca2ebc7
MS
283};
284
285static const struct attribute_group *spi_master_groups[] = {
8caab75f 286 &spi_controller_statistics_group,
eca2ebc7
MS
287 NULL,
288};
289
290void spi_statistics_add_transfer_stats(struct spi_statistics *stats,
291 struct spi_transfer *xfer,
8caab75f 292 struct spi_controller *ctlr)
eca2ebc7
MS
293{
294 unsigned long flags;
6b7bc061
MS
295 int l2len = min(fls(xfer->len), SPI_STATISTICS_HISTO_SIZE) - 1;
296
297 if (l2len < 0)
298 l2len = 0;
eca2ebc7
MS
299
300 spin_lock_irqsave(&stats->lock, flags);
301
302 stats->transfers++;
6b7bc061 303 stats->transfer_bytes_histo[l2len]++;
eca2ebc7
MS
304
305 stats->bytes += xfer->len;
306 if ((xfer->tx_buf) &&
8caab75f 307 (xfer->tx_buf != ctlr->dummy_tx))
eca2ebc7
MS
308 stats->bytes_tx += xfer->len;
309 if ((xfer->rx_buf) &&
8caab75f 310 (xfer->rx_buf != ctlr->dummy_rx))
eca2ebc7
MS
311 stats->bytes_rx += xfer->len;
312
313 spin_unlock_irqrestore(&stats->lock, flags);
314}
315EXPORT_SYMBOL_GPL(spi_statistics_add_transfer_stats);
8ae12a0d
DB
316
317/* modalias support makes "modprobe $MODALIAS" new-style hotplug work,
318 * and the sysfs version makes coldplug work too.
319 */
320
75368bf6
AV
321static const struct spi_device_id *spi_match_id(const struct spi_device_id *id,
322 const struct spi_device *sdev)
323{
324 while (id->name[0]) {
325 if (!strcmp(sdev->modalias, id->name))
326 return id;
327 id++;
328 }
329 return NULL;
330}
331
332const struct spi_device_id *spi_get_device_id(const struct spi_device *sdev)
333{
334 const struct spi_driver *sdrv = to_spi_driver(sdev->dev.driver);
335
336 return spi_match_id(sdrv->id_table, sdev);
337}
338EXPORT_SYMBOL_GPL(spi_get_device_id);
339
8ae12a0d
DB
340static int spi_match_device(struct device *dev, struct device_driver *drv)
341{
342 const struct spi_device *spi = to_spi_device(dev);
75368bf6
AV
343 const struct spi_driver *sdrv = to_spi_driver(drv);
344
5039563e
TP
345 /* Check override first, and if set, only use the named driver */
346 if (spi->driver_override)
347 return strcmp(spi->driver_override, drv->name) == 0;
348
2b7a32f7
SA
349 /* Attempt an OF style match */
350 if (of_driver_match_device(dev, drv))
351 return 1;
352
64bee4d2
MW
353 /* Then try ACPI */
354 if (acpi_driver_match_device(dev, drv))
355 return 1;
356
75368bf6
AV
357 if (sdrv->id_table)
358 return !!spi_match_id(sdrv->id_table, spi);
8ae12a0d 359
35f74fca 360 return strcmp(spi->modalias, drv->name) == 0;
8ae12a0d
DB
361}
362
7eff2e7a 363static int spi_uevent(struct device *dev, struct kobj_uevent_env *env)
8ae12a0d
DB
364{
365 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR
366 int rc;
367
368 rc = acpi_device_uevent_modalias(dev, env);
369 if (rc != -ENODEV)
370 return rc;
8ae12a0d 371
2856670f 372 return add_uevent_var(env, "MODALIAS=%s%s", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d
DB
373}
374
8ae12a0d
DB
375struct bus_type spi_bus_type = {
376 .name = "spi",
aa7da564 377 .dev_groups = spi_dev_groups,
8ae12a0d
DB
378 .match = spi_match_device,
379 .uevent = spi_uevent,
8ae12a0d
DB
380};
381EXPORT_SYMBOL_GPL(spi_bus_type);
382
b885244e
DB
383
384static int spi_drv_probe(struct device *dev)
385{
386 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
44af7927 387 struct spi_device *spi = to_spi_device(dev);
33cf00e5
MW
388 int ret;
389
86be408b
SN
390 ret = of_clk_set_defaults(dev->of_node, false);
391 if (ret)
392 return ret;
393
44af7927
JH
394 if (dev->of_node) {
395 spi->irq = of_irq_get(dev->of_node, 0);
396 if (spi->irq == -EPROBE_DEFER)
397 return -EPROBE_DEFER;
398 if (spi->irq < 0)
399 spi->irq = 0;
400 }
401
676e7c25 402 ret = dev_pm_domain_attach(dev, true);
71f277a7
UH
403 if (ret)
404 return ret;
405
406 ret = sdrv->probe(spi);
407 if (ret)
408 dev_pm_domain_detach(dev, true);
b885244e 409
33cf00e5 410 return ret;
b885244e
DB
411}
412
413static int spi_drv_remove(struct device *dev)
414{
415 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
33cf00e5
MW
416 int ret;
417
aec35f4e 418 ret = sdrv->remove(to_spi_device(dev));
676e7c25 419 dev_pm_domain_detach(dev, true);
b885244e 420
33cf00e5 421 return ret;
b885244e
DB
422}
423
424static void spi_drv_shutdown(struct device *dev)
425{
426 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
427
428 sdrv->shutdown(to_spi_device(dev));
429}
430
33e34dc6 431/**
ca5d2485 432 * __spi_register_driver - register a SPI driver
88c9321d 433 * @owner: owner module of the driver to register
33e34dc6
DB
434 * @sdrv: the driver to register
435 * Context: can sleep
97d56dc6
JMC
436 *
437 * Return: zero on success, else a negative error code.
33e34dc6 438 */
ca5d2485 439int __spi_register_driver(struct module *owner, struct spi_driver *sdrv)
b885244e 440{
ca5d2485 441 sdrv->driver.owner = owner;
b885244e
DB
442 sdrv->driver.bus = &spi_bus_type;
443 if (sdrv->probe)
444 sdrv->driver.probe = spi_drv_probe;
445 if (sdrv->remove)
446 sdrv->driver.remove = spi_drv_remove;
447 if (sdrv->shutdown)
448 sdrv->driver.shutdown = spi_drv_shutdown;
449 return driver_register(&sdrv->driver);
450}
ca5d2485 451EXPORT_SYMBOL_GPL(__spi_register_driver);
b885244e 452
8ae12a0d
DB
453/*-------------------------------------------------------------------------*/
454
455/* SPI devices should normally not be created by SPI device drivers; that
8caab75f 456 * would make them board-specific. Similarly with SPI controller drivers.
8ae12a0d
DB
457 * Device registration normally goes into like arch/.../mach.../board-YYY.c
458 * with other readonly (flashable) information about mainboard devices.
459 */
460
461struct boardinfo {
462 struct list_head list;
2b9603a0 463 struct spi_board_info board_info;
8ae12a0d
DB
464};
465
466static LIST_HEAD(board_list);
8caab75f 467static LIST_HEAD(spi_controller_list);
2b9603a0
FT
468
469/*
470 * Used to protect add/del opertion for board_info list and
8caab75f 471 * spi_controller list, and their matching process
9a9a047a 472 * also used to protect object of type struct idr
2b9603a0 473 */
94040828 474static DEFINE_MUTEX(board_lock);
8ae12a0d 475
dc87c98e
GL
476/**
477 * spi_alloc_device - Allocate a new SPI device
8caab75f 478 * @ctlr: Controller to which device is connected
dc87c98e
GL
479 * Context: can sleep
480 *
481 * Allows a driver to allocate and initialize a spi_device without
482 * registering it immediately. This allows a driver to directly
483 * fill the spi_device with device parameters before calling
484 * spi_add_device() on it.
485 *
486 * Caller is responsible to call spi_add_device() on the returned
8caab75f 487 * spi_device structure to add it to the SPI controller. If the caller
dc87c98e
GL
488 * needs to discard the spi_device without adding it, then it should
489 * call spi_dev_put() on it.
490 *
97d56dc6 491 * Return: a pointer to the new device, or NULL.
dc87c98e 492 */
8caab75f 493struct spi_device *spi_alloc_device(struct spi_controller *ctlr)
dc87c98e
GL
494{
495 struct spi_device *spi;
dc87c98e 496
8caab75f 497 if (!spi_controller_get(ctlr))
dc87c98e
GL
498 return NULL;
499
5fe5f05e 500 spi = kzalloc(sizeof(*spi), GFP_KERNEL);
dc87c98e 501 if (!spi) {
8caab75f 502 spi_controller_put(ctlr);
dc87c98e
GL
503 return NULL;
504 }
505
8caab75f
GU
506 spi->master = spi->controller = ctlr;
507 spi->dev.parent = &ctlr->dev;
dc87c98e
GL
508 spi->dev.bus = &spi_bus_type;
509 spi->dev.release = spidev_release;
446411e1 510 spi->cs_gpio = -ENOENT;
eca2ebc7
MS
511
512 spin_lock_init(&spi->statistics.lock);
513
dc87c98e
GL
514 device_initialize(&spi->dev);
515 return spi;
516}
517EXPORT_SYMBOL_GPL(spi_alloc_device);
518
e13ac47b
JN
519static void spi_dev_set_name(struct spi_device *spi)
520{
521 struct acpi_device *adev = ACPI_COMPANION(&spi->dev);
522
523 if (adev) {
524 dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev));
525 return;
526 }
527
8caab75f 528 dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev),
e13ac47b
JN
529 spi->chip_select);
530}
531
b6fb8d3a
MW
532static int spi_dev_check(struct device *dev, void *data)
533{
534 struct spi_device *spi = to_spi_device(dev);
535 struct spi_device *new_spi = data;
536
8caab75f 537 if (spi->controller == new_spi->controller &&
b6fb8d3a
MW
538 spi->chip_select == new_spi->chip_select)
539 return -EBUSY;
540 return 0;
541}
542
dc87c98e
GL
543/**
544 * spi_add_device - Add spi_device allocated with spi_alloc_device
545 * @spi: spi_device to register
546 *
547 * Companion function to spi_alloc_device. Devices allocated with
548 * spi_alloc_device can be added onto the spi bus with this function.
549 *
97d56dc6 550 * Return: 0 on success; negative errno on failure
dc87c98e
GL
551 */
552int spi_add_device(struct spi_device *spi)
553{
e48880e0 554 static DEFINE_MUTEX(spi_add_lock);
8caab75f
GU
555 struct spi_controller *ctlr = spi->controller;
556 struct device *dev = ctlr->dev.parent;
dc87c98e
GL
557 int status;
558
559 /* Chipselects are numbered 0..max; validate. */
8caab75f
GU
560 if (spi->chip_select >= ctlr->num_chipselect) {
561 dev_err(dev, "cs%d >= max %d\n", spi->chip_select,
562 ctlr->num_chipselect);
dc87c98e
GL
563 return -EINVAL;
564 }
565
566 /* Set the bus ID string */
e13ac47b 567 spi_dev_set_name(spi);
e48880e0
DB
568
569 /* We need to make sure there's no other device with this
570 * chipselect **BEFORE** we call setup(), else we'll trash
571 * its configuration. Lock against concurrent add() calls.
572 */
573 mutex_lock(&spi_add_lock);
574
b6fb8d3a
MW
575 status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check);
576 if (status) {
e48880e0
DB
577 dev_err(dev, "chipselect %d already in use\n",
578 spi->chip_select);
e48880e0
DB
579 goto done;
580 }
581
f3186dd8
LW
582 /* Descriptors take precedence */
583 if (ctlr->cs_gpiods)
584 spi->cs_gpiod = ctlr->cs_gpiods[spi->chip_select];
585 else if (ctlr->cs_gpios)
8caab75f 586 spi->cs_gpio = ctlr->cs_gpios[spi->chip_select];
74317984 587
e48880e0
DB
588 /* Drivers may modify this initial i/o setup, but will
589 * normally rely on the device being setup. Devices
590 * using SPI_CS_HIGH can't coexist well otherwise...
591 */
7d077197 592 status = spi_setup(spi);
dc87c98e 593 if (status < 0) {
eb288a1f
LW
594 dev_err(dev, "can't setup %s, status %d\n",
595 dev_name(&spi->dev), status);
e48880e0 596 goto done;
dc87c98e
GL
597 }
598
e48880e0 599 /* Device may be bound to an active driver when this returns */
dc87c98e 600 status = device_add(&spi->dev);
e48880e0 601 if (status < 0)
eb288a1f
LW
602 dev_err(dev, "can't add %s, status %d\n",
603 dev_name(&spi->dev), status);
e48880e0 604 else
35f74fca 605 dev_dbg(dev, "registered child %s\n", dev_name(&spi->dev));
dc87c98e 606
e48880e0
DB
607done:
608 mutex_unlock(&spi_add_lock);
609 return status;
dc87c98e
GL
610}
611EXPORT_SYMBOL_GPL(spi_add_device);
8ae12a0d 612
33e34dc6
DB
613/**
614 * spi_new_device - instantiate one new SPI device
8caab75f 615 * @ctlr: Controller to which device is connected
33e34dc6
DB
616 * @chip: Describes the SPI device
617 * Context: can sleep
618 *
619 * On typical mainboards, this is purely internal; and it's not needed
8ae12a0d
DB
620 * after board init creates the hard-wired devices. Some development
621 * platforms may not be able to use spi_register_board_info though, and
622 * this is exported so that for example a USB or parport based adapter
623 * driver could add devices (which it would learn about out-of-band).
082c8cb4 624 *
97d56dc6 625 * Return: the new device, or NULL.
8ae12a0d 626 */
8caab75f 627struct spi_device *spi_new_device(struct spi_controller *ctlr,
e9d5a461 628 struct spi_board_info *chip)
8ae12a0d
DB
629{
630 struct spi_device *proxy;
8ae12a0d
DB
631 int status;
632
082c8cb4
DB
633 /* NOTE: caller did any chip->bus_num checks necessary.
634 *
635 * Also, unless we change the return value convention to use
636 * error-or-pointer (not NULL-or-pointer), troubleshootability
637 * suggests syslogged diagnostics are best here (ugh).
638 */
639
8caab75f 640 proxy = spi_alloc_device(ctlr);
dc87c98e 641 if (!proxy)
8ae12a0d
DB
642 return NULL;
643
102eb975
GL
644 WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias));
645
8ae12a0d
DB
646 proxy->chip_select = chip->chip_select;
647 proxy->max_speed_hz = chip->max_speed_hz;
980a01c9 648 proxy->mode = chip->mode;
8ae12a0d 649 proxy->irq = chip->irq;
102eb975 650 strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias));
8ae12a0d
DB
651 proxy->dev.platform_data = (void *) chip->platform_data;
652 proxy->controller_data = chip->controller_data;
653 proxy->controller_state = NULL;
8ae12a0d 654
826cf175
DT
655 if (chip->properties) {
656 status = device_add_properties(&proxy->dev, chip->properties);
657 if (status) {
8caab75f 658 dev_err(&ctlr->dev,
826cf175
DT
659 "failed to add properties to '%s': %d\n",
660 chip->modalias, status);
661 goto err_dev_put;
662 }
8ae12a0d
DB
663 }
664
826cf175
DT
665 status = spi_add_device(proxy);
666 if (status < 0)
667 goto err_remove_props;
668
8ae12a0d 669 return proxy;
826cf175
DT
670
671err_remove_props:
672 if (chip->properties)
673 device_remove_properties(&proxy->dev);
674err_dev_put:
675 spi_dev_put(proxy);
676 return NULL;
8ae12a0d
DB
677}
678EXPORT_SYMBOL_GPL(spi_new_device);
679
3b1884c2
GU
680/**
681 * spi_unregister_device - unregister a single SPI device
682 * @spi: spi_device to unregister
683 *
684 * Start making the passed SPI device vanish. Normally this would be handled
8caab75f 685 * by spi_unregister_controller().
3b1884c2
GU
686 */
687void spi_unregister_device(struct spi_device *spi)
688{
bd6c1644
GU
689 if (!spi)
690 return;
691
8324147f 692 if (spi->dev.of_node) {
bd6c1644 693 of_node_clear_flag(spi->dev.of_node, OF_POPULATED);
8324147f
JH
694 of_node_put(spi->dev.of_node);
695 }
7f24467f
OP
696 if (ACPI_COMPANION(&spi->dev))
697 acpi_device_clear_enumerated(ACPI_COMPANION(&spi->dev));
bd6c1644 698 device_unregister(&spi->dev);
3b1884c2
GU
699}
700EXPORT_SYMBOL_GPL(spi_unregister_device);
701
8caab75f
GU
702static void spi_match_controller_to_boardinfo(struct spi_controller *ctlr,
703 struct spi_board_info *bi)
2b9603a0
FT
704{
705 struct spi_device *dev;
706
8caab75f 707 if (ctlr->bus_num != bi->bus_num)
2b9603a0
FT
708 return;
709
8caab75f 710 dev = spi_new_device(ctlr, bi);
2b9603a0 711 if (!dev)
8caab75f 712 dev_err(ctlr->dev.parent, "can't create new device for %s\n",
2b9603a0
FT
713 bi->modalias);
714}
715
33e34dc6
DB
716/**
717 * spi_register_board_info - register SPI devices for a given board
718 * @info: array of chip descriptors
719 * @n: how many descriptors are provided
720 * Context: can sleep
721 *
8ae12a0d
DB
722 * Board-specific early init code calls this (probably during arch_initcall)
723 * with segments of the SPI device table. Any device nodes are created later,
724 * after the relevant parent SPI controller (bus_num) is defined. We keep
725 * this table of devices forever, so that reloading a controller driver will
726 * not make Linux forget about these hard-wired devices.
727 *
728 * Other code can also call this, e.g. a particular add-on board might provide
729 * SPI devices through its expansion connector, so code initializing that board
730 * would naturally declare its SPI devices.
731 *
732 * The board info passed can safely be __initdata ... but be careful of
733 * any embedded pointers (platform_data, etc), they're copied as-is.
826cf175 734 * Device properties are deep-copied though.
97d56dc6
JMC
735 *
736 * Return: zero on success, else a negative error code.
8ae12a0d 737 */
fd4a319b 738int spi_register_board_info(struct spi_board_info const *info, unsigned n)
8ae12a0d 739{
2b9603a0
FT
740 struct boardinfo *bi;
741 int i;
8ae12a0d 742
c7908a37 743 if (!n)
f974cf57 744 return 0;
c7908a37 745
f9bdb7fd 746 bi = kcalloc(n, sizeof(*bi), GFP_KERNEL);
8ae12a0d
DB
747 if (!bi)
748 return -ENOMEM;
8ae12a0d 749
2b9603a0 750 for (i = 0; i < n; i++, bi++, info++) {
8caab75f 751 struct spi_controller *ctlr;
8ae12a0d 752
2b9603a0 753 memcpy(&bi->board_info, info, sizeof(*info));
826cf175
DT
754 if (info->properties) {
755 bi->board_info.properties =
756 property_entries_dup(info->properties);
757 if (IS_ERR(bi->board_info.properties))
758 return PTR_ERR(bi->board_info.properties);
759 }
760
2b9603a0
FT
761 mutex_lock(&board_lock);
762 list_add_tail(&bi->list, &board_list);
8caab75f
GU
763 list_for_each_entry(ctlr, &spi_controller_list, list)
764 spi_match_controller_to_boardinfo(ctlr,
765 &bi->board_info);
2b9603a0 766 mutex_unlock(&board_lock);
8ae12a0d 767 }
2b9603a0
FT
768
769 return 0;
8ae12a0d
DB
770}
771
772/*-------------------------------------------------------------------------*/
773
b158935f
MB
774static void spi_set_cs(struct spi_device *spi, bool enable)
775{
776 if (spi->mode & SPI_CS_HIGH)
777 enable = !enable;
778
f3186dd8
LW
779 if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio)) {
780 /*
781 * Honour the SPI_NO_CS flag and invert the enable line, as
782 * active low is default for SPI. Execution paths that handle
783 * polarity inversion in gpiolib (such as device tree) will
784 * enforce active high using the SPI_CS_HIGH resulting in a
785 * double inversion through the code above.
786 */
787 if (!(spi->mode & SPI_NO_CS)) {
788 if (spi->cs_gpiod)
789 gpiod_set_value(spi->cs_gpiod, !enable);
790 else
791 gpio_set_value(spi->cs_gpio, !enable);
792 }
8eee6b9d 793 /* Some SPI masters need both GPIO CS & slave_select */
8caab75f
GU
794 if ((spi->controller->flags & SPI_MASTER_GPIO_SS) &&
795 spi->controller->set_cs)
796 spi->controller->set_cs(spi, !enable);
797 } else if (spi->controller->set_cs) {
798 spi->controller->set_cs(spi, !enable);
8eee6b9d 799 }
b158935f
MB
800}
801
2de440f5 802#ifdef CONFIG_HAS_DMA
46336966
BB
803int spi_map_buf(struct spi_controller *ctlr, struct device *dev,
804 struct sg_table *sgt, void *buf, size_t len,
805 enum dma_data_direction dir)
6ad45a27
MB
806{
807 const bool vmalloced_buf = is_vmalloc_addr(buf);
df88e91b 808 unsigned int max_seg_size = dma_get_max_seg_size(dev);
b1b8153c
V
809#ifdef CONFIG_HIGHMEM
810 const bool kmap_buf = ((unsigned long)buf >= PKMAP_BASE &&
811 (unsigned long)buf < (PKMAP_BASE +
812 (LAST_PKMAP * PAGE_SIZE)));
813#else
814 const bool kmap_buf = false;
815#endif
65598c13
AG
816 int desc_len;
817 int sgs;
6ad45a27 818 struct page *vm_page;
8dd4a016 819 struct scatterlist *sg;
6ad45a27
MB
820 void *sg_buf;
821 size_t min;
822 int i, ret;
823
b1b8153c 824 if (vmalloced_buf || kmap_buf) {
df88e91b 825 desc_len = min_t(int, max_seg_size, PAGE_SIZE);
65598c13 826 sgs = DIV_ROUND_UP(len + offset_in_page(buf), desc_len);
0569a88f 827 } else if (virt_addr_valid(buf)) {
8caab75f 828 desc_len = min_t(int, max_seg_size, ctlr->max_dma_len);
65598c13 829 sgs = DIV_ROUND_UP(len, desc_len);
0569a88f
V
830 } else {
831 return -EINVAL;
65598c13
AG
832 }
833
6ad45a27
MB
834 ret = sg_alloc_table(sgt, sgs, GFP_KERNEL);
835 if (ret != 0)
836 return ret;
837
8dd4a016 838 sg = &sgt->sgl[0];
6ad45a27 839 for (i = 0; i < sgs; i++) {
6ad45a27 840
b1b8153c 841 if (vmalloced_buf || kmap_buf) {
ce99319a
MC
842 /*
843 * Next scatterlist entry size is the minimum between
844 * the desc_len and the remaining buffer length that
845 * fits in a page.
846 */
847 min = min_t(size_t, desc_len,
848 min_t(size_t, len,
849 PAGE_SIZE - offset_in_page(buf)));
b1b8153c
V
850 if (vmalloced_buf)
851 vm_page = vmalloc_to_page(buf);
852 else
853 vm_page = kmap_to_page(buf);
6ad45a27
MB
854 if (!vm_page) {
855 sg_free_table(sgt);
856 return -ENOMEM;
857 }
8dd4a016 858 sg_set_page(sg, vm_page,
c1aefbdd 859 min, offset_in_page(buf));
6ad45a27 860 } else {
65598c13 861 min = min_t(size_t, len, desc_len);
6ad45a27 862 sg_buf = buf;
8dd4a016 863 sg_set_buf(sg, sg_buf, min);
6ad45a27
MB
864 }
865
6ad45a27
MB
866 buf += min;
867 len -= min;
8dd4a016 868 sg = sg_next(sg);
6ad45a27
MB
869 }
870
871 ret = dma_map_sg(dev, sgt->sgl, sgt->nents, dir);
89e4b66a
GU
872 if (!ret)
873 ret = -ENOMEM;
6ad45a27
MB
874 if (ret < 0) {
875 sg_free_table(sgt);
876 return ret;
877 }
878
879 sgt->nents = ret;
880
881 return 0;
882}
883
46336966
BB
884void spi_unmap_buf(struct spi_controller *ctlr, struct device *dev,
885 struct sg_table *sgt, enum dma_data_direction dir)
6ad45a27
MB
886{
887 if (sgt->orig_nents) {
888 dma_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir);
889 sg_free_table(sgt);
890 }
891}
892
8caab75f 893static int __spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31 894{
99adef31
MB
895 struct device *tx_dev, *rx_dev;
896 struct spi_transfer *xfer;
6ad45a27 897 int ret;
3a2eba9b 898
8caab75f 899 if (!ctlr->can_dma)
99adef31
MB
900 return 0;
901
8caab75f
GU
902 if (ctlr->dma_tx)
903 tx_dev = ctlr->dma_tx->device->dev;
c37f45b5 904 else
8caab75f 905 tx_dev = ctlr->dev.parent;
c37f45b5 906
8caab75f
GU
907 if (ctlr->dma_rx)
908 rx_dev = ctlr->dma_rx->device->dev;
c37f45b5 909 else
8caab75f 910 rx_dev = ctlr->dev.parent;
99adef31
MB
911
912 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 913 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB
914 continue;
915
916 if (xfer->tx_buf != NULL) {
8caab75f 917 ret = spi_map_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB
918 (void *)xfer->tx_buf, xfer->len,
919 DMA_TO_DEVICE);
920 if (ret != 0)
921 return ret;
99adef31
MB
922 }
923
924 if (xfer->rx_buf != NULL) {
8caab75f 925 ret = spi_map_buf(ctlr, rx_dev, &xfer->rx_sg,
6ad45a27
MB
926 xfer->rx_buf, xfer->len,
927 DMA_FROM_DEVICE);
928 if (ret != 0) {
8caab75f 929 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB
930 DMA_TO_DEVICE);
931 return ret;
99adef31
MB
932 }
933 }
934 }
935
8caab75f 936 ctlr->cur_msg_mapped = true;
99adef31
MB
937
938 return 0;
939}
940
8caab75f 941static int __spi_unmap_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31
MB
942{
943 struct spi_transfer *xfer;
944 struct device *tx_dev, *rx_dev;
945
8caab75f 946 if (!ctlr->cur_msg_mapped || !ctlr->can_dma)
99adef31
MB
947 return 0;
948
8caab75f
GU
949 if (ctlr->dma_tx)
950 tx_dev = ctlr->dma_tx->device->dev;
c37f45b5 951 else
8caab75f 952 tx_dev = ctlr->dev.parent;
c37f45b5 953
8caab75f
GU
954 if (ctlr->dma_rx)
955 rx_dev = ctlr->dma_rx->device->dev;
c37f45b5 956 else
8caab75f 957 rx_dev = ctlr->dev.parent;
99adef31
MB
958
959 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 960 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB
961 continue;
962
8caab75f
GU
963 spi_unmap_buf(ctlr, rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE);
964 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg, DMA_TO_DEVICE);
99adef31
MB
965 }
966
967 return 0;
968}
2de440f5 969#else /* !CONFIG_HAS_DMA */
8caab75f 970static inline int __spi_map_msg(struct spi_controller *ctlr,
2de440f5
GU
971 struct spi_message *msg)
972{
973 return 0;
974}
975
8caab75f 976static inline int __spi_unmap_msg(struct spi_controller *ctlr,
4b786458 977 struct spi_message *msg)
2de440f5
GU
978{
979 return 0;
980}
981#endif /* !CONFIG_HAS_DMA */
982
8caab75f 983static inline int spi_unmap_msg(struct spi_controller *ctlr,
4b786458
MS
984 struct spi_message *msg)
985{
986 struct spi_transfer *xfer;
987
988 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
989 /*
990 * Restore the original value of tx_buf or rx_buf if they are
991 * NULL.
992 */
8caab75f 993 if (xfer->tx_buf == ctlr->dummy_tx)
4b786458 994 xfer->tx_buf = NULL;
8caab75f 995 if (xfer->rx_buf == ctlr->dummy_rx)
4b786458
MS
996 xfer->rx_buf = NULL;
997 }
998
8caab75f 999 return __spi_unmap_msg(ctlr, msg);
4b786458
MS
1000}
1001
8caab75f 1002static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
2de440f5
GU
1003{
1004 struct spi_transfer *xfer;
1005 void *tmp;
1006 unsigned int max_tx, max_rx;
1007
8caab75f 1008 if (ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX)) {
2de440f5
GU
1009 max_tx = 0;
1010 max_rx = 0;
1011
1012 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1013 if ((ctlr->flags & SPI_CONTROLLER_MUST_TX) &&
2de440f5
GU
1014 !xfer->tx_buf)
1015 max_tx = max(xfer->len, max_tx);
8caab75f 1016 if ((ctlr->flags & SPI_CONTROLLER_MUST_RX) &&
2de440f5
GU
1017 !xfer->rx_buf)
1018 max_rx = max(xfer->len, max_rx);
1019 }
1020
1021 if (max_tx) {
8caab75f 1022 tmp = krealloc(ctlr->dummy_tx, max_tx,
2de440f5
GU
1023 GFP_KERNEL | GFP_DMA);
1024 if (!tmp)
1025 return -ENOMEM;
8caab75f 1026 ctlr->dummy_tx = tmp;
2de440f5
GU
1027 memset(tmp, 0, max_tx);
1028 }
1029
1030 if (max_rx) {
8caab75f 1031 tmp = krealloc(ctlr->dummy_rx, max_rx,
2de440f5
GU
1032 GFP_KERNEL | GFP_DMA);
1033 if (!tmp)
1034 return -ENOMEM;
8caab75f 1035 ctlr->dummy_rx = tmp;
2de440f5
GU
1036 }
1037
1038 if (max_tx || max_rx) {
1039 list_for_each_entry(xfer, &msg->transfers,
1040 transfer_list) {
1041 if (!xfer->tx_buf)
8caab75f 1042 xfer->tx_buf = ctlr->dummy_tx;
2de440f5 1043 if (!xfer->rx_buf)
8caab75f 1044 xfer->rx_buf = ctlr->dummy_rx;
2de440f5
GU
1045 }
1046 }
1047 }
1048
8caab75f 1049 return __spi_map_msg(ctlr, msg);
2de440f5 1050}
99adef31 1051
810923f3
LR
1052static int spi_transfer_wait(struct spi_controller *ctlr,
1053 struct spi_message *msg,
1054 struct spi_transfer *xfer)
1055{
1056 struct spi_statistics *statm = &ctlr->statistics;
1057 struct spi_statistics *stats = &msg->spi->statistics;
1058 unsigned long long ms = 1;
1059
1060 if (spi_controller_is_slave(ctlr)) {
1061 if (wait_for_completion_interruptible(&ctlr->xfer_completion)) {
1062 dev_dbg(&msg->spi->dev, "SPI transfer interrupted\n");
1063 return -EINTR;
1064 }
1065 } else {
1066 ms = 8LL * 1000LL * xfer->len;
1067 do_div(ms, xfer->speed_hz);
1068 ms += ms + 200; /* some tolerance */
1069
1070 if (ms > UINT_MAX)
1071 ms = UINT_MAX;
1072
1073 ms = wait_for_completion_timeout(&ctlr->xfer_completion,
1074 msecs_to_jiffies(ms));
1075
1076 if (ms == 0) {
1077 SPI_STATISTICS_INCREMENT_FIELD(statm, timedout);
1078 SPI_STATISTICS_INCREMENT_FIELD(stats, timedout);
1079 dev_err(&msg->spi->dev,
1080 "SPI transfer timed out\n");
1081 return -ETIMEDOUT;
1082 }
1083 }
1084
1085 return 0;
1086}
1087
b158935f
MB
1088/*
1089 * spi_transfer_one_message - Default implementation of transfer_one_message()
1090 *
1091 * This is a standard implementation of transfer_one_message() for
8ba811a7 1092 * drivers which implement a transfer_one() operation. It provides
b158935f
MB
1093 * standard handling of delays and chip select management.
1094 */
8caab75f 1095static int spi_transfer_one_message(struct spi_controller *ctlr,
b158935f
MB
1096 struct spi_message *msg)
1097{
1098 struct spi_transfer *xfer;
b158935f
MB
1099 bool keep_cs = false;
1100 int ret = 0;
8caab75f 1101 struct spi_statistics *statm = &ctlr->statistics;
eca2ebc7 1102 struct spi_statistics *stats = &msg->spi->statistics;
b158935f
MB
1103
1104 spi_set_cs(msg->spi, true);
1105
eca2ebc7
MS
1106 SPI_STATISTICS_INCREMENT_FIELD(statm, messages);
1107 SPI_STATISTICS_INCREMENT_FIELD(stats, messages);
1108
b158935f
MB
1109 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1110 trace_spi_transfer_start(msg, xfer);
1111
8caab75f
GU
1112 spi_statistics_add_transfer_stats(statm, xfer, ctlr);
1113 spi_statistics_add_transfer_stats(stats, xfer, ctlr);
eca2ebc7 1114
38ec10f6 1115 if (xfer->tx_buf || xfer->rx_buf) {
8caab75f 1116 reinit_completion(&ctlr->xfer_completion);
b158935f 1117
8caab75f 1118 ret = ctlr->transfer_one(ctlr, msg->spi, xfer);
38ec10f6 1119 if (ret < 0) {
eca2ebc7
MS
1120 SPI_STATISTICS_INCREMENT_FIELD(statm,
1121 errors);
1122 SPI_STATISTICS_INCREMENT_FIELD(stats,
1123 errors);
38ec10f6
MB
1124 dev_err(&msg->spi->dev,
1125 "SPI transfer failed: %d\n", ret);
1126 goto out;
1127 }
b158935f 1128
d57e7960
MB
1129 if (ret > 0) {
1130 ret = spi_transfer_wait(ctlr, msg, xfer);
1131 if (ret < 0)
1132 msg->status = ret;
1133 }
38ec10f6
MB
1134 } else {
1135 if (xfer->len)
1136 dev_err(&msg->spi->dev,
1137 "Bufferless transfer has length %u\n",
1138 xfer->len);
13a42798 1139 }
b158935f
MB
1140
1141 trace_spi_transfer_stop(msg, xfer);
1142
1143 if (msg->status != -EINPROGRESS)
1144 goto out;
1145
8244bd3a
DK
1146 if (xfer->delay_usecs) {
1147 u16 us = xfer->delay_usecs;
1148
1149 if (us <= 10)
1150 udelay(us);
1151 else
1152 usleep_range(us, us + DIV_ROUND_UP(us, 10));
1153 }
b158935f
MB
1154
1155 if (xfer->cs_change) {
1156 if (list_is_last(&xfer->transfer_list,
1157 &msg->transfers)) {
1158 keep_cs = true;
1159 } else {
0b73aa63
MB
1160 spi_set_cs(msg->spi, false);
1161 udelay(10);
1162 spi_set_cs(msg->spi, true);
b158935f
MB
1163 }
1164 }
1165
1166 msg->actual_length += xfer->len;
1167 }
1168
1169out:
1170 if (ret != 0 || !keep_cs)
1171 spi_set_cs(msg->spi, false);
1172
1173 if (msg->status == -EINPROGRESS)
1174 msg->status = ret;
1175
8caab75f
GU
1176 if (msg->status && ctlr->handle_err)
1177 ctlr->handle_err(ctlr, msg);
b716c4ff 1178
8caab75f 1179 spi_res_release(ctlr, msg);
d780c371 1180
8caab75f 1181 spi_finalize_current_message(ctlr);
b158935f
MB
1182
1183 return ret;
1184}
1185
1186/**
1187 * spi_finalize_current_transfer - report completion of a transfer
8caab75f 1188 * @ctlr: the controller reporting completion
b158935f
MB
1189 *
1190 * Called by SPI drivers using the core transfer_one_message()
1191 * implementation to notify it that the current interrupt driven
9e8f4882 1192 * transfer has finished and the next one may be scheduled.
b158935f 1193 */
8caab75f 1194void spi_finalize_current_transfer(struct spi_controller *ctlr)
b158935f 1195{
8caab75f 1196 complete(&ctlr->xfer_completion);
b158935f
MB
1197}
1198EXPORT_SYMBOL_GPL(spi_finalize_current_transfer);
1199
ffbbdd21 1200/**
fc9e0f71 1201 * __spi_pump_messages - function which processes spi message queue
8caab75f 1202 * @ctlr: controller to process queue for
fc9e0f71 1203 * @in_kthread: true if we are in the context of the message pump thread
ffbbdd21
LW
1204 *
1205 * This function checks if there is any spi message in the queue that
1206 * needs processing and if so call out to the driver to initialize hardware
1207 * and transfer each message.
1208 *
0461a414
MB
1209 * Note that it is called both from the kthread itself and also from
1210 * inside spi_sync(); the queue extraction handling at the top of the
1211 * function should deal with this safely.
ffbbdd21 1212 */
8caab75f 1213static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread)
ffbbdd21 1214{
ffbbdd21
LW
1215 unsigned long flags;
1216 bool was_busy = false;
1217 int ret;
1218
983aee5d 1219 /* Lock queue */
8caab75f 1220 spin_lock_irqsave(&ctlr->queue_lock, flags);
983aee5d
MB
1221
1222 /* Make sure we are not already running a message */
8caab75f
GU
1223 if (ctlr->cur_msg) {
1224 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
983aee5d
MB
1225 return;
1226 }
1227
f0125f1a 1228 /* If another context is idling the device then defer */
8caab75f
GU
1229 if (ctlr->idling) {
1230 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
1231 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
0461a414
MB
1232 return;
1233 }
1234
983aee5d 1235 /* Check if the queue is idle */
8caab75f
GU
1236 if (list_empty(&ctlr->queue) || !ctlr->running) {
1237 if (!ctlr->busy) {
1238 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
b0b36b86 1239 return;
ffbbdd21 1240 }
fc9e0f71 1241
f0125f1a
MB
1242 /* Only do teardown in the thread */
1243 if (!in_kthread) {
1244 kthread_queue_work(&ctlr->kworker,
1245 &ctlr->pump_messages);
1246 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1247 return;
1248 }
1249
1250 ctlr->busy = false;
1251 ctlr->idling = true;
1252 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1253
1254 kfree(ctlr->dummy_rx);
1255 ctlr->dummy_rx = NULL;
1256 kfree(ctlr->dummy_tx);
1257 ctlr->dummy_tx = NULL;
1258 if (ctlr->unprepare_transfer_hardware &&
1259 ctlr->unprepare_transfer_hardware(ctlr))
1260 dev_err(&ctlr->dev,
1261 "failed to unprepare transfer hardware\n");
1262 if (ctlr->auto_runtime_pm) {
1263 pm_runtime_mark_last_busy(ctlr->dev.parent);
1264 pm_runtime_put_autosuspend(ctlr->dev.parent);
1265 }
1266 trace_spi_controller_idle(ctlr);
1267
1268 spin_lock_irqsave(&ctlr->queue_lock, flags);
1269 ctlr->idling = false;
8caab75f 1270 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1271 return;
1272 }
ffbbdd21 1273
ffbbdd21 1274 /* Extract head of queue */
8caab75f
GU
1275 ctlr->cur_msg =
1276 list_first_entry(&ctlr->queue, struct spi_message, queue);
ffbbdd21 1277
8caab75f
GU
1278 list_del_init(&ctlr->cur_msg->queue);
1279 if (ctlr->busy)
ffbbdd21
LW
1280 was_busy = true;
1281 else
8caab75f
GU
1282 ctlr->busy = true;
1283 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1284
8caab75f 1285 mutex_lock(&ctlr->io_mutex);
ef4d96ec 1286
8caab75f
GU
1287 if (!was_busy && ctlr->auto_runtime_pm) {
1288 ret = pm_runtime_get_sync(ctlr->dev.parent);
49834de2 1289 if (ret < 0) {
7e48e23a 1290 pm_runtime_put_noidle(ctlr->dev.parent);
8caab75f 1291 dev_err(&ctlr->dev, "Failed to power device: %d\n",
49834de2 1292 ret);
8caab75f 1293 mutex_unlock(&ctlr->io_mutex);
49834de2
MB
1294 return;
1295 }
1296 }
1297
56ec1978 1298 if (!was_busy)
8caab75f 1299 trace_spi_controller_busy(ctlr);
56ec1978 1300
8caab75f
GU
1301 if (!was_busy && ctlr->prepare_transfer_hardware) {
1302 ret = ctlr->prepare_transfer_hardware(ctlr);
ffbbdd21 1303 if (ret) {
8caab75f 1304 dev_err(&ctlr->dev,
ffbbdd21 1305 "failed to prepare transfer hardware\n");
49834de2 1306
8caab75f
GU
1307 if (ctlr->auto_runtime_pm)
1308 pm_runtime_put(ctlr->dev.parent);
1309 mutex_unlock(&ctlr->io_mutex);
ffbbdd21
LW
1310 return;
1311 }
1312 }
1313
8caab75f 1314 trace_spi_message_start(ctlr->cur_msg);
56ec1978 1315
8caab75f
GU
1316 if (ctlr->prepare_message) {
1317 ret = ctlr->prepare_message(ctlr, ctlr->cur_msg);
2841a5fc 1318 if (ret) {
8caab75f
GU
1319 dev_err(&ctlr->dev, "failed to prepare message: %d\n",
1320 ret);
1321 ctlr->cur_msg->status = ret;
1322 spi_finalize_current_message(ctlr);
49023d2e 1323 goto out;
2841a5fc 1324 }
8caab75f 1325 ctlr->cur_msg_prepared = true;
2841a5fc
MB
1326 }
1327
8caab75f 1328 ret = spi_map_msg(ctlr, ctlr->cur_msg);
99adef31 1329 if (ret) {
8caab75f
GU
1330 ctlr->cur_msg->status = ret;
1331 spi_finalize_current_message(ctlr);
49023d2e 1332 goto out;
99adef31
MB
1333 }
1334
8caab75f 1335 ret = ctlr->transfer_one_message(ctlr, ctlr->cur_msg);
ffbbdd21 1336 if (ret) {
8caab75f 1337 dev_err(&ctlr->dev,
1f802f82 1338 "failed to transfer one message from queue\n");
49023d2e 1339 goto out;
ffbbdd21 1340 }
49023d2e
JH
1341
1342out:
8caab75f 1343 mutex_unlock(&ctlr->io_mutex);
62826970
MB
1344
1345 /* Prod the scheduler in case transfer_one() was busy waiting */
49023d2e
JH
1346 if (!ret)
1347 cond_resched();
ffbbdd21
LW
1348}
1349
fc9e0f71
MB
1350/**
1351 * spi_pump_messages - kthread work function which processes spi message queue
8caab75f 1352 * @work: pointer to kthread work struct contained in the controller struct
fc9e0f71
MB
1353 */
1354static void spi_pump_messages(struct kthread_work *work)
1355{
8caab75f
GU
1356 struct spi_controller *ctlr =
1357 container_of(work, struct spi_controller, pump_messages);
fc9e0f71 1358
8caab75f 1359 __spi_pump_messages(ctlr, true);
fc9e0f71
MB
1360}
1361
8caab75f 1362static int spi_init_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1363{
1364 struct sched_param param = { .sched_priority = MAX_RT_PRIO - 1 };
1365
8caab75f
GU
1366 ctlr->running = false;
1367 ctlr->busy = false;
ffbbdd21 1368
8caab75f
GU
1369 kthread_init_worker(&ctlr->kworker);
1370 ctlr->kworker_task = kthread_run(kthread_worker_fn, &ctlr->kworker,
1371 "%s", dev_name(&ctlr->dev));
1372 if (IS_ERR(ctlr->kworker_task)) {
1373 dev_err(&ctlr->dev, "failed to create message pump task\n");
1374 return PTR_ERR(ctlr->kworker_task);
ffbbdd21 1375 }
8caab75f 1376 kthread_init_work(&ctlr->pump_messages, spi_pump_messages);
f0125f1a 1377
ffbbdd21 1378 /*
8caab75f 1379 * Controller config will indicate if this controller should run the
ffbbdd21
LW
1380 * message pump with high (realtime) priority to reduce the transfer
1381 * latency on the bus by minimising the delay between a transfer
1382 * request and the scheduling of the message pump thread. Without this
1383 * setting the message pump thread will remain at default priority.
1384 */
8caab75f
GU
1385 if (ctlr->rt) {
1386 dev_info(&ctlr->dev,
ffbbdd21 1387 "will run message pump with realtime priority\n");
8caab75f 1388 sched_setscheduler(ctlr->kworker_task, SCHED_FIFO, &param);
ffbbdd21
LW
1389 }
1390
1391 return 0;
1392}
1393
1394/**
1395 * spi_get_next_queued_message() - called by driver to check for queued
1396 * messages
8caab75f 1397 * @ctlr: the controller to check for queued messages
ffbbdd21
LW
1398 *
1399 * If there are more messages in the queue, the next message is returned from
1400 * this call.
97d56dc6
JMC
1401 *
1402 * Return: the next message in the queue, else NULL if the queue is empty.
ffbbdd21 1403 */
8caab75f 1404struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr)
ffbbdd21
LW
1405{
1406 struct spi_message *next;
1407 unsigned long flags;
1408
1409 /* get a pointer to the next message, if any */
8caab75f
GU
1410 spin_lock_irqsave(&ctlr->queue_lock, flags);
1411 next = list_first_entry_or_null(&ctlr->queue, struct spi_message,
1cfd97f9 1412 queue);
8caab75f 1413 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1414
1415 return next;
1416}
1417EXPORT_SYMBOL_GPL(spi_get_next_queued_message);
1418
1419/**
1420 * spi_finalize_current_message() - the current message is complete
8caab75f 1421 * @ctlr: the controller to return the message to
ffbbdd21
LW
1422 *
1423 * Called by the driver to notify the core that the message in the front of the
1424 * queue is complete and can be removed from the queue.
1425 */
8caab75f 1426void spi_finalize_current_message(struct spi_controller *ctlr)
ffbbdd21
LW
1427{
1428 struct spi_message *mesg;
1429 unsigned long flags;
2841a5fc 1430 int ret;
ffbbdd21 1431
8caab75f
GU
1432 spin_lock_irqsave(&ctlr->queue_lock, flags);
1433 mesg = ctlr->cur_msg;
1434 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1435
8caab75f 1436 spi_unmap_msg(ctlr, mesg);
99adef31 1437
8caab75f
GU
1438 if (ctlr->cur_msg_prepared && ctlr->unprepare_message) {
1439 ret = ctlr->unprepare_message(ctlr, mesg);
2841a5fc 1440 if (ret) {
8caab75f
GU
1441 dev_err(&ctlr->dev, "failed to unprepare message: %d\n",
1442 ret);
2841a5fc
MB
1443 }
1444 }
391949b6 1445
8caab75f
GU
1446 spin_lock_irqsave(&ctlr->queue_lock, flags);
1447 ctlr->cur_msg = NULL;
1448 ctlr->cur_msg_prepared = false;
f0125f1a 1449 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
8caab75f 1450 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
8e76ef88
MS
1451
1452 trace_spi_message_done(mesg);
2841a5fc 1453
ffbbdd21
LW
1454 mesg->state = NULL;
1455 if (mesg->complete)
1456 mesg->complete(mesg->context);
1457}
1458EXPORT_SYMBOL_GPL(spi_finalize_current_message);
1459
8caab75f 1460static int spi_start_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1461{
1462 unsigned long flags;
1463
8caab75f 1464 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 1465
8caab75f
GU
1466 if (ctlr->running || ctlr->busy) {
1467 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1468 return -EBUSY;
1469 }
1470
8caab75f
GU
1471 ctlr->running = true;
1472 ctlr->cur_msg = NULL;
1473 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1474
8caab75f 1475 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
ffbbdd21
LW
1476
1477 return 0;
1478}
1479
8caab75f 1480static int spi_stop_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1481{
1482 unsigned long flags;
1483 unsigned limit = 500;
1484 int ret = 0;
1485
8caab75f 1486 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW
1487
1488 /*
1489 * This is a bit lame, but is optimized for the common execution path.
8caab75f 1490 * A wait_queue on the ctlr->busy could be used, but then the common
ffbbdd21
LW
1491 * execution path (pump_messages) would be required to call wake_up or
1492 * friends on every SPI message. Do this instead.
1493 */
8caab75f
GU
1494 while ((!list_empty(&ctlr->queue) || ctlr->busy) && limit--) {
1495 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
f97b26b0 1496 usleep_range(10000, 11000);
8caab75f 1497 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW
1498 }
1499
8caab75f 1500 if (!list_empty(&ctlr->queue) || ctlr->busy)
ffbbdd21
LW
1501 ret = -EBUSY;
1502 else
8caab75f 1503 ctlr->running = false;
ffbbdd21 1504
8caab75f 1505 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1506
1507 if (ret) {
8caab75f 1508 dev_warn(&ctlr->dev, "could not stop message queue\n");
ffbbdd21
LW
1509 return ret;
1510 }
1511 return ret;
1512}
1513
8caab75f 1514static int spi_destroy_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1515{
1516 int ret;
1517
8caab75f 1518 ret = spi_stop_queue(ctlr);
ffbbdd21
LW
1519
1520 /*
3989144f 1521 * kthread_flush_worker will block until all work is done.
ffbbdd21
LW
1522 * If the reason that stop_queue timed out is that the work will never
1523 * finish, then it does no good to call flush/stop thread, so
1524 * return anyway.
1525 */
1526 if (ret) {
8caab75f 1527 dev_err(&ctlr->dev, "problem destroying queue\n");
ffbbdd21
LW
1528 return ret;
1529 }
1530
8caab75f
GU
1531 kthread_flush_worker(&ctlr->kworker);
1532 kthread_stop(ctlr->kworker_task);
ffbbdd21
LW
1533
1534 return 0;
1535}
1536
0461a414
MB
1537static int __spi_queued_transfer(struct spi_device *spi,
1538 struct spi_message *msg,
1539 bool need_pump)
ffbbdd21 1540{
8caab75f 1541 struct spi_controller *ctlr = spi->controller;
ffbbdd21
LW
1542 unsigned long flags;
1543
8caab75f 1544 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 1545
8caab75f
GU
1546 if (!ctlr->running) {
1547 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1548 return -ESHUTDOWN;
1549 }
1550 msg->actual_length = 0;
1551 msg->status = -EINPROGRESS;
1552
8caab75f 1553 list_add_tail(&msg->queue, &ctlr->queue);
f0125f1a 1554 if (!ctlr->busy && need_pump)
8caab75f 1555 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
ffbbdd21 1556
8caab75f 1557 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1558 return 0;
1559}
1560
0461a414
MB
1561/**
1562 * spi_queued_transfer - transfer function for queued transfers
1563 * @spi: spi device which is requesting transfer
1564 * @msg: spi message which is to handled is queued to driver queue
97d56dc6
JMC
1565 *
1566 * Return: zero on success, else a negative error code.
0461a414
MB
1567 */
1568static int spi_queued_transfer(struct spi_device *spi, struct spi_message *msg)
1569{
1570 return __spi_queued_transfer(spi, msg, true);
1571}
1572
8caab75f 1573static int spi_controller_initialize_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1574{
1575 int ret;
1576
8caab75f
GU
1577 ctlr->transfer = spi_queued_transfer;
1578 if (!ctlr->transfer_one_message)
1579 ctlr->transfer_one_message = spi_transfer_one_message;
ffbbdd21
LW
1580
1581 /* Initialize and start queue */
8caab75f 1582 ret = spi_init_queue(ctlr);
ffbbdd21 1583 if (ret) {
8caab75f 1584 dev_err(&ctlr->dev, "problem initializing queue\n");
ffbbdd21
LW
1585 goto err_init_queue;
1586 }
8caab75f
GU
1587 ctlr->queued = true;
1588 ret = spi_start_queue(ctlr);
ffbbdd21 1589 if (ret) {
8caab75f 1590 dev_err(&ctlr->dev, "problem starting queue\n");
ffbbdd21
LW
1591 goto err_start_queue;
1592 }
1593
1594 return 0;
1595
1596err_start_queue:
8caab75f 1597 spi_destroy_queue(ctlr);
c3676d5c 1598err_init_queue:
ffbbdd21
LW
1599 return ret;
1600}
1601
988f259b
BB
1602/**
1603 * spi_flush_queue - Send all pending messages in the queue from the callers'
1604 * context
1605 * @ctlr: controller to process queue for
1606 *
1607 * This should be used when one wants to ensure all pending messages have been
1608 * sent before doing something. Is used by the spi-mem code to make sure SPI
1609 * memory operations do not preempt regular SPI transfers that have been queued
1610 * before the spi-mem operation.
1611 */
1612void spi_flush_queue(struct spi_controller *ctlr)
1613{
1614 if (ctlr->transfer == spi_queued_transfer)
1615 __spi_pump_messages(ctlr, false);
1616}
1617
ffbbdd21
LW
1618/*-------------------------------------------------------------------------*/
1619
7cb94361 1620#if defined(CONFIG_OF)
8caab75f 1621static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
c2e51ac3 1622 struct device_node *nc)
aff5e3f8 1623{
aff5e3f8 1624 u32 value;
c2e51ac3 1625 int rc;
aff5e3f8 1626
aff5e3f8 1627 /* Mode (clock phase/polarity/etc.) */
e0bcb680 1628 if (of_property_read_bool(nc, "spi-cpha"))
aff5e3f8 1629 spi->mode |= SPI_CPHA;
e0bcb680 1630 if (of_property_read_bool(nc, "spi-cpol"))
aff5e3f8 1631 spi->mode |= SPI_CPOL;
e0bcb680 1632 if (of_property_read_bool(nc, "spi-3wire"))
aff5e3f8 1633 spi->mode |= SPI_3WIRE;
e0bcb680 1634 if (of_property_read_bool(nc, "spi-lsb-first"))
aff5e3f8
PA
1635 spi->mode |= SPI_LSB_FIRST;
1636
f3186dd8
LW
1637 /*
1638 * For descriptors associated with the device, polarity inversion is
1639 * handled in the gpiolib, so all chip selects are "active high" in
1640 * the logical sense, the gpiolib will invert the line if need be.
1641 */
1642 if (ctlr->use_gpio_descriptors)
1643 spi->mode |= SPI_CS_HIGH;
1644 else if (of_property_read_bool(nc, "spi-cs-high"))
1645 spi->mode |= SPI_CS_HIGH;
1646
aff5e3f8
PA
1647 /* Device DUAL/QUAD mode */
1648 if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {
1649 switch (value) {
1650 case 1:
1651 break;
1652 case 2:
1653 spi->mode |= SPI_TX_DUAL;
1654 break;
1655 case 4:
1656 spi->mode |= SPI_TX_QUAD;
1657 break;
6b03061f
YNG
1658 case 8:
1659 spi->mode |= SPI_TX_OCTAL;
1660 break;
aff5e3f8 1661 default:
8caab75f 1662 dev_warn(&ctlr->dev,
aff5e3f8
PA
1663 "spi-tx-bus-width %d not supported\n",
1664 value);
1665 break;
1666 }
1667 }
1668
1669 if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) {
1670 switch (value) {
1671 case 1:
1672 break;
1673 case 2:
1674 spi->mode |= SPI_RX_DUAL;
1675 break;
1676 case 4:
1677 spi->mode |= SPI_RX_QUAD;
1678 break;
6b03061f
YNG
1679 case 8:
1680 spi->mode |= SPI_RX_OCTAL;
1681 break;
aff5e3f8 1682 default:
8caab75f 1683 dev_warn(&ctlr->dev,
aff5e3f8
PA
1684 "spi-rx-bus-width %d not supported\n",
1685 value);
1686 break;
1687 }
1688 }
1689
8caab75f 1690 if (spi_controller_is_slave(ctlr)) {
194276b0 1691 if (!of_node_name_eq(nc, "slave")) {
25c56c88
RH
1692 dev_err(&ctlr->dev, "%pOF is not called 'slave'\n",
1693 nc);
6c364062
GU
1694 return -EINVAL;
1695 }
1696 return 0;
1697 }
1698
1699 /* Device address */
1700 rc = of_property_read_u32(nc, "reg", &value);
1701 if (rc) {
25c56c88
RH
1702 dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n",
1703 nc, rc);
6c364062
GU
1704 return rc;
1705 }
1706 spi->chip_select = value;
1707
aff5e3f8
PA
1708 /* Device speed */
1709 rc = of_property_read_u32(nc, "spi-max-frequency", &value);
1710 if (rc) {
8caab75f 1711 dev_err(&ctlr->dev,
25c56c88 1712 "%pOF has no valid 'spi-max-frequency' property (%d)\n", nc, rc);
c2e51ac3 1713 return rc;
aff5e3f8
PA
1714 }
1715 spi->max_speed_hz = value;
1716
c2e51ac3
GU
1717 return 0;
1718}
1719
1720static struct spi_device *
8caab75f 1721of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc)
c2e51ac3
GU
1722{
1723 struct spi_device *spi;
1724 int rc;
1725
1726 /* Alloc an spi_device */
8caab75f 1727 spi = spi_alloc_device(ctlr);
c2e51ac3 1728 if (!spi) {
25c56c88 1729 dev_err(&ctlr->dev, "spi_device alloc error for %pOF\n", nc);
c2e51ac3
GU
1730 rc = -ENOMEM;
1731 goto err_out;
1732 }
1733
1734 /* Select device driver */
1735 rc = of_modalias_node(nc, spi->modalias,
1736 sizeof(spi->modalias));
1737 if (rc < 0) {
25c56c88 1738 dev_err(&ctlr->dev, "cannot find modalias for %pOF\n", nc);
c2e51ac3
GU
1739 goto err_out;
1740 }
1741
8caab75f 1742 rc = of_spi_parse_dt(ctlr, spi, nc);
c2e51ac3
GU
1743 if (rc)
1744 goto err_out;
1745
aff5e3f8
PA
1746 /* Store a pointer to the node in the device structure */
1747 of_node_get(nc);
1748 spi->dev.of_node = nc;
1749
1750 /* Register the new device */
aff5e3f8
PA
1751 rc = spi_add_device(spi);
1752 if (rc) {
25c56c88 1753 dev_err(&ctlr->dev, "spi_device register error %pOF\n", nc);
8324147f 1754 goto err_of_node_put;
aff5e3f8
PA
1755 }
1756
1757 return spi;
1758
8324147f
JH
1759err_of_node_put:
1760 of_node_put(nc);
aff5e3f8
PA
1761err_out:
1762 spi_dev_put(spi);
1763 return ERR_PTR(rc);
1764}
1765
d57a4282
GL
1766/**
1767 * of_register_spi_devices() - Register child devices onto the SPI bus
8caab75f 1768 * @ctlr: Pointer to spi_controller device
d57a4282 1769 *
6c364062
GU
1770 * Registers an spi_device for each child node of controller node which
1771 * represents a valid SPI slave.
d57a4282 1772 */
8caab75f 1773static void of_register_spi_devices(struct spi_controller *ctlr)
d57a4282
GL
1774{
1775 struct spi_device *spi;
1776 struct device_node *nc;
d57a4282 1777
8caab75f 1778 if (!ctlr->dev.of_node)
d57a4282
GL
1779 return;
1780
8caab75f 1781 for_each_available_child_of_node(ctlr->dev.of_node, nc) {
bd6c1644
GU
1782 if (of_node_test_and_set_flag(nc, OF_POPULATED))
1783 continue;
8caab75f 1784 spi = of_register_spi_device(ctlr, nc);
e0af98a7 1785 if (IS_ERR(spi)) {
8caab75f 1786 dev_warn(&ctlr->dev,
25c56c88 1787 "Failed to create SPI device for %pOF\n", nc);
e0af98a7
RR
1788 of_node_clear_flag(nc, OF_POPULATED);
1789 }
d57a4282
GL
1790 }
1791}
1792#else
8caab75f 1793static void of_register_spi_devices(struct spi_controller *ctlr) { }
d57a4282
GL
1794#endif
1795
64bee4d2 1796#ifdef CONFIG_ACPI
8a2e487e
LW
1797static void acpi_spi_parse_apple_properties(struct spi_device *spi)
1798{
1799 struct acpi_device *dev = ACPI_COMPANION(&spi->dev);
1800 const union acpi_object *obj;
1801
1802 if (!x86_apple_machine)
1803 return;
1804
1805 if (!acpi_dev_get_property(dev, "spiSclkPeriod", ACPI_TYPE_BUFFER, &obj)
1806 && obj->buffer.length >= 4)
1807 spi->max_speed_hz = NSEC_PER_SEC / *(u32 *)obj->buffer.pointer;
1808
1809 if (!acpi_dev_get_property(dev, "spiWordSize", ACPI_TYPE_BUFFER, &obj)
1810 && obj->buffer.length == 8)
1811 spi->bits_per_word = *(u64 *)obj->buffer.pointer;
1812
1813 if (!acpi_dev_get_property(dev, "spiBitOrder", ACPI_TYPE_BUFFER, &obj)
1814 && obj->buffer.length == 8 && !*(u64 *)obj->buffer.pointer)
1815 spi->mode |= SPI_LSB_FIRST;
1816
1817 if (!acpi_dev_get_property(dev, "spiSPO", ACPI_TYPE_BUFFER, &obj)
1818 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
1819 spi->mode |= SPI_CPOL;
1820
1821 if (!acpi_dev_get_property(dev, "spiSPH", ACPI_TYPE_BUFFER, &obj)
1822 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
1823 spi->mode |= SPI_CPHA;
1824}
1825
64bee4d2
MW
1826static int acpi_spi_add_resource(struct acpi_resource *ares, void *data)
1827{
1828 struct spi_device *spi = data;
8caab75f 1829 struct spi_controller *ctlr = spi->controller;
64bee4d2
MW
1830
1831 if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
1832 struct acpi_resource_spi_serialbus *sb;
1833
1834 sb = &ares->data.spi_serial_bus;
1835 if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_SPI) {
a0a90718
MW
1836 /*
1837 * ACPI DeviceSelection numbering is handled by the
1838 * host controller driver in Windows and can vary
1839 * from driver to driver. In Linux we always expect
1840 * 0 .. max - 1 so we need to ask the driver to
1841 * translate between the two schemes.
1842 */
8caab75f
GU
1843 if (ctlr->fw_translate_cs) {
1844 int cs = ctlr->fw_translate_cs(ctlr,
a0a90718
MW
1845 sb->device_selection);
1846 if (cs < 0)
1847 return cs;
1848 spi->chip_select = cs;
1849 } else {
1850 spi->chip_select = sb->device_selection;
1851 }
1852
64bee4d2
MW
1853 spi->max_speed_hz = sb->connection_speed;
1854
1855 if (sb->clock_phase == ACPI_SPI_SECOND_PHASE)
1856 spi->mode |= SPI_CPHA;
1857 if (sb->clock_polarity == ACPI_SPI_START_HIGH)
1858 spi->mode |= SPI_CPOL;
1859 if (sb->device_polarity == ACPI_SPI_ACTIVE_HIGH)
1860 spi->mode |= SPI_CS_HIGH;
1861 }
1862 } else if (spi->irq < 0) {
1863 struct resource r;
1864
1865 if (acpi_dev_resource_interrupt(ares, 0, &r))
1866 spi->irq = r.start;
1867 }
1868
1869 /* Always tell the ACPI core to skip this resource */
1870 return 1;
1871}
1872
8caab75f 1873static acpi_status acpi_register_spi_device(struct spi_controller *ctlr,
7f24467f 1874 struct acpi_device *adev)
64bee4d2 1875{
64bee4d2 1876 struct list_head resource_list;
64bee4d2
MW
1877 struct spi_device *spi;
1878 int ret;
1879
7f24467f
OP
1880 if (acpi_bus_get_status(adev) || !adev->status.present ||
1881 acpi_device_enumerated(adev))
64bee4d2
MW
1882 return AE_OK;
1883
8caab75f 1884 spi = spi_alloc_device(ctlr);
64bee4d2 1885 if (!spi) {
8caab75f 1886 dev_err(&ctlr->dev, "failed to allocate SPI device for %s\n",
64bee4d2
MW
1887 dev_name(&adev->dev));
1888 return AE_NO_MEMORY;
1889 }
1890
7b199811 1891 ACPI_COMPANION_SET(&spi->dev, adev);
64bee4d2
MW
1892 spi->irq = -1;
1893
1894 INIT_LIST_HEAD(&resource_list);
1895 ret = acpi_dev_get_resources(adev, &resource_list,
1896 acpi_spi_add_resource, spi);
1897 acpi_dev_free_resource_list(&resource_list);
1898
8a2e487e
LW
1899 acpi_spi_parse_apple_properties(spi);
1900
64bee4d2
MW
1901 if (ret < 0 || !spi->max_speed_hz) {
1902 spi_dev_put(spi);
1903 return AE_OK;
1904 }
1905
0c6543f6
DD
1906 acpi_set_modalias(adev, acpi_device_hid(adev), spi->modalias,
1907 sizeof(spi->modalias));
1908
33ada67d
CR
1909 if (spi->irq < 0)
1910 spi->irq = acpi_dev_gpio_irq_get(adev, 0);
1911
7f24467f
OP
1912 acpi_device_set_enumerated(adev);
1913
33cf00e5 1914 adev->power.flags.ignore_parent = true;
64bee4d2 1915 if (spi_add_device(spi)) {
33cf00e5 1916 adev->power.flags.ignore_parent = false;
8caab75f 1917 dev_err(&ctlr->dev, "failed to add SPI device %s from ACPI\n",
64bee4d2
MW
1918 dev_name(&adev->dev));
1919 spi_dev_put(spi);
1920 }
1921
1922 return AE_OK;
1923}
1924
7f24467f
OP
1925static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level,
1926 void *data, void **return_value)
1927{
8caab75f 1928 struct spi_controller *ctlr = data;
7f24467f
OP
1929 struct acpi_device *adev;
1930
1931 if (acpi_bus_get_device(handle, &adev))
1932 return AE_OK;
1933
8caab75f 1934 return acpi_register_spi_device(ctlr, adev);
7f24467f
OP
1935}
1936
8caab75f 1937static void acpi_register_spi_devices(struct spi_controller *ctlr)
64bee4d2
MW
1938{
1939 acpi_status status;
1940 acpi_handle handle;
1941
8caab75f 1942 handle = ACPI_HANDLE(ctlr->dev.parent);
64bee4d2
MW
1943 if (!handle)
1944 return;
1945
1946 status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1,
8caab75f 1947 acpi_spi_add_device, NULL, ctlr, NULL);
64bee4d2 1948 if (ACPI_FAILURE(status))
8caab75f 1949 dev_warn(&ctlr->dev, "failed to enumerate SPI slaves\n");
64bee4d2
MW
1950}
1951#else
8caab75f 1952static inline void acpi_register_spi_devices(struct spi_controller *ctlr) {}
64bee4d2
MW
1953#endif /* CONFIG_ACPI */
1954
8caab75f 1955static void spi_controller_release(struct device *dev)
8ae12a0d 1956{
8caab75f 1957 struct spi_controller *ctlr;
8ae12a0d 1958
8caab75f
GU
1959 ctlr = container_of(dev, struct spi_controller, dev);
1960 kfree(ctlr);
8ae12a0d
DB
1961}
1962
1963static struct class spi_master_class = {
1964 .name = "spi_master",
1965 .owner = THIS_MODULE,
8caab75f 1966 .dev_release = spi_controller_release,
eca2ebc7 1967 .dev_groups = spi_master_groups,
8ae12a0d
DB
1968};
1969
6c364062
GU
1970#ifdef CONFIG_SPI_SLAVE
1971/**
1972 * spi_slave_abort - abort the ongoing transfer request on an SPI slave
1973 * controller
1974 * @spi: device used for the current transfer
1975 */
1976int spi_slave_abort(struct spi_device *spi)
1977{
8caab75f 1978 struct spi_controller *ctlr = spi->controller;
6c364062 1979
8caab75f
GU
1980 if (spi_controller_is_slave(ctlr) && ctlr->slave_abort)
1981 return ctlr->slave_abort(ctlr);
6c364062
GU
1982
1983 return -ENOTSUPP;
1984}
1985EXPORT_SYMBOL_GPL(spi_slave_abort);
1986
1987static int match_true(struct device *dev, void *data)
1988{
1989 return 1;
1990}
1991
1992static ssize_t spi_slave_show(struct device *dev,
1993 struct device_attribute *attr, char *buf)
1994{
8caab75f
GU
1995 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
1996 dev);
6c364062
GU
1997 struct device *child;
1998
1999 child = device_find_child(&ctlr->dev, NULL, match_true);
2000 return sprintf(buf, "%s\n",
2001 child ? to_spi_device(child)->modalias : NULL);
2002}
2003
2004static ssize_t spi_slave_store(struct device *dev,
2005 struct device_attribute *attr, const char *buf,
2006 size_t count)
2007{
8caab75f
GU
2008 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2009 dev);
6c364062
GU
2010 struct spi_device *spi;
2011 struct device *child;
2012 char name[32];
2013 int rc;
2014
2015 rc = sscanf(buf, "%31s", name);
2016 if (rc != 1 || !name[0])
2017 return -EINVAL;
2018
2019 child = device_find_child(&ctlr->dev, NULL, match_true);
2020 if (child) {
2021 /* Remove registered slave */
2022 device_unregister(child);
2023 put_device(child);
2024 }
2025
2026 if (strcmp(name, "(null)")) {
2027 /* Register new slave */
2028 spi = spi_alloc_device(ctlr);
2029 if (!spi)
2030 return -ENOMEM;
2031
2032 strlcpy(spi->modalias, name, sizeof(spi->modalias));
2033
2034 rc = spi_add_device(spi);
2035 if (rc) {
2036 spi_dev_put(spi);
2037 return rc;
2038 }
2039 }
2040
2041 return count;
2042}
2043
2044static DEVICE_ATTR(slave, 0644, spi_slave_show, spi_slave_store);
2045
2046static struct attribute *spi_slave_attrs[] = {
2047 &dev_attr_slave.attr,
2048 NULL,
2049};
2050
2051static const struct attribute_group spi_slave_group = {
2052 .attrs = spi_slave_attrs,
2053};
2054
2055static const struct attribute_group *spi_slave_groups[] = {
8caab75f 2056 &spi_controller_statistics_group,
6c364062
GU
2057 &spi_slave_group,
2058 NULL,
2059};
2060
2061static struct class spi_slave_class = {
2062 .name = "spi_slave",
2063 .owner = THIS_MODULE,
8caab75f 2064 .dev_release = spi_controller_release,
6c364062
GU
2065 .dev_groups = spi_slave_groups,
2066};
2067#else
2068extern struct class spi_slave_class; /* dummy */
2069#endif
8ae12a0d
DB
2070
2071/**
6c364062 2072 * __spi_alloc_controller - allocate an SPI master or slave controller
8ae12a0d 2073 * @dev: the controller, possibly using the platform_bus
33e34dc6 2074 * @size: how much zeroed driver-private data to allocate; the pointer to this
49dce689 2075 * memory is in the driver_data field of the returned device,
8caab75f 2076 * accessible with spi_controller_get_devdata().
6c364062
GU
2077 * @slave: flag indicating whether to allocate an SPI master (false) or SPI
2078 * slave (true) controller
33e34dc6 2079 * Context: can sleep
8ae12a0d 2080 *
6c364062 2081 * This call is used only by SPI controller drivers, which are the
8ae12a0d 2082 * only ones directly touching chip registers. It's how they allocate
8caab75f 2083 * an spi_controller structure, prior to calling spi_register_controller().
8ae12a0d 2084 *
97d56dc6 2085 * This must be called from context that can sleep.
8ae12a0d 2086 *
6c364062 2087 * The caller is responsible for assigning the bus number and initializing the
8caab75f
GU
2088 * controller's methods before calling spi_register_controller(); and (after
2089 * errors adding the device) calling spi_controller_put() to prevent a memory
2090 * leak.
97d56dc6 2091 *
6c364062 2092 * Return: the SPI controller structure on success, else NULL.
8ae12a0d 2093 */
8caab75f
GU
2094struct spi_controller *__spi_alloc_controller(struct device *dev,
2095 unsigned int size, bool slave)
8ae12a0d 2096{
8caab75f 2097 struct spi_controller *ctlr;
8ae12a0d 2098
0c868461
DB
2099 if (!dev)
2100 return NULL;
2101
8caab75f
GU
2102 ctlr = kzalloc(size + sizeof(*ctlr), GFP_KERNEL);
2103 if (!ctlr)
8ae12a0d
DB
2104 return NULL;
2105
8caab75f
GU
2106 device_initialize(&ctlr->dev);
2107 ctlr->bus_num = -1;
2108 ctlr->num_chipselect = 1;
2109 ctlr->slave = slave;
6c364062 2110 if (IS_ENABLED(CONFIG_SPI_SLAVE) && slave)
8caab75f 2111 ctlr->dev.class = &spi_slave_class;
6c364062 2112 else
8caab75f
GU
2113 ctlr->dev.class = &spi_master_class;
2114 ctlr->dev.parent = dev;
2115 pm_suspend_ignore_children(&ctlr->dev, true);
2116 spi_controller_set_devdata(ctlr, &ctlr[1]);
8ae12a0d 2117
8caab75f 2118 return ctlr;
8ae12a0d 2119}
6c364062 2120EXPORT_SYMBOL_GPL(__spi_alloc_controller);
8ae12a0d 2121
74317984 2122#ifdef CONFIG_OF
8caab75f 2123static int of_spi_register_master(struct spi_controller *ctlr)
74317984 2124{
e80beb27 2125 int nb, i, *cs;
8caab75f 2126 struct device_node *np = ctlr->dev.of_node;
74317984
JCPV
2127
2128 if (!np)
2129 return 0;
2130
2131 nb = of_gpio_named_count(np, "cs-gpios");
8caab75f 2132 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
74317984 2133
8ec5d84e
AL
2134 /* Return error only for an incorrectly formed cs-gpios property */
2135 if (nb == 0 || nb == -ENOENT)
74317984 2136 return 0;
8ec5d84e
AL
2137 else if (nb < 0)
2138 return nb;
74317984 2139
a86854d0 2140 cs = devm_kcalloc(&ctlr->dev, ctlr->num_chipselect, sizeof(int),
74317984 2141 GFP_KERNEL);
8caab75f 2142 ctlr->cs_gpios = cs;
74317984 2143
8caab75f 2144 if (!ctlr->cs_gpios)
74317984
JCPV
2145 return -ENOMEM;
2146
8caab75f 2147 for (i = 0; i < ctlr->num_chipselect; i++)
446411e1 2148 cs[i] = -ENOENT;
74317984
JCPV
2149
2150 for (i = 0; i < nb; i++)
2151 cs[i] = of_get_named_gpio(np, "cs-gpios", i);
2152
2153 return 0;
2154}
2155#else
8caab75f 2156static int of_spi_register_master(struct spi_controller *ctlr)
74317984
JCPV
2157{
2158 return 0;
2159}
2160#endif
2161
f3186dd8
LW
2162/**
2163 * spi_get_gpio_descs() - grab chip select GPIOs for the master
2164 * @ctlr: The SPI master to grab GPIO descriptors for
2165 */
2166static int spi_get_gpio_descs(struct spi_controller *ctlr)
2167{
2168 int nb, i;
2169 struct gpio_desc **cs;
2170 struct device *dev = &ctlr->dev;
2171
2172 nb = gpiod_count(dev, "cs");
2173 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
2174
2175 /* No GPIOs at all is fine, else return the error */
2176 if (nb == 0 || nb == -ENOENT)
2177 return 0;
2178 else if (nb < 0)
2179 return nb;
2180
2181 cs = devm_kcalloc(dev, ctlr->num_chipselect, sizeof(*cs),
2182 GFP_KERNEL);
2183 if (!cs)
2184 return -ENOMEM;
2185 ctlr->cs_gpiods = cs;
2186
2187 for (i = 0; i < nb; i++) {
2188 /*
2189 * Most chipselects are active low, the inverted
2190 * semantics are handled by special quirks in gpiolib,
2191 * so initializing them GPIOD_OUT_LOW here means
2192 * "unasserted", in most cases this will drive the physical
2193 * line high.
2194 */
2195 cs[i] = devm_gpiod_get_index_optional(dev, "cs", i,
2196 GPIOD_OUT_LOW);
2197
2198 if (cs[i]) {
2199 /*
2200 * If we find a CS GPIO, name it after the device and
2201 * chip select line.
2202 */
2203 char *gpioname;
2204
2205 gpioname = devm_kasprintf(dev, GFP_KERNEL, "%s CS%d",
2206 dev_name(dev), i);
2207 if (!gpioname)
2208 return -ENOMEM;
2209 gpiod_set_consumer_name(cs[i], gpioname);
2210 }
2211 }
2212
2213 return 0;
2214}
2215
bdf3a3b5
BB
2216static int spi_controller_check_ops(struct spi_controller *ctlr)
2217{
2218 /*
b5932f5c
BB
2219 * The controller may implement only the high-level SPI-memory like
2220 * operations if it does not support regular SPI transfers, and this is
2221 * valid use case.
2222 * If ->mem_ops is NULL, we request that at least one of the
2223 * ->transfer_xxx() method be implemented.
bdf3a3b5 2224 */
b5932f5c
BB
2225 if (ctlr->mem_ops) {
2226 if (!ctlr->mem_ops->exec_op)
2227 return -EINVAL;
2228 } else if (!ctlr->transfer && !ctlr->transfer_one &&
2229 !ctlr->transfer_one_message) {
bdf3a3b5 2230 return -EINVAL;
b5932f5c 2231 }
bdf3a3b5
BB
2232
2233 return 0;
2234}
2235
8ae12a0d 2236/**
8caab75f
GU
2237 * spi_register_controller - register SPI master or slave controller
2238 * @ctlr: initialized master, originally from spi_alloc_master() or
2239 * spi_alloc_slave()
33e34dc6 2240 * Context: can sleep
8ae12a0d 2241 *
8caab75f 2242 * SPI controllers connect to their drivers using some non-SPI bus,
8ae12a0d 2243 * such as the platform bus. The final stage of probe() in that code
8caab75f 2244 * includes calling spi_register_controller() to hook up to this SPI bus glue.
8ae12a0d
DB
2245 *
2246 * SPI controllers use board specific (often SOC specific) bus numbers,
2247 * and board-specific addressing for SPI devices combines those numbers
2248 * with chip select numbers. Since SPI does not directly support dynamic
2249 * device identification, boards need configuration tables telling which
2250 * chip is at which address.
2251 *
2252 * This must be called from context that can sleep. It returns zero on
8caab75f 2253 * success, else a negative error code (dropping the controller's refcount).
0c868461 2254 * After a successful return, the caller is responsible for calling
8caab75f 2255 * spi_unregister_controller().
97d56dc6
JMC
2256 *
2257 * Return: zero on success, else a negative error code.
8ae12a0d 2258 */
8caab75f 2259int spi_register_controller(struct spi_controller *ctlr)
8ae12a0d 2260{
8caab75f 2261 struct device *dev = ctlr->dev.parent;
2b9603a0 2262 struct boardinfo *bi;
8ae12a0d 2263 int status = -ENODEV;
42bdd706 2264 int id, first_dynamic;
8ae12a0d 2265
0c868461
DB
2266 if (!dev)
2267 return -ENODEV;
2268
bdf3a3b5
BB
2269 /*
2270 * Make sure all necessary hooks are implemented before registering
2271 * the SPI controller.
2272 */
2273 status = spi_controller_check_ops(ctlr);
2274 if (status)
2275 return status;
2276
8caab75f 2277 if (!spi_controller_is_slave(ctlr)) {
f3186dd8
LW
2278 if (ctlr->use_gpio_descriptors) {
2279 status = spi_get_gpio_descs(ctlr);
2280 if (status)
2281 return status;
2df201e0
LW
2282 /*
2283 * A controller using GPIO descriptors always
2284 * supports SPI_CS_HIGH if need be.
2285 */
2286 ctlr->mode_bits |= SPI_CS_HIGH;
f3186dd8
LW
2287 } else {
2288 /* Legacy code path for GPIOs from DT */
2289 status = of_spi_register_master(ctlr);
2290 if (status)
2291 return status;
2292 }
6c364062 2293 }
74317984 2294
082c8cb4
DB
2295 /* even if it's just one always-selected device, there must
2296 * be at least one chipselect
2297 */
8caab75f 2298 if (ctlr->num_chipselect == 0)
082c8cb4 2299 return -EINVAL;
04b2d03a
GU
2300 if (ctlr->bus_num >= 0) {
2301 /* devices with a fixed bus num must check-in with the num */
2302 mutex_lock(&board_lock);
2303 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
2304 ctlr->bus_num + 1, GFP_KERNEL);
2305 mutex_unlock(&board_lock);
2306 if (WARN(id < 0, "couldn't get idr"))
2307 return id == -ENOSPC ? -EBUSY : id;
2308 ctlr->bus_num = id;
2309 } else if (ctlr->dev.of_node) {
2310 /* allocate dynamic bus number using Linux idr */
9b61e302
SM
2311 id = of_alias_get_id(ctlr->dev.of_node, "spi");
2312 if (id >= 0) {
2313 ctlr->bus_num = id;
2314 mutex_lock(&board_lock);
2315 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
2316 ctlr->bus_num + 1, GFP_KERNEL);
2317 mutex_unlock(&board_lock);
2318 if (WARN(id < 0, "couldn't get idr"))
2319 return id == -ENOSPC ? -EBUSY : id;
2320 }
2321 }
8caab75f 2322 if (ctlr->bus_num < 0) {
42bdd706
LS
2323 first_dynamic = of_alias_get_highest_id("spi");
2324 if (first_dynamic < 0)
2325 first_dynamic = 0;
2326 else
2327 first_dynamic++;
2328
9a9a047a 2329 mutex_lock(&board_lock);
42bdd706
LS
2330 id = idr_alloc(&spi_master_idr, ctlr, first_dynamic,
2331 0, GFP_KERNEL);
9a9a047a
SM
2332 mutex_unlock(&board_lock);
2333 if (WARN(id < 0, "couldn't get idr"))
2334 return id;
2335 ctlr->bus_num = id;
8ae12a0d 2336 }
8caab75f
GU
2337 INIT_LIST_HEAD(&ctlr->queue);
2338 spin_lock_init(&ctlr->queue_lock);
2339 spin_lock_init(&ctlr->bus_lock_spinlock);
2340 mutex_init(&ctlr->bus_lock_mutex);
2341 mutex_init(&ctlr->io_mutex);
2342 ctlr->bus_lock_flag = 0;
2343 init_completion(&ctlr->xfer_completion);
2344 if (!ctlr->max_dma_len)
2345 ctlr->max_dma_len = INT_MAX;
cf32b71e 2346
8ae12a0d
DB
2347 /* register the device, then userspace will see it.
2348 * registration fails if the bus ID is in use.
2349 */
8caab75f
GU
2350 dev_set_name(&ctlr->dev, "spi%u", ctlr->bus_num);
2351 status = device_add(&ctlr->dev);
9b61e302
SM
2352 if (status < 0) {
2353 /* free bus id */
2354 mutex_lock(&board_lock);
2355 idr_remove(&spi_master_idr, ctlr->bus_num);
2356 mutex_unlock(&board_lock);
8ae12a0d 2357 goto done;
9b61e302
SM
2358 }
2359 dev_dbg(dev, "registered %s %s\n",
8caab75f 2360 spi_controller_is_slave(ctlr) ? "slave" : "master",
9b61e302 2361 dev_name(&ctlr->dev));
8ae12a0d 2362
b5932f5c
BB
2363 /*
2364 * If we're using a queued driver, start the queue. Note that we don't
2365 * need the queueing logic if the driver is only supporting high-level
2366 * memory operations.
2367 */
2368 if (ctlr->transfer) {
8caab75f 2369 dev_info(dev, "controller is unqueued, this is deprecated\n");
b5932f5c 2370 } else if (ctlr->transfer_one || ctlr->transfer_one_message) {
8caab75f 2371 status = spi_controller_initialize_queue(ctlr);
ffbbdd21 2372 if (status) {
8caab75f 2373 device_del(&ctlr->dev);
9b61e302
SM
2374 /* free bus id */
2375 mutex_lock(&board_lock);
2376 idr_remove(&spi_master_idr, ctlr->bus_num);
2377 mutex_unlock(&board_lock);
ffbbdd21
LW
2378 goto done;
2379 }
2380 }
eca2ebc7 2381 /* add statistics */
8caab75f 2382 spin_lock_init(&ctlr->statistics.lock);
ffbbdd21 2383
2b9603a0 2384 mutex_lock(&board_lock);
8caab75f 2385 list_add_tail(&ctlr->list, &spi_controller_list);
2b9603a0 2386 list_for_each_entry(bi, &board_list, list)
8caab75f 2387 spi_match_controller_to_boardinfo(ctlr, &bi->board_info);
2b9603a0
FT
2388 mutex_unlock(&board_lock);
2389
64bee4d2 2390 /* Register devices from the device tree and ACPI */
8caab75f
GU
2391 of_register_spi_devices(ctlr);
2392 acpi_register_spi_devices(ctlr);
8ae12a0d
DB
2393done:
2394 return status;
2395}
8caab75f 2396EXPORT_SYMBOL_GPL(spi_register_controller);
8ae12a0d 2397
666d5b4c
MB
2398static void devm_spi_unregister(struct device *dev, void *res)
2399{
8caab75f 2400 spi_unregister_controller(*(struct spi_controller **)res);
666d5b4c
MB
2401}
2402
2403/**
8caab75f
GU
2404 * devm_spi_register_controller - register managed SPI master or slave
2405 * controller
2406 * @dev: device managing SPI controller
2407 * @ctlr: initialized controller, originally from spi_alloc_master() or
2408 * spi_alloc_slave()
666d5b4c
MB
2409 * Context: can sleep
2410 *
8caab75f 2411 * Register a SPI device as with spi_register_controller() which will
68b892f1 2412 * automatically be unregistered and freed.
97d56dc6
JMC
2413 *
2414 * Return: zero on success, else a negative error code.
666d5b4c 2415 */
8caab75f
GU
2416int devm_spi_register_controller(struct device *dev,
2417 struct spi_controller *ctlr)
666d5b4c 2418{
8caab75f 2419 struct spi_controller **ptr;
666d5b4c
MB
2420 int ret;
2421
2422 ptr = devres_alloc(devm_spi_unregister, sizeof(*ptr), GFP_KERNEL);
2423 if (!ptr)
2424 return -ENOMEM;
2425
8caab75f 2426 ret = spi_register_controller(ctlr);
4b92894e 2427 if (!ret) {
8caab75f 2428 *ptr = ctlr;
666d5b4c
MB
2429 devres_add(dev, ptr);
2430 } else {
2431 devres_free(ptr);
2432 }
2433
2434 return ret;
2435}
8caab75f 2436EXPORT_SYMBOL_GPL(devm_spi_register_controller);
666d5b4c 2437
34860089 2438static int __unregister(struct device *dev, void *null)
8ae12a0d 2439{
34860089 2440 spi_unregister_device(to_spi_device(dev));
8ae12a0d
DB
2441 return 0;
2442}
2443
2444/**
8caab75f
GU
2445 * spi_unregister_controller - unregister SPI master or slave controller
2446 * @ctlr: the controller being unregistered
33e34dc6 2447 * Context: can sleep
8ae12a0d 2448 *
8caab75f 2449 * This call is used only by SPI controller drivers, which are the
8ae12a0d
DB
2450 * only ones directly touching chip registers.
2451 *
2452 * This must be called from context that can sleep.
68b892f1
JH
2453 *
2454 * Note that this function also drops a reference to the controller.
8ae12a0d 2455 */
8caab75f 2456void spi_unregister_controller(struct spi_controller *ctlr)
8ae12a0d 2457{
9b61e302 2458 struct spi_controller *found;
67f7b278 2459 int id = ctlr->bus_num;
89fc9a1a
JG
2460 int dummy;
2461
9b61e302
SM
2462 /* First make sure that this controller was ever added */
2463 mutex_lock(&board_lock);
67f7b278 2464 found = idr_find(&spi_master_idr, id);
9b61e302 2465 mutex_unlock(&board_lock);
8caab75f
GU
2466 if (ctlr->queued) {
2467 if (spi_destroy_queue(ctlr))
2468 dev_err(&ctlr->dev, "queue remove failed\n");
ffbbdd21 2469 }
2b9603a0 2470 mutex_lock(&board_lock);
8caab75f 2471 list_del(&ctlr->list);
2b9603a0
FT
2472 mutex_unlock(&board_lock);
2473
8caab75f
GU
2474 dummy = device_for_each_child(&ctlr->dev, NULL, __unregister);
2475 device_unregister(&ctlr->dev);
9b61e302
SM
2476 /* free bus id */
2477 mutex_lock(&board_lock);
613bd1ea
JN
2478 if (found == ctlr)
2479 idr_remove(&spi_master_idr, id);
9b61e302 2480 mutex_unlock(&board_lock);
8ae12a0d 2481}
8caab75f 2482EXPORT_SYMBOL_GPL(spi_unregister_controller);
8ae12a0d 2483
8caab75f 2484int spi_controller_suspend(struct spi_controller *ctlr)
ffbbdd21
LW
2485{
2486 int ret;
2487
8caab75f
GU
2488 /* Basically no-ops for non-queued controllers */
2489 if (!ctlr->queued)
ffbbdd21
LW
2490 return 0;
2491
8caab75f 2492 ret = spi_stop_queue(ctlr);
ffbbdd21 2493 if (ret)
8caab75f 2494 dev_err(&ctlr->dev, "queue stop failed\n");
ffbbdd21
LW
2495
2496 return ret;
2497}
8caab75f 2498EXPORT_SYMBOL_GPL(spi_controller_suspend);
ffbbdd21 2499
8caab75f 2500int spi_controller_resume(struct spi_controller *ctlr)
ffbbdd21
LW
2501{
2502 int ret;
2503
8caab75f 2504 if (!ctlr->queued)
ffbbdd21
LW
2505 return 0;
2506
8caab75f 2507 ret = spi_start_queue(ctlr);
ffbbdd21 2508 if (ret)
8caab75f 2509 dev_err(&ctlr->dev, "queue restart failed\n");
ffbbdd21
LW
2510
2511 return ret;
2512}
8caab75f 2513EXPORT_SYMBOL_GPL(spi_controller_resume);
ffbbdd21 2514
8caab75f 2515static int __spi_controller_match(struct device *dev, const void *data)
5ed2c832 2516{
8caab75f 2517 struct spi_controller *ctlr;
9f3b795a 2518 const u16 *bus_num = data;
5ed2c832 2519
8caab75f
GU
2520 ctlr = container_of(dev, struct spi_controller, dev);
2521 return ctlr->bus_num == *bus_num;
5ed2c832
DY
2522}
2523
8ae12a0d
DB
2524/**
2525 * spi_busnum_to_master - look up master associated with bus_num
2526 * @bus_num: the master's bus number
33e34dc6 2527 * Context: can sleep
8ae12a0d
DB
2528 *
2529 * This call may be used with devices that are registered after
2530 * arch init time. It returns a refcounted pointer to the relevant
8caab75f 2531 * spi_controller (which the caller must release), or NULL if there is
8ae12a0d 2532 * no such master registered.
97d56dc6
JMC
2533 *
2534 * Return: the SPI master structure on success, else NULL.
8ae12a0d 2535 */
8caab75f 2536struct spi_controller *spi_busnum_to_master(u16 bus_num)
8ae12a0d 2537{
49dce689 2538 struct device *dev;
8caab75f 2539 struct spi_controller *ctlr = NULL;
5ed2c832 2540
695794ae 2541 dev = class_find_device(&spi_master_class, NULL, &bus_num,
8caab75f 2542 __spi_controller_match);
5ed2c832 2543 if (dev)
8caab75f 2544 ctlr = container_of(dev, struct spi_controller, dev);
5ed2c832 2545 /* reference got in class_find_device */
8caab75f 2546 return ctlr;
8ae12a0d
DB
2547}
2548EXPORT_SYMBOL_GPL(spi_busnum_to_master);
2549
d780c371
MS
2550/*-------------------------------------------------------------------------*/
2551
2552/* Core methods for SPI resource management */
2553
2554/**
2555 * spi_res_alloc - allocate a spi resource that is life-cycle managed
2556 * during the processing of a spi_message while using
2557 * spi_transfer_one
2558 * @spi: the spi device for which we allocate memory
2559 * @release: the release code to execute for this resource
2560 * @size: size to alloc and return
2561 * @gfp: GFP allocation flags
2562 *
2563 * Return: the pointer to the allocated data
2564 *
2565 * This may get enhanced in the future to allocate from a memory pool
8caab75f 2566 * of the @spi_device or @spi_controller to avoid repeated allocations.
d780c371
MS
2567 */
2568void *spi_res_alloc(struct spi_device *spi,
2569 spi_res_release_t release,
2570 size_t size, gfp_t gfp)
2571{
2572 struct spi_res *sres;
2573
2574 sres = kzalloc(sizeof(*sres) + size, gfp);
2575 if (!sres)
2576 return NULL;
2577
2578 INIT_LIST_HEAD(&sres->entry);
2579 sres->release = release;
2580
2581 return sres->data;
2582}
2583EXPORT_SYMBOL_GPL(spi_res_alloc);
2584
2585/**
2586 * spi_res_free - free an spi resource
2587 * @res: pointer to the custom data of a resource
2588 *
2589 */
2590void spi_res_free(void *res)
2591{
2592 struct spi_res *sres = container_of(res, struct spi_res, data);
2593
2594 if (!res)
2595 return;
2596
2597 WARN_ON(!list_empty(&sres->entry));
2598 kfree(sres);
2599}
2600EXPORT_SYMBOL_GPL(spi_res_free);
2601
2602/**
2603 * spi_res_add - add a spi_res to the spi_message
2604 * @message: the spi message
2605 * @res: the spi_resource
2606 */
2607void spi_res_add(struct spi_message *message, void *res)
2608{
2609 struct spi_res *sres = container_of(res, struct spi_res, data);
2610
2611 WARN_ON(!list_empty(&sres->entry));
2612 list_add_tail(&sres->entry, &message->resources);
2613}
2614EXPORT_SYMBOL_GPL(spi_res_add);
2615
2616/**
2617 * spi_res_release - release all spi resources for this message
8caab75f 2618 * @ctlr: the @spi_controller
d780c371
MS
2619 * @message: the @spi_message
2620 */
8caab75f 2621void spi_res_release(struct spi_controller *ctlr, struct spi_message *message)
d780c371
MS
2622{
2623 struct spi_res *res;
2624
2625 while (!list_empty(&message->resources)) {
2626 res = list_last_entry(&message->resources,
2627 struct spi_res, entry);
2628
2629 if (res->release)
8caab75f 2630 res->release(ctlr, message, res->data);
d780c371
MS
2631
2632 list_del(&res->entry);
2633
2634 kfree(res);
2635 }
2636}
2637EXPORT_SYMBOL_GPL(spi_res_release);
8ae12a0d
DB
2638
2639/*-------------------------------------------------------------------------*/
2640
523baf5a
MS
2641/* Core methods for spi_message alterations */
2642
8caab75f 2643static void __spi_replace_transfers_release(struct spi_controller *ctlr,
523baf5a
MS
2644 struct spi_message *msg,
2645 void *res)
2646{
2647 struct spi_replaced_transfers *rxfer = res;
2648 size_t i;
2649
2650 /* call extra callback if requested */
2651 if (rxfer->release)
8caab75f 2652 rxfer->release(ctlr, msg, res);
523baf5a
MS
2653
2654 /* insert replaced transfers back into the message */
2655 list_splice(&rxfer->replaced_transfers, rxfer->replaced_after);
2656
2657 /* remove the formerly inserted entries */
2658 for (i = 0; i < rxfer->inserted; i++)
2659 list_del(&rxfer->inserted_transfers[i].transfer_list);
2660}
2661
2662/**
2663 * spi_replace_transfers - replace transfers with several transfers
2664 * and register change with spi_message.resources
2665 * @msg: the spi_message we work upon
2666 * @xfer_first: the first spi_transfer we want to replace
2667 * @remove: number of transfers to remove
2668 * @insert: the number of transfers we want to insert instead
2669 * @release: extra release code necessary in some circumstances
2670 * @extradatasize: extra data to allocate (with alignment guarantees
2671 * of struct @spi_transfer)
05885397 2672 * @gfp: gfp flags
523baf5a
MS
2673 *
2674 * Returns: pointer to @spi_replaced_transfers,
2675 * PTR_ERR(...) in case of errors.
2676 */
2677struct spi_replaced_transfers *spi_replace_transfers(
2678 struct spi_message *msg,
2679 struct spi_transfer *xfer_first,
2680 size_t remove,
2681 size_t insert,
2682 spi_replaced_release_t release,
2683 size_t extradatasize,
2684 gfp_t gfp)
2685{
2686 struct spi_replaced_transfers *rxfer;
2687 struct spi_transfer *xfer;
2688 size_t i;
2689
2690 /* allocate the structure using spi_res */
2691 rxfer = spi_res_alloc(msg->spi, __spi_replace_transfers_release,
2692 insert * sizeof(struct spi_transfer)
2693 + sizeof(struct spi_replaced_transfers)
2694 + extradatasize,
2695 gfp);
2696 if (!rxfer)
2697 return ERR_PTR(-ENOMEM);
2698
2699 /* the release code to invoke before running the generic release */
2700 rxfer->release = release;
2701
2702 /* assign extradata */
2703 if (extradatasize)
2704 rxfer->extradata =
2705 &rxfer->inserted_transfers[insert];
2706
2707 /* init the replaced_transfers list */
2708 INIT_LIST_HEAD(&rxfer->replaced_transfers);
2709
2710 /* assign the list_entry after which we should reinsert
2711 * the @replaced_transfers - it may be spi_message.messages!
2712 */
2713 rxfer->replaced_after = xfer_first->transfer_list.prev;
2714
2715 /* remove the requested number of transfers */
2716 for (i = 0; i < remove; i++) {
2717 /* if the entry after replaced_after it is msg->transfers
2718 * then we have been requested to remove more transfers
2719 * than are in the list
2720 */
2721 if (rxfer->replaced_after->next == &msg->transfers) {
2722 dev_err(&msg->spi->dev,
2723 "requested to remove more spi_transfers than are available\n");
2724 /* insert replaced transfers back into the message */
2725 list_splice(&rxfer->replaced_transfers,
2726 rxfer->replaced_after);
2727
2728 /* free the spi_replace_transfer structure */
2729 spi_res_free(rxfer);
2730
2731 /* and return with an error */
2732 return ERR_PTR(-EINVAL);
2733 }
2734
2735 /* remove the entry after replaced_after from list of
2736 * transfers and add it to list of replaced_transfers
2737 */
2738 list_move_tail(rxfer->replaced_after->next,
2739 &rxfer->replaced_transfers);
2740 }
2741
2742 /* create copy of the given xfer with identical settings
2743 * based on the first transfer to get removed
2744 */
2745 for (i = 0; i < insert; i++) {
2746 /* we need to run in reverse order */
2747 xfer = &rxfer->inserted_transfers[insert - 1 - i];
2748
2749 /* copy all spi_transfer data */
2750 memcpy(xfer, xfer_first, sizeof(*xfer));
2751
2752 /* add to list */
2753 list_add(&xfer->transfer_list, rxfer->replaced_after);
2754
2755 /* clear cs_change and delay_usecs for all but the last */
2756 if (i) {
2757 xfer->cs_change = false;
2758 xfer->delay_usecs = 0;
2759 }
2760 }
2761
2762 /* set up inserted */
2763 rxfer->inserted = insert;
2764
2765 /* and register it with spi_res/spi_message */
2766 spi_res_add(msg, rxfer);
2767
2768 return rxfer;
2769}
2770EXPORT_SYMBOL_GPL(spi_replace_transfers);
2771
8caab75f 2772static int __spi_split_transfer_maxsize(struct spi_controller *ctlr,
08933418
FE
2773 struct spi_message *msg,
2774 struct spi_transfer **xferp,
2775 size_t maxsize,
2776 gfp_t gfp)
d9f12122
MS
2777{
2778 struct spi_transfer *xfer = *xferp, *xfers;
2779 struct spi_replaced_transfers *srt;
2780 size_t offset;
2781 size_t count, i;
2782
2783 /* warn once about this fact that we are splitting a transfer */
2784 dev_warn_once(&msg->spi->dev,
7d62f51e 2785 "spi_transfer of length %i exceed max length of %zu - needed to split transfers\n",
d9f12122
MS
2786 xfer->len, maxsize);
2787
2788 /* calculate how many we have to replace */
2789 count = DIV_ROUND_UP(xfer->len, maxsize);
2790
2791 /* create replacement */
2792 srt = spi_replace_transfers(msg, xfer, 1, count, NULL, 0, gfp);
657d32ef
DC
2793 if (IS_ERR(srt))
2794 return PTR_ERR(srt);
d9f12122
MS
2795 xfers = srt->inserted_transfers;
2796
2797 /* now handle each of those newly inserted spi_transfers
2798 * note that the replacements spi_transfers all are preset
2799 * to the same values as *xferp, so tx_buf, rx_buf and len
2800 * are all identical (as well as most others)
2801 * so we just have to fix up len and the pointers.
2802 *
2803 * this also includes support for the depreciated
2804 * spi_message.is_dma_mapped interface
2805 */
2806
2807 /* the first transfer just needs the length modified, so we
2808 * run it outside the loop
2809 */
c8dab77a 2810 xfers[0].len = min_t(size_t, maxsize, xfer[0].len);
d9f12122
MS
2811
2812 /* all the others need rx_buf/tx_buf also set */
2813 for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) {
2814 /* update rx_buf, tx_buf and dma */
2815 if (xfers[i].rx_buf)
2816 xfers[i].rx_buf += offset;
2817 if (xfers[i].rx_dma)
2818 xfers[i].rx_dma += offset;
2819 if (xfers[i].tx_buf)
2820 xfers[i].tx_buf += offset;
2821 if (xfers[i].tx_dma)
2822 xfers[i].tx_dma += offset;
2823
2824 /* update length */
2825 xfers[i].len = min(maxsize, xfers[i].len - offset);
2826 }
2827
2828 /* we set up xferp to the last entry we have inserted,
2829 * so that we skip those already split transfers
2830 */
2831 *xferp = &xfers[count - 1];
2832
2833 /* increment statistics counters */
8caab75f 2834 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics,
d9f12122
MS
2835 transfers_split_maxsize);
2836 SPI_STATISTICS_INCREMENT_FIELD(&msg->spi->statistics,
2837 transfers_split_maxsize);
2838
2839 return 0;
2840}
2841
2842/**
2843 * spi_split_tranfers_maxsize - split spi transfers into multiple transfers
2844 * when an individual transfer exceeds a
2845 * certain size
8caab75f 2846 * @ctlr: the @spi_controller for this transfer
3700ce95
MI
2847 * @msg: the @spi_message to transform
2848 * @maxsize: the maximum when to apply this
10f11a22 2849 * @gfp: GFP allocation flags
d9f12122
MS
2850 *
2851 * Return: status of transformation
2852 */
8caab75f 2853int spi_split_transfers_maxsize(struct spi_controller *ctlr,
d9f12122
MS
2854 struct spi_message *msg,
2855 size_t maxsize,
2856 gfp_t gfp)
2857{
2858 struct spi_transfer *xfer;
2859 int ret;
2860
2861 /* iterate over the transfer_list,
2862 * but note that xfer is advanced to the last transfer inserted
2863 * to avoid checking sizes again unnecessarily (also xfer does
2864 * potentiall belong to a different list by the time the
2865 * replacement has happened
2866 */
2867 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
2868 if (xfer->len > maxsize) {
8caab75f
GU
2869 ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer,
2870 maxsize, gfp);
d9f12122
MS
2871 if (ret)
2872 return ret;
2873 }
2874 }
2875
2876 return 0;
2877}
2878EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize);
8ae12a0d
DB
2879
2880/*-------------------------------------------------------------------------*/
2881
8caab75f 2882/* Core methods for SPI controller protocol drivers. Some of the
7d077197
DB
2883 * other core methods are currently defined as inline functions.
2884 */
2885
8caab75f
GU
2886static int __spi_validate_bits_per_word(struct spi_controller *ctlr,
2887 u8 bits_per_word)
63ab645f 2888{
8caab75f 2889 if (ctlr->bits_per_word_mask) {
63ab645f
SB
2890 /* Only 32 bits fit in the mask */
2891 if (bits_per_word > 32)
2892 return -EINVAL;
8caab75f 2893 if (!(ctlr->bits_per_word_mask & SPI_BPW_MASK(bits_per_word)))
63ab645f
SB
2894 return -EINVAL;
2895 }
2896
2897 return 0;
2898}
2899
7d077197
DB
2900/**
2901 * spi_setup - setup SPI mode and clock rate
2902 * @spi: the device whose settings are being modified
2903 * Context: can sleep, and no requests are queued to the device
2904 *
2905 * SPI protocol drivers may need to update the transfer mode if the
2906 * device doesn't work with its default. They may likewise need
2907 * to update clock rates or word sizes from initial values. This function
2908 * changes those settings, and must be called from a context that can sleep.
2909 * Except for SPI_CS_HIGH, which takes effect immediately, the changes take
2910 * effect the next time the device is selected and data is transferred to
2911 * or from it. When this function returns, the spi device is deselected.
2912 *
2913 * Note that this call will fail if the protocol driver specifies an option
2914 * that the underlying controller or its driver does not support. For
2915 * example, not all hardware supports wire transfers using nine bit words,
2916 * LSB-first wire encoding, or active-high chipselects.
97d56dc6
JMC
2917 *
2918 * Return: zero on success, else a negative error code.
7d077197
DB
2919 */
2920int spi_setup(struct spi_device *spi)
2921{
83596fbe 2922 unsigned bad_bits, ugly_bits;
5ab8d262 2923 int status;
7d077197 2924
f477b7fb 2925 /* check mode to prevent that DUAL and QUAD set at the same time
2926 */
2927 if (((spi->mode & SPI_TX_DUAL) && (spi->mode & SPI_TX_QUAD)) ||
2928 ((spi->mode & SPI_RX_DUAL) && (spi->mode & SPI_RX_QUAD))) {
2929 dev_err(&spi->dev,
2930 "setup: can not select dual and quad at the same time\n");
2931 return -EINVAL;
2932 }
2933 /* if it is SPI_3WIRE mode, DUAL and QUAD should be forbidden
2934 */
2935 if ((spi->mode & SPI_3WIRE) && (spi->mode &
6b03061f
YNG
2936 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
2937 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))
f477b7fb 2938 return -EINVAL;
e7db06b5 2939 /* help drivers fail *cleanly* when they need options
8caab75f 2940 * that aren't supported with their current controller
cbaa62e0
DL
2941 * SPI_CS_WORD has a fallback software implementation,
2942 * so it is ignored here.
e7db06b5 2943 */
cbaa62e0 2944 bad_bits = spi->mode & ~(spi->controller->mode_bits | SPI_CS_WORD);
83596fbe 2945 ugly_bits = bad_bits &
6b03061f
YNG
2946 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
2947 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL);
83596fbe
GU
2948 if (ugly_bits) {
2949 dev_warn(&spi->dev,
2950 "setup: ignoring unsupported mode bits %x\n",
2951 ugly_bits);
2952 spi->mode &= ~ugly_bits;
2953 bad_bits &= ~ugly_bits;
2954 }
e7db06b5 2955 if (bad_bits) {
eb288a1f 2956 dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
e7db06b5
DB
2957 bad_bits);
2958 return -EINVAL;
2959 }
2960
7d077197
DB
2961 if (!spi->bits_per_word)
2962 spi->bits_per_word = 8;
2963
8caab75f
GU
2964 status = __spi_validate_bits_per_word(spi->controller,
2965 spi->bits_per_word);
5ab8d262
AS
2966 if (status)
2967 return status;
63ab645f 2968
052eb2d4 2969 if (!spi->max_speed_hz)
8caab75f 2970 spi->max_speed_hz = spi->controller->max_speed_hz;
052eb2d4 2971
8caab75f
GU
2972 if (spi->controller->setup)
2973 status = spi->controller->setup(spi);
7d077197 2974
abeedb01
FCJ
2975 spi_set_cs(spi, false);
2976
5fe5f05e 2977 dev_dbg(&spi->dev, "setup mode %d, %s%s%s%s%u bits/w, %u Hz max --> %d\n",
7d077197
DB
2978 (int) (spi->mode & (SPI_CPOL | SPI_CPHA)),
2979 (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "",
2980 (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "",
2981 (spi->mode & SPI_3WIRE) ? "3wire, " : "",
2982 (spi->mode & SPI_LOOP) ? "loopback, " : "",
2983 spi->bits_per_word, spi->max_speed_hz,
2984 status);
2985
2986 return status;
2987}
2988EXPORT_SYMBOL_GPL(spi_setup);
2989
90808738 2990static int __spi_validate(struct spi_device *spi, struct spi_message *message)
cf32b71e 2991{
8caab75f 2992 struct spi_controller *ctlr = spi->controller;
e6811d1d 2993 struct spi_transfer *xfer;
6ea31293 2994 int w_size;
cf32b71e 2995
24a0013a
MB
2996 if (list_empty(&message->transfers))
2997 return -EINVAL;
24a0013a 2998
cbaa62e0 2999 /* If an SPI controller does not support toggling the CS line on each
71388b21
DL
3000 * transfer (indicated by the SPI_CS_WORD flag) or we are using a GPIO
3001 * for the CS line, we can emulate the CS-per-word hardware function by
cbaa62e0
DL
3002 * splitting transfers into one-word transfers and ensuring that
3003 * cs_change is set for each transfer.
3004 */
71388b21 3005 if ((spi->mode & SPI_CS_WORD) && (!(ctlr->mode_bits & SPI_CS_WORD) ||
f3186dd8 3006 spi->cs_gpiod ||
71388b21 3007 gpio_is_valid(spi->cs_gpio))) {
cbaa62e0
DL
3008 size_t maxsize;
3009 int ret;
3010
3011 maxsize = (spi->bits_per_word + 7) / 8;
3012
3013 /* spi_split_transfers_maxsize() requires message->spi */
3014 message->spi = spi;
3015
3016 ret = spi_split_transfers_maxsize(ctlr, message, maxsize,
3017 GFP_KERNEL);
3018 if (ret)
3019 return ret;
3020
3021 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3022 /* don't change cs_change on the last entry in the list */
3023 if (list_is_last(&xfer->transfer_list, &message->transfers))
3024 break;
3025 xfer->cs_change = 1;
3026 }
3027 }
3028
cf32b71e
ES
3029 /* Half-duplex links include original MicroWire, and ones with
3030 * only one data pin like SPI_3WIRE (switches direction) or where
3031 * either MOSI or MISO is missing. They can also be caused by
3032 * software limitations.
3033 */
8caab75f
GU
3034 if ((ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) ||
3035 (spi->mode & SPI_3WIRE)) {
3036 unsigned flags = ctlr->flags;
cf32b71e
ES
3037
3038 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3039 if (xfer->rx_buf && xfer->tx_buf)
3040 return -EINVAL;
8caab75f 3041 if ((flags & SPI_CONTROLLER_NO_TX) && xfer->tx_buf)
cf32b71e 3042 return -EINVAL;
8caab75f 3043 if ((flags & SPI_CONTROLLER_NO_RX) && xfer->rx_buf)
cf32b71e
ES
3044 return -EINVAL;
3045 }
3046 }
3047
e6811d1d 3048 /**
059b8ffe
LD
3049 * Set transfer bits_per_word and max speed as spi device default if
3050 * it is not set for this transfer.
f477b7fb 3051 * Set transfer tx_nbits and rx_nbits as single transfer default
3052 * (SPI_NBITS_SINGLE) if it is not set for this transfer.
e6811d1d 3053 */
77e80588 3054 message->frame_length = 0;
e6811d1d 3055 list_for_each_entry(xfer, &message->transfers, transfer_list) {
078726ce 3056 message->frame_length += xfer->len;
e6811d1d
LD
3057 if (!xfer->bits_per_word)
3058 xfer->bits_per_word = spi->bits_per_word;
a6f87fad
AL
3059
3060 if (!xfer->speed_hz)
059b8ffe 3061 xfer->speed_hz = spi->max_speed_hz;
7dc9fbc3 3062 if (!xfer->speed_hz)
8caab75f 3063 xfer->speed_hz = ctlr->max_speed_hz;
a6f87fad 3064
8caab75f
GU
3065 if (ctlr->max_speed_hz && xfer->speed_hz > ctlr->max_speed_hz)
3066 xfer->speed_hz = ctlr->max_speed_hz;
56ede94a 3067
8caab75f 3068 if (__spi_validate_bits_per_word(ctlr, xfer->bits_per_word))
63ab645f 3069 return -EINVAL;
a2fd4f9f 3070
4d94bd21
II
3071 /*
3072 * SPI transfer length should be multiple of SPI word size
3073 * where SPI word size should be power-of-two multiple
3074 */
3075 if (xfer->bits_per_word <= 8)
3076 w_size = 1;
3077 else if (xfer->bits_per_word <= 16)
3078 w_size = 2;
3079 else
3080 w_size = 4;
3081
4d94bd21 3082 /* No partial transfers accepted */
6ea31293 3083 if (xfer->len % w_size)
4d94bd21
II
3084 return -EINVAL;
3085
8caab75f
GU
3086 if (xfer->speed_hz && ctlr->min_speed_hz &&
3087 xfer->speed_hz < ctlr->min_speed_hz)
a2fd4f9f 3088 return -EINVAL;
f477b7fb 3089
3090 if (xfer->tx_buf && !xfer->tx_nbits)
3091 xfer->tx_nbits = SPI_NBITS_SINGLE;
3092 if (xfer->rx_buf && !xfer->rx_nbits)
3093 xfer->rx_nbits = SPI_NBITS_SINGLE;
3094 /* check transfer tx/rx_nbits:
1afd9989
GU
3095 * 1. check the value matches one of single, dual and quad
3096 * 2. check tx/rx_nbits match the mode in spi_device
f477b7fb 3097 */
db90a441
SP
3098 if (xfer->tx_buf) {
3099 if (xfer->tx_nbits != SPI_NBITS_SINGLE &&
3100 xfer->tx_nbits != SPI_NBITS_DUAL &&
3101 xfer->tx_nbits != SPI_NBITS_QUAD)
3102 return -EINVAL;
3103 if ((xfer->tx_nbits == SPI_NBITS_DUAL) &&
3104 !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD)))
3105 return -EINVAL;
3106 if ((xfer->tx_nbits == SPI_NBITS_QUAD) &&
3107 !(spi->mode & SPI_TX_QUAD))
3108 return -EINVAL;
db90a441 3109 }
f477b7fb 3110 /* check transfer rx_nbits */
db90a441
SP
3111 if (xfer->rx_buf) {
3112 if (xfer->rx_nbits != SPI_NBITS_SINGLE &&
3113 xfer->rx_nbits != SPI_NBITS_DUAL &&
3114 xfer->rx_nbits != SPI_NBITS_QUAD)
3115 return -EINVAL;
3116 if ((xfer->rx_nbits == SPI_NBITS_DUAL) &&
3117 !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD)))
3118 return -EINVAL;
3119 if ((xfer->rx_nbits == SPI_NBITS_QUAD) &&
3120 !(spi->mode & SPI_RX_QUAD))
3121 return -EINVAL;
db90a441 3122 }
e6811d1d
LD
3123 }
3124
cf32b71e 3125 message->status = -EINPROGRESS;
90808738
MB
3126
3127 return 0;
3128}
3129
3130static int __spi_async(struct spi_device *spi, struct spi_message *message)
3131{
8caab75f 3132 struct spi_controller *ctlr = spi->controller;
90808738 3133
b5932f5c
BB
3134 /*
3135 * Some controllers do not support doing regular SPI transfers. Return
3136 * ENOTSUPP when this is the case.
3137 */
3138 if (!ctlr->transfer)
3139 return -ENOTSUPP;
3140
90808738
MB
3141 message->spi = spi;
3142
8caab75f 3143 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_async);
eca2ebc7
MS
3144 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_async);
3145
90808738
MB
3146 trace_spi_message_submit(message);
3147
8caab75f 3148 return ctlr->transfer(spi, message);
cf32b71e
ES
3149}
3150
568d0697
DB
3151/**
3152 * spi_async - asynchronous SPI transfer
3153 * @spi: device with which data will be exchanged
3154 * @message: describes the data transfers, including completion callback
3155 * Context: any (irqs may be blocked, etc)
3156 *
3157 * This call may be used in_irq and other contexts which can't sleep,
3158 * as well as from task contexts which can sleep.
3159 *
3160 * The completion callback is invoked in a context which can't sleep.
3161 * Before that invocation, the value of message->status is undefined.
3162 * When the callback is issued, message->status holds either zero (to
3163 * indicate complete success) or a negative error code. After that
3164 * callback returns, the driver which issued the transfer request may
3165 * deallocate the associated memory; it's no longer in use by any SPI
3166 * core or controller driver code.
3167 *
3168 * Note that although all messages to a spi_device are handled in
3169 * FIFO order, messages may go to different devices in other orders.
3170 * Some device might be higher priority, or have various "hard" access
3171 * time requirements, for example.
3172 *
3173 * On detection of any fault during the transfer, processing of
3174 * the entire message is aborted, and the device is deselected.
3175 * Until returning from the associated message completion callback,
3176 * no other spi_message queued to that device will be processed.
3177 * (This rule applies equally to all the synchronous transfer calls,
3178 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC
3179 *
3180 * Return: zero on success, else a negative error code.
568d0697
DB
3181 */
3182int spi_async(struct spi_device *spi, struct spi_message *message)
3183{
8caab75f 3184 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES
3185 int ret;
3186 unsigned long flags;
568d0697 3187
90808738
MB
3188 ret = __spi_validate(spi, message);
3189 if (ret != 0)
3190 return ret;
3191
8caab75f 3192 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
568d0697 3193
8caab75f 3194 if (ctlr->bus_lock_flag)
cf32b71e
ES
3195 ret = -EBUSY;
3196 else
3197 ret = __spi_async(spi, message);
568d0697 3198
8caab75f 3199 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3200
3201 return ret;
568d0697
DB
3202}
3203EXPORT_SYMBOL_GPL(spi_async);
3204
cf32b71e
ES
3205/**
3206 * spi_async_locked - version of spi_async with exclusive bus usage
3207 * @spi: device with which data will be exchanged
3208 * @message: describes the data transfers, including completion callback
3209 * Context: any (irqs may be blocked, etc)
3210 *
3211 * This call may be used in_irq and other contexts which can't sleep,
3212 * as well as from task contexts which can sleep.
3213 *
3214 * The completion callback is invoked in a context which can't sleep.
3215 * Before that invocation, the value of message->status is undefined.
3216 * When the callback is issued, message->status holds either zero (to
3217 * indicate complete success) or a negative error code. After that
3218 * callback returns, the driver which issued the transfer request may
3219 * deallocate the associated memory; it's no longer in use by any SPI
3220 * core or controller driver code.
3221 *
3222 * Note that although all messages to a spi_device are handled in
3223 * FIFO order, messages may go to different devices in other orders.
3224 * Some device might be higher priority, or have various "hard" access
3225 * time requirements, for example.
3226 *
3227 * On detection of any fault during the transfer, processing of
3228 * the entire message is aborted, and the device is deselected.
3229 * Until returning from the associated message completion callback,
3230 * no other spi_message queued to that device will be processed.
3231 * (This rule applies equally to all the synchronous transfer calls,
3232 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC
3233 *
3234 * Return: zero on success, else a negative error code.
cf32b71e
ES
3235 */
3236int spi_async_locked(struct spi_device *spi, struct spi_message *message)
3237{
8caab75f 3238 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES
3239 int ret;
3240 unsigned long flags;
3241
90808738
MB
3242 ret = __spi_validate(spi, message);
3243 if (ret != 0)
3244 return ret;
3245
8caab75f 3246 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3247
3248 ret = __spi_async(spi, message);
3249
8caab75f 3250 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3251
3252 return ret;
3253
3254}
3255EXPORT_SYMBOL_GPL(spi_async_locked);
3256
7d077197
DB
3257/*-------------------------------------------------------------------------*/
3258
8caab75f 3259/* Utility methods for SPI protocol drivers, layered on
7d077197
DB
3260 * top of the core. Some other utility methods are defined as
3261 * inline functions.
3262 */
3263
5d870c8e
AM
3264static void spi_complete(void *arg)
3265{
3266 complete(arg);
3267}
3268
ef4d96ec 3269static int __spi_sync(struct spi_device *spi, struct spi_message *message)
cf32b71e
ES
3270{
3271 DECLARE_COMPLETION_ONSTACK(done);
3272 int status;
8caab75f 3273 struct spi_controller *ctlr = spi->controller;
0461a414
MB
3274 unsigned long flags;
3275
3276 status = __spi_validate(spi, message);
3277 if (status != 0)
3278 return status;
cf32b71e
ES
3279
3280 message->complete = spi_complete;
3281 message->context = &done;
0461a414 3282 message->spi = spi;
cf32b71e 3283
8caab75f 3284 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_sync);
eca2ebc7
MS
3285 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_sync);
3286
0461a414
MB
3287 /* If we're not using the legacy transfer method then we will
3288 * try to transfer in the calling context so special case.
3289 * This code would be less tricky if we could remove the
3290 * support for driver implemented message queues.
3291 */
8caab75f
GU
3292 if (ctlr->transfer == spi_queued_transfer) {
3293 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
0461a414
MB
3294
3295 trace_spi_message_submit(message);
3296
3297 status = __spi_queued_transfer(spi, message, false);
3298
8caab75f 3299 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
0461a414
MB
3300 } else {
3301 status = spi_async_locked(spi, message);
3302 }
cf32b71e 3303
cf32b71e 3304 if (status == 0) {
0461a414
MB
3305 /* Push out the messages in the calling context if we
3306 * can.
3307 */
8caab75f
GU
3308 if (ctlr->transfer == spi_queued_transfer) {
3309 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics,
eca2ebc7
MS
3310 spi_sync_immediate);
3311 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics,
3312 spi_sync_immediate);
8caab75f 3313 __spi_pump_messages(ctlr, false);
eca2ebc7 3314 }
0461a414 3315
cf32b71e
ES
3316 wait_for_completion(&done);
3317 status = message->status;
3318 }
3319 message->context = NULL;
3320 return status;
3321}
3322
8ae12a0d
DB
3323/**
3324 * spi_sync - blocking/synchronous SPI data transfers
3325 * @spi: device with which data will be exchanged
3326 * @message: describes the data transfers
33e34dc6 3327 * Context: can sleep
8ae12a0d
DB
3328 *
3329 * This call may only be used from a context that may sleep. The sleep
3330 * is non-interruptible, and has no timeout. Low-overhead controller
3331 * drivers may DMA directly into and out of the message buffers.
3332 *
3333 * Note that the SPI device's chip select is active during the message,
3334 * and then is normally disabled between messages. Drivers for some
3335 * frequently-used devices may want to minimize costs of selecting a chip,
3336 * by leaving it selected in anticipation that the next message will go
3337 * to the same chip. (That may increase power usage.)
3338 *
0c868461
DB
3339 * Also, the caller is guaranteeing that the memory associated with the
3340 * message will not be freed before this call returns.
3341 *
97d56dc6 3342 * Return: zero on success, else a negative error code.
8ae12a0d
DB
3343 */
3344int spi_sync(struct spi_device *spi, struct spi_message *message)
3345{
ef4d96ec
MB
3346 int ret;
3347
8caab75f 3348 mutex_lock(&spi->controller->bus_lock_mutex);
ef4d96ec 3349 ret = __spi_sync(spi, message);
8caab75f 3350 mutex_unlock(&spi->controller->bus_lock_mutex);
ef4d96ec
MB
3351
3352 return ret;
8ae12a0d
DB
3353}
3354EXPORT_SYMBOL_GPL(spi_sync);
3355
cf32b71e
ES
3356/**
3357 * spi_sync_locked - version of spi_sync with exclusive bus usage
3358 * @spi: device with which data will be exchanged
3359 * @message: describes the data transfers
3360 * Context: can sleep
3361 *
3362 * This call may only be used from a context that may sleep. The sleep
3363 * is non-interruptible, and has no timeout. Low-overhead controller
3364 * drivers may DMA directly into and out of the message buffers.
3365 *
3366 * This call should be used by drivers that require exclusive access to the
25985edc 3367 * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must
cf32b71e
ES
3368 * be released by a spi_bus_unlock call when the exclusive access is over.
3369 *
97d56dc6 3370 * Return: zero on success, else a negative error code.
cf32b71e
ES
3371 */
3372int spi_sync_locked(struct spi_device *spi, struct spi_message *message)
3373{
ef4d96ec 3374 return __spi_sync(spi, message);
cf32b71e
ES
3375}
3376EXPORT_SYMBOL_GPL(spi_sync_locked);
3377
3378/**
3379 * spi_bus_lock - obtain a lock for exclusive SPI bus usage
8caab75f 3380 * @ctlr: SPI bus master that should be locked for exclusive bus access
cf32b71e
ES
3381 * Context: can sleep
3382 *
3383 * This call may only be used from a context that may sleep. The sleep
3384 * is non-interruptible, and has no timeout.
3385 *
3386 * This call should be used by drivers that require exclusive access to the
3387 * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the
3388 * exclusive access is over. Data transfer must be done by spi_sync_locked
3389 * and spi_async_locked calls when the SPI bus lock is held.
3390 *
97d56dc6 3391 * Return: always zero.
cf32b71e 3392 */
8caab75f 3393int spi_bus_lock(struct spi_controller *ctlr)
cf32b71e
ES
3394{
3395 unsigned long flags;
3396
8caab75f 3397 mutex_lock(&ctlr->bus_lock_mutex);
cf32b71e 3398
8caab75f
GU
3399 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
3400 ctlr->bus_lock_flag = 1;
3401 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3402
3403 /* mutex remains locked until spi_bus_unlock is called */
3404
3405 return 0;
3406}
3407EXPORT_SYMBOL_GPL(spi_bus_lock);
3408
3409/**
3410 * spi_bus_unlock - release the lock for exclusive SPI bus usage
8caab75f 3411 * @ctlr: SPI bus master that was locked for exclusive bus access
cf32b71e
ES
3412 * Context: can sleep
3413 *
3414 * This call may only be used from a context that may sleep. The sleep
3415 * is non-interruptible, and has no timeout.
3416 *
3417 * This call releases an SPI bus lock previously obtained by an spi_bus_lock
3418 * call.
3419 *
97d56dc6 3420 * Return: always zero.
cf32b71e 3421 */
8caab75f 3422int spi_bus_unlock(struct spi_controller *ctlr)
cf32b71e 3423{
8caab75f 3424 ctlr->bus_lock_flag = 0;
cf32b71e 3425
8caab75f 3426 mutex_unlock(&ctlr->bus_lock_mutex);
cf32b71e
ES
3427
3428 return 0;
3429}
3430EXPORT_SYMBOL_GPL(spi_bus_unlock);
3431
a9948b61 3432/* portable code must never pass more than 32 bytes */
5fe5f05e 3433#define SPI_BUFSIZ max(32, SMP_CACHE_BYTES)
8ae12a0d
DB
3434
3435static u8 *buf;
3436
3437/**
3438 * spi_write_then_read - SPI synchronous write followed by read
3439 * @spi: device with which data will be exchanged
3440 * @txbuf: data to be written (need not be dma-safe)
3441 * @n_tx: size of txbuf, in bytes
27570497
JP
3442 * @rxbuf: buffer into which data will be read (need not be dma-safe)
3443 * @n_rx: size of rxbuf, in bytes
33e34dc6 3444 * Context: can sleep
8ae12a0d
DB
3445 *
3446 * This performs a half duplex MicroWire style transaction with the
3447 * device, sending txbuf and then reading rxbuf. The return value
3448 * is zero for success, else a negative errno status code.
b885244e 3449 * This call may only be used from a context that may sleep.
8ae12a0d 3450 *
0c868461 3451 * Parameters to this routine are always copied using a small buffer;
33e34dc6
DB
3452 * portable code should never use this for more than 32 bytes.
3453 * Performance-sensitive or bulk transfer code should instead use
0c868461 3454 * spi_{async,sync}() calls with dma-safe buffers.
97d56dc6
JMC
3455 *
3456 * Return: zero on success, else a negative error code.
8ae12a0d
DB
3457 */
3458int spi_write_then_read(struct spi_device *spi,
0c4a1590
MB
3459 const void *txbuf, unsigned n_tx,
3460 void *rxbuf, unsigned n_rx)
8ae12a0d 3461{
068f4070 3462 static DEFINE_MUTEX(lock);
8ae12a0d
DB
3463
3464 int status;
3465 struct spi_message message;
bdff549e 3466 struct spi_transfer x[2];
8ae12a0d
DB
3467 u8 *local_buf;
3468
b3a223ee
MB
3469 /* Use preallocated DMA-safe buffer if we can. We can't avoid
3470 * copying here, (as a pure convenience thing), but we can
3471 * keep heap costs out of the hot path unless someone else is
3472 * using the pre-allocated buffer or the transfer is too large.
8ae12a0d 3473 */
b3a223ee 3474 if ((n_tx + n_rx) > SPI_BUFSIZ || !mutex_trylock(&lock)) {
2cd94c8a
MB
3475 local_buf = kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx),
3476 GFP_KERNEL | GFP_DMA);
b3a223ee
MB
3477 if (!local_buf)
3478 return -ENOMEM;
3479 } else {
3480 local_buf = buf;
3481 }
8ae12a0d 3482
8275c642 3483 spi_message_init(&message);
5fe5f05e 3484 memset(x, 0, sizeof(x));
bdff549e
DB
3485 if (n_tx) {
3486 x[0].len = n_tx;
3487 spi_message_add_tail(&x[0], &message);
3488 }
3489 if (n_rx) {
3490 x[1].len = n_rx;
3491 spi_message_add_tail(&x[1], &message);
3492 }
8275c642 3493
8ae12a0d 3494 memcpy(local_buf, txbuf, n_tx);
bdff549e
DB
3495 x[0].tx_buf = local_buf;
3496 x[1].rx_buf = local_buf + n_tx;
8ae12a0d
DB
3497
3498 /* do the i/o */
8ae12a0d 3499 status = spi_sync(spi, &message);
9b938b74 3500 if (status == 0)
bdff549e 3501 memcpy(rxbuf, x[1].rx_buf, n_rx);
8ae12a0d 3502
bdff549e 3503 if (x[0].tx_buf == buf)
068f4070 3504 mutex_unlock(&lock);
8ae12a0d
DB
3505 else
3506 kfree(local_buf);
3507
3508 return status;
3509}
3510EXPORT_SYMBOL_GPL(spi_write_then_read);
3511
3512/*-------------------------------------------------------------------------*/
3513
5f143af7 3514#if IS_ENABLED(CONFIG_OF)
ce79d54a
PA
3515static int __spi_of_device_match(struct device *dev, void *data)
3516{
3517 return dev->of_node == data;
3518}
3519
3520/* must call put_device() when done with returned spi_device device */
5f143af7 3521struct spi_device *of_find_spi_device_by_node(struct device_node *node)
ce79d54a
PA
3522{
3523 struct device *dev = bus_find_device(&spi_bus_type, NULL, node,
3524 __spi_of_device_match);
3525 return dev ? to_spi_device(dev) : NULL;
3526}
5f143af7
MF
3527EXPORT_SYMBOL_GPL(of_find_spi_device_by_node);
3528#endif /* IS_ENABLED(CONFIG_OF) */
ce79d54a 3529
5f143af7 3530#if IS_ENABLED(CONFIG_OF_DYNAMIC)
8caab75f 3531static int __spi_of_controller_match(struct device *dev, const void *data)
ce79d54a
PA
3532{
3533 return dev->of_node == data;
3534}
3535
8caab75f
GU
3536/* the spi controllers are not using spi_bus, so we find it with another way */
3537static struct spi_controller *of_find_spi_controller_by_node(struct device_node *node)
ce79d54a
PA
3538{
3539 struct device *dev;
3540
3541 dev = class_find_device(&spi_master_class, NULL, node,
8caab75f 3542 __spi_of_controller_match);
6c364062
GU
3543 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
3544 dev = class_find_device(&spi_slave_class, NULL, node,
8caab75f 3545 __spi_of_controller_match);
ce79d54a
PA
3546 if (!dev)
3547 return NULL;
3548
3549 /* reference got in class_find_device */
8caab75f 3550 return container_of(dev, struct spi_controller, dev);
ce79d54a
PA
3551}
3552
3553static int of_spi_notify(struct notifier_block *nb, unsigned long action,
3554 void *arg)
3555{
3556 struct of_reconfig_data *rd = arg;
8caab75f 3557 struct spi_controller *ctlr;
ce79d54a
PA
3558 struct spi_device *spi;
3559
3560 switch (of_reconfig_get_state_change(action, arg)) {
3561 case OF_RECONFIG_CHANGE_ADD:
8caab75f
GU
3562 ctlr = of_find_spi_controller_by_node(rd->dn->parent);
3563 if (ctlr == NULL)
ce79d54a
PA
3564 return NOTIFY_OK; /* not for us */
3565
bd6c1644 3566 if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) {
8caab75f 3567 put_device(&ctlr->dev);
bd6c1644
GU
3568 return NOTIFY_OK;
3569 }
3570
8caab75f
GU
3571 spi = of_register_spi_device(ctlr, rd->dn);
3572 put_device(&ctlr->dev);
ce79d54a
PA
3573
3574 if (IS_ERR(spi)) {
25c56c88
RH
3575 pr_err("%s: failed to create for '%pOF'\n",
3576 __func__, rd->dn);
e0af98a7 3577 of_node_clear_flag(rd->dn, OF_POPULATED);
ce79d54a
PA
3578 return notifier_from_errno(PTR_ERR(spi));
3579 }
3580 break;
3581
3582 case OF_RECONFIG_CHANGE_REMOVE:
bd6c1644
GU
3583 /* already depopulated? */
3584 if (!of_node_check_flag(rd->dn, OF_POPULATED))
3585 return NOTIFY_OK;
3586
ce79d54a
PA
3587 /* find our device by node */
3588 spi = of_find_spi_device_by_node(rd->dn);
3589 if (spi == NULL)
3590 return NOTIFY_OK; /* no? not meant for us */
3591
3592 /* unregister takes one ref away */
3593 spi_unregister_device(spi);
3594
3595 /* and put the reference of the find */
3596 put_device(&spi->dev);
3597 break;
3598 }
3599
3600 return NOTIFY_OK;
3601}
3602
3603static struct notifier_block spi_of_notifier = {
3604 .notifier_call = of_spi_notify,
3605};
3606#else /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
3607extern struct notifier_block spi_of_notifier;
3608#endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
3609
7f24467f 3610#if IS_ENABLED(CONFIG_ACPI)
8caab75f 3611static int spi_acpi_controller_match(struct device *dev, const void *data)
7f24467f
OP
3612{
3613 return ACPI_COMPANION(dev->parent) == data;
3614}
3615
3616static int spi_acpi_device_match(struct device *dev, void *data)
3617{
3618 return ACPI_COMPANION(dev) == data;
3619}
3620
8caab75f 3621static struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev)
7f24467f
OP
3622{
3623 struct device *dev;
3624
3625 dev = class_find_device(&spi_master_class, NULL, adev,
8caab75f 3626 spi_acpi_controller_match);
6c364062
GU
3627 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
3628 dev = class_find_device(&spi_slave_class, NULL, adev,
8caab75f 3629 spi_acpi_controller_match);
7f24467f
OP
3630 if (!dev)
3631 return NULL;
3632
8caab75f 3633 return container_of(dev, struct spi_controller, dev);
7f24467f
OP
3634}
3635
3636static struct spi_device *acpi_spi_find_device_by_adev(struct acpi_device *adev)
3637{
3638 struct device *dev;
3639
3640 dev = bus_find_device(&spi_bus_type, NULL, adev, spi_acpi_device_match);
3641
3642 return dev ? to_spi_device(dev) : NULL;
3643}
3644
3645static int acpi_spi_notify(struct notifier_block *nb, unsigned long value,
3646 void *arg)
3647{
3648 struct acpi_device *adev = arg;
8caab75f 3649 struct spi_controller *ctlr;
7f24467f
OP
3650 struct spi_device *spi;
3651
3652 switch (value) {
3653 case ACPI_RECONFIG_DEVICE_ADD:
8caab75f
GU
3654 ctlr = acpi_spi_find_controller_by_adev(adev->parent);
3655 if (!ctlr)
7f24467f
OP
3656 break;
3657
8caab75f
GU
3658 acpi_register_spi_device(ctlr, adev);
3659 put_device(&ctlr->dev);
7f24467f
OP
3660 break;
3661 case ACPI_RECONFIG_DEVICE_REMOVE:
3662 if (!acpi_device_enumerated(adev))
3663 break;
3664
3665 spi = acpi_spi_find_device_by_adev(adev);
3666 if (!spi)
3667 break;
3668
3669 spi_unregister_device(spi);
3670 put_device(&spi->dev);
3671 break;
3672 }
3673
3674 return NOTIFY_OK;
3675}
3676
3677static struct notifier_block spi_acpi_notifier = {
3678 .notifier_call = acpi_spi_notify,
3679};
3680#else
3681extern struct notifier_block spi_acpi_notifier;
3682#endif
3683
8ae12a0d
DB
3684static int __init spi_init(void)
3685{
b885244e
DB
3686 int status;
3687
e94b1766 3688 buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL);
b885244e
DB
3689 if (!buf) {
3690 status = -ENOMEM;
3691 goto err0;
3692 }
3693
3694 status = bus_register(&spi_bus_type);
3695 if (status < 0)
3696 goto err1;
8ae12a0d 3697
b885244e
DB
3698 status = class_register(&spi_master_class);
3699 if (status < 0)
3700 goto err2;
ce79d54a 3701
6c364062
GU
3702 if (IS_ENABLED(CONFIG_SPI_SLAVE)) {
3703 status = class_register(&spi_slave_class);
3704 if (status < 0)
3705 goto err3;
3706 }
3707
5267720e 3708 if (IS_ENABLED(CONFIG_OF_DYNAMIC))
ce79d54a 3709 WARN_ON(of_reconfig_notifier_register(&spi_of_notifier));
7f24467f
OP
3710 if (IS_ENABLED(CONFIG_ACPI))
3711 WARN_ON(acpi_reconfig_notifier_register(&spi_acpi_notifier));
ce79d54a 3712
8ae12a0d 3713 return 0;
b885244e 3714
6c364062
GU
3715err3:
3716 class_unregister(&spi_master_class);
b885244e
DB
3717err2:
3718 bus_unregister(&spi_bus_type);
3719err1:
3720 kfree(buf);
3721 buf = NULL;
3722err0:
3723 return status;
8ae12a0d 3724}
b885244e 3725
8ae12a0d
DB
3726/* board_info is normally registered in arch_initcall(),
3727 * but even essential drivers wait till later
b885244e
DB
3728 *
3729 * REVISIT only boardinfo really needs static linking. the rest (device and
3730 * driver registration) _could_ be dynamically linked (modular) ... costs
3731 * include needing to have boardinfo data structures be much more public.
8ae12a0d 3732 */
673c0c00 3733postcore_initcall(spi_init);
f0125f1a 3734