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Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
efe9bc08 | 2 | #include "ddk750_chip.h" |
81dee67e SM |
3 | #include "ddk750_reg.h" |
4 | #include "ddk750_power.h" | |
5 | ||
03140dab | 6 | void ddk750_set_dpms(DPMS_t state) |
81dee67e SM |
7 | { |
8 | unsigned int value; | |
40403c1b | 9 | |
06a4f429 | 10 | if (sm750_get_chip_type() == SM750LE) { |
c075b6f2 | 11 | value = peek32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_DPMS_MASK; |
cdce1f18 | 12 | value |= (state << CRT_DISPLAY_CTRL_DPMS_SHIFT); |
c075b6f2 | 13 | poke32(CRT_DISPLAY_CTRL, value); |
6338a781 | 14 | } else { |
c075b6f2 | 15 | value = peek32(SYSTEM_CTRL); |
a8856ff8 | 16 | value = (value & ~SYSTEM_CTRL_DPMS_MASK) | state; |
c075b6f2 | 17 | poke32(SYSTEM_CTRL, value); |
81dee67e SM |
18 | } |
19 | } | |
20 | ||
03140dab | 21 | static unsigned int get_power_mode(void) |
81dee67e | 22 | { |
06a4f429 | 23 | if (sm750_get_chip_type() == SM750LE) |
81dee67e | 24 | return 0; |
c075b6f2 | 25 | return peek32(POWER_MODE_CTRL) & POWER_MODE_CTRL_MODE_MASK; |
81dee67e SM |
26 | } |
27 | ||
81dee67e SM |
28 | /* |
29 | * SM50x can operate in one of three modes: 0, 1 or Sleep. | |
30 | * On hardware reset, power mode 0 is default. | |
31 | */ | |
52d0744d | 32 | void sm750_set_power_mode(unsigned int mode) |
81dee67e | 33 | { |
c2b6028f | 34 | unsigned int ctrl = 0; |
81dee67e | 35 | |
c075b6f2 | 36 | ctrl = peek32(POWER_MODE_CTRL) & ~POWER_MODE_CTRL_MODE_MASK; |
81dee67e | 37 | |
06a4f429 | 38 | if (sm750_get_chip_type() == SM750LE) |
81dee67e SM |
39 | return; |
40 | ||
c2b6028f | 41 | switch (mode) { |
78376535 | 42 | case POWER_MODE_CTRL_MODE_MODE0: |
c2b6028f | 43 | ctrl |= POWER_MODE_CTRL_MODE_MODE0; |
78376535 | 44 | break; |
81dee67e | 45 | |
78376535 | 46 | case POWER_MODE_CTRL_MODE_MODE1: |
c2b6028f | 47 | ctrl |= POWER_MODE_CTRL_MODE_MODE1; |
78376535 | 48 | break; |
81dee67e | 49 | |
78376535 | 50 | case POWER_MODE_CTRL_MODE_SLEEP: |
c2b6028f | 51 | ctrl |= POWER_MODE_CTRL_MODE_SLEEP; |
78376535 | 52 | break; |
81dee67e | 53 | |
78376535 JL |
54 | default: |
55 | break; | |
56 | } | |
81dee67e | 57 | |
78376535 | 58 | /* Set up other fields in Power Control Register */ |
c2b6028f EL |
59 | if (mode == POWER_MODE_CTRL_MODE_SLEEP) { |
60 | ctrl &= ~POWER_MODE_CTRL_OSC_INPUT; | |
81dee67e | 61 | #ifdef VALIDATION_CHIP |
c2b6028f | 62 | ctrl &= ~POWER_MODE_CTRL_336CLK; |
81dee67e | 63 | #endif |
259fef35 | 64 | } else { |
c2b6028f | 65 | ctrl |= POWER_MODE_CTRL_OSC_INPUT; |
81dee67e | 66 | #ifdef VALIDATION_CHIP |
c2b6028f | 67 | ctrl |= POWER_MODE_CTRL_336CLK; |
81dee67e | 68 | #endif |
78376535 | 69 | } |
81dee67e | 70 | |
78376535 | 71 | /* Program new power mode. */ |
c075b6f2 | 72 | poke32(POWER_MODE_CTRL, ctrl); |
81dee67e SM |
73 | } |
74 | ||
52d0744d | 75 | void sm750_set_current_gate(unsigned int gate) |
81dee67e | 76 | { |
03140dab | 77 | if (get_power_mode() == POWER_MODE_CTRL_MODE_MODE1) |
c075b6f2 | 78 | poke32(MODE1_GATE, gate); |
cefc2fc6 | 79 | else |
c075b6f2 | 80 | poke32(MODE0_GATE, gate); |
81dee67e SM |
81 | } |
82 | ||
81dee67e SM |
83 | /* |
84 | * This function enable/disable the 2D engine. | |
85 | */ | |
52d0744d | 86 | void sm750_enable_2d_engine(unsigned int enable) |
81dee67e | 87 | { |
f741554e | 88 | u32 gate; |
78376535 | 89 | |
c075b6f2 | 90 | gate = peek32(CURRENT_GATE); |
69988ba2 | 91 | if (enable) |
90946e52 | 92 | gate |= (CURRENT_GATE_DE | CURRENT_GATE_CSC); |
69988ba2 | 93 | else |
90946e52 | 94 | gate &= ~(CURRENT_GATE_DE | CURRENT_GATE_CSC); |
78376535 | 95 | |
52d0744d | 96 | sm750_set_current_gate(gate); |
81dee67e SM |
97 | } |
98 | ||
52d0744d | 99 | void sm750_enable_dma(unsigned int enable) |
81dee67e | 100 | { |
f741554e | 101 | u32 gate; |
81dee67e | 102 | |
78376535 | 103 | /* Enable DMA Gate */ |
c075b6f2 | 104 | gate = peek32(CURRENT_GATE); |
78376535 | 105 | if (enable) |
90946e52 | 106 | gate |= CURRENT_GATE_DMA; |
78376535 | 107 | else |
90946e52 | 108 | gate &= ~CURRENT_GATE_DMA; |
81dee67e | 109 | |
52d0744d | 110 | sm750_set_current_gate(gate); |
81dee67e SM |
111 | } |
112 | ||
113 | /* | |
114 | * This function enable/disable the GPIO Engine | |
115 | */ | |
52d0744d | 116 | void sm750_enable_gpio(unsigned int enable) |
81dee67e | 117 | { |
f741554e | 118 | u32 gate; |
81dee67e | 119 | |
78376535 | 120 | /* Enable GPIO Gate */ |
c075b6f2 | 121 | gate = peek32(CURRENT_GATE); |
78376535 | 122 | if (enable) |
90946e52 | 123 | gate |= CURRENT_GATE_GPIO; |
78376535 | 124 | else |
90946e52 | 125 | gate &= ~CURRENT_GATE_GPIO; |
81dee67e | 126 | |
52d0744d | 127 | sm750_set_current_gate(gate); |
81dee67e SM |
128 | } |
129 | ||
81dee67e SM |
130 | /* |
131 | * This function enable/disable the I2C Engine | |
132 | */ | |
52d0744d | 133 | void sm750_enable_i2c(unsigned int enable) |
81dee67e | 134 | { |
f741554e | 135 | u32 gate; |
81dee67e | 136 | |
78376535 | 137 | /* Enable I2C Gate */ |
c075b6f2 | 138 | gate = peek32(CURRENT_GATE); |
78376535 | 139 | if (enable) |
90946e52 | 140 | gate |= CURRENT_GATE_I2C; |
78376535 | 141 | else |
90946e52 | 142 | gate &= ~CURRENT_GATE_I2C; |
81dee67e | 143 | |
52d0744d | 144 | sm750_set_current_gate(gate); |
81dee67e | 145 | } |