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acc962c5 | 1 | // SPDX-License-Identifier: MIT |
dd55d44f HG |
2 | /* |
3 | * Copyright (C) 2013-2017 Oracle Corporation | |
4 | * This file is based on ast_mode.c | |
5 | * Copyright 2012 Red Hat Inc. | |
6 | * Parts based on xf86-video-ast | |
7 | * Copyright (c) 2005 ASPEED Technology Inc. | |
dd55d44f HG |
8 | * Authors: Dave Airlie <airlied@redhat.com> |
9 | * Michael Thayer <michael.thayer@oracle.com, | |
10 | * Hans de Goede <hdegoede@redhat.com> | |
11 | */ | |
12 | #include <linux/export.h> | |
5cf5332d | 13 | #include <drm/drm_atomic.h> |
35f3288c | 14 | #include <drm/drm_atomic_helper.h> |
fcd70cd3 SV |
15 | #include <drm/drm_plane_helper.h> |
16 | #include <drm/drm_probe_helper.h> | |
dd55d44f HG |
17 | |
18 | #include "vbox_drv.h" | |
19 | #include "vboxvideo.h" | |
20 | #include "hgsmi_channels.h" | |
21 | ||
cd76c287 | 22 | /* |
dd55d44f HG |
23 | * Set a graphics mode. Poke any required values into registers, do an HGSMI |
24 | * mode set and tell the host we support advanced graphics functions. | |
25 | */ | |
e2f958d0 | 26 | static void vbox_do_modeset(struct drm_crtc *crtc) |
dd55d44f | 27 | { |
32f2ed7e | 28 | struct drm_framebuffer *fb = crtc->primary->state->fb; |
dd55d44f HG |
29 | struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc); |
30 | struct vbox_private *vbox; | |
31 | int width, height, bpp, pitch; | |
dd55d44f HG |
32 | u16 flags; |
33 | s32 x_offset, y_offset; | |
34 | ||
35 | vbox = crtc->dev->dev_private; | |
e2f958d0 HG |
36 | width = vbox_crtc->width ? vbox_crtc->width : 640; |
37 | height = vbox_crtc->height ? vbox_crtc->height : 480; | |
32f2ed7e HG |
38 | bpp = fb ? fb->format->cpp[0] * 8 : 32; |
39 | pitch = fb ? fb->pitches[0] : width * bpp / 8; | |
e2f958d0 HG |
40 | x_offset = vbox->single_framebuffer ? vbox_crtc->x : vbox_crtc->x_hint; |
41 | y_offset = vbox->single_framebuffer ? vbox_crtc->y : vbox_crtc->y_hint; | |
dd55d44f HG |
42 | |
43 | /* | |
44 | * This is the old way of setting graphics modes. It assumed one screen | |
45 | * and a frame-buffer at the start of video RAM. On older versions of | |
46 | * VirtualBox, certain parts of the code still assume that the first | |
47 | * screen is programmed this way, so try to fake it. | |
48 | */ | |
32f2ed7e | 49 | if (vbox_crtc->crtc_id == 0 && fb && |
dd55d44f HG |
50 | vbox_crtc->fb_offset / pitch < 0xffff - crtc->y && |
51 | vbox_crtc->fb_offset % (bpp / 8) == 0) { | |
52 | vbox_write_ioport(VBE_DISPI_INDEX_XRES, width); | |
53 | vbox_write_ioport(VBE_DISPI_INDEX_YRES, height); | |
54 | vbox_write_ioport(VBE_DISPI_INDEX_VIRT_WIDTH, pitch * 8 / bpp); | |
32f2ed7e | 55 | vbox_write_ioport(VBE_DISPI_INDEX_BPP, bpp); |
dd55d44f HG |
56 | vbox_write_ioport(VBE_DISPI_INDEX_ENABLE, VBE_DISPI_ENABLED); |
57 | vbox_write_ioport( | |
58 | VBE_DISPI_INDEX_X_OFFSET, | |
e2f958d0 | 59 | vbox_crtc->fb_offset % pitch / bpp * 8 + vbox_crtc->x); |
dd55d44f | 60 | vbox_write_ioport(VBE_DISPI_INDEX_Y_OFFSET, |
e2f958d0 | 61 | vbox_crtc->fb_offset / pitch + vbox_crtc->y); |
dd55d44f HG |
62 | } |
63 | ||
64 | flags = VBVA_SCREEN_F_ACTIVE; | |
ba2181d7 | 65 | flags |= (fb && crtc->state->enable) ? 0 : VBVA_SCREEN_F_BLANK; |
dd55d44f HG |
66 | flags |= vbox_crtc->disconnected ? VBVA_SCREEN_F_DISABLED : 0; |
67 | hgsmi_process_display_info(vbox->guest_pool, vbox_crtc->crtc_id, | |
68 | x_offset, y_offset, | |
e2f958d0 HG |
69 | vbox_crtc->x * bpp / 8 + |
70 | vbox_crtc->y * pitch, | |
04ed7ed7 | 71 | pitch, width, height, bpp, flags); |
dd55d44f HG |
72 | } |
73 | ||
74 | static int vbox_set_view(struct drm_crtc *crtc) | |
75 | { | |
76 | struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc); | |
77 | struct vbox_private *vbox = crtc->dev->dev_private; | |
78 | struct vbva_infoview *p; | |
79 | ||
80 | /* | |
81 | * Tell the host about the view. This design originally targeted the | |
82 | * Windows XP driver architecture and assumed that each screen would | |
83 | * have a dedicated frame buffer with the command buffer following it, | |
84 | * the whole being a "view". The host works out which screen a command | |
85 | * buffer belongs to by checking whether it is in the first view, then | |
86 | * whether it is in the second and so on. The first match wins. We | |
87 | * cheat around this by making the first view be the managed memory | |
88 | * plus the first command buffer, the second the same plus the second | |
89 | * buffer and so on. | |
90 | */ | |
91 | p = hgsmi_buffer_alloc(vbox->guest_pool, sizeof(*p), | |
92 | HGSMI_CH_VBVA, VBVA_INFO_VIEW); | |
93 | if (!p) | |
94 | return -ENOMEM; | |
95 | ||
96 | p->view_index = vbox_crtc->crtc_id; | |
97 | p->view_offset = vbox_crtc->fb_offset; | |
98 | p->view_size = vbox->available_vram_size - vbox_crtc->fb_offset + | |
99 | vbox_crtc->crtc_id * VBVA_MIN_BUFFER_SIZE; | |
100 | p->max_screen_size = vbox->available_vram_size - vbox_crtc->fb_offset; | |
101 | ||
102 | hgsmi_buffer_submit(vbox->guest_pool, p); | |
103 | hgsmi_buffer_free(vbox->guest_pool, p); | |
104 | ||
105 | return 0; | |
106 | } | |
107 | ||
dd55d44f HG |
108 | /* |
109 | * Try to map the layout of virtual screens to the range of the input device. | |
110 | * Return true if we need to re-set the crtc modes due to screen offset | |
111 | * changes. | |
112 | */ | |
113 | static bool vbox_set_up_input_mapping(struct vbox_private *vbox) | |
114 | { | |
115 | struct drm_crtc *crtci; | |
116 | struct drm_connector *connectori; | |
8568209b | 117 | struct drm_framebuffer *fb, *fb1 = NULL; |
dd55d44f HG |
118 | bool single_framebuffer = true; |
119 | bool old_single_framebuffer = vbox->single_framebuffer; | |
120 | u16 width = 0, height = 0; | |
121 | ||
122 | /* | |
123 | * Are we using an X.Org-style single large frame-buffer for all crtcs? | |
124 | * If so then screen layout can be deduced from the crtc offsets. | |
125 | * Same fall-back if this is the fbdev frame-buffer. | |
126 | */ | |
01648890 | 127 | list_for_each_entry(crtci, &vbox->ddev.mode_config.crtc_list, head) { |
32f2ed7e | 128 | fb = crtci->primary->state->fb; |
8568209b HG |
129 | if (!fb) |
130 | continue; | |
131 | ||
dd55d44f | 132 | if (!fb1) { |
8568209b | 133 | fb1 = fb; |
e2c3860b | 134 | if (to_vbox_framebuffer(fb1) == &vbox->afb) |
dd55d44f | 135 | break; |
8568209b | 136 | } else if (fb != fb1) { |
dd55d44f HG |
137 | single_framebuffer = false; |
138 | } | |
139 | } | |
8568209b HG |
140 | if (!fb1) |
141 | return false; | |
142 | ||
dd55d44f | 143 | if (single_framebuffer) { |
114094c8 | 144 | vbox->single_framebuffer = true; |
8568209b HG |
145 | vbox->input_mapping_width = fb1->width; |
146 | vbox->input_mapping_height = fb1->height; | |
114094c8 | 147 | return old_single_framebuffer != vbox->single_framebuffer; |
dd55d44f HG |
148 | } |
149 | /* Otherwise calculate the total span of all screens. */ | |
01648890 | 150 | list_for_each_entry(connectori, &vbox->ddev.mode_config.connector_list, |
dd55d44f HG |
151 | head) { |
152 | struct vbox_connector *vbox_connector = | |
153 | to_vbox_connector(connectori); | |
154 | struct vbox_crtc *vbox_crtc = vbox_connector->vbox_crtc; | |
155 | ||
156 | width = max_t(u16, width, vbox_crtc->x_hint + | |
157 | vbox_connector->mode_hint.width); | |
158 | height = max_t(u16, height, vbox_crtc->y_hint + | |
159 | vbox_connector->mode_hint.height); | |
160 | } | |
161 | ||
162 | vbox->single_framebuffer = false; | |
163 | vbox->input_mapping_width = width; | |
164 | vbox->input_mapping_height = height; | |
165 | ||
166 | return old_single_framebuffer != vbox->single_framebuffer; | |
167 | } | |
168 | ||
0fdda2ce HG |
169 | static void vbox_crtc_set_base_and_mode(struct drm_crtc *crtc, |
170 | struct drm_framebuffer *fb, | |
0fdda2ce | 171 | int x, int y) |
a5aca205 | 172 | { |
0fdda2ce | 173 | struct vbox_bo *bo = gem_to_vbox_bo(to_vbox_framebuffer(fb)->obj); |
a5aca205 HG |
174 | struct vbox_private *vbox = crtc->dev->dev_private; |
175 | struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc); | |
5cf5332d | 176 | bool needs_modeset = drm_atomic_crtc_needs_modeset(crtc->state); |
dd55d44f | 177 | |
a5aca205 HG |
178 | mutex_lock(&vbox->hw_mutex); |
179 | ||
db3566cf HG |
180 | if (crtc->state->enable) { |
181 | vbox_crtc->width = crtc->state->mode.hdisplay; | |
182 | vbox_crtc->height = crtc->state->mode.vdisplay; | |
183 | } | |
184 | ||
e2f958d0 HG |
185 | vbox_crtc->x = x; |
186 | vbox_crtc->y = y; | |
0fdda2ce | 187 | vbox_crtc->fb_offset = vbox_bo_gpu_offset(bo); |
a5aca205 HG |
188 | |
189 | /* vbox_do_modeset() checks vbox->single_framebuffer so update it now */ | |
5cf5332d | 190 | if (needs_modeset && vbox_set_up_input_mapping(vbox)) { |
dd55d44f HG |
191 | struct drm_crtc *crtci; |
192 | ||
01648890 | 193 | list_for_each_entry(crtci, &vbox->ddev.mode_config.crtc_list, |
dd55d44f | 194 | head) { |
3c94952c HG |
195 | if (crtci == crtc) |
196 | continue; | |
e2f958d0 | 197 | vbox_do_modeset(crtci); |
dd55d44f HG |
198 | } |
199 | } | |
200 | ||
a5aca205 | 201 | vbox_set_view(crtc); |
e2f958d0 | 202 | vbox_do_modeset(crtc); |
dd55d44f | 203 | |
5cf5332d | 204 | if (needs_modeset) |
a5aca205 HG |
205 | hgsmi_update_input_mapping(vbox->guest_pool, 0, 0, |
206 | vbox->input_mapping_width, | |
207 | vbox->input_mapping_height); | |
208 | ||
209 | mutex_unlock(&vbox->hw_mutex); | |
dd55d44f HG |
210 | } |
211 | ||
33f48cc1 HG |
212 | static void vbox_crtc_atomic_enable(struct drm_crtc *crtc, |
213 | struct drm_crtc_state *old_crtc_state) | |
dd55d44f | 214 | { |
cc0ec5eb | 215 | } |
0fdda2ce | 216 | |
33f48cc1 HG |
217 | static void vbox_crtc_atomic_disable(struct drm_crtc *crtc, |
218 | struct drm_crtc_state *old_crtc_state) | |
dd55d44f HG |
219 | { |
220 | } | |
221 | ||
cc0ec5eb HG |
222 | static void vbox_crtc_atomic_flush(struct drm_crtc *crtc, |
223 | struct drm_crtc_state *old_crtc_state) | |
dd55d44f | 224 | { |
cc0ec5eb HG |
225 | struct drm_pending_vblank_event *event; |
226 | unsigned long flags; | |
227 | ||
228 | if (crtc->state && crtc->state->event) { | |
229 | event = crtc->state->event; | |
230 | crtc->state->event = NULL; | |
231 | ||
232 | spin_lock_irqsave(&crtc->dev->event_lock, flags); | |
233 | drm_crtc_send_vblank_event(crtc, event); | |
234 | spin_unlock_irqrestore(&crtc->dev->event_lock, flags); | |
235 | } | |
dd55d44f HG |
236 | } |
237 | ||
238 | static const struct drm_crtc_helper_funcs vbox_crtc_helper_funcs = { | |
33f48cc1 HG |
239 | .atomic_enable = vbox_crtc_atomic_enable, |
240 | .atomic_disable = vbox_crtc_atomic_disable, | |
cc0ec5eb | 241 | .atomic_flush = vbox_crtc_atomic_flush, |
dd55d44f HG |
242 | }; |
243 | ||
dd55d44f HG |
244 | static void vbox_crtc_destroy(struct drm_crtc *crtc) |
245 | { | |
246 | drm_crtc_cleanup(crtc); | |
247 | kfree(crtc); | |
248 | } | |
249 | ||
250 | static const struct drm_crtc_funcs vbox_crtc_funcs = { | |
438340aa | 251 | .set_config = drm_atomic_helper_set_config, |
5cf5332d | 252 | .page_flip = drm_atomic_helper_page_flip, |
dd55d44f HG |
253 | /* .gamma_set = vbox_crtc_gamma_set, */ |
254 | .destroy = vbox_crtc_destroy, | |
67e2f0c8 HG |
255 | .reset = drm_atomic_helper_crtc_reset, |
256 | .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, | |
257 | .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, | |
dd55d44f HG |
258 | }; |
259 | ||
cc0ec5eb HG |
260 | static int vbox_primary_atomic_check(struct drm_plane *plane, |
261 | struct drm_plane_state *new_state) | |
262 | { | |
b8384ea3 HG |
263 | struct drm_crtc_state *crtc_state = NULL; |
264 | ||
265 | if (new_state->crtc) { | |
266 | crtc_state = drm_atomic_get_existing_crtc_state( | |
267 | new_state->state, new_state->crtc); | |
268 | if (WARN_ON(!crtc_state)) | |
269 | return -EINVAL; | |
270 | } | |
271 | ||
272 | return drm_atomic_helper_check_plane_state(new_state, crtc_state, | |
273 | DRM_PLANE_HELPER_NO_SCALING, | |
274 | DRM_PLANE_HELPER_NO_SCALING, | |
275 | false, true); | |
cc0ec5eb HG |
276 | } |
277 | ||
278 | static void vbox_primary_atomic_update(struct drm_plane *plane, | |
279 | struct drm_plane_state *old_state) | |
280 | { | |
281 | struct drm_crtc *crtc = plane->state->crtc; | |
282 | struct drm_framebuffer *fb = plane->state->fb; | |
283 | ||
db3566cf | 284 | vbox_crtc_set_base_and_mode(crtc, fb, |
cc0ec5eb HG |
285 | plane->state->src_x >> 16, |
286 | plane->state->src_y >> 16); | |
287 | } | |
288 | ||
84ac86fb CK |
289 | static void vbox_primary_atomic_disable(struct drm_plane *plane, |
290 | struct drm_plane_state *old_state) | |
cc0ec5eb HG |
291 | { |
292 | struct drm_crtc *crtc = old_state->crtc; | |
293 | ||
294 | /* vbox_do_modeset checks plane->state->fb and will disable if NULL */ | |
db3566cf | 295 | vbox_crtc_set_base_and_mode(crtc, old_state->fb, |
cc0ec5eb HG |
296 | old_state->src_x >> 16, |
297 | old_state->src_y >> 16); | |
298 | } | |
299 | ||
300 | static int vbox_primary_prepare_fb(struct drm_plane *plane, | |
301 | struct drm_plane_state *new_state) | |
302 | { | |
303 | struct vbox_bo *bo; | |
304 | int ret; | |
305 | ||
306 | if (!new_state->fb) | |
307 | return 0; | |
308 | ||
309 | bo = gem_to_vbox_bo(to_vbox_framebuffer(new_state->fb)->obj); | |
310 | ret = vbox_bo_pin(bo, TTM_PL_FLAG_VRAM); | |
311 | if (ret) | |
312 | DRM_WARN("Error %d pinning new fb, out of video mem?\n", ret); | |
313 | ||
314 | return ret; | |
315 | } | |
316 | ||
317 | static void vbox_primary_cleanup_fb(struct drm_plane *plane, | |
318 | struct drm_plane_state *old_state) | |
319 | { | |
320 | struct vbox_bo *bo; | |
321 | ||
322 | if (!old_state->fb) | |
323 | return; | |
324 | ||
325 | bo = gem_to_vbox_bo(to_vbox_framebuffer(old_state->fb)->obj); | |
326 | vbox_bo_unpin(bo); | |
327 | } | |
328 | ||
35f3288c HG |
329 | static int vbox_cursor_atomic_check(struct drm_plane *plane, |
330 | struct drm_plane_state *new_state) | |
331 | { | |
b8384ea3 | 332 | struct drm_crtc_state *crtc_state = NULL; |
35f3288c HG |
333 | u32 width = new_state->crtc_w; |
334 | u32 height = new_state->crtc_h; | |
b8384ea3 HG |
335 | int ret; |
336 | ||
337 | if (new_state->crtc) { | |
338 | crtc_state = drm_atomic_get_existing_crtc_state( | |
339 | new_state->state, new_state->crtc); | |
340 | if (WARN_ON(!crtc_state)) | |
341 | return -EINVAL; | |
342 | } | |
343 | ||
344 | ret = drm_atomic_helper_check_plane_state(new_state, crtc_state, | |
345 | DRM_PLANE_HELPER_NO_SCALING, | |
346 | DRM_PLANE_HELPER_NO_SCALING, | |
347 | true, true); | |
348 | if (ret) | |
349 | return ret; | |
35f3288c HG |
350 | |
351 | if (!new_state->fb) | |
352 | return 0; | |
353 | ||
354 | if (width > VBOX_MAX_CURSOR_WIDTH || height > VBOX_MAX_CURSOR_HEIGHT || | |
355 | width == 0 || height == 0) | |
356 | return -EINVAL; | |
357 | ||
358 | return 0; | |
359 | } | |
360 | ||
cd76c287 | 361 | /* |
35f3288c HG |
362 | * Copy the ARGB image and generate the mask, which is needed in case the host |
363 | * does not support ARGB cursors. The mask is a 1BPP bitmap with the bit set | |
364 | * if the corresponding alpha value in the ARGB image is greater than 0xF0. | |
365 | */ | |
366 | static void copy_cursor_image(u8 *src, u8 *dst, u32 width, u32 height, | |
367 | size_t mask_size) | |
368 | { | |
369 | size_t line_size = (width + 7) / 8; | |
370 | u32 i, j; | |
371 | ||
372 | memcpy(dst + mask_size, src, width * height * 4); | |
373 | for (i = 0; i < height; ++i) | |
374 | for (j = 0; j < width; ++j) | |
375 | if (((u32 *)src)[i * width + j] > 0xf0000000) | |
376 | dst[i * line_size + j / 8] |= (0x80 >> (j % 8)); | |
377 | } | |
378 | ||
379 | static void vbox_cursor_atomic_update(struct drm_plane *plane, | |
380 | struct drm_plane_state *old_state) | |
381 | { | |
382 | struct vbox_private *vbox = | |
383 | container_of(plane->dev, struct vbox_private, ddev); | |
384 | struct vbox_crtc *vbox_crtc = to_vbox_crtc(plane->state->crtc); | |
385 | struct drm_framebuffer *fb = plane->state->fb; | |
386 | struct vbox_bo *bo = gem_to_vbox_bo(to_vbox_framebuffer(fb)->obj); | |
387 | u32 width = plane->state->crtc_w; | |
388 | u32 height = plane->state->crtc_h; | |
389 | size_t data_size, mask_size; | |
390 | u32 flags; | |
391 | u8 *src; | |
392 | ||
393 | /* | |
394 | * VirtualBox uses the host windowing system to draw the cursor so | |
395 | * moves are a no-op, we only need to upload new cursor sprites. | |
396 | */ | |
397 | if (fb == old_state->fb) | |
398 | return; | |
399 | ||
400 | mutex_lock(&vbox->hw_mutex); | |
401 | ||
402 | vbox_crtc->cursor_enabled = true; | |
403 | ||
404 | /* pinning is done in prepare/cleanup framebuffer */ | |
405 | src = vbox_bo_kmap(bo); | |
406 | if (IS_ERR(src)) { | |
c00e1d09 | 407 | mutex_unlock(&vbox->hw_mutex); |
35f3288c HG |
408 | DRM_WARN("Could not kmap cursor bo, skipping update\n"); |
409 | return; | |
410 | } | |
411 | ||
412 | /* | |
413 | * The mask must be calculated based on the alpha | |
414 | * channel, one bit per ARGB word, and must be 32-bit | |
415 | * padded. | |
416 | */ | |
417 | mask_size = ((width + 7) / 8 * height + 3) & ~3; | |
418 | data_size = width * height * 4 + mask_size; | |
419 | ||
420 | copy_cursor_image(src, vbox->cursor_data, width, height, mask_size); | |
421 | vbox_bo_kunmap(bo); | |
422 | ||
423 | flags = VBOX_MOUSE_POINTER_VISIBLE | VBOX_MOUSE_POINTER_SHAPE | | |
424 | VBOX_MOUSE_POINTER_ALPHA; | |
425 | hgsmi_update_pointer_shape(vbox->guest_pool, flags, | |
426 | min_t(u32, max(fb->hot_x, 0), width), | |
427 | min_t(u32, max(fb->hot_y, 0), height), | |
428 | width, height, vbox->cursor_data, data_size); | |
429 | ||
430 | mutex_unlock(&vbox->hw_mutex); | |
431 | } | |
432 | ||
84ac86fb CK |
433 | static void vbox_cursor_atomic_disable(struct drm_plane *plane, |
434 | struct drm_plane_state *old_state) | |
35f3288c HG |
435 | { |
436 | struct vbox_private *vbox = | |
437 | container_of(plane->dev, struct vbox_private, ddev); | |
438 | struct vbox_crtc *vbox_crtc = to_vbox_crtc(old_state->crtc); | |
439 | bool cursor_enabled = false; | |
440 | struct drm_crtc *crtci; | |
441 | ||
442 | mutex_lock(&vbox->hw_mutex); | |
443 | ||
444 | vbox_crtc->cursor_enabled = false; | |
445 | ||
446 | list_for_each_entry(crtci, &vbox->ddev.mode_config.crtc_list, head) { | |
447 | if (to_vbox_crtc(crtci)->cursor_enabled) | |
448 | cursor_enabled = true; | |
449 | } | |
450 | ||
451 | if (!cursor_enabled) | |
452 | hgsmi_update_pointer_shape(vbox->guest_pool, 0, 0, 0, | |
453 | 0, 0, NULL, 0); | |
454 | ||
455 | mutex_unlock(&vbox->hw_mutex); | |
456 | } | |
457 | ||
458 | static int vbox_cursor_prepare_fb(struct drm_plane *plane, | |
459 | struct drm_plane_state *new_state) | |
460 | { | |
461 | struct vbox_bo *bo; | |
462 | ||
463 | if (!new_state->fb) | |
464 | return 0; | |
465 | ||
466 | bo = gem_to_vbox_bo(to_vbox_framebuffer(new_state->fb)->obj); | |
467 | return vbox_bo_pin(bo, TTM_PL_FLAG_SYSTEM); | |
468 | } | |
469 | ||
470 | static void vbox_cursor_cleanup_fb(struct drm_plane *plane, | |
471 | struct drm_plane_state *old_state) | |
472 | { | |
473 | struct vbox_bo *bo; | |
474 | ||
475 | if (!plane->state->fb) | |
476 | return; | |
477 | ||
478 | bo = gem_to_vbox_bo(to_vbox_framebuffer(plane->state->fb)->obj); | |
479 | vbox_bo_unpin(bo); | |
480 | } | |
481 | ||
16c44c57 | 482 | static const u32 vbox_cursor_plane_formats[] = { |
35f3288c HG |
483 | DRM_FORMAT_ARGB8888, |
484 | }; | |
485 | ||
486 | static const struct drm_plane_helper_funcs vbox_cursor_helper_funcs = { | |
487 | .atomic_check = vbox_cursor_atomic_check, | |
488 | .atomic_update = vbox_cursor_atomic_update, | |
489 | .atomic_disable = vbox_cursor_atomic_disable, | |
490 | .prepare_fb = vbox_cursor_prepare_fb, | |
491 | .cleanup_fb = vbox_cursor_cleanup_fb, | |
492 | }; | |
493 | ||
494 | static const struct drm_plane_funcs vbox_cursor_plane_funcs = { | |
438340aa HG |
495 | .update_plane = drm_atomic_helper_update_plane, |
496 | .disable_plane = drm_atomic_helper_disable_plane, | |
35f3288c | 497 | .destroy = drm_primary_helper_destroy, |
67e2f0c8 HG |
498 | .reset = drm_atomic_helper_plane_reset, |
499 | .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, | |
500 | .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, | |
35f3288c HG |
501 | }; |
502 | ||
16c44c57 | 503 | static const u32 vbox_primary_plane_formats[] = { |
cb5eaf18 HG |
504 | DRM_FORMAT_XRGB8888, |
505 | DRM_FORMAT_ARGB8888, | |
506 | }; | |
507 | ||
cc0ec5eb HG |
508 | static const struct drm_plane_helper_funcs vbox_primary_helper_funcs = { |
509 | .atomic_check = vbox_primary_atomic_check, | |
510 | .atomic_update = vbox_primary_atomic_update, | |
511 | .atomic_disable = vbox_primary_atomic_disable, | |
512 | .prepare_fb = vbox_primary_prepare_fb, | |
513 | .cleanup_fb = vbox_primary_cleanup_fb, | |
514 | }; | |
515 | ||
cb5eaf18 | 516 | static const struct drm_plane_funcs vbox_primary_plane_funcs = { |
438340aa HG |
517 | .update_plane = drm_atomic_helper_update_plane, |
518 | .disable_plane = drm_atomic_helper_disable_plane, | |
cb5eaf18 | 519 | .destroy = drm_primary_helper_destroy, |
67e2f0c8 HG |
520 | .reset = drm_atomic_helper_plane_reset, |
521 | .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, | |
522 | .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, | |
cb5eaf18 HG |
523 | }; |
524 | ||
525 | static struct drm_plane *vbox_create_plane(struct vbox_private *vbox, | |
526 | unsigned int possible_crtcs, | |
527 | enum drm_plane_type type) | |
528 | { | |
529 | const struct drm_plane_helper_funcs *helper_funcs = NULL; | |
530 | const struct drm_plane_funcs *funcs; | |
531 | struct drm_plane *plane; | |
16c44c57 | 532 | const u32 *formats; |
cb5eaf18 HG |
533 | int num_formats; |
534 | int err; | |
535 | ||
536 | if (type == DRM_PLANE_TYPE_PRIMARY) { | |
537 | funcs = &vbox_primary_plane_funcs; | |
538 | formats = vbox_primary_plane_formats; | |
cc0ec5eb | 539 | helper_funcs = &vbox_primary_helper_funcs; |
cb5eaf18 | 540 | num_formats = ARRAY_SIZE(vbox_primary_plane_formats); |
35f3288c HG |
541 | } else if (type == DRM_PLANE_TYPE_CURSOR) { |
542 | funcs = &vbox_cursor_plane_funcs; | |
543 | formats = vbox_cursor_plane_formats; | |
544 | helper_funcs = &vbox_cursor_helper_funcs; | |
545 | num_formats = ARRAY_SIZE(vbox_cursor_plane_formats); | |
cb5eaf18 HG |
546 | } else { |
547 | return ERR_PTR(-EINVAL); | |
548 | } | |
549 | ||
550 | plane = kzalloc(sizeof(*plane), GFP_KERNEL); | |
551 | if (!plane) | |
552 | return ERR_PTR(-ENOMEM); | |
553 | ||
554 | err = drm_universal_plane_init(&vbox->ddev, plane, possible_crtcs, | |
555 | funcs, formats, num_formats, | |
556 | NULL, type, NULL); | |
557 | if (err) | |
558 | goto free_plane; | |
559 | ||
560 | drm_plane_helper_add(plane, helper_funcs); | |
561 | ||
562 | return plane; | |
563 | ||
564 | free_plane: | |
565 | kfree(plane); | |
566 | return ERR_PTR(-EINVAL); | |
567 | } | |
568 | ||
dd55d44f HG |
569 | static struct vbox_crtc *vbox_crtc_init(struct drm_device *dev, unsigned int i) |
570 | { | |
cb5eaf18 HG |
571 | struct vbox_private *vbox = |
572 | container_of(dev, struct vbox_private, ddev); | |
35f3288c | 573 | struct drm_plane *cursor = NULL; |
dd55d44f | 574 | struct vbox_crtc *vbox_crtc; |
cb5eaf18 | 575 | struct drm_plane *primary; |
35f3288c | 576 | u32 caps = 0; |
cb5eaf18 | 577 | int ret; |
dd55d44f | 578 | |
35f3288c HG |
579 | ret = hgsmi_query_conf(vbox->guest_pool, |
580 | VBOX_VBVA_CONF32_CURSOR_CAPABILITIES, &caps); | |
581 | if (ret) | |
582 | return ERR_PTR(ret); | |
583 | ||
dd55d44f HG |
584 | vbox_crtc = kzalloc(sizeof(*vbox_crtc), GFP_KERNEL); |
585 | if (!vbox_crtc) | |
cb5eaf18 HG |
586 | return ERR_PTR(-ENOMEM); |
587 | ||
588 | primary = vbox_create_plane(vbox, 1 << i, DRM_PLANE_TYPE_PRIMARY); | |
589 | if (IS_ERR(primary)) { | |
590 | ret = PTR_ERR(primary); | |
591 | goto free_mem; | |
592 | } | |
dd55d44f | 593 | |
35f3288c HG |
594 | if ((caps & VBOX_VBVA_CURSOR_CAPABILITY_HARDWARE)) { |
595 | cursor = vbox_create_plane(vbox, 1 << i, DRM_PLANE_TYPE_CURSOR); | |
596 | if (IS_ERR(cursor)) { | |
597 | ret = PTR_ERR(cursor); | |
598 | goto clean_primary; | |
599 | } | |
600 | } else { | |
601 | DRM_WARN("VirtualBox host is too old, no cursor support\n"); | |
602 | } | |
603 | ||
dd55d44f HG |
604 | vbox_crtc->crtc_id = i; |
605 | ||
35f3288c | 606 | ret = drm_crtc_init_with_planes(dev, &vbox_crtc->base, primary, cursor, |
cb5eaf18 HG |
607 | &vbox_crtc_funcs, NULL); |
608 | if (ret) | |
35f3288c | 609 | goto clean_cursor; |
cb5eaf18 | 610 | |
dd55d44f HG |
611 | drm_mode_crtc_set_gamma_size(&vbox_crtc->base, 256); |
612 | drm_crtc_helper_add(&vbox_crtc->base, &vbox_crtc_helper_funcs); | |
613 | ||
614 | return vbox_crtc; | |
cb5eaf18 | 615 | |
35f3288c HG |
616 | clean_cursor: |
617 | if (cursor) { | |
618 | drm_plane_cleanup(cursor); | |
619 | kfree(cursor); | |
620 | } | |
cb5eaf18 HG |
621 | clean_primary: |
622 | drm_plane_cleanup(primary); | |
623 | kfree(primary); | |
624 | free_mem: | |
625 | kfree(vbox_crtc); | |
626 | return ERR_PTR(ret); | |
dd55d44f HG |
627 | } |
628 | ||
629 | static void vbox_encoder_destroy(struct drm_encoder *encoder) | |
630 | { | |
631 | drm_encoder_cleanup(encoder); | |
632 | kfree(encoder); | |
633 | } | |
634 | ||
dd55d44f HG |
635 | static const struct drm_encoder_funcs vbox_enc_funcs = { |
636 | .destroy = vbox_encoder_destroy, | |
637 | }; | |
638 | ||
dd55d44f HG |
639 | static struct drm_encoder *vbox_encoder_init(struct drm_device *dev, |
640 | unsigned int i) | |
641 | { | |
642 | struct vbox_encoder *vbox_encoder; | |
643 | ||
644 | vbox_encoder = kzalloc(sizeof(*vbox_encoder), GFP_KERNEL); | |
645 | if (!vbox_encoder) | |
646 | return NULL; | |
647 | ||
648 | drm_encoder_init(dev, &vbox_encoder->base, &vbox_enc_funcs, | |
649 | DRM_MODE_ENCODER_DAC, NULL); | |
dd55d44f HG |
650 | |
651 | vbox_encoder->base.possible_crtcs = 1 << i; | |
652 | return &vbox_encoder->base; | |
653 | } | |
654 | ||
cd76c287 | 655 | /* |
dd55d44f | 656 | * Generate EDID data with a mode-unique serial number for the virtual |
cd76c287 HG |
657 | * monitor to try to persuade Unity that different modes correspond to |
658 | * different monitors and it should not try to force the same resolution on | |
659 | * them. | |
dd55d44f HG |
660 | */ |
661 | static void vbox_set_edid(struct drm_connector *connector, int width, | |
662 | int height) | |
663 | { | |
664 | enum { EDID_SIZE = 128 }; | |
665 | unsigned char edid[EDID_SIZE] = { | |
666 | 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, /* header */ | |
667 | 0x58, 0x58, /* manufacturer (VBX) */ | |
668 | 0x00, 0x00, /* product code */ | |
669 | 0x00, 0x00, 0x00, 0x00, /* serial number goes here */ | |
670 | 0x01, /* week of manufacture */ | |
671 | 0x00, /* year of manufacture */ | |
672 | 0x01, 0x03, /* EDID version */ | |
673 | 0x80, /* capabilities - digital */ | |
674 | 0x00, /* horiz. res in cm, zero for projectors */ | |
675 | 0x00, /* vert. res in cm */ | |
676 | 0x78, /* display gamma (120 == 2.2). */ | |
677 | 0xEE, /* features (standby, suspend, off, RGB, std */ | |
678 | /* colour space, preferred timing mode) */ | |
679 | 0xEE, 0x91, 0xA3, 0x54, 0x4C, 0x99, 0x26, 0x0F, 0x50, 0x54, | |
680 | /* chromaticity for standard colour space. */ | |
681 | 0x00, 0x00, 0x00, /* no default timings */ | |
682 | 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, | |
683 | 0x01, 0x01, | |
684 | 0x01, 0x01, 0x01, 0x01, /* no standard timings */ | |
685 | 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x06, 0x00, 0x02, 0x02, | |
686 | 0x02, 0x02, | |
687 | /* descriptor block 1 goes below */ | |
688 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
689 | /* descriptor block 2, monitor ranges */ | |
690 | 0x00, 0x00, 0x00, 0xFD, 0x00, | |
691 | 0x00, 0xC8, 0x00, 0xC8, 0x64, 0x00, 0x0A, 0x20, 0x20, 0x20, | |
692 | 0x20, 0x20, | |
693 | /* 0-200Hz vertical, 0-200KHz horizontal, 1000MHz pixel clock */ | |
694 | 0x20, | |
695 | /* descriptor block 3, monitor name */ | |
696 | 0x00, 0x00, 0x00, 0xFC, 0x00, | |
697 | 'V', 'B', 'O', 'X', ' ', 'm', 'o', 'n', 'i', 't', 'o', 'r', | |
698 | '\n', | |
699 | /* descriptor block 4: dummy data */ | |
700 | 0x00, 0x00, 0x00, 0x10, 0x00, | |
701 | 0x0A, 0x20, 0x20, 0x20, 0x20, 0x20, | |
702 | 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, | |
703 | 0x20, | |
704 | 0x00, /* number of extensions */ | |
705 | 0x00 /* checksum goes here */ | |
706 | }; | |
707 | int clock = (width + 6) * (height + 6) * 60 / 10000; | |
708 | unsigned int i, sum = 0; | |
709 | ||
710 | edid[12] = width & 0xff; | |
711 | edid[13] = width >> 8; | |
712 | edid[14] = height & 0xff; | |
713 | edid[15] = height >> 8; | |
714 | edid[54] = clock & 0xff; | |
715 | edid[55] = clock >> 8; | |
716 | edid[56] = width & 0xff; | |
717 | edid[58] = (width >> 4) & 0xf0; | |
718 | edid[59] = height & 0xff; | |
719 | edid[61] = (height >> 4) & 0xf0; | |
720 | for (i = 0; i < EDID_SIZE - 1; ++i) | |
721 | sum += edid[i]; | |
722 | edid[EDID_SIZE - 1] = (0x100 - (sum & 0xFF)) & 0xFF; | |
c555f023 | 723 | drm_connector_update_edid_property(connector, (struct edid *)edid); |
dd55d44f HG |
724 | } |
725 | ||
726 | static int vbox_get_modes(struct drm_connector *connector) | |
727 | { | |
728 | struct vbox_connector *vbox_connector = NULL; | |
729 | struct drm_display_mode *mode = NULL; | |
730 | struct vbox_private *vbox = NULL; | |
731 | unsigned int num_modes = 0; | |
732 | int preferred_width, preferred_height; | |
733 | ||
734 | vbox_connector = to_vbox_connector(connector); | |
735 | vbox = connector->dev->dev_private; | |
736 | /* | |
737 | * Heuristic: we do not want to tell the host that we support dynamic | |
738 | * resizing unless we feel confident that the user space client using | |
739 | * the video driver can handle hot-plug events. So the first time modes | |
740 | * are queried after a "master" switch we tell the host that we do not, | |
741 | * and immediately after we send the client a hot-plug notification as | |
742 | * a test to see if they will respond and query again. | |
743 | * That is also the reason why capabilities are reported to the host at | |
744 | * this place in the code rather than elsewhere. | |
745 | * We need to report the flags location before reporting the IRQ | |
746 | * capability. | |
747 | */ | |
748 | hgsmi_report_flags_location(vbox->guest_pool, GUEST_HEAP_OFFSET(vbox) + | |
749 | HOST_FLAGS_OFFSET); | |
750 | if (vbox_connector->vbox_crtc->crtc_id == 0) | |
751 | vbox_report_caps(vbox); | |
752 | if (!vbox->initial_mode_queried) { | |
753 | if (vbox_connector->vbox_crtc->crtc_id == 0) { | |
754 | vbox->initial_mode_queried = true; | |
755 | vbox_report_hotplug(vbox); | |
756 | } | |
757 | return drm_add_modes_noedid(connector, 800, 600); | |
758 | } | |
759 | num_modes = drm_add_modes_noedid(connector, 2560, 1600); | |
760 | preferred_width = vbox_connector->mode_hint.width ? | |
761 | vbox_connector->mode_hint.width : 1024; | |
762 | preferred_height = vbox_connector->mode_hint.height ? | |
763 | vbox_connector->mode_hint.height : 768; | |
764 | mode = drm_cvt_mode(connector->dev, preferred_width, preferred_height, | |
765 | 60, false, false, false); | |
766 | if (mode) { | |
767 | mode->type |= DRM_MODE_TYPE_PREFERRED; | |
768 | drm_mode_probed_add(connector, mode); | |
769 | ++num_modes; | |
770 | } | |
771 | vbox_set_edid(connector, preferred_width, preferred_height); | |
ce10d7b4 HG |
772 | |
773 | if (vbox_connector->vbox_crtc->x_hint != -1) | |
774 | drm_object_property_set_value(&connector->base, | |
01648890 | 775 | vbox->ddev.mode_config.suggested_x_property, |
ce10d7b4 HG |
776 | vbox_connector->vbox_crtc->x_hint); |
777 | else | |
778 | drm_object_property_set_value(&connector->base, | |
01648890 | 779 | vbox->ddev.mode_config.suggested_x_property, 0); |
ce10d7b4 HG |
780 | |
781 | if (vbox_connector->vbox_crtc->y_hint != -1) | |
782 | drm_object_property_set_value(&connector->base, | |
01648890 | 783 | vbox->ddev.mode_config.suggested_y_property, |
ce10d7b4 HG |
784 | vbox_connector->vbox_crtc->y_hint); |
785 | else | |
786 | drm_object_property_set_value(&connector->base, | |
01648890 | 787 | vbox->ddev.mode_config.suggested_y_property, 0); |
dd55d44f HG |
788 | |
789 | return num_modes; | |
790 | } | |
791 | ||
dd55d44f HG |
792 | static void vbox_connector_destroy(struct drm_connector *connector) |
793 | { | |
dd55d44f HG |
794 | drm_connector_unregister(connector); |
795 | drm_connector_cleanup(connector); | |
796 | kfree(connector); | |
797 | } | |
798 | ||
799 | static enum drm_connector_status | |
800 | vbox_connector_detect(struct drm_connector *connector, bool force) | |
801 | { | |
802 | struct vbox_connector *vbox_connector; | |
803 | ||
804 | vbox_connector = to_vbox_connector(connector); | |
805 | ||
806 | return vbox_connector->mode_hint.disconnected ? | |
807 | connector_status_disconnected : connector_status_connected; | |
808 | } | |
809 | ||
810 | static int vbox_fill_modes(struct drm_connector *connector, u32 max_x, | |
811 | u32 max_y) | |
812 | { | |
813 | struct vbox_connector *vbox_connector; | |
814 | struct drm_device *dev; | |
815 | struct drm_display_mode *mode, *iterator; | |
816 | ||
817 | vbox_connector = to_vbox_connector(connector); | |
818 | dev = vbox_connector->base.dev; | |
819 | list_for_each_entry_safe(mode, iterator, &connector->modes, head) { | |
820 | list_del(&mode->head); | |
821 | drm_mode_destroy(dev, mode); | |
822 | } | |
823 | ||
824 | return drm_helper_probe_single_connector_modes(connector, max_x, max_y); | |
825 | } | |
826 | ||
827 | static const struct drm_connector_helper_funcs vbox_connector_helper_funcs = { | |
dd55d44f | 828 | .get_modes = vbox_get_modes, |
dd55d44f HG |
829 | }; |
830 | ||
831 | static const struct drm_connector_funcs vbox_connector_funcs = { | |
dd55d44f HG |
832 | .detect = vbox_connector_detect, |
833 | .fill_modes = vbox_fill_modes, | |
834 | .destroy = vbox_connector_destroy, | |
438340aa HG |
835 | .reset = drm_atomic_helper_connector_reset, |
836 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, | |
837 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, | |
dd55d44f HG |
838 | }; |
839 | ||
840 | static int vbox_connector_init(struct drm_device *dev, | |
841 | struct vbox_crtc *vbox_crtc, | |
842 | struct drm_encoder *encoder) | |
843 | { | |
844 | struct vbox_connector *vbox_connector; | |
845 | struct drm_connector *connector; | |
846 | ||
847 | vbox_connector = kzalloc(sizeof(*vbox_connector), GFP_KERNEL); | |
848 | if (!vbox_connector) | |
849 | return -ENOMEM; | |
850 | ||
851 | connector = &vbox_connector->base; | |
852 | vbox_connector->vbox_crtc = vbox_crtc; | |
853 | ||
854 | drm_connector_init(dev, connector, &vbox_connector_funcs, | |
855 | DRM_MODE_CONNECTOR_VGA); | |
856 | drm_connector_helper_add(connector, &vbox_connector_helper_funcs); | |
857 | ||
858 | connector->interlace_allowed = 0; | |
859 | connector->doublescan_allowed = 0; | |
860 | ||
861 | drm_mode_create_suggested_offset_properties(dev); | |
862 | drm_object_attach_property(&connector->base, | |
ce10d7b4 | 863 | dev->mode_config.suggested_x_property, 0); |
dd55d44f | 864 | drm_object_attach_property(&connector->base, |
ce10d7b4 | 865 | dev->mode_config.suggested_y_property, 0); |
dd55d44f | 866 | |
cde4c44d | 867 | drm_connector_attach_encoder(connector, encoder); |
dd55d44f HG |
868 | |
869 | return 0; | |
870 | } | |
871 | ||
79815ee2 HG |
872 | static struct drm_framebuffer *vbox_user_framebuffer_create( |
873 | struct drm_device *dev, | |
874 | struct drm_file *filp, | |
875 | const struct drm_mode_fb_cmd2 *mode_cmd) | |
876 | { | |
01648890 HG |
877 | struct vbox_private *vbox = |
878 | container_of(dev, struct vbox_private, ddev); | |
79815ee2 HG |
879 | struct drm_gem_object *obj; |
880 | struct vbox_framebuffer *vbox_fb; | |
881 | int ret = -ENOMEM; | |
882 | ||
883 | obj = drm_gem_object_lookup(filp, mode_cmd->handles[0]); | |
884 | if (!obj) | |
885 | return ERR_PTR(-ENOENT); | |
886 | ||
887 | vbox_fb = kzalloc(sizeof(*vbox_fb), GFP_KERNEL); | |
888 | if (!vbox_fb) | |
889 | goto err_unref_obj; | |
890 | ||
01648890 | 891 | ret = vbox_framebuffer_init(vbox, vbox_fb, mode_cmd, obj); |
79815ee2 HG |
892 | if (ret) |
893 | goto err_free_vbox_fb; | |
894 | ||
895 | return &vbox_fb->base; | |
896 | ||
897 | err_free_vbox_fb: | |
898 | kfree(vbox_fb); | |
899 | err_unref_obj: | |
900 | drm_gem_object_put_unlocked(obj); | |
901 | return ERR_PTR(ret); | |
902 | } | |
903 | ||
904 | static const struct drm_mode_config_funcs vbox_mode_funcs = { | |
905 | .fb_create = vbox_user_framebuffer_create, | |
438340aa HG |
906 | .atomic_check = drm_atomic_helper_check, |
907 | .atomic_commit = drm_atomic_helper_commit, | |
79815ee2 HG |
908 | }; |
909 | ||
01648890 | 910 | int vbox_mode_init(struct vbox_private *vbox) |
dd55d44f | 911 | { |
01648890 | 912 | struct drm_device *dev = &vbox->ddev; |
dd55d44f HG |
913 | struct drm_encoder *encoder; |
914 | struct vbox_crtc *vbox_crtc; | |
915 | unsigned int i; | |
916 | int ret; | |
917 | ||
79815ee2 HG |
918 | drm_mode_config_init(dev); |
919 | ||
920 | dev->mode_config.funcs = (void *)&vbox_mode_funcs; | |
35f3288c HG |
921 | dev->mode_config.min_width = 0; |
922 | dev->mode_config.min_height = 0; | |
79815ee2 HG |
923 | dev->mode_config.preferred_depth = 24; |
924 | dev->mode_config.max_width = VBE_DISPI_MAX_XRES; | |
925 | dev->mode_config.max_height = VBE_DISPI_MAX_YRES; | |
926 | ||
dd55d44f HG |
927 | for (i = 0; i < vbox->num_crtcs; ++i) { |
928 | vbox_crtc = vbox_crtc_init(dev, i); | |
cb5eaf18 HG |
929 | if (IS_ERR(vbox_crtc)) { |
930 | ret = PTR_ERR(vbox_crtc); | |
79815ee2 HG |
931 | goto err_drm_mode_cleanup; |
932 | } | |
dd55d44f | 933 | encoder = vbox_encoder_init(dev, i); |
79815ee2 HG |
934 | if (!encoder) { |
935 | ret = -ENOMEM; | |
936 | goto err_drm_mode_cleanup; | |
937 | } | |
dd55d44f HG |
938 | ret = vbox_connector_init(dev, vbox_crtc, encoder); |
939 | if (ret) | |
79815ee2 | 940 | goto err_drm_mode_cleanup; |
dd55d44f HG |
941 | } |
942 | ||
67e2f0c8 | 943 | drm_mode_config_reset(dev); |
dd55d44f | 944 | return 0; |
79815ee2 HG |
945 | |
946 | err_drm_mode_cleanup: | |
947 | drm_mode_config_cleanup(dev); | |
948 | return ret; | |
dd55d44f HG |
949 | } |
950 | ||
01648890 | 951 | void vbox_mode_fini(struct vbox_private *vbox) |
dd55d44f | 952 | { |
01648890 | 953 | drm_mode_config_cleanup(&vbox->ddev); |
dd55d44f | 954 | } |