[thirdparty/kernel/stable.git] / drivers / thermal / rcar_gen3_thermal.c

// SPDX-License-Identifier: GPL-2.0
/*
 *  R-Car Gen3 THS thermal sensor driver
 *  Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
 *
 * Copyright (C) 2016 Renesas Electronics Corporation.
 * Copyright (C) 2016 Sang Engineering
 */
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/spinlock.h>
#include <linux/sys_soc.h>
#include <linux/thermal.h>

#include "thermal_core.h"
#include "thermal_hwmon.h"

/* Register offsets */
#define REG_GEN3_IRQSTR		0x04
#define REG_GEN3_IRQMSK		0x08
#define REG_GEN3_IRQCTL		0x0C
#define REG_GEN3_IRQEN		0x10
#define REG_GEN3_IRQTEMP1	0x14
#define REG_GEN3_IRQTEMP2	0x18
#define REG_GEN3_IRQTEMP3	0x1C
#define REG_GEN3_CTSR		0x20
#define REG_GEN3_THCTR		0x20
#define REG_GEN3_TEMP		0x28
#define REG_GEN3_THCODE1	0x50
#define REG_GEN3_THCODE2	0x54
#define REG_GEN3_THCODE3	0x58

/* IRQ{STR,MSK,EN} bits */
#define IRQ_TEMP1		BIT(0)
#define IRQ_TEMP2		BIT(1)
#define IRQ_TEMP3		BIT(2)
#define IRQ_TEMPD1		BIT(3)
#define IRQ_TEMPD2		BIT(4)
#define IRQ_TEMPD3		BIT(5)

/* CTSR bits */
#define CTSR_PONM	BIT(8)
#define CTSR_AOUT	BIT(7)
#define CTSR_THBGR	BIT(5)
#define CTSR_VMEN	BIT(4)
#define CTSR_VMST	BIT(1)
#define CTSR_THSST	BIT(0)

/* THCTR bits */
#define THCTR_PONM	BIT(6)
#define THCTR_THSST	BIT(0)

#define CTEMP_MASK	0xFFF

#define MCELSIUS(temp)	((temp) * 1000)
#define GEN3_FUSE_MASK	0xFFF

#define TSC_MAX_NUM	3

/* Structure for thermal temperature calculation */
struct equation_coefs {
	int a1;
	int b1;
	int a2;
	int b2;
};

struct rcar_gen3_thermal_tsc {
	void __iomem *base;
	struct thermal_zone_device *zone;
	struct equation_coefs coef;
	int low;
	int high;
};

struct rcar_gen3_thermal_priv {
	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
	unsigned int num_tscs;
	spinlock_t lock; /* Protect interrupts on and off */
	void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
};

static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
					 u32 reg)
{
	return ioread32(tsc->base + reg);
}

static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
					   u32 reg, u32 data)
{
	iowrite32(data, tsc->base + reg);
}

/*
 * Linear approximation for temperature
 *
 * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
 *
 * The constants a and b are calculated using two triplets of int values PTAT
 * and THCODE. PTAT and THCODE can either be read from hardware or use hard
 * coded values from driver. The formula to calculate a and b are taken from
 * BSP and sparsely documented and understood.
 *
 * Examining the linear formula and the formula used to calculate constants a
 * and b while knowing that the span for PTAT and THCODE values are between
 * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
 * Integer also needs to be signed so that leaves 7 bits for binary
 * fixed point scaling.
 */

#define FIXPT_SHIFT 7
#define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
#define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
#define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
#define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)

#define RCAR3_THERMAL_GRAN 500 /* mili Celsius */

/* no idea where these constants come from */
#define TJ_1 116
#define TJ_3 -41

static void rcar_gen3_thermal_calc_coefs(struct equation_coefs *coef,
					 int *ptat, int *thcode)
{
	int tj_2;

	/* TODO: Find documentation and document constant calculation formula */

	/*
	 * Division is not scaled in BSP and if scaled it might overflow
	 * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
	 */
	tj_2 = (FIXPT_INT((ptat[1] - ptat[2]) * 157)
		/ (ptat[0] - ptat[2])) - FIXPT_INT(41);

	coef->a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
			     tj_2 - FIXPT_INT(TJ_3));
	coef->b1 = FIXPT_INT(thcode[2]) - coef->a1 * TJ_3;

	coef->a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
			     tj_2 - FIXPT_INT(TJ_1));
	coef->b2 = FIXPT_INT(thcode[0]) - coef->a2 * TJ_1;
}

static int rcar_gen3_thermal_round(int temp)
{
	int result, round_offs;

	round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
		-RCAR3_THERMAL_GRAN / 2;
	result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
	return result * RCAR3_THERMAL_GRAN;
}

static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
{
	struct rcar_gen3_thermal_tsc *tsc = devdata;
	int mcelsius, val1, val2;
	u32 reg;

	/* Read register and convert to mili Celsius */
	reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;

	val1 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, tsc->coef.a1);
	val2 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, tsc->coef.a2);
	mcelsius = FIXPT_TO_MCELSIUS((val1 + val2) / 2);

	/* Make sure we are inside specifications */
	if ((mcelsius < MCELSIUS(-40)) || (mcelsius > MCELSIUS(125)))
		return -EIO;

	/* Round value to device granularity setting */
	*temp = rcar_gen3_thermal_round(mcelsius);

	return 0;
}

static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
					      int mcelsius)
{
	int celsius, val1, val2;

	celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
	val1 = celsius * tsc->coef.a1 + tsc->coef.b1;
	val2 = celsius * tsc->coef.a2 + tsc->coef.b2;

	return INT_FIXPT((val1 + val2) / 2);
}

static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
{
	struct rcar_gen3_thermal_tsc *tsc = devdata;

	low = clamp_val(low, -40000, 120000);
	high = clamp_val(high, -40000, 120000);

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
				rcar_gen3_thermal_mcelsius_to_temp(tsc, low));

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
				rcar_gen3_thermal_mcelsius_to_temp(tsc, high));

	tsc->low = low;
	tsc->high = high;

	return 0;
}

static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
	.get_temp	= rcar_gen3_thermal_get_temp,
	.set_trips	= rcar_gen3_thermal_set_trips,
};

static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
{
	unsigned int i;
	u32 val = on ? IRQ_TEMPD1 | IRQ_TEMP2 : 0;

	for (i = 0; i < priv->num_tscs; i++)
		rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
}

static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
{
	struct rcar_gen3_thermal_priv *priv = data;
	u32 status;
	int i, ret = IRQ_HANDLED;

	spin_lock(&priv->lock);
	for (i = 0; i < priv->num_tscs; i++) {
		status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
		rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
		if (status)
			ret = IRQ_WAKE_THREAD;
	}

	if (ret == IRQ_WAKE_THREAD)
		rcar_thermal_irq_set(priv, false);

	spin_unlock(&priv->lock);

	return ret;
}

static irqreturn_t rcar_gen3_thermal_irq_thread(int irq, void *data)
{
	struct rcar_gen3_thermal_priv *priv = data;
	unsigned long flags;
	int i;

	for (i = 0; i < priv->num_tscs; i++)
		thermal_zone_device_update(priv->tscs[i]->zone,
					   THERMAL_EVENT_UNSPECIFIED);

	spin_lock_irqsave(&priv->lock, flags);
	rcar_thermal_irq_set(priv, true);
	spin_unlock_irqrestore(&priv->lock, flags);

	return IRQ_HANDLED;
}

static const struct soc_device_attribute r8a7795es1[] = {
	{ .soc_id = "r8a7795", .revision = "ES1.*" },
	{ /* sentinel */ }
};

static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
{
	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  CTSR_THBGR);
	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  0x0);

	usleep_range(1000, 2000);

	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);

	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
				CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);

	usleep_range(100, 200);

	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
				CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
				CTSR_VMST | CTSR_THSST);

	usleep_range(1000, 2000);
}

static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
{
	u32 reg_val;

	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	reg_val &= ~THCTR_PONM;
	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);

	usleep_range(1000, 2000);

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);

	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	reg_val |= THCTR_THSST;
	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);

	usleep_range(1000, 2000);
}

static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
	{ .compatible = "renesas,r8a774a1-thermal", },
	{ .compatible = "renesas,r8a7795-thermal", },
	{ .compatible = "renesas,r8a7796-thermal", },
	{ .compatible = "renesas,r8a77965-thermal", },
	{ .compatible = "renesas,r8a77980-thermal", },
	{},
};
MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);

static int rcar_gen3_thermal_remove(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;

	pm_runtime_put(dev);
	pm_runtime_disable(dev);

	return 0;
}

static void rcar_gen3_hwmon_action(void *data)
{
	struct thermal_zone_device *zone = data;

	thermal_remove_hwmon_sysfs(zone);
}

static int rcar_gen3_thermal_probe(struct platform_device *pdev)
{
	struct rcar_gen3_thermal_priv *priv;
	struct device *dev = &pdev->dev;
	struct resource *res;
	struct thermal_zone_device *zone;
	int ret, irq, i;
	char *irqname;

	/* default values if FUSEs are missing */
	/* TODO: Read values from hardware on supported platforms */
	int ptat[3] = { 2631, 1509, 435 };
	int thcode[TSC_MAX_NUM][3] = {
		{ 3397, 2800, 2221 },
		{ 3393, 2795, 2216 },
		{ 3389, 2805, 2237 },
	};

	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	if (!priv)
		return -ENOMEM;

	priv->thermal_init = rcar_gen3_thermal_init;
	if (soc_device_match(r8a7795es1))
		priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;

	spin_lock_init(&priv->lock);

	platform_set_drvdata(pdev, priv);

	/*
	 * Request 2 (of the 3 possible) IRQs, the driver only needs to
	 * to trigger on the low and high trip points of the current
	 * temp window at this point.
	 */
	for (i = 0; i < 2; i++) {
		irq = platform_get_irq(pdev, i);
		if (irq < 0)
			return irq;

		irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
					 dev_name(dev), i);
		if (!irqname)
			return -ENOMEM;

		ret = devm_request_threaded_irq(dev, irq, rcar_gen3_thermal_irq,
						rcar_gen3_thermal_irq_thread,
						IRQF_SHARED, irqname, priv);
		if (ret)
			return ret;
	}

	pm_runtime_enable(dev);
	pm_runtime_get_sync(dev);

	for (i = 0; i < TSC_MAX_NUM; i++) {
		struct rcar_gen3_thermal_tsc *tsc;

		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
		if (!res)
			break;

		tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
		if (!tsc) {
			ret = -ENOMEM;
			goto error_unregister;
		}

		tsc->base = devm_ioremap_resource(dev, res);
		if (IS_ERR(tsc->base)) {
			ret = PTR_ERR(tsc->base);
			goto error_unregister;
		}

		priv->tscs[i] = tsc;

		priv->thermal_init(tsc);
		rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);

		zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
							    &rcar_gen3_tz_of_ops);
		if (IS_ERR(zone)) {
			dev_err(dev, "Can't register thermal zone\n");
			ret = PTR_ERR(zone);
			goto error_unregister;
		}
		tsc->zone = zone;

		ret = of_thermal_get_ntrips(tsc->zone);
		if (ret < 0)
			goto error_unregister;

		tsc->zone->tzp->no_hwmon = false;
		ret = thermal_add_hwmon_sysfs(tsc->zone);
		if (ret)
			goto error_unregister;

		ret = devm_add_action(dev, rcar_gen3_hwmon_action, zone);
		if (ret) {
			rcar_gen3_hwmon_action(zone);
			goto error_unregister;
		}

		dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
	}

	priv->num_tscs = i;

	if (!priv->num_tscs) {
		ret = -ENODEV;
		goto error_unregister;
	}

	rcar_thermal_irq_set(priv, true);

	return 0;

error_unregister:
	rcar_gen3_thermal_remove(pdev);

	return ret;
}

static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
{
	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);

	rcar_thermal_irq_set(priv, false);

	return 0;
}

static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
{
	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
	unsigned int i;

	for (i = 0; i < priv->num_tscs; i++) {
		struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];

		priv->thermal_init(tsc);
		rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
	}

	rcar_thermal_irq_set(priv, true);

	return 0;
}

static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
			 rcar_gen3_thermal_resume);

static struct platform_driver rcar_gen3_thermal_driver = {
	.driver	= {
		.name	= "rcar_gen3_thermal",
		.pm = &rcar_gen3_thermal_pm_ops,
		.of_match_table = rcar_gen3_thermal_dt_ids,
	},
	.probe		= rcar_gen3_thermal_probe,
	.remove		= rcar_gen3_thermal_remove,
};
module_platform_driver(rcar_gen3_thermal_driver);

MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");
Commit	Line	Data
d316522d	1	// SPDX-License-Identifier: GPL-2.0
564e73d2 WS	2	/*
	3	* R-Car Gen3 THS thermal sensor driver
	4	* Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
	5	*
	6	* Copyright (C) 2016 Renesas Electronics Corporation.
	7	* Copyright (C) 2016 Sang Engineering
564e73d2 WS	8	*/
	9	#include <linux/delay.h>
	10	#include <linux/err.h>
	11	#include <linux/interrupt.h>
	12	#include <linux/io.h>
	13	#include <linux/module.h>
564e73d2 WS	14	#include <linux/of_device.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/pm_runtime.h>
7d4b2697	17	#include <linux/spinlock.h>
d668c807	18	#include <linux/sys_soc.h>
564e73d2 WS	19	#include <linux/thermal.h>
564e73d2 WS	20
7d4b2697	21	#include "thermal_core.h"
6269e9f7	22	#include "thermal_hwmon.h"
7d4b2697	23
564e73d2 WS	24	/* Register offsets */
	25	#define REG_GEN3_IRQSTR 0x04
	26	#define REG_GEN3_IRQMSK 0x08
	27	#define REG_GEN3_IRQCTL 0x0C
	28	#define REG_GEN3_IRQEN 0x10
	29	#define REG_GEN3_IRQTEMP1 0x14
	30	#define REG_GEN3_IRQTEMP2 0x18
	31	#define REG_GEN3_IRQTEMP3 0x1C
	32	#define REG_GEN3_CTSR 0x20
	33	#define REG_GEN3_THCTR 0x20
	34	#define REG_GEN3_TEMP 0x28
	35	#define REG_GEN3_THCODE1 0x50
	36	#define REG_GEN3_THCODE2 0x54
	37	#define REG_GEN3_THCODE3 0x58
	38
7d4b2697 NS	39	/* IRQ{STR,MSK,EN} bits */
	40	#define IRQ_TEMP1 BIT(0)
	41	#define IRQ_TEMP2 BIT(1)
	42	#define IRQ_TEMP3 BIT(2)
	43	#define IRQ_TEMPD1 BIT(3)
	44	#define IRQ_TEMPD2 BIT(4)
	45	#define IRQ_TEMPD3 BIT(5)
	46
564e73d2 WS	47	/* CTSR bits */
	48	#define CTSR_PONM BIT(8)
	49	#define CTSR_AOUT BIT(7)
	50	#define CTSR_THBGR BIT(5)
	51	#define CTSR_VMEN BIT(4)
	52	#define CTSR_VMST BIT(1)
	53	#define CTSR_THSST BIT(0)
	54
	55	/* THCTR bits */
	56	#define THCTR_PONM BIT(6)
	57	#define THCTR_THSST BIT(0)
	58
	59	#define CTEMP_MASK 0xFFF
	60
	61	#define MCELSIUS(temp) ((temp) * 1000)
	62	#define GEN3_FUSE_MASK 0xFFF
	63
	64	#define TSC_MAX_NUM 3
	65
	66	/* Structure for thermal temperature calculation */
	67	struct equation_coefs {
	68	int a1;
	69	int b1;
	70	int a2;
	71	int b2;
	72	};
	73
	74	struct rcar_gen3_thermal_tsc {
	75	void __iomem *base;
	76	struct thermal_zone_device *zone;
	77	struct equation_coefs coef;
75f78d6d NS	78	int low;
75f78d6d NS	79	int high;
564e73d2 WS	80	};
	81
	82	struct rcar_gen3_thermal_priv {
	83	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
97dad1f1	84	unsigned int num_tscs;
7d4b2697	85	spinlock_t lock; /* Protect interrupts on and off */
564e73d2 WS	86	void (thermal_init)(struct rcar_gen3_thermal_tsc tsc);
	87	};
	88
	89	static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
	90	u32 reg)
	91	{
	92	return ioread32(tsc->base + reg);
	93	}
	94
	95	static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
	96	u32 reg, u32 data)
	97	{
	98	iowrite32(data, tsc->base + reg);
	99	}
	100
	101	/*
	102	* Linear approximation for temperature
	103	*
	104	* [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
	105	*
	106	* The constants a and b are calculated using two triplets of int values PTAT
	107	* and THCODE. PTAT and THCODE can either be read from hardware or use hard
	108	* coded values from driver. The formula to calculate a and b are taken from
	109	* BSP and sparsely documented and understood.
	110	*
	111	* Examining the linear formula and the formula used to calculate constants a
	112	* and b while knowing that the span for PTAT and THCODE values are between
	113	* 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
	114	* Integer also needs to be signed so that leaves 7 bits for binary
	115	* fixed point scaling.
	116	*/
	117
	118	#define FIXPT_SHIFT 7
	119	#define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
7d4b2697	120	#define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
564e73d2 WS	121	#define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
	122	#define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
	123
	124	#define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
	125
	126	/* no idea where these constants come from */
fc66ddff	127	#define TJ_1 116
564e73d2 WS	128	#define TJ_3 -41
	129
	130	static void rcar_gen3_thermal_calc_coefs(struct equation_coefs *coef,
	131	int ptat, int thcode)
	132	{
	133	int tj_2;
	134
	135	/* TODO: Find documentation and document constant calculation formula */
	136
	137	/*
	138	* Division is not scaled in BSP and if scaled it might overflow
	139	* the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
	140	*/
fc66ddff	141	tj_2 = (FIXPT_INT((ptat[1] - ptat[2]) * 157)
564e73d2 WS	142	/ (ptat[0] - ptat[2])) - FIXPT_INT(41);
	143
	144	coef->a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
	145	tj_2 - FIXPT_INT(TJ_3));
	146	coef->b1 = FIXPT_INT(thcode[2]) - coef->a1 * TJ_3;
	147
	148	coef->a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
	149	tj_2 - FIXPT_INT(TJ_1));
	150	coef->b2 = FIXPT_INT(thcode[0]) - coef->a2 * TJ_1;
	151	}
	152
	153	static int rcar_gen3_thermal_round(int temp)
	154	{
	155	int result, round_offs;
	156
	157	round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
	158	-RCAR3_THERMAL_GRAN / 2;
	159	result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
	160	return result * RCAR3_THERMAL_GRAN;
	161	}
	162
	163	static int rcar_gen3_thermal_get_temp(void devdata, int temp)
	164	{
	165	struct rcar_gen3_thermal_tsc *tsc = devdata;
	166	int mcelsius, val1, val2;
	167	u32 reg;
	168
	169	/* Read register and convert to mili Celsius */
564e73d2 WS	170	reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
	171
	172	val1 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, tsc->coef.a1);
	173	val2 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, tsc->coef.a2);
	174	mcelsius = FIXPT_TO_MCELSIUS((val1 + val2) / 2);
	175
564e73d2 WS	176	/* Make sure we are inside specifications */
	177	if ((mcelsius < MCELSIUS(-40)) \|\| (mcelsius > MCELSIUS(125)))
	178	return -EIO;
	179
	180	/* Round value to device granularity setting */
	181	*temp = rcar_gen3_thermal_round(mcelsius);
	182
	183	return 0;
	184	}
	185
7d4b2697 NS	186	static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
	187	int mcelsius)
	188	{
	189	int celsius, val1, val2;
	190
	191	celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
	192	val1 = celsius * tsc->coef.a1 + tsc->coef.b1;
	193	val2 = celsius * tsc->coef.a2 + tsc->coef.b2;
	194
	195	return INT_FIXPT((val1 + val2) / 2);
	196	}
	197
	198	static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
	199	{
	200	struct rcar_gen3_thermal_tsc *tsc = devdata;
	201
270ba432 NS	202	low = clamp_val(low, -40000, 120000);
270ba432 NS	203	high = clamp_val(high, -40000, 120000);
7d4b2697 NS	204
	205	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
	206	rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
	207
	208	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
	209	rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
	210
75f78d6d NS	211	tsc->low = low;
	212	tsc->high = high;
	213
7d4b2697 NS	214	return 0;
	215	}
	216
a0def10b	217	static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
564e73d2	218	.get_temp = rcar_gen3_thermal_get_temp,
7d4b2697	219	.set_trips = rcar_gen3_thermal_set_trips,
564e73d2 WS	220	};
564e73d2 WS	221
7d4b2697 NS	222	static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
	223	{
	224	unsigned int i;
	225	u32 val = on ? IRQ_TEMPD1 \| IRQ_TEMP2 : 0;
	226
	227	for (i = 0; i < priv->num_tscs; i++)
	228	rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
	229	}
	230
	231	static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
	232	{
	233	struct rcar_gen3_thermal_priv *priv = data;
	234	u32 status;
	235	int i, ret = IRQ_HANDLED;
	236
	237	spin_lock(&priv->lock);
	238	for (i = 0; i < priv->num_tscs; i++) {
	239	status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
	240	rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
	241	if (status)
	242	ret = IRQ_WAKE_THREAD;
	243	}
	244
	245	if (ret == IRQ_WAKE_THREAD)
	246	rcar_thermal_irq_set(priv, false);
	247
	248	spin_unlock(&priv->lock);
	249
	250	return ret;
	251	}
	252
	253	static irqreturn_t rcar_gen3_thermal_irq_thread(int irq, void *data)
	254	{
	255	struct rcar_gen3_thermal_priv *priv = data;
	256	unsigned long flags;
	257	int i;
	258
	259	for (i = 0; i < priv->num_tscs; i++)
	260	thermal_zone_device_update(priv->tscs[i]->zone,
	261	THERMAL_EVENT_UNSPECIFIED);
	262
	263	spin_lock_irqsave(&priv->lock, flags);
	264	rcar_thermal_irq_set(priv, true);
	265	spin_unlock_irqrestore(&priv->lock, flags);
	266
	267	return IRQ_HANDLED;
	268	}
	269
d668c807 NS	270	static const struct soc_device_attribute r8a7795es1[] = {
	271	{ .soc_id = "r8a7795", .revision = "ES1.*" },
	272	{ /* sentinel */ }
	273	};
	274
	275	static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
564e73d2 WS	276	{
	277	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
	278	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
	279
	280	usleep_range(1000, 2000);
	281
	282	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
7d4b2697	283
564e73d2	284	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
7d4b2697 NS	285	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
	286	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 \| IRQ_TEMP2);
	287
564e73d2 WS	288	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
	289	CTSR_PONM \| CTSR_AOUT \| CTSR_THBGR \| CTSR_VMEN);
	290
	291	usleep_range(100, 200);
	292
	293	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
	294	CTSR_PONM \| CTSR_AOUT \| CTSR_THBGR \| CTSR_VMEN \|
	295	CTSR_VMST \| CTSR_THSST);
	296
	297	usleep_range(1000, 2000);
	298	}
	299
d668c807	300	static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
564e73d2 WS	301	{
	302	u32 reg_val;
	303
	304	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	305	reg_val &= ~THCTR_PONM;
	306	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
	307
	308	usleep_range(1000, 2000);
	309
	310	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
7d4b2697 NS	311	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
	312	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 \| IRQ_TEMP2);
	313
564e73d2 WS	314	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	315	reg_val \|= THCTR_THSST;
	316	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
78aefd2d NS	317
78aefd2d NS	318	usleep_range(1000, 2000);
564e73d2 WS	319	}
564e73d2 WS	320
564e73d2	321	static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
1d9e6cf3	322	{ .compatible = "renesas,r8a774a1-thermal", },
d668c807 NS	323	{ .compatible = "renesas,r8a7795-thermal", },
d668c807 NS	324	{ .compatible = "renesas,r8a7796-thermal", },
2e7db3ec	325	{ .compatible = "renesas,r8a77965-thermal", },
853cbc1f	326	{ .compatible = "renesas,r8a77980-thermal", },
564e73d2 WS	327	{},
	328	};
	329	MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
	330
	331	static int rcar_gen3_thermal_remove(struct platform_device *pdev)
	332	{
	333	struct device *dev = &pdev->dev;
	334
	335	pm_runtime_put(dev);
	336	pm_runtime_disable(dev);
	337
	338	return 0;
	339	}
	340
6269e9f7 MV	341	static void rcar_gen3_hwmon_action(void *data)
	342	{
	343	struct thermal_zone_device *zone = data;
	344
	345	thermal_remove_hwmon_sysfs(zone);
	346	}
	347
564e73d2 WS	348	static int rcar_gen3_thermal_probe(struct platform_device *pdev)
	349	{
	350	struct rcar_gen3_thermal_priv *priv;
	351	struct device *dev = &pdev->dev;
	352	struct resource *res;
	353	struct thermal_zone_device *zone;
7d4b2697 NS	354	int ret, irq, i;
7d4b2697 NS	355	char *irqname;
564e73d2 WS	356
	357	/* default values if FUSEs are missing */
	358	/* TODO: Read values from hardware on supported platforms */
fc66ddff	359	int ptat[3] = { 2631, 1509, 435 };
564e73d2	360	int thcode[TSC_MAX_NUM][3] = {
fc66ddff HD	361	{ 3397, 2800, 2221 },
	362	{ 3393, 2795, 2216 },
	363	{ 3389, 2805, 2237 },
564e73d2 WS	364	};
	365
	366	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	367	if (!priv)
	368	return -ENOMEM;
	369
d668c807 NS	370	priv->thermal_init = rcar_gen3_thermal_init;
	371	if (soc_device_match(r8a7795es1))
	372	priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
cc4d072b	373
7d4b2697 NS	374	spin_lock_init(&priv->lock);
7d4b2697 NS	375
564e73d2 WS	376	platform_set_drvdata(pdev, priv);
564e73d2 WS	377
7d4b2697 NS	378	/*
	379	* Request 2 (of the 3 possible) IRQs, the driver only needs to
	380	* to trigger on the low and high trip points of the current
	381	* temp window at this point.
	382	*/
	383	for (i = 0; i < 2; i++) {
	384	irq = platform_get_irq(pdev, i);
	385	if (irq < 0)
	386	return irq;
	387
	388	irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
	389	dev_name(dev), i);
	390	if (!irqname)
	391	return -ENOMEM;
	392
	393	ret = devm_request_threaded_irq(dev, irq, rcar_gen3_thermal_irq,
	394	rcar_gen3_thermal_irq_thread,
	395	IRQF_SHARED, irqname, priv);
	396	if (ret)
	397	return ret;
	398	}
	399
564e73d2 WS	400	pm_runtime_enable(dev);
	401	pm_runtime_get_sync(dev);
	402
	403	for (i = 0; i < TSC_MAX_NUM; i++) {
	404	struct rcar_gen3_thermal_tsc *tsc;
	405
d51546c0 NS	406	res = platform_get_resource(pdev, IORESOURCE_MEM, i);
	407	if (!res)
	408	break;
	409
564e73d2 WS	410	tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
	411	if (!tsc) {
	412	ret = -ENOMEM;
	413	goto error_unregister;
	414	}
	415
564e73d2 WS	416	tsc->base = devm_ioremap_resource(dev, res);
	417	if (IS_ERR(tsc->base)) {
	418	ret = PTR_ERR(tsc->base);
	419	goto error_unregister;
	420	}
	421
	422	priv->tscs[i] = tsc;
564e73d2	423
d668c807	424	priv->thermal_init(tsc);
564e73d2 WS	425	rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);
	426
	427	zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
	428	&rcar_gen3_tz_of_ops);
	429	if (IS_ERR(zone)) {
	430	dev_err(dev, "Can't register thermal zone\n");
	431	ret = PTR_ERR(zone);
	432	goto error_unregister;
	433	}
	434	tsc->zone = zone;
7d4b2697 NS	435
	436	ret = of_thermal_get_ntrips(tsc->zone);
	437	if (ret < 0)
	438	goto error_unregister;
	439
6269e9f7 MV	440	tsc->zone->tzp->no_hwmon = false;
	441	ret = thermal_add_hwmon_sysfs(tsc->zone);
	442	if (ret)
	443	goto error_unregister;
	444
	445	ret = devm_add_action(dev, rcar_gen3_hwmon_action, zone);
	446	if (ret) {
	447	rcar_gen3_hwmon_action(zone);
	448	goto error_unregister;
	449	}
	450
7d4b2697	451	dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
564e73d2 WS	452	}
564e73d2 WS	453
97dad1f1 NS	454	priv->num_tscs = i;
	455
	456	if (!priv->num_tscs) {
	457	ret = -ENODEV;
	458	goto error_unregister;
	459	}
	460
7d4b2697 NS	461	rcar_thermal_irq_set(priv, true);
7d4b2697 NS	462
564e73d2 WS	463	return 0;
	464
	465	error_unregister:
	466	rcar_gen3_thermal_remove(pdev);
	467
	468	return ret;
	469	}
	470
75f78d6d NS	471	static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
	472	{
	473	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
	474
	475	rcar_thermal_irq_set(priv, false);
	476
	477	return 0;
	478	}
	479
	480	static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
	481	{
	482	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
	483	unsigned int i;
	484
	485	for (i = 0; i < priv->num_tscs; i++) {
	486	struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
	487
d668c807	488	priv->thermal_init(tsc);
75f78d6d NS	489	rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
	490	}
	491
	492	rcar_thermal_irq_set(priv, true);
	493
	494	return 0;
	495	}
	496
	497	static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
	498	rcar_gen3_thermal_resume);
	499
564e73d2 WS	500	static struct platform_driver rcar_gen3_thermal_driver = {
	501	.driver = {
	502	.name = "rcar_gen3_thermal",
75f78d6d	503	.pm = &rcar_gen3_thermal_pm_ops,
564e73d2 WS	504	.of_match_table = rcar_gen3_thermal_dt_ids,
	505	},
	506	.probe = rcar_gen3_thermal_probe,
	507	.remove = rcar_gen3_thermal_remove,
	508	};
	509	module_platform_driver(rcar_gen3_thermal_driver);
	510
	511	MODULE_LICENSE("GPL v2");
	512	MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
	513	MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");