[people/ms/u-boot.git] / drivers / timer / altera_timer.c

/*
 * (C) Copyright 2000-2002
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
 * Scott McNutt <smcnutt@psyent.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <dm.h>
#include <errno.h>
#include <timer.h>
#include <asm/io.h>

DECLARE_GLOBAL_DATA_PTR;

/* control register */
#define ALTERA_TIMER_CONT	BIT(1)	/* Continuous mode */
#define ALTERA_TIMER_START	BIT(2)	/* Start timer */
#define ALTERA_TIMER_STOP	BIT(3)	/* Stop timer */

struct altera_timer_regs {
	u32	status;		/* Timer status reg */
	u32	control;	/* Timer control reg */
	u32	periodl;	/* Timeout period low */
	u32	periodh;	/* Timeout period high */
	u32	snapl;		/* Snapshot low */
	u32	snaph;		/* Snapshot high */
};

struct altera_timer_platdata {
	struct altera_timer_regs *regs;
};

static int altera_timer_get_count(struct udevice *dev, u64 *count)
{
	struct altera_timer_platdata *plat = dev->platdata;
	struct altera_timer_regs *const regs = plat->regs;
	u32 val;

	/* Trigger update */
	writel(0x0, &regs->snapl);

	/* Read timer value */
	val = readl(&regs->snapl) & 0xffff;
	val |= (readl(&regs->snaph) & 0xffff) << 16;
	*count = timer_conv_64(~val);

	return 0;
}

static int altera_timer_probe(struct udevice *dev)
{
	struct altera_timer_platdata *plat = dev->platdata;
	struct altera_timer_regs *const regs = plat->regs;

	writel(0, &regs->status);
	writel(0, &regs->control);
	writel(ALTERA_TIMER_STOP, &regs->control);

	writel(0xffff, &regs->periodl);
	writel(0xffff, &regs->periodh);
	writel(ALTERA_TIMER_CONT | ALTERA_TIMER_START, &regs->control);

	return 0;
}

static int altera_timer_ofdata_to_platdata(struct udevice *dev)
{
	struct altera_timer_platdata *plat = dev_get_platdata(dev);

	plat->regs = map_physmem(devfdt_get_addr(dev),
				 sizeof(struct altera_timer_regs),
				 MAP_NOCACHE);

	return 0;
}

static const struct timer_ops altera_timer_ops = {
	.get_count = altera_timer_get_count,
};

static const struct udevice_id altera_timer_ids[] = {
	{ .compatible = "altr,timer-1.0" },
	{}
};

U_BOOT_DRIVER(altera_timer) = {
	.name	= "altera_timer",
	.id	= UCLASS_TIMER,
	.of_match = altera_timer_ids,
	.ofdata_to_platdata = altera_timer_ofdata_to_platdata,
	.platdata_auto_alloc_size = sizeof(struct altera_timer_platdata),
	.probe = altera_timer_probe,
	.ops	= &altera_timer_ops,
	.flags = DM_FLAG_PRE_RELOC,
};
Commit	Line	Data
a54915d8 TC	1	/*
	2	* (C) Copyright 2000-2002
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
	5	* (C) Copyright 2004, Psyent Corporation <www.psyent.com>
	6	* Scott McNutt <smcnutt@psyent.com>
	7	*
	8	* SPDX-License-Identifier: GPL-2.0+
	9	*/
	10
	11	#include <common.h>
	12	#include <dm.h>
	13	#include <errno.h>
	14	#include <timer.h>
	15	#include <asm/io.h>
	16
	17	DECLARE_GLOBAL_DATA_PTR;
	18
1235e5a5 TC	19	/* control register */
	20	#define ALTERA_TIMER_CONT BIT(1) /* Continuous mode */
	21	#define ALTERA_TIMER_START BIT(2) /* Start timer */
	22	#define ALTERA_TIMER_STOP BIT(3) /* Stop timer */
	23
a54915d8 TC	24	struct altera_timer_regs {
	25	u32 status; /* Timer status reg */
	26	u32 control; /* Timer control reg */
	27	u32 periodl; /* Timeout period low */
	28	u32 periodh; /* Timeout period high */
	29	u32 snapl; /* Snapshot low */
	30	u32 snaph; /* Snapshot high */
	31	};
	32
	33	struct altera_timer_platdata {
	34	struct altera_timer_regs *regs;
a54915d8 TC	35	};
a54915d8 TC	36
9ca07ebb	37	static int altera_timer_get_count(struct udevice dev, u64 count)
a54915d8 TC	38	{
	39	struct altera_timer_platdata *plat = dev->platdata;
	40	struct altera_timer_regs *const regs = plat->regs;
	41	u32 val;
	42
	43	/* Trigger update */
	44	writel(0x0, &regs->snapl);
	45
	46	/* Read timer value */
	47	val = readl(&regs->snapl) & 0xffff;
	48	val \|= (readl(&regs->snaph) & 0xffff) << 16;
9ca07ebb	49	*count = timer_conv_64(~val);
a54915d8 TC	50
	51	return 0;
	52	}
	53
	54	static int altera_timer_probe(struct udevice *dev)
	55	{
a54915d8 TC	56	struct altera_timer_platdata *plat = dev->platdata;
	57	struct altera_timer_regs *const regs = plat->regs;
	58
a54915d8 TC	59	writel(0, &regs->status);
	60	writel(0, &regs->control);
	61	writel(ALTERA_TIMER_STOP, &regs->control);
	62
	63	writel(0xffff, &regs->periodl);
	64	writel(0xffff, &regs->periodh);
	65	writel(ALTERA_TIMER_CONT \| ALTERA_TIMER_START, &regs->control);
	66
	67	return 0;
	68	}
	69
	70	static int altera_timer_ofdata_to_platdata(struct udevice *dev)
	71	{
	72	struct altera_timer_platdata *plat = dev_get_platdata(dev);
	73
a821c4af	74	plat->regs = map_physmem(devfdt_get_addr(dev),
4c26ec17 TC	75	sizeof(struct altera_timer_regs),
4c26ec17 TC	76	MAP_NOCACHE);
a54915d8 TC	77
	78	return 0;
	79	}
	80
	81	static const struct timer_ops altera_timer_ops = {
	82	.get_count = altera_timer_get_count,
	83	};
	84
	85	static const struct udevice_id altera_timer_ids[] = {
1235e5a5 TC	86	{ .compatible = "altr,timer-1.0" },
1235e5a5 TC	87	{}
a54915d8 TC	88	};
	89
	90	U_BOOT_DRIVER(altera_timer) = {
	91	.name = "altera_timer",
	92	.id = UCLASS_TIMER,
	93	.of_match = altera_timer_ids,
	94	.ofdata_to_platdata = altera_timer_ofdata_to_platdata,
	95	.platdata_auto_alloc_size = sizeof(struct altera_timer_platdata),
	96	.probe = altera_timer_probe,
	97	.ops = &altera_timer_ops,
	98	.flags = DM_FLAG_PRE_RELOC,
	99	};