[people/ms/u-boot.git] / drivers / timer / timer-uclass.c

/*
 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <dm.h>
#include <dm/lists.h>
#include <dm/device-internal.h>
#include <errno.h>
#include <timer.h>

DECLARE_GLOBAL_DATA_PTR;

/*
 * Implement a timer uclass to work with lib/time.c. The timer is usually
 * a 32/64 bits free-running up counter. The get_rate() method is used to get
 * the input clock frequency of the timer. The get_count() method is used
 * to get the current 64 bits count value. If the hardware is counting down,
 * the value should be inversed inside the method. There may be no real
 * tick, and no timer interrupt.
 */

int notrace timer_get_count(struct udevice *dev, u64 *count)
{
	const struct timer_ops *ops = device_get_ops(dev);

	if (!ops->get_count)
		return -ENOSYS;

	return ops->get_count(dev, count);
}

unsigned long notrace timer_get_rate(struct udevice *dev)
{
	struct timer_dev_priv *uc_priv = dev->uclass_priv;

	return uc_priv->clock_rate;
}

static int timer_pre_probe(struct udevice *dev)
{
	struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);

	uc_priv->clock_rate = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
					     "clock-frequency", 0);

	return 0;
}

static int timer_post_probe(struct udevice *dev)
{
	struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);

	if (!uc_priv->clock_rate)
		return -EINVAL;

	return 0;
}

u64 timer_conv_64(u32 count)
{
	/* increment tbh if tbl has rolled over */
	if (count < gd->timebase_l)
		gd->timebase_h++;
	gd->timebase_l = count;
	return ((u64)gd->timebase_h << 32) | gd->timebase_l;
}

int notrace dm_timer_init(void)
{
	const void *blob = gd->fdt_blob;
	struct udevice *dev = NULL;
	int node;
	int ret;

	if (gd->timer)
		return 0;

	/* Check for a chosen timer to be used for tick */
	node = fdtdec_get_chosen_node(blob, "tick-timer");
	if (node < 0) {
		/* No chosen timer, trying first available timer */
		ret = uclass_first_device_err(UCLASS_TIMER, &dev);
		if (ret)
			return ret;
	} else {
		if (uclass_get_device_by_of_offset(UCLASS_TIMER, node, &dev)) {
			/*
			 * If the timer is not marked to be bound before
			 * relocation, bind it anyway.
			 */
			if (node > 0 &&
			    !lists_bind_fdt(gd->dm_root, blob, node, &dev)) {
				ret = device_probe(dev);
				if (ret)
					return ret;
			}
		}
	}

	if (dev) {
		gd->timer = dev;
		return 0;
	}

	return -ENODEV;
}

UCLASS_DRIVER(timer) = {
	.id		= UCLASS_TIMER,
	.name		= "timer",
	.pre_probe	= timer_pre_probe,
	.flags		= DM_UC_FLAG_SEQ_ALIAS,
	.post_probe	= timer_post_probe,
	.per_device_auto_alloc_size = sizeof(struct timer_dev_priv),
};
Commit	Line	Data
c8a7ba9e TC	1	/*
	2	* Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#include <common.h>
	8	#include <dm.h>
c8336975 M	9	#include <dm/lists.h>
c8336975 M	10	#include <dm/device-internal.h>
c8a7ba9e TC	11	#include <errno.h>
	12	#include <timer.h>
	13
579eb5a0 BM	14	DECLARE_GLOBAL_DATA_PTR;
579eb5a0 BM	15
c8a7ba9e	16	/*
435ae76e	17	* Implement a timer uclass to work with lib/time.c. The timer is usually
9ca07ebb	18	* a 32/64 bits free-running up counter. The get_rate() method is used to get
c8a7ba9e	19	* the input clock frequency of the timer. The get_count() method is used
9ca07ebb	20	* to get the current 64 bits count value. If the hardware is counting down,
c8a7ba9e TC	21	* the value should be inversed inside the method. There may be no real
	22	* tick, and no timer interrupt.
	23	*/
	24
4f051824	25	int notrace timer_get_count(struct udevice dev, u64 count)
c8a7ba9e TC	26	{
	27	const struct timer_ops *ops = device_get_ops(dev);
	28
	29	if (!ops->get_count)
	30	return -ENOSYS;
	31
	32	return ops->get_count(dev, count);
	33	}
	34
4f051824	35	unsigned long notrace timer_get_rate(struct udevice *dev)
c8a7ba9e	36	{
4f051824	37	struct timer_dev_priv *uc_priv = dev->uclass_priv;
c8a7ba9e TC	38
	39	return uc_priv->clock_rate;
	40	}
	41
579eb5a0 BM	42	static int timer_pre_probe(struct udevice *dev)
	43	{
	44	struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
	45
	46	uc_priv->clock_rate = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
	47	"clock-frequency", 0);
	48
	49	return 0;
	50	}
	51
0a7edce0 SW	52	static int timer_post_probe(struct udevice *dev)
	53	{
	54	struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
	55
	56	if (!uc_priv->clock_rate)
	57	return -EINVAL;
	58
	59	return 0;
	60	}
	61
9ca07ebb BM	62	u64 timer_conv_64(u32 count)
	63	{
	64	/* increment tbh if tbl has rolled over */
	65	if (count < gd->timebase_l)
	66	gd->timebase_h++;
	67	gd->timebase_l = count;
	68	return ((u64)gd->timebase_h << 32) \| gd->timebase_l;
	69	}
	70
c8336975 M	71	int notrace dm_timer_init(void)
	72	{
	73	const void *blob = gd->fdt_blob;
	74	struct udevice *dev = NULL;
	75	int node;
	76	int ret;
	77
	78	if (gd->timer)
	79	return 0;
	80
	81	/* Check for a chosen timer to be used for tick */
	82	node = fdtdec_get_chosen_node(blob, "tick-timer");
	83	if (node < 0) {
	84	/* No chosen timer, trying first available timer */
3f603cbb	85	ret = uclass_first_device_err(UCLASS_TIMER, &dev);
c8336975 M	86	if (ret)
c8336975 M	87	return ret;
c8336975 M	88	} else {
	89	if (uclass_get_device_by_of_offset(UCLASS_TIMER, node, &dev)) {
	90	/*
	91	* If the timer is not marked to be bound before
	92	* relocation, bind it anyway.
	93	*/
	94	if (node > 0 &&
	95	!lists_bind_fdt(gd->dm_root, blob, node, &dev)) {
	96	ret = device_probe(dev);
	97	if (ret)
	98	return ret;
	99	}
	100	}
	101	}
	102
	103	if (dev) {
	104	gd->timer = dev;
	105	return 0;
	106	}
	107
	108	return -ENODEV;
	109	}
	110
c8a7ba9e TC	111	UCLASS_DRIVER(timer) = {
	112	.id = UCLASS_TIMER,
	113	.name = "timer",
579eb5a0	114	.pre_probe = timer_pre_probe,
a5d80113	115	.flags = DM_UC_FLAG_SEQ_ALIAS,
0a7edce0	116	.post_probe = timer_post_probe,
c8a7ba9e TC	117	.per_device_auto_alloc_size = sizeof(struct timer_dev_priv),
c8a7ba9e TC	118	};