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CommitLineData
f6267998
RC
1/*
2 * Copyright (C) 2011 Infineon Technologies
3 *
4 * Authors:
5 * Peter Huewe <huewe.external@infineon.com>
6 *
7 * Description:
8 * Device driver for TCG/TCPA TPM (trusted platform module).
9 * Specifications at www.trustedcomputinggroup.org
10 *
11 * This device driver implements the TPM interface as defined in
12 * the TCG TPM Interface Spec version 1.2, revision 1.0 and the
13 * Infineon I2C Protocol Stack Specification v0.20.
14 *
15 * It is based on the Linux kernel driver tpm.c from Leendert van
16 * Dorn, Dave Safford, Reiner Sailer, and Kyleen Hall.
17 *
18 * Version: 2.1.1
19 *
20 * See file CREDITS for list of people who contributed to this
21 * project.
22 *
23 * This program is free software; you can redistribute it and/or
24 * modify it under the terms of the GNU General Public License as
25 * published by the Free Software Foundation, version 2 of the
26 * License.
27 *
28 * This program is distributed in the hope that it will be useful,
29 * but WITHOUT ANY WARRANTY; without even the implied warranty of
30 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
31 * GNU General Public License for more details.
32 *
33 * You should have received a copy of the GNU General Public License
34 * along with this program; if not, write to the Free Software
35 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
36 * MA 02111-1307 USA
37 */
38
39#include <common.h>
f90acf1a 40#include <dm.h>
ec34fa5e 41#include <fdtdec.h>
afc366f0 42#include <linux/compiler.h>
f6267998 43#include <i2c.h>
1b393db5
TWHT
44#include <tpm.h>
45#include <asm-generic/errno.h>
f6267998 46#include <linux/types.h>
1b393db5 47#include <linux/unaligned/be_byteshift.h>
f6267998 48
1b393db5 49#include "tpm_private.h"
f6267998 50
ec34fa5e
VP
51DECLARE_GLOBAL_DATA_PTR;
52
f6267998 53/* Address of the TPM on the I2C bus */
1b393db5
TWHT
54#define TPM_I2C_ADDR 0x20
55
56/* Max buffer size supported by our tpm */
57#define TPM_DEV_BUFSIZE 1260
f6267998 58
1b393db5
TWHT
59/* Max number of iterations after i2c NAK */
60#define MAX_COUNT 3
f6267998 61
1b393db5
TWHT
62/*
63 * Max number of iterations after i2c NAK for 'long' commands
64 *
65 * We need this especially for sending TPM_READY, since the cleanup after the
f6267998
RC
66 * transtion to the ready state may take some time, but it is unpredictable
67 * how long it will take.
68 */
1b393db5
TWHT
69#define MAX_COUNT_LONG 50
70
71#define SLEEP_DURATION 60 /* in usec */
72#define SLEEP_DURATION_LONG 210 /* in usec */
73
74#define TPM_HEADER_SIZE 10
75
76/*
77 * Expected value for DIDVID register
78 *
79 * The only device the system knows about at this moment is Infineon slb9635.
80 */
81#define TPM_TIS_I2C_DID_VID 0x000b15d1L
82
83enum tis_access {
84 TPM_ACCESS_VALID = 0x80,
85 TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
86 TPM_ACCESS_REQUEST_PENDING = 0x04,
87 TPM_ACCESS_REQUEST_USE = 0x02,
88};
89
90enum tis_status {
91 TPM_STS_VALID = 0x80,
92 TPM_STS_COMMAND_READY = 0x40,
93 TPM_STS_GO = 0x20,
94 TPM_STS_DATA_AVAIL = 0x10,
95 TPM_STS_DATA_EXPECT = 0x08,
96};
f6267998 97
1b393db5
TWHT
98enum tis_defaults {
99 TIS_SHORT_TIMEOUT = 750, /* ms */
100 TIS_LONG_TIMEOUT = 2000, /* ms */
101};
f6267998
RC
102
103/* expected value for DIDVID register */
ec34fa5e
VP
104#define TPM_TIS_I2C_DID_VID_9635 0x000b15d1L
105#define TPM_TIS_I2C_DID_VID_9645 0x001a15d1L
106
107enum i2c_chip_type {
108 SLB9635,
109 SLB9645,
110 UNKNOWN,
111};
112
113static const char * const chip_name[] = {
114 [SLB9635] = "slb9635tt",
115 [SLB9645] = "slb9645tt",
116 [UNKNOWN] = "unknown/fallback to slb9635",
117};
f6267998 118
1b393db5
TWHT
119#define TPM_ACCESS(l) (0x0000 | ((l) << 4))
120#define TPM_STS(l) (0x0001 | ((l) << 4))
121#define TPM_DATA_FIFO(l) (0x0005 | ((l) << 4))
122#define TPM_DID_VID(l) (0x0006 | ((l) << 4))
123
f6267998 124/* Structure to store I2C TPM specific stuff */
1b393db5 125struct tpm_dev {
f90acf1a
SG
126#ifdef CONFIG_DM_I2C
127 struct udevice *dev;
128#else
f6267998 129 uint addr;
f90acf1a 130#endif
1b393db5 131 u8 buf[TPM_DEV_BUFSIZE + sizeof(u8)]; /* Max buffer size + addr */
ec34fa5e 132 enum i2c_chip_type chip_type;
f6267998
RC
133};
134
1b393db5 135static struct tpm_dev tpm_dev = {
f90acf1a 136#ifndef CONFIG_DM_I2C
f6267998 137 .addr = TPM_I2C_ADDR
f90acf1a 138#endif
f6267998
RC
139};
140
1b393db5
TWHT
141static struct tpm_dev tpm_dev;
142
f6267998
RC
143/*
144 * iic_tpm_read() - read from TPM register
145 * @addr: register address to read from
146 * @buffer: provided by caller
147 * @len: number of bytes to read
148 *
149 * Read len bytes from TPM register and put them into
150 * buffer (little-endian format, i.e. first byte is put into buffer[0]).
151 *
152 * NOTE: TPM is big-endian for multi-byte values. Multi-byte
153 * values have to be swapped.
154 *
155 * Return -EIO on error, 0 on success.
156 */
1b393db5 157static int iic_tpm_read(u8 addr, u8 *buffer, size_t len)
f6267998
RC
158{
159 int rc;
160 int count;
1b393db5 161 uint32_t addrbuf = addr;
f6267998 162
ec34fa5e
VP
163 if ((tpm_dev.chip_type == SLB9635) || (tpm_dev.chip_type == UNKNOWN)) {
164 /* slb9635 protocol should work in both cases */
165 for (count = 0; count < MAX_COUNT; count++) {
f90acf1a
SG
166#ifdef CONFIG_DM_I2C
167 rc = dm_i2c_write(tpm_dev.dev, 0, (uchar *)&addrbuf, 1);
168#else
ec34fa5e 169 rc = i2c_write(tpm_dev.addr, 0, 0,
1b393db5 170 (uchar *)&addrbuf, 1);
f90acf1a 171#endif
ec34fa5e 172 if (rc == 0)
1b393db5 173 break; /* Success, break to skip sleep */
ec34fa5e
VP
174 udelay(SLEEP_DURATION);
175 }
ec34fa5e
VP
176 if (rc)
177 return -rc;
178
179 /* After the TPM has successfully received the register address
180 * it needs some time, thus we're sleeping here again, before
181 * retrieving the data
182 */
183 for (count = 0; count < MAX_COUNT; count++) {
184 udelay(SLEEP_DURATION);
f90acf1a
SG
185#ifdef CONFIG_DM_I2C
186 rc = dm_i2c_read(tpm_dev.dev, 0, buffer, len);
187#else
ec34fa5e 188 rc = i2c_read(tpm_dev.addr, 0, 0, buffer, len);
f90acf1a 189#endif
ec34fa5e
VP
190 if (rc == 0)
191 break; /* success, break to skip sleep */
192 }
193 } else {
1b393db5
TWHT
194 /*
195 * Use a combined read for newer chips.
196 * Unfortunately the smbus functions are not suitable due to
ec34fa5e 197 * the 32 byte limit of the smbus.
1b393db5 198 * Retries should usually not be needed, but are kept just to
ec34fa5e
VP
199 * be safe on the safe side.
200 */
201 for (count = 0; count < MAX_COUNT; count++) {
f90acf1a
SG
202#ifdef CONFIG_DM_I2C
203 rc = dm_i2c_read(tpm_dev.dev, addr, buffer, len);
204#else
ec34fa5e 205 rc = i2c_read(tpm_dev.addr, addr, 1, buffer, len);
f90acf1a 206#endif
ec34fa5e
VP
207 if (rc == 0)
208 break; /* break here to skip sleep */
209 udelay(SLEEP_DURATION);
210 }
f6267998
RC
211 }
212
1b393db5 213 /* Take care of 'guard time' */
ec34fa5e 214 udelay(SLEEP_DURATION);
f6267998
RC
215 if (rc)
216 return -rc;
217
218 return 0;
219}
220
221static int iic_tpm_write_generic(u8 addr, u8 *buffer, size_t len,
1b393db5 222 unsigned int sleep_time, u8 max_count)
f6267998
RC
223{
224 int rc = 0;
225 int count;
226
1b393db5 227 /* Prepare send buffer */
f90acf1a 228#ifndef CONFIG_DM_I2C
f6267998
RC
229 tpm_dev.buf[0] = addr;
230 memcpy(&(tpm_dev.buf[1]), buffer, len);
f90acf1a
SG
231 buffer = tpm_dev.buf;
232 len++;
233#endif
f6267998
RC
234
235 for (count = 0; count < max_count; count++) {
f90acf1a
SG
236#ifdef CONFIG_DM_I2C
237 rc = dm_i2c_write(tpm_dev.dev, addr, buffer, len);
238#else
239 rc = i2c_write(tpm_dev.addr, 0, 0, buffer, len);
240#endif
f6267998 241 if (rc == 0)
1b393db5 242 break; /* Success, break to skip sleep */
f6267998
RC
243 udelay(sleep_time);
244 }
245
ec34fa5e 246 /* take care of 'guard time' */
f90acf1a 247 udelay(sleep_time);
f6267998
RC
248 if (rc)
249 return -rc;
250
251 return 0;
252}
253
254/*
255 * iic_tpm_write() - write to TPM register
256 * @addr: register address to write to
257 * @buffer: containing data to be written
258 * @len: number of bytes to write
259 *
260 * Write len bytes from provided buffer to TPM register (little
261 * endian format, i.e. buffer[0] is written as first byte).
262 *
263 * NOTE: TPM is big-endian for multi-byte values. Multi-byte
264 * values have to be swapped.
265 *
266 * NOTE: use this function instead of the iic_tpm_write_generic function.
267 *
268 * Return -EIO on error, 0 on success
269 */
270static int iic_tpm_write(u8 addr, u8 *buffer, size_t len)
271{
272 return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION,
273 MAX_COUNT);
274}
275
276/*
277 * This function is needed especially for the cleanup situation after
278 * sending TPM_READY
1b393db5 279 */
f6267998
RC
280static int iic_tpm_write_long(u8 addr, u8 *buffer, size_t len)
281{
282 return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION_LONG,
283 MAX_COUNT_LONG);
284}
285
f6267998
RC
286static int check_locality(struct tpm_chip *chip, int loc)
287{
1b393db5 288 const u8 mask = TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID;
f6267998
RC
289 u8 buf;
290 int rc;
291
292 rc = iic_tpm_read(TPM_ACCESS(loc), &buf, 1);
293 if (rc < 0)
294 return rc;
295
1b393db5 296 if ((buf & mask) == mask) {
f6267998
RC
297 chip->vendor.locality = loc;
298 return loc;
299 }
300
301 return -1;
302}
303
304static void release_locality(struct tpm_chip *chip, int loc, int force)
305{
1b393db5 306 const u8 mask = TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID;
f6267998 307 u8 buf;
1b393db5 308
f6267998
RC
309 if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0)
310 return;
311
1b393db5 312 if (force || (buf & mask) == mask) {
f6267998
RC
313 buf = TPM_ACCESS_ACTIVE_LOCALITY;
314 iic_tpm_write(TPM_ACCESS(loc), &buf, 1);
315 }
316}
317
318static int request_locality(struct tpm_chip *chip, int loc)
319{
320 unsigned long start, stop;
321 u8 buf = TPM_ACCESS_REQUEST_USE;
f90acf1a 322 int rc;
f6267998
RC
323
324 if (check_locality(chip, loc) >= 0)
1b393db5 325 return loc; /* We already have the locality */
f6267998 326
f90acf1a
SG
327 rc = iic_tpm_write(TPM_ACCESS(loc), &buf, 1);
328 if (rc)
329 return rc;
f6267998 330
1b393db5 331 /* Wait for burstcount */
f6267998
RC
332 start = get_timer(0);
333 stop = chip->vendor.timeout_a;
334 do {
335 if (check_locality(chip, loc) >= 0)
336 return loc;
1b393db5 337 udelay(TPM_TIMEOUT * 1000);
f6267998
RC
338 } while (get_timer(start) < stop);
339
340 return -1;
341}
342
343static u8 tpm_tis_i2c_status(struct tpm_chip *chip)
344{
1b393db5 345 /* NOTE: Since i2c read may fail, return 0 in this case --> time-out */
f6267998 346 u8 buf;
1b393db5 347
f6267998
RC
348 if (iic_tpm_read(TPM_STS(chip->vendor.locality), &buf, 1) < 0)
349 return 0;
350 else
351 return buf;
352}
353
354static void tpm_tis_i2c_ready(struct tpm_chip *chip)
355{
f90acf1a
SG
356 int rc;
357
1b393db5 358 /* This causes the current command to be aborted */
f6267998 359 u8 buf = TPM_STS_COMMAND_READY;
1b393db5 360
f90acf1a
SG
361 debug("%s\n", __func__);
362 rc = iic_tpm_write_long(TPM_STS(chip->vendor.locality), &buf, 1);
363 if (rc)
364 debug("%s: rc=%d\n", __func__, rc);
f6267998
RC
365}
366
367static ssize_t get_burstcount(struct tpm_chip *chip)
368{
369 unsigned long start, stop;
370 ssize_t burstcnt;
1b393db5 371 u8 addr, buf[3];
f6267998 372
1b393db5
TWHT
373 /* Wait for burstcount */
374 /* XXX: Which timeout value? Spec has 2 answers (c & d) */
f6267998
RC
375 start = get_timer(0);
376 stop = chip->vendor.timeout_d;
377 do {
378 /* Note: STS is little endian */
1b393db5
TWHT
379 addr = TPM_STS(chip->vendor.locality) + 1;
380 if (iic_tpm_read(addr, buf, 3) < 0)
f6267998
RC
381 burstcnt = 0;
382 else
383 burstcnt = (buf[2] << 16) + (buf[1] << 8) + buf[0];
384
385 if (burstcnt)
386 return burstcnt;
1b393db5 387 udelay(TPM_TIMEOUT * 1000);
f6267998
RC
388 } while (get_timer(start) < stop);
389
390 return -EBUSY;
391}
392
393static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout,
1b393db5 394 int *status)
f6267998
RC
395{
396 unsigned long start, stop;
397
1b393db5 398 /* Check current status */
f6267998
RC
399 *status = tpm_tis_i2c_status(chip);
400 if ((*status & mask) == mask)
401 return 0;
402
403 start = get_timer(0);
404 stop = timeout;
405 do {
1b393db5 406 udelay(TPM_TIMEOUT * 1000);
f6267998
RC
407 *status = tpm_tis_i2c_status(chip);
408 if ((*status & mask) == mask)
409 return 0;
f6267998
RC
410 } while (get_timer(start) < stop);
411
412 return -ETIME;
413}
414
415static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
416{
417 size_t size = 0;
418 ssize_t burstcnt;
419 int rc;
420
421 while (size < count) {
422 burstcnt = get_burstcount(chip);
423
1b393db5 424 /* burstcount < 0 -> tpm is busy */
f6267998
RC
425 if (burstcnt < 0)
426 return burstcnt;
427
1b393db5 428 /* Limit received data to max left */
f6267998
RC
429 if (burstcnt > (count - size))
430 burstcnt = count - size;
431
432 rc = iic_tpm_read(TPM_DATA_FIFO(chip->vendor.locality),
1b393db5 433 &(buf[size]), burstcnt);
f6267998
RC
434 if (rc == 0)
435 size += burstcnt;
436 }
437
438 return size;
439}
440
441static int tpm_tis_i2c_recv(struct tpm_chip *chip, u8 *buf, size_t count)
442{
443 int size = 0;
444 int expected, status;
445
446 if (count < TPM_HEADER_SIZE) {
447 size = -EIO;
448 goto out;
449 }
450
1b393db5 451 /* Read first 10 bytes, including tag, paramsize, and result */
f6267998
RC
452 size = recv_data(chip, buf, TPM_HEADER_SIZE);
453 if (size < TPM_HEADER_SIZE) {
1b393db5 454 error("Unable to read header\n");
f6267998
RC
455 goto out;
456 }
457
458 expected = get_unaligned_be32(buf + TPM_RSP_SIZE_BYTE);
459 if ((size_t)expected > count) {
f90acf1a
SG
460 error("Error size=%x, expected=%x, count=%x\n", size, expected,
461 count);
f6267998
RC
462 size = -EIO;
463 goto out;
464 }
465
466 size += recv_data(chip, &buf[TPM_HEADER_SIZE],
1b393db5 467 expected - TPM_HEADER_SIZE);
f6267998 468 if (size < expected) {
1b393db5 469 error("Unable to read remainder of result\n");
f6267998
RC
470 size = -ETIME;
471 goto out;
472 }
473
474 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, &status);
1b393db5
TWHT
475 if (status & TPM_STS_DATA_AVAIL) { /* Retry? */
476 error("Error left over data\n");
f6267998
RC
477 size = -EIO;
478 goto out;
479 }
480
481out:
482 tpm_tis_i2c_ready(chip);
1b393db5
TWHT
483 /*
484 * The TPM needs some time to clean up here,
f6267998
RC
485 * so we sleep rather than keeping the bus busy
486 */
487 udelay(2000);
488 release_locality(chip, chip->vendor.locality, 0);
489
490 return size;
491}
492
493static int tpm_tis_i2c_send(struct tpm_chip *chip, u8 *buf, size_t len)
494{
495 int rc, status;
f90acf1a 496 size_t burstcnt;
f6267998 497 size_t count = 0;
1b393db5 498 int retry = 0;
f6267998
RC
499 u8 sts = TPM_STS_GO;
500
f90acf1a 501 debug("%s: len=%d\n", __func__, len);
1b393db5
TWHT
502 if (len > TPM_DEV_BUFSIZE)
503 return -E2BIG; /* Command is too long for our tpm, sorry */
f6267998
RC
504
505 if (request_locality(chip, 0) < 0)
506 return -EBUSY;
507
508 status = tpm_tis_i2c_status(chip);
509 if ((status & TPM_STS_COMMAND_READY) == 0) {
510 tpm_tis_i2c_ready(chip);
1b393db5
TWHT
511 if (wait_for_stat(chip, TPM_STS_COMMAND_READY,
512 chip->vendor.timeout_b, &status) < 0) {
f6267998
RC
513 rc = -ETIME;
514 goto out_err;
515 }
516 }
517
1b393db5 518 burstcnt = get_burstcount(chip);
f6267998 519
1b393db5
TWHT
520 /* burstcount < 0 -> tpm is busy */
521 if (burstcnt < 0)
522 return burstcnt;
f6267998 523
f90acf1a
SG
524 while (count < len) {
525 udelay(300);
526 if (burstcnt > len - count)
527 burstcnt = len - count;
f6267998 528
1b393db5
TWHT
529#ifdef CONFIG_TPM_TIS_I2C_BURST_LIMITATION
530 if (retry && burstcnt > CONFIG_TPM_TIS_I2C_BURST_LIMITATION)
531 burstcnt = CONFIG_TPM_TIS_I2C_BURST_LIMITATION;
532#endif /* CONFIG_TPM_TIS_I2C_BURST_LIMITATION */
f6267998
RC
533
534 rc = iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality),
1b393db5 535 &(buf[count]), burstcnt);
f6267998
RC
536 if (rc == 0)
537 count += burstcnt;
1b393db5 538 else {
f90acf1a
SG
539 debug("%s: error\n", __func__);
540 if (retry++ > 10) {
541 rc = -EIO;
542 goto out_err;
543 }
544 rc = wait_for_stat(chip, TPM_STS_VALID,
545 chip->vendor.timeout_c, &status);
546 if (rc)
547 goto out_err;
1b393db5
TWHT
548
549 if ((status & TPM_STS_DATA_EXPECT) == 0) {
550 rc = -EIO;
551 goto out_err;
552 }
f6267998
RC
553 }
554 }
555
1b393db5 556 /* Go and do it */
f6267998 557 iic_tpm_write(TPM_STS(chip->vendor.locality), &sts, 1);
f90acf1a 558 debug("done\n");
f6267998
RC
559
560 return len;
1b393db5 561
f6267998 562out_err:
f90acf1a 563 debug("%s: out_err\n", __func__);
f6267998 564 tpm_tis_i2c_ready(chip);
1b393db5
TWHT
565 /*
566 * The TPM needs some time to clean up here,
f6267998
RC
567 * so we sleep rather than keeping the bus busy
568 */
569 udelay(2000);
570 release_locality(chip, chip->vendor.locality, 0);
571
572 return rc;
573}
574
575static struct tpm_vendor_specific tpm_tis_i2c = {
576 .status = tpm_tis_i2c_status,
577 .recv = tpm_tis_i2c_recv,
578 .send = tpm_tis_i2c_send,
579 .cancel = tpm_tis_i2c_ready,
580 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
581 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
582 .req_canceled = TPM_STS_COMMAND_READY,
583};
584
1b393db5 585
ec34fa5e
VP
586static enum i2c_chip_type tpm_vendor_chip_type(void)
587{
0f925822 588#if CONFIG_IS_ENABLED(OF_CONTROL)
ec34fa5e
VP
589 const void *blob = gd->fdt_blob;
590
591 if (fdtdec_next_compatible(blob, 0, COMPAT_INFINEON_SLB9645_TPM) >= 0)
592 return SLB9645;
593
594 if (fdtdec_next_compatible(blob, 0, COMPAT_INFINEON_SLB9635_TPM) >= 0)
595 return SLB9635;
596#endif
597 return UNKNOWN;
598}
599
f90acf1a 600static int tpm_vendor_init_common(void)
f6267998 601{
f90acf1a 602 struct tpm_chip *chip;
f6267998 603 u32 vendor;
ec34fa5e 604 u32 expected_did_vid;
f6267998 605
ec34fa5e
VP
606 tpm_dev.chip_type = tpm_vendor_chip_type();
607
f6267998 608 chip = tpm_register_hardware(&tpm_tis_i2c);
f90acf1a
SG
609 if (chip < 0)
610 return -ENODEV;
f6267998
RC
611
612 /* Disable interrupts (not supported) */
613 chip->vendor.irq = 0;
614
615 /* Default timeouts */
616 chip->vendor.timeout_a = TIS_SHORT_TIMEOUT;
617 chip->vendor.timeout_b = TIS_LONG_TIMEOUT;
618 chip->vendor.timeout_c = TIS_SHORT_TIMEOUT;
619 chip->vendor.timeout_d = TIS_SHORT_TIMEOUT;
620
f90acf1a
SG
621 if (request_locality(chip, 0) < 0)
622 return -ENODEV;
f6267998 623
1b393db5 624 /* Read four bytes from DID_VID register */
f6267998 625 if (iic_tpm_read(TPM_DID_VID(0), (uchar *)&vendor, 4) < 0) {
f90acf1a
SG
626 release_locality(chip, 0, 1);
627 return -EIO;
f6267998
RC
628 }
629
ec34fa5e
VP
630 if (tpm_dev.chip_type == SLB9635) {
631 vendor = be32_to_cpu(vendor);
632 expected_did_vid = TPM_TIS_I2C_DID_VID_9635;
633 } else {
634 /* device id and byte order has changed for newer i2c tpms */
635 expected_did_vid = TPM_TIS_I2C_DID_VID_9645;
636 }
f6267998 637
ec34fa5e 638 if (tpm_dev.chip_type != UNKNOWN && vendor != expected_did_vid) {
1b393db5 639 error("Vendor id did not match! ID was %08x\n", vendor);
f90acf1a 640 return -ENODEV;
f6267998
RC
641 }
642
1b393db5
TWHT
643 debug("1.2 TPM (chip type %s device-id 0x%X)\n",
644 chip_name[tpm_dev.chip_type], vendor >> 16);
f6267998
RC
645
646 /*
647 * A timeout query to TPM can be placed here.
648 * Standard timeout values are used so far
649 */
650
651 return 0;
f90acf1a
SG
652}
653
654#ifdef CONFIG_DM_I2C
655/* Initialisation of i2c tpm */
656int tpm_vendor_init_dev(struct udevice *dev)
657{
658 tpm_dev.dev = dev;
659 return tpm_vendor_init_common();
660}
661#else
662/* Initialisation of i2c tpm */
663int tpm_vendor_init(uint32_t dev_addr)
664{
665 uint old_addr;
666 int rc = 0;
f6267998 667
f90acf1a
SG
668 old_addr = tpm_dev.addr;
669 if (dev_addr != 0)
670 tpm_dev.addr = dev_addr;
671
672 rc = tpm_vendor_init_common();
673 if (rc)
674 tpm_dev.addr = old_addr;
f6267998 675
f6267998
RC
676 return rc;
677}
f90acf1a 678#endif
f6267998
RC
679
680void tpm_vendor_cleanup(struct tpm_chip *chip)
681{
682 release_locality(chip, chip->vendor.locality, 1);
683}