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[people/ms/u-boot.git] / drivers / usb / host / isp116x-hcd.c
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822af351
RG		 1/*
2 * ISP116x HCD (Host Controller Driver) for u-boot.
3 *
4 * Copyright (C) 2006-2007 Rodolfo Giometti <giometti@linux.it>
5 * Copyright (C) 2006-2007 Eurotech S.p.A. <info@eurotech.it>
6 *
1a459660 7 * SPDX-License-Identifier: GPL-2.0+
822af351 8 *
7817cb20 9 * Derived in part from the SL811 HCD driver "u-boot/drivers/usb/sl811_usb.c"
822af351
RG		 10 * (original copyright message follows):
11 *
12 * (C) Copyright 2004
13 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
14 *
15 * This code is based on linux driver for sl811hs chip, source at
16 * drivers/usb/host/sl811.c:
17 *
18 * SL811 Host Controller Interface driver for USB.
19 *
20 * Copyright (c) 2003/06, Courage Co., Ltd.
21 *
22 * Based on:
23 * 1.uhci.c by Linus Torvalds, Johannes Erdfelt, Randy Dunlap,
24 * Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber,
25 * Adam Richter, Gregory P. Smith;
26 * 2.Original SL811 driver (hc_sl811.o) by Pei Liu <pbl@cypress.com>
27 * 3.Rewrited as sl811.o by Yin Aihua <yinah:couragetech.com.cn>
28 *
29 * [[GNU/GPL disclaimer]]
30 *
1e3827d9 31 * and in part from AU1x00 OHCI HCD driver "u-boot/arch/mips/cpu/au1x00_usb_ohci.c"
822af351
RG		 32 * (original copyright message follows):
33 *
34 * URB OHCI HCD (Host Controller Driver) for USB on the AU1x00.
35 *
36 * (C) Copyright 2003
792a09eb 37 * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
822af351
RG		 38 *
39 * [[GNU/GPL disclaimer]]
40 *
41 * Note: Part of this code has been derived from linux
42 */
43
44#include <common.h>
822af351
RG		 45#include <asm/io.h>
46#include <usb.h>
47#include <malloc.h>
48#include <linux/list.h>
49
50/*
51 * ISP116x chips require certain delays between accesses to its
52 * registers. The following timing options exist.
53 *
54 * 1. Configure your memory controller (the best)
55 * 2. Use ndelay (easiest, poorest). For that, enable the following macro.
56 *
57 * Value is in microseconds.
58 */
59#ifdef ISP116X_HCD_USE_UDELAY
60#define UDELAY 1
61#endif
62
63/*
64 * On some (slowly?) machines an extra delay after data packing into
65 * controller's FIFOs is required, * otherwise you may get the following
66 * error:
67 *
68 * uboot> usb start
69 * (Re)start USB...
70 * USB: scanning bus for devices... isp116x: isp116x_submit_job: CTL:TIMEOUT
71 * isp116x: isp116x_submit_job: ****** FIFO not ready! ******
72 *
73 * USB device not responding, giving up (status=4)
74 * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
75 * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
76 * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
77 * 3 USB Device(s) found
78 * scanning bus for storage devices... 0 Storage Device(s) found
79 *
80 * Value is in milliseconds.
81 */
82#ifdef ISP116X_HCD_USE_EXTRA_DELAY
83#define EXTRA_DELAY 2
84#endif
85
86/*
87 * Enable the following defines if you wish enable debugging messages.
88 */
89#undef DEBUG /* enable debugging messages */
90#undef TRACE /* enable tracing code */
91#undef VERBOSE /* verbose debugging messages */
92
93#include "isp116x.h"
94
95#define DRIVER_VERSION "08 Jan 2007"
96static const char hcd_name[] = "isp116x-hcd";
97
98struct isp116x isp116x_dev;
99struct isp116x_platform_data isp116x_board;
785c1347 100static int got_rhsc; /* root hub status change */
822af351 101struct usb_device *devgone; /* device which was disconnected */
785c1347 102static int rh_devnum; /* address of Root Hub endpoint */
822af351
RG		 103
104/* ------------------------------------------------------------------------- */
105
106#define ALIGN(x,a) (((x)+(a)-1UL)&~((a)-1UL))
107#define min_t(type,x,y) \
108 ({ type __x = (x); type __y = (y); __x < __y ? __x : __y; })
109
110/* ------------------------------------------------------------------------- */
111
112static int isp116x_reset(struct isp116x *isp116x);
113
114/* --- Debugging functions ------------------------------------------------- */
115
116#define isp116x_show_reg(d, r) { \
117 if ((r) < 0x20) { \
118 DBG("%-12s[%02x]: %08x", #r, \
119 r, isp116x_read_reg32(d, r)); \
120 } else { \
121 DBG("%-12s[%02x]: %04x", #r, \
53677ef1 122 r, isp116x_read_reg16(d, r)); \
822af351
RG		 123 } \
124}
125
126#define isp116x_show_regs(d) { \
127 isp116x_show_reg(d, HCREVISION); \
128 isp116x_show_reg(d, HCCONTROL); \
129 isp116x_show_reg(d, HCCMDSTAT); \
130 isp116x_show_reg(d, HCINTSTAT); \
131 isp116x_show_reg(d, HCINTENB); \
132 isp116x_show_reg(d, HCFMINTVL); \
133 isp116x_show_reg(d, HCFMREM); \
134 isp116x_show_reg(d, HCFMNUM); \
135 isp116x_show_reg(d, HCLSTHRESH); \
136 isp116x_show_reg(d, HCRHDESCA); \
137 isp116x_show_reg(d, HCRHDESCB); \
138 isp116x_show_reg(d, HCRHSTATUS); \
139 isp116x_show_reg(d, HCRHPORT1); \
140 isp116x_show_reg(d, HCRHPORT2); \
141 isp116x_show_reg(d, HCHWCFG); \
142 isp116x_show_reg(d, HCDMACFG); \
143 isp116x_show_reg(d, HCXFERCTR); \
144 isp116x_show_reg(d, HCuPINT); \
145 isp116x_show_reg(d, HCuPINTENB); \
146 isp116x_show_reg(d, HCCHIPID); \
147 isp116x_show_reg(d, HCSCRATCH); \
148 isp116x_show_reg(d, HCITLBUFLEN); \
149 isp116x_show_reg(d, HCATLBUFLEN); \
150 isp116x_show_reg(d, HCBUFSTAT); \
151 isp116x_show_reg(d, HCRDITL0LEN); \
152 isp116x_show_reg(d, HCRDITL1LEN); \
153}
154
155#if defined(TRACE)
156
157static int isp116x_get_current_frame_number(struct usb_device *usb_dev)
158{
159 struct isp116x *isp116x = &isp116x_dev;
160
161 return isp116x_read_reg32(isp116x, HCFMNUM);
162}
163
164static void dump_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
165 int len, char *str)
166{
167#if defined(VERBOSE)
168 int i;
169#endif
170
171 DBG("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d stat:%#lx",
172 str,
173 isp116x_get_current_frame_number(dev),
174 usb_pipedevice(pipe),
175 usb_pipeendpoint(pipe),
176 usb_pipeout(pipe) ? 'O' : 'I',
177 usb_pipetype(pipe) < 2 ?
178 (usb_pipeint(pipe) ?
179 "INTR" : "ISOC") :
180 (usb_pipecontrol(pipe) ? "CTRL" : "BULK"), len, dev->status);
181#if defined(VERBOSE)
182 if (len > 0 && buffer) {
183 printf(__FILE__ ": data(%d):", len);
184 for (i = 0; i < 16 && i < len; i++)
185 printf(" %02x", ((__u8 *) buffer)[i]);
186 printf("%s\n", i < len ? "..." : "");
187 }
188#endif
189}
190
191#define PTD_DIR_STR(ptd) ({char __c; \
192 switch(PTD_GET_DIR(ptd)){ \
193 case 0: __c = 's'; break; \
194 case 1: __c = 'o'; break; \
195 default: __c = 'i'; break; \
196 }; __c;})
197
198/*
199 Dump PTD info. The code documents the format
200 perfectly, right :)
201*/
202static inline void dump_ptd(struct ptd *ptd)
203{
204#if defined(VERBOSE)
205 int k;
206#endif
207
208 DBG("PTD(ext) : cc:%x %d%c%d %d,%d,%d t:%x %x%x%x",
209 PTD_GET_CC(ptd),
210 PTD_GET_FA(ptd), PTD_DIR_STR(ptd), PTD_GET_EP(ptd),
211 PTD_GET_COUNT(ptd), PTD_GET_LEN(ptd), PTD_GET_MPS(ptd),
212 PTD_GET_TOGGLE(ptd),
213 PTD_GET_ACTIVE(ptd), PTD_GET_SPD(ptd), PTD_GET_LAST(ptd));
214#if defined(VERBOSE)
215 printf("isp116x: %s: PTD(byte): ", __FUNCTION__);
216 for (k = 0; k < sizeof(struct ptd); ++k)
217 printf("%02x ", ((u8 *) ptd)[k]);
218 printf("\n");
219#endif
220}
221
222static inline void dump_ptd_data(struct ptd *ptd, u8 * buf, int type)
223{
224#if defined(VERBOSE)
225 int k;
226
227 if (type == 0 /* 0ut data */ ) {
228 printf("isp116x: %s: out data: ", __FUNCTION__);
229 for (k = 0; k < PTD_GET_LEN(ptd); ++k)
230 printf("%02x ", ((u8 *) buf)[k]);
231 printf("\n");
232 }
233 if (type == 1 /* 1n data */ ) {
234 printf("isp116x: %s: in data: ", __FUNCTION__);
235 for (k = 0; k < PTD_GET_COUNT(ptd); ++k)
236 printf("%02x ", ((u8 *) buf)[k]);
237 printf("\n");
238 }
239
240 if (PTD_GET_LAST(ptd))
241 DBG("--- last PTD ---");
242#endif
243}
244
245#else
246
247#define dump_msg(dev, pipe, buffer, len, str) do { } while (0)
248#define dump_pkt(dev, pipe, buffer, len, setup, str, small) do {} while (0)
249
250#define dump_ptd(ptd) do {} while (0)
251#define dump_ptd_data(ptd, buf, type) do {} while (0)
252
253#endif
254
255/* --- Virtual Root Hub ---------------------------------------------------- */
256
257/* Device descriptor */
258static __u8 root_hub_dev_des[] = {
259 0x12, /* __u8 bLength; */
260 0x01, /* __u8 bDescriptorType; Device */
261 0x10, /* __u16 bcdUSB; v1.1 */
262 0x01,
263 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
264 0x00, /* __u8 bDeviceSubClass; */
265 0x00, /* __u8 bDeviceProtocol; */
266 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
267 0x00, /* __u16 idVendor; */
268 0x00,
269 0x00, /* __u16 idProduct; */
270 0x00,
271 0x00, /* __u16 bcdDevice; */
272 0x00,
273 0x00, /* __u8 iManufacturer; */
274 0x01, /* __u8 iProduct; */
275 0x00, /* __u8 iSerialNumber; */
276 0x01 /* __u8 bNumConfigurations; */
277};
278
279/* Configuration descriptor */
280static __u8 root_hub_config_des[] = {
281 0x09, /* __u8 bLength; */
282 0x02, /* __u8 bDescriptorType; Configuration */
283 0x19, /* __u16 wTotalLength; */
284 0x00,
285 0x01, /* __u8 bNumInterfaces; */
286 0x01, /* __u8 bConfigurationValue; */
287 0x00, /* __u8 iConfiguration; */
288 0x40, /* __u8 bmAttributes;
289 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
290 0x00, /* __u8 MaxPower; */
291
292 /* interface */
293 0x09, /* __u8 if_bLength; */
294 0x04, /* __u8 if_bDescriptorType; Interface */
295 0x00, /* __u8 if_bInterfaceNumber; */
296 0x00, /* __u8 if_bAlternateSetting; */
297 0x01, /* __u8 if_bNumEndpoints; */
298 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
299 0x00, /* __u8 if_bInterfaceSubClass; */
300 0x00, /* __u8 if_bInterfaceProtocol; */
301 0x00, /* __u8 if_iInterface; */
302
303 /* endpoint */
304 0x07, /* __u8 ep_bLength; */
305 0x05, /* __u8 ep_bDescriptorType; Endpoint */
306 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
307 0x03, /* __u8 ep_bmAttributes; Interrupt */
308 0x00, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
309 0x02,
310 0xff /* __u8 ep_bInterval; 255 ms */
311};
312
313static unsigned char root_hub_str_index0[] = {
314 0x04, /* __u8 bLength; */
315 0x03, /* __u8 bDescriptorType; String-descriptor */
316 0x09, /* __u8 lang ID */
317 0x04, /* __u8 lang ID */
318};
319
320static unsigned char root_hub_str_index1[] = {
321 0x22, /* __u8 bLength; */
322 0x03, /* __u8 bDescriptorType; String-descriptor */
323 'I', /* __u8 Unicode */
324 0, /* __u8 Unicode */
325 'S', /* __u8 Unicode */
326 0, /* __u8 Unicode */
327 'P', /* __u8 Unicode */
328 0, /* __u8 Unicode */
329 '1', /* __u8 Unicode */
330 0, /* __u8 Unicode */
331 '1', /* __u8 Unicode */
332 0, /* __u8 Unicode */
333 '6', /* __u8 Unicode */
334 0, /* __u8 Unicode */
335 'x', /* __u8 Unicode */
336 0, /* __u8 Unicode */
337 ' ', /* __u8 Unicode */
338 0, /* __u8 Unicode */
339 'R', /* __u8 Unicode */
340 0, /* __u8 Unicode */
341 'o', /* __u8 Unicode */
342 0, /* __u8 Unicode */
343 'o', /* __u8 Unicode */
344 0, /* __u8 Unicode */
345 't', /* __u8 Unicode */
346 0, /* __u8 Unicode */
347 ' ', /* __u8 Unicode */
348 0, /* __u8 Unicode */
349 'H', /* __u8 Unicode */
350 0, /* __u8 Unicode */
351 'u', /* __u8 Unicode */
352 0, /* __u8 Unicode */
353 'b', /* __u8 Unicode */
354 0, /* __u8 Unicode */
355};
356
357/*
358 * Hub class-specific descriptor is constructed dynamically
359 */
360
361/* --- Virtual root hub management functions ------------------------------- */
362
363static int rh_check_port_status(struct isp116x *isp116x)
364{
365 u32 temp, ndp, i;
366 int res;
367
368 res = -1;
369 temp = isp116x_read_reg32(isp116x, HCRHSTATUS);
370 ndp = (temp & RH_A_NDP);
371 for (i = 0; i < ndp; i++) {
372 temp = isp116x_read_reg32(isp116x, HCRHPORT1 + i);
373 /* check for a device disconnect */
374 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
375 (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) {
376 res = i;
377 break;
378 }
379 }
380 return res;
381}
382
383/* --- HC management functions --------------------------------------------- */
384
385/* Write len bytes to fifo, pad till 32-bit boundary
386 */
387static void write_ptddata_to_fifo(struct isp116x *isp116x, void *buf, int len)
388{
389 u8 *dp = (u8 *) buf;
390 u16 *dp2 = (u16 *) buf;
391 u16 w;
392 int quot = len % 4;
393
394 if ((unsigned long)dp2 & 1) {
395 /* not aligned */
396 for (; len > 1; len -= 2) {
397 w = *dp++;
398 w |= *dp++ << 8;
399 isp116x_raw_write_data16(isp116x, w);
400 }
401 if (len)
402 isp116x_write_data16(isp116x, (u16) * dp);
403 } else {
404 /* aligned */
405 for (; len > 1; len -= 2)
406 isp116x_raw_write_data16(isp116x, *dp2++);
407 if (len)
408 isp116x_write_data16(isp116x, 0xff & *((u8 *) dp2));
409 }
410 if (quot == 1 || quot == 2)
411 isp116x_raw_write_data16(isp116x, 0);
412}
413
414/* Read len bytes from fifo and then read till 32-bit boundary
415 */
416static void read_ptddata_from_fifo(struct isp116x *isp116x, void *buf, int len)
417{
418 u8 *dp = (u8 *) buf;
419 u16 *dp2 = (u16 *) buf;
420 u16 w;
421 int quot = len % 4;
422
423 if ((unsigned long)dp2 & 1) {
424 /* not aligned */
425 for (; len > 1; len -= 2) {
426 w = isp116x_raw_read_data16(isp116x);
427 *dp++ = w & 0xff;
428 *dp++ = (w >> 8) & 0xff;
429 }
430 if (len)
431 *dp = 0xff & isp116x_read_data16(isp116x);
432 } else {
433 /* aligned */
434 for (; len > 1; len -= 2)
435 *dp2++ = isp116x_raw_read_data16(isp116x);
436 if (len)
437 *(u8 *) dp2 = 0xff & isp116x_read_data16(isp116x);
438 }
439 if (quot == 1 || quot == 2)
440 isp116x_raw_read_data16(isp116x);
441}
442
443/* Write PTD's and data for scheduled transfers into the fifo ram.
444 * Fifo must be empty and ready */
445static void pack_fifo(struct isp116x *isp116x, struct usb_device *dev,
446 unsigned long pipe, struct ptd *ptd, int n, void *data,
447 int len)
448{
449 int buflen = n * sizeof(struct ptd) + len;
450 int i, done;
451
452 DBG("--- pack buffer %p - %d bytes (fifo %d) ---", data, len, buflen);
453
454 isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
455 isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
456 isp116x_write_addr(isp116x, HCATLPORT | ISP116x_WRITE_OFFSET);
457
458 done = 0;
459 for (i = 0; i < n; i++) {
460 DBG("i=%d - done=%d - len=%d", i, done, PTD_GET_LEN(&ptd[i]));
461
462 dump_ptd(&ptd[i]);
463 isp116x_write_data16(isp116x, ptd[i].count);
464 isp116x_write_data16(isp116x, ptd[i].mps);
465 isp116x_write_data16(isp116x, ptd[i].len);
466 isp116x_write_data16(isp116x, ptd[i].faddr);
467
468 dump_ptd_data(&ptd[i], (__u8 *) data + done, 0);
469 write_ptddata_to_fifo(isp116x,
470 (__u8 *) data + done,
471 PTD_GET_LEN(&ptd[i]));
472
473 done += PTD_GET_LEN(&ptd[i]);
474 }
475}
476
477/* Read the processed PTD's and data from fifo ram back to URBs' buffers.
478 * Fifo must be full and done */
479static int unpack_fifo(struct isp116x *isp116x, struct usb_device *dev,
480 unsigned long pipe, struct ptd *ptd, int n, void *data,
481 int len)
482{
483 int buflen = n * sizeof(struct ptd) + len;
484 int i, done, cc, ret;
485
486 isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
487 isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
488 isp116x_write_addr(isp116x, HCATLPORT);
489
490 ret = TD_CC_NOERROR;
491 done = 0;
492 for (i = 0; i < n; i++) {
493 DBG("i=%d - done=%d - len=%d", i, done, PTD_GET_LEN(&ptd[i]));
494
495 ptd[i].count = isp116x_read_data16(isp116x);
496 ptd[i].mps = isp116x_read_data16(isp116x);
497 ptd[i].len = isp116x_read_data16(isp116x);
498 ptd[i].faddr = isp116x_read_data16(isp116x);
499 dump_ptd(&ptd[i]);
500
501 read_ptddata_from_fifo(isp116x,
502 (__u8 *) data + done,
503 PTD_GET_LEN(&ptd[i]));
504 dump_ptd_data(&ptd[i], (__u8 *) data + done, 1);
505
506 done += PTD_GET_LEN(&ptd[i]);
507
508 cc = PTD_GET_CC(&ptd[i]);
785c1347
TK		 509
510 /* Data underrun means basically that we had more buffer space than
511 * the function had data. It is perfectly normal but upper levels have
512 * to know how much we actually transferred.
513 */
514 if (cc == TD_NOTACCESSED ||
515 (cc != TD_CC_NOERROR && (ret == TD_CC_NOERROR || ret == TD_DATAUNDERRUN)))
822af351
RG		 516 ret = cc;
517 }
518
519 DBG("--- unpack buffer %p - %d bytes (fifo %d) ---", data, len, buflen);
520
521 return ret;
522}
523
524/* Interrupt handling
525 */
526static int isp116x_interrupt(struct isp116x *isp116x)
527{
528 u16 irqstat;
529 u32 intstat;
530 int ret = 0;
531
532 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
533 irqstat = isp116x_read_reg16(isp116x, HCuPINT);
534 isp116x_write_reg16(isp116x, HCuPINT, irqstat);
535 DBG(">>>>>> irqstat %x <<<<<<", irqstat);
536
537 if (irqstat & HCuPINT_ATL) {
538 DBG(">>>>>> HCuPINT_ATL <<<<<<");
9a1d00fa 539 udelay(500);
822af351
RG		 540 ret = 1;
541 }
542
543 if (irqstat & HCuPINT_OPR) {
544 intstat = isp116x_read_reg32(isp116x, HCINTSTAT);
545 isp116x_write_reg32(isp116x, HCINTSTAT, intstat);
546 DBG(">>>>>> HCuPINT_OPR %x <<<<<<", intstat);
547
548 if (intstat & HCINT_UE) {
549 ERR("unrecoverable error, controller disabled");
550
551 /* FIXME: be optimistic, hope that bug won't repeat
552 * often. Make some non-interrupt context restart the
553 * controller. Count and limit the retries though;
554 * either hardware or software errors can go forever...
555 */
556 isp116x_reset(isp116x);
557 ret = -1;
558 return -1;
559 }
560
561 if (intstat & HCINT_RHSC) {
562 got_rhsc = 1;
563 ret = 1;
564 /* When root hub or any of its ports is going
565 to come out of suspend, it may take more
566 than 10ms for status bits to stabilize. */
5b84dd67 567 mdelay(20);
822af351
RG		 568 }
569
570 if (intstat & HCINT_SO) {
571 ERR("schedule overrun");
572 ret = -1;
573 }
574
575 irqstat &= ~HCuPINT_OPR;
576 }
577
578 return ret;
579}
580
785c1347
TK		 581/* With one PTD we can transfer almost 1K in one go;
582 * HC does the splitting into endpoint digestible transactions
583 */
584struct ptd ptd[1];
585
822af351
RG		 586static inline int max_transfer_len(struct usb_device *dev, unsigned long pipe)
587{
785c1347
TK		 588 unsigned mpck = usb_maxpacket(dev, pipe);
589
590 /* One PTD can transfer 1023 bytes but try to always
591 * transfer multiples of endpoint buffer size
592 */
593 return 1023 / mpck * mpck;
822af351
RG		 594}
595
596/* Do an USB transfer
597 */
598static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe,
599 int dir, void *buffer, int len)
600{
601 struct isp116x *isp116x = &isp116x_dev;
602 int type = usb_pipetype(pipe);
603 int epnum = usb_pipeendpoint(pipe);
604 int max = usb_maxpacket(dev, pipe);
605 int dir_out = usb_pipeout(pipe);
c60795f4 606 int speed_low = (dev->speed == USB_SPEED_LOW);
785c1347
TK		 607 int i, done = 0, stat, timeout, cc;
608
609 /* 500 frames or 0.5s timeout when function is busy and NAKs transactions for a while */
610 int retries = 500;
822af351
RG		 611
612 DBG("------------------------------------------------");
613 dump_msg(dev, pipe, buffer, len, "SUBMIT");
614 DBG("------------------------------------------------");
615
785c1347
TK		 616 if (len >= 1024) {
617 ERR("Too big job");
618 dev->status = USB_ST_CRC_ERR;
619 return -1;
620 }
621
822af351
RG		 622 if (isp116x->disabled) {
623 ERR("EPIPE");
624 dev->status = USB_ST_CRC_ERR;
625 return -1;
626 }
627
628 /* device pulled? Shortcut the action. */
629 if (devgone == dev) {
630 ERR("ENODEV");
631 dev->status = USB_ST_CRC_ERR;
632 return USB_ST_CRC_ERR;
633 }
634
635 if (!max) {
636 ERR("pipesize for pipe %lx is zero", pipe);
637 dev->status = USB_ST_CRC_ERR;
638 return -1;
639 }
640
641 if (type == PIPE_ISOCHRONOUS) {
642 ERR("isochronous transfers not supported");
643 dev->status = USB_ST_CRC_ERR;
644 return -1;
645 }
646
647 /* FIFO not empty? */
648 if (isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_FULL) {
649 ERR("****** FIFO not empty! ******");
650 dev->status = USB_ST_BUF_ERR;
651 return -1;
652 }
653
654 retry:
655 isp116x_write_reg32(isp116x, HCINTSTAT, 0xff);
656
657 /* Prepare the PTD data */
785c1347
TK		 658 ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK |
659 PTD_TOGGLE(usb_gettoggle(dev, epnum, dir_out));
660 ptd->mps = PTD_MPS(max) | PTD_SPD(speed_low) | PTD_EP(epnum) | PTD_LAST_MSK;
661 ptd->len = PTD_LEN(len) | PTD_DIR(dir);
662 ptd->faddr = PTD_FA(usb_pipedevice(pipe));
822af351 663
785c1347 664retry_same:
822af351 665 /* Pack data into FIFO ram */
785c1347 666 pack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
822af351 667#ifdef EXTRA_DELAY
5b84dd67 668 mdelay(EXTRA_DELAY);
822af351
RG		 669#endif
670
671 /* Start the data transfer */
672
673 /* Allow more time for a BULK device to react - some are slow */
9dbc3667 674 if (usb_pipebulk(pipe))
822af351
RG		 675 timeout = 5000;
676 else
677 timeout = 100;
678
679 /* Wait for it to complete */
680 for (;;) {
681 /* Check whether the controller is done */
682 stat = isp116x_interrupt(isp116x);
683
684 if (stat < 0) {
685 dev->status = USB_ST_CRC_ERR;
686 break;
687 }
688 if (stat > 0)
689 break;
690
691 /* Check the timeout */
692 if (--timeout)
693 udelay(1);
694 else {
695 ERR("CTL:TIMEOUT ");
696 stat = USB_ST_CRC_ERR;
697 break;
698 }
699 }
700
701 /* We got an Root Hub Status Change interrupt */
702 if (got_rhsc) {
703 isp116x_show_regs(isp116x);
704
705 got_rhsc = 0;
706
707 /* Abuse timeout */
708 timeout = rh_check_port_status(isp116x);
709 if (timeout >= 0) {
710 /*
711 * FIXME! NOTE! AAAARGH!
712 * This is potentially dangerous because it assumes
713 * that only one device is ever plugged in!
714 */
715 devgone = dev;
716 }
717 }
718
719 /* Ok, now we can read transfer status */
720
721 /* FIFO not ready? */
722 if (!(isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_DONE)) {
723 ERR("****** FIFO not ready! ******");
724 dev->status = USB_ST_BUF_ERR;
725 return -1;
726 }
727
728 /* Unpack data from FIFO ram */
785c1347
TK		 729 cc = unpack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
730
731 i = PTD_GET_COUNT(ptd);
732 done += i;
733 buffer += i;
734 len -= i;
822af351 735
785c1347
TK		 736 /* There was some kind of real problem; Prepare the PTD again
737 * and retry from the failed transaction on
822af351 738 */
785c1347
TK		 739 if (cc && cc != TD_NOTACCESSED && cc != TD_DATAUNDERRUN) {
740 if (retries >= 100) {
741 retries -= 100;
742 /* The chip will have toggled the toggle bit for the failed
743 * transaction too. We have to toggle it back.
744 */
745 usb_settoggle(dev, epnum, dir_out, !PTD_GET_TOGGLE(ptd));
746 goto retry;
747 }
748 }
749 /* "Normal" errors; TD_NOTACCESSED would mean in effect that the function have NAKed
750 * the transactions from the first on for the whole frame. It may be busy and we retry
751 * with the same PTD. PTD_ACTIVE (and not TD_NOTACCESSED) would mean that some of the
752 * PTD didn't make it because the function was busy or the frame ended before the PTD
753 * finished. We prepare the rest of the data and try again.
754 */
755 else if (cc == TD_NOTACCESSED || PTD_GET_ACTIVE(ptd) || (cc != TD_DATAUNDERRUN && PTD_GET_COUNT(ptd) < PTD_GET_LEN(ptd))) {
756 if (retries) {
757 --retries;
758 if (cc == TD_NOTACCESSED && PTD_GET_ACTIVE(ptd) && !PTD_GET_COUNT(ptd)) goto retry_same;
759 usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd));
760 goto retry;
761 }
822af351
RG		 762 }
763
785c1347 764 if (cc != TD_CC_NOERROR && cc != TD_DATAUNDERRUN) {
822af351
RG		 765 DBG("****** completition code error %x ******", cc);
766 switch (cc) {
767 case TD_CC_BITSTUFFING:
768 dev->status = USB_ST_BIT_ERR;
769 break;
770 case TD_CC_STALL:
771 dev->status = USB_ST_STALLED;
772 break;
773 case TD_BUFFEROVERRUN:
774 case TD_BUFFERUNDERRUN:
775 dev->status = USB_ST_BUF_ERR;
776 break;
777 default:
778 dev->status = USB_ST_CRC_ERR;
779 }
780 return -cc;
781 }
785c1347 782 else usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd));
822af351
RG		 783
784 dump_msg(dev, pipe, buffer, len, "SUBMIT(ret)");
785
786 dev->status = 0;
787 return done;
788}
789
790/* Adapted from au1x00_usb_ohci.c
791 */
792static int isp116x_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
793 void *buffer, int transfer_len,
794 struct devrequest *cmd)
795{
796 struct isp116x *isp116x = &isp116x_dev;
797 u32 tmp = 0;
798
799 int leni = transfer_len;
800 int len = 0;
801 int stat = 0;
802 u32 datab[4];
803 u8 *data_buf = (u8 *) datab;
804 u16 bmRType_bReq;
805 u16 wValue;
806 u16 wIndex;
807 u16 wLength;
808
9dbc3667 809 if (usb_pipeint(pipe)) {
822af351
RG		 810 INFO("Root-Hub submit IRQ: NOT implemented");
811 return 0;
812 }
813
814 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
815 wValue = swap_16(cmd->value);
816 wIndex = swap_16(cmd->index);
817 wLength = swap_16(cmd->length);
818
819 DBG("--- HUB ----------------------------------------");
820 DBG("submit rh urb, req=%x val=%#x index=%#x len=%d",
821 bmRType_bReq, wValue, wIndex, wLength);
822 dump_msg(dev, pipe, buffer, transfer_len, "RH");
823 DBG("------------------------------------------------");
824
825 switch (bmRType_bReq) {
826 case RH_GET_STATUS:
827 DBG("RH_GET_STATUS");
828
829 *(__u16 *) data_buf = swap_16(1);
830 len = 2;
831 break;
832
833 case RH_GET_STATUS | RH_INTERFACE:
834 DBG("RH_GET_STATUS | RH_INTERFACE");
835
836 *(__u16 *) data_buf = swap_16(0);
837 len = 2;
838 break;
839
840 case RH_GET_STATUS | RH_ENDPOINT:
841 DBG("RH_GET_STATUS | RH_ENDPOINT");
842
843 *(__u16 *) data_buf = swap_16(0);
844 len = 2;
845 break;
846
847 case RH_GET_STATUS | RH_CLASS:
848 DBG("RH_GET_STATUS | RH_CLASS");
849
850 tmp = isp116x_read_reg32(isp116x, HCRHSTATUS);
851
852 *(__u32 *) data_buf = swap_32(tmp & ~(RH_HS_CRWE | RH_HS_DRWE));
853 len = 4;
854 break;
855
856 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
857 DBG("RH_GET_STATUS | RH_OTHER | RH_CLASS");
858
859 tmp = isp116x_read_reg32(isp116x, HCRHPORT1 + wIndex - 1);
860 *(__u32 *) data_buf = swap_32(tmp);
861 isp116x_show_regs(isp116x);
862 len = 4;
863 break;
864
865 case RH_CLEAR_FEATURE | RH_ENDPOINT:
866 DBG("RH_CLEAR_FEATURE | RH_ENDPOINT");
867
868 switch (wValue) {
869 case RH_ENDPOINT_STALL:
870 DBG("C_HUB_ENDPOINT_STALL");
871 len = 0;
872 break;
873 }
874 break;
875
876 case RH_CLEAR_FEATURE | RH_CLASS:
877 DBG("RH_CLEAR_FEATURE | RH_CLASS");
878
879 switch (wValue) {
880 case RH_C_HUB_LOCAL_POWER:
881 DBG("C_HUB_LOCAL_POWER");
882 len = 0;
883 break;
884
885 case RH_C_HUB_OVER_CURRENT:
886 DBG("C_HUB_OVER_CURRENT");
887 isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_OCIC);
888 len = 0;
889 break;
890 }
891 break;
892
893 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
894 DBG("RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS");
895
896 switch (wValue) {
897 case RH_PORT_ENABLE:
898 isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
899 RH_PS_CCS);
900 len = 0;
901 break;
902
903 case RH_PORT_SUSPEND:
904 isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
905 RH_PS_POCI);
906 len = 0;
907 break;
908
909 case RH_PORT_POWER:
910 isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
911 RH_PS_LSDA);
912 len = 0;
913 break;
914
915 case RH_C_PORT_CONNECTION:
916 isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
917 RH_PS_CSC);
918 len = 0;
919 break;
920
921 case RH_C_PORT_ENABLE:
922 isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
923 RH_PS_PESC);
924 len = 0;
925 break;
926
927 case RH_C_PORT_SUSPEND:
928 isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
929 RH_PS_PSSC);
930 len = 0;
931 break;
932
933 case RH_C_PORT_OVER_CURRENT:
934 isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
935 RH_PS_POCI);
936 len = 0;
937 break;
938
939 case RH_C_PORT_RESET:
940 isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
941 RH_PS_PRSC);
942 len = 0;
943 break;
944
945 default:
946 ERR("invalid wValue");
947 stat = USB_ST_STALLED;
948 }
949
950 isp116x_show_regs(isp116x);
951
952 break;
953
954 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
955 DBG("RH_SET_FEATURE | RH_OTHER | RH_CLASS");
956
957 switch (wValue) {
958 case RH_PORT_SUSPEND:
959 isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
960 RH_PS_PSS);
961 len = 0;
962 break;
963
964 case RH_PORT_RESET:
965 /* Spin until any current reset finishes */
966 while (1) {
967 tmp =
968 isp116x_read_reg32(isp116x,
969 HCRHPORT1 + wIndex - 1);
970 if (!(tmp & RH_PS_PRS))
971 break;
5b84dd67 972 mdelay(1);
822af351
RG		 973 }
974 isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
975 RH_PS_PRS);
5b84dd67 976 mdelay(10);
822af351
RG		 977
978 len = 0;
979 break;
980
981 case RH_PORT_POWER:
982 isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
983 RH_PS_PPS);
984 len = 0;
985 break;
986
987 case RH_PORT_ENABLE:
988 isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
989 RH_PS_PES);
990 len = 0;
991 break;
992
993 default:
994 ERR("invalid wValue");
995 stat = USB_ST_STALLED;
996 }
997
998 isp116x_show_regs(isp116x);
999
1000 break;
1001
1002 case RH_SET_ADDRESS:
1003 DBG("RH_SET_ADDRESS");
1004
1005 rh_devnum = wValue;
1006 len = 0;
1007 break;
1008
1009 case RH_GET_DESCRIPTOR:
1010 DBG("RH_GET_DESCRIPTOR: %x, %d", wValue, wLength);
1011
1012 switch (wValue) {
1013 case (USB_DT_DEVICE << 8): /* device descriptor */
1014 len = min_t(unsigned int,
1015 leni, min_t(unsigned int,
1016 sizeof(root_hub_dev_des),
1017 wLength));
1018 data_buf = root_hub_dev_des;
1019 break;
1020
1021 case (USB_DT_CONFIG << 8): /* configuration descriptor */
1022 len = min_t(unsigned int,
1023 leni, min_t(unsigned int,
1024 sizeof(root_hub_config_des),
1025 wLength));
1026 data_buf = root_hub_config_des;
1027 break;
1028
1029 case ((USB_DT_STRING << 8) | 0x00): /* string 0 descriptors */
1030 len = min_t(unsigned int,
1031 leni, min_t(unsigned int,
1032 sizeof(root_hub_str_index0),
1033 wLength));
1034 data_buf = root_hub_str_index0;
1035 break;
1036
1037 case ((USB_DT_STRING << 8) | 0x01): /* string 1 descriptors */
1038 len = min_t(unsigned int,
1039 leni, min_t(unsigned int,
1040 sizeof(root_hub_str_index1),
1041 wLength));
1042 data_buf = root_hub_str_index1;
1043 break;
1044
1045 default:
1046 ERR("invalid wValue");
1047 stat = USB_ST_STALLED;
1048 }
1049
1050 break;
1051
1052 case RH_GET_DESCRIPTOR | RH_CLASS:
1053 DBG("RH_GET_DESCRIPTOR | RH_CLASS");
1054
1055 tmp = isp116x_read_reg32(isp116x, HCRHDESCA);
1056
1057 data_buf[0] = 0x09; /* min length; */
1058 data_buf[1] = 0x29;
1059 data_buf[2] = tmp & RH_A_NDP;
1060 data_buf[3] = 0;
1061 if (tmp & RH_A_PSM) /* per-port power switching? */
1062 data_buf[3] |= 0x01;
1063 if (tmp & RH_A_NOCP) /* no overcurrent reporting? */
1064 data_buf[3] |= 0x10;
1065 else if (tmp & RH_A_OCPM) /* per-port overcurrent rep? */
1066 data_buf[3] |= 0x08;
1067
1068 /* Corresponds to data_buf[4-7] */
1069 datab[1] = 0;
1070 data_buf[5] = (tmp & RH_A_POTPGT) >> 24;
1071
1072 tmp = isp116x_read_reg32(isp116x, HCRHDESCB);
1073
1074 data_buf[7] = tmp & RH_B_DR;
1075 if (data_buf[2] < 7)
1076 data_buf[8] = 0xff;
1077 else {
1078 data_buf[0] += 2;
1079 data_buf[8] = (tmp & RH_B_DR) >> 8;
1080 data_buf[10] = data_buf[9] = 0xff;
1081 }
1082
1083 len = min_t(unsigned int, leni,
1084 min_t(unsigned int, data_buf[0], wLength));
1085 break;
1086
1087 case RH_GET_CONFIGURATION:
1088 DBG("RH_GET_CONFIGURATION");
1089
1090 *(__u8 *) data_buf = 0x01;
1091 len = 1;
1092 break;
1093
1094 case RH_SET_CONFIGURATION:
1095 DBG("RH_SET_CONFIGURATION");
1096
1097 isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPSC);
1098 len = 0;
1099 break;
1100
1101 default:
1102 ERR("*** *** *** unsupported root hub command *** *** ***");
1103 stat = USB_ST_STALLED;
1104 }
1105
1106 len = min_t(int, len, leni);
1107 if (buffer != data_buf)
1108 memcpy(buffer, data_buf, len);
1109
1110 dev->act_len = len;
1111 dev->status = stat;
1112 DBG("dev act_len %d, status %d", dev->act_len, dev->status);
1113
1114 dump_msg(dev, pipe, buffer, transfer_len, "RH(ret)");
1115
1116 return stat;
1117}
1118
1119/* --- Transfer functions -------------------------------------------------- */
1120
1121int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1122 int len, int interval)
1123{
1124 DBG("dev=%p pipe=%#lx buf=%p size=%d int=%d",
1125 dev, pipe, buffer, len, interval);
1126
1127 return -1;
1128}
1129
1130int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1131 int len, struct devrequest *setup)
1132{
1133 int devnum = usb_pipedevice(pipe);
1134 int epnum = usb_pipeendpoint(pipe);
1135 int max = max_transfer_len(dev, pipe);
1136 int dir_in = usb_pipein(pipe);
1137 int done, ret;
1138
1139 /* Control message is for the HUB? */
1140 if (devnum == rh_devnum)
1141 return isp116x_submit_rh_msg(dev, pipe, buffer, len, setup);
1142
1143 /* Ok, no HUB message so send the message to the device */
1144
1145 /* Setup phase */
1146 DBG("--- SETUP PHASE --------------------------------");
1147 usb_settoggle(dev, epnum, 1, 0);
1148 ret = isp116x_submit_job(dev, pipe,
1149 PTD_DIR_SETUP,
1150 setup, sizeof(struct devrequest));
1151 if (ret < 0) {
1152 DBG("control setup phase error (ret = %d", ret);
1153 return -1;
1154 }
1155
1156 /* Data phase */
1157 DBG("--- DATA PHASE ---------------------------------");
1158 done = 0;
1159 usb_settoggle(dev, epnum, !dir_in, 1);
1160 while (done < len) {
1161 ret = isp116x_submit_job(dev, pipe,
1162 dir_in ? PTD_DIR_IN : PTD_DIR_OUT,
1163 (__u8 *) buffer + done,
1164 max > len - done ? len - done : max);
1165 if (ret < 0) {
1166 DBG("control data phase error (ret = %d)", ret);
1167 return -1;
1168 }
1169 done += ret;
1170
1171 if (dir_in && ret < max) /* short packet */
1172 break;
1173 }
1174
1175 /* Status phase */
1176 DBG("--- STATUS PHASE -------------------------------");
1177 usb_settoggle(dev, epnum, !dir_in, 1);
1178 ret = isp116x_submit_job(dev, pipe,
1179 !dir_in ? PTD_DIR_IN : PTD_DIR_OUT, NULL, 0);
1180 if (ret < 0) {
1181 DBG("control status phase error (ret = %d", ret);
1182 return -1;
1183 }
1184
1185 dev->act_len = done;
1186
1187 dump_msg(dev, pipe, buffer, len, "DEV(ret)");
1188
1189 return done;
1190}
1191
1192int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1193 int len)
1194{
1195 int dir_out = usb_pipeout(pipe);
1196 int max = max_transfer_len(dev, pipe);
1197 int done, ret;
1198
1199 DBG("--- BULK ---------------------------------------");
1200 DBG("dev=%ld pipe=%ld buf=%p size=%d dir_out=%d",
1201 usb_pipedevice(pipe), usb_pipeendpoint(pipe), buffer, len, dir_out);
1202
1203 done = 0;
1204 while (done < len) {
1205 ret = isp116x_submit_job(dev, pipe,
1206 !dir_out ? PTD_DIR_IN : PTD_DIR_OUT,
1207 (__u8 *) buffer + done,
1208 max > len - done ? len - done : max);
1209 if (ret < 0) {
1210 DBG("error on bulk message (ret = %d)", ret);
1211 return -1;
1212 }
1213
1214 done += ret;
1215
1216 if (!dir_out && ret < max) /* short packet */
1217 break;
1218 }
1219
1220 dev->act_len = done;
1221
1222 return 0;
1223}
1224
1225/* --- Basic functions ----------------------------------------------------- */
1226
1227static int isp116x_sw_reset(struct isp116x *isp116x)
1228{
1229 int retries = 15;
1230 int ret = 0;
1231
1232 DBG("");
1233
1234 isp116x->disabled = 1;
1235
1236 isp116x_write_reg16(isp116x, HCSWRES, HCSWRES_MAGIC);
1237 isp116x_write_reg32(isp116x, HCCMDSTAT, HCCMDSTAT_HCR);
1238 while (--retries) {
1239 /* It usually resets within 1 ms */
5b84dd67 1240 mdelay(1);
822af351
RG		 1241 if (!(isp116x_read_reg32(isp116x, HCCMDSTAT) & HCCMDSTAT_HCR))
1242 break;
1243 }
1244 if (!retries) {
1245 ERR("software reset timeout");
1246 ret = -1;
1247 }
1248 return ret;
1249}
1250
1251static int isp116x_reset(struct isp116x *isp116x)
1252{
1253 unsigned long t;
1254 u16 clkrdy = 0;
1255 int ret, timeout = 15 /* ms */ ;
1256
1257 DBG("");
1258
1259 ret = isp116x_sw_reset(isp116x);
1260 if (ret)
1261 return ret;
1262
1263 for (t = 0; t < timeout; t++) {
1264 clkrdy = isp116x_read_reg16(isp116x, HCuPINT) & HCuPINT_CLKRDY;
1265 if (clkrdy)
1266 break;
5b84dd67 1267 mdelay(1);
822af351
RG		 1268 }
1269 if (!clkrdy) {
1270 ERR("clock not ready after %dms", timeout);
1271 /* After sw_reset the clock won't report to be ready, if
1272 H_WAKEUP pin is high. */
1273 ERR("please make sure that the H_WAKEUP pin is pulled low!");
1274 ret = -1;
1275 }
1276 return ret;
1277}
1278
1279static void isp116x_stop(struct isp116x *isp116x)
1280{
1281 u32 val;
1282
1283 DBG("");
1284
1285 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
1286
1287 /* Switch off ports' power, some devices don't come up
1288 after next 'start' without this */
1289 val = isp116x_read_reg32(isp116x, HCRHDESCA);
1290 val &= ~(RH_A_NPS | RH_A_PSM);
1291 isp116x_write_reg32(isp116x, HCRHDESCA, val);
1292 isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPS);
1293
1294 isp116x_sw_reset(isp116x);
1295}
1296
1297/*
1298 * Configure the chip. The chip must be successfully reset by now.
1299 */
1300static int isp116x_start(struct isp116x *isp116x)
1301{
1302 struct isp116x_platform_data *board = isp116x->board;
1303 u32 val;
1304
1305 DBG("");
1306
1307 /* Clear interrupt status and disable all interrupt sources */
1308 isp116x_write_reg16(isp116x, HCuPINT, 0xff);
1309 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
1310
1311 isp116x_write_reg16(isp116x, HCITLBUFLEN, ISP116x_ITL_BUFSIZE);
1312 isp116x_write_reg16(isp116x, HCATLBUFLEN, ISP116x_ATL_BUFSIZE);
1313
1314 /* Hardware configuration */
1315 val = HCHWCFG_DBWIDTH(1);
1316 if (board->sel15Kres)
1317 val |= HCHWCFG_15KRSEL;
1318 /* Remote wakeup won't work without working clock */
1319 if (board->remote_wakeup_enable)
1320 val |= HCHWCFG_CLKNOTSTOP;
1321 if (board->oc_enable)
1322 val |= HCHWCFG_ANALOG_OC;
1323 isp116x_write_reg16(isp116x, HCHWCFG, val);
1324
1325 /* --- Root hub configuration */
1326 val = (25 << 24) & RH_A_POTPGT;
1327 /* AN10003_1.pdf recommends RH_A_NPS (no power switching) to
1328 be always set. Yet, instead, we request individual port
1329 power switching. */
1330 val |= RH_A_PSM;
1331 /* Report overcurrent per port */
1332 val |= RH_A_OCPM;
1333 isp116x_write_reg32(isp116x, HCRHDESCA, val);
1334 isp116x->rhdesca = isp116x_read_reg32(isp116x, HCRHDESCA);
1335
1336 val = RH_B_PPCM;
1337 isp116x_write_reg32(isp116x, HCRHDESCB, val);
1338 isp116x->rhdescb = isp116x_read_reg32(isp116x, HCRHDESCB);
1339
1340 val = 0;
1341 if (board->remote_wakeup_enable)
1342 val |= RH_HS_DRWE;
1343 isp116x_write_reg32(isp116x, HCRHSTATUS, val);
1344 isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
1345
1346 isp116x_write_reg32(isp116x, HCFMINTVL, 0x27782edf);
1347
1348 /* Go operational */
1349 val = HCCONTROL_USB_OPER;
1350 if (board->remote_wakeup_enable)
1351 val |= HCCONTROL_RWE;
1352 isp116x_write_reg32(isp116x, HCCONTROL, val);
1353
1354 /* Disable ports to avoid race in device enumeration */
1355 isp116x_write_reg32(isp116x, HCRHPORT1, RH_PS_CCS);
1356 isp116x_write_reg32(isp116x, HCRHPORT2, RH_PS_CCS);
1357
1358 isp116x_show_regs(isp116x);
1359
1360 isp116x->disabled = 0;
1361
1362 return 0;
1363}
1364
1365/* --- Init functions ------------------------------------------------------ */
1366
1367int isp116x_check_id(struct isp116x *isp116x)
1368{
1369 int val;
1370
1371 val = isp116x_read_reg16(isp116x, HCCHIPID);
1372 if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
1373 ERR("invalid chip ID %04x", val);
1374 return -1;
1375 }
1376
1377 return 0;
1378}
1379
c7e3b2b5 1380int usb_lowlevel_init(int index, void **controller))
822af351
RG		 1381{
1382 struct isp116x *isp116x = &isp116x_dev;
1383
1384 DBG("");
1385
785c1347
TK		 1386 got_rhsc = rh_devnum = 0;
1387
822af351
RG		 1388 /* Init device registers addr */
1389 isp116x->addr_reg = (u16 *) ISP116X_HCD_ADDR;
1390 isp116x->data_reg = (u16 *) ISP116X_HCD_DATA;
1391
1392 /* Setup specific board settings */
1393#ifdef ISP116X_HCD_SEL15kRES
1394 isp116x_board.sel15Kres = 1;
1395#endif
1396#ifdef ISP116X_HCD_OC_ENABLE
1397 isp116x_board.oc_enable = 1;
1398#endif
1399#ifdef ISP116X_HCD_REMOTE_WAKEUP_ENABLE
1400 isp116x_board.remote_wakeup_enable = 1;
1401#endif
1402 isp116x->board = &isp116x_board;
1403
1404 /* Try to get ISP116x silicon chip ID */
1405 if (isp116x_check_id(isp116x) < 0)
1406 return -1;
1407
1408 isp116x->disabled = 1;
1409 isp116x->sleeping = 0;
1410
1411 isp116x_reset(isp116x);
1412 isp116x_start(isp116x);
1413
1414 return 0;
1415}
1416
c7e3b2b5 1417int usb_lowlevel_stop(int index)
822af351
RG		 1418{
1419 struct isp116x *isp116x = &isp116x_dev;
1420
1421 DBG("");
1422
1423 if (!isp116x->disabled)
1424 isp116x_stop(isp116x);
1425
1426 return 0;
1427}
"Das U-Boot" Source Tree