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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
f93022c3 JR |
2 | /* |
3 | * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com> | |
4 | * Copyright (C) 2011 CompuLab, Ltd. <www.compulab.co.il> | |
5 | * | |
6 | * Authors: Jana Rapava <fermata7@gmail.com> | |
7 | * Igor Grinberg <grinberg@compulab.co.il> | |
8 | * | |
9 | * Based on: | |
10 | * linux/drivers/usb/otg/ulpi.c | |
11 | * Generic ULPI USB transceiver support | |
12 | * | |
13 | * Original Copyright follow: | |
14 | * Copyright (C) 2009 Daniel Mack <daniel@caiaq.de> | |
15 | * | |
16 | * Based on sources from | |
17 | * | |
18 | * Sascha Hauer <s.hauer@pengutronix.de> | |
19 | * Freescale Semiconductors | |
f93022c3 JR |
20 | */ |
21 | ||
22 | #include <common.h> | |
23 | #include <exports.h> | |
24 | #include <usb/ulpi.h> | |
25 | ||
26 | #define ULPI_ID_REGS_COUNT 4 | |
27 | #define ULPI_TEST_VALUE 0x55 /* 0x55 == 0b01010101 */ | |
28 | ||
29 | static struct ulpi_regs *ulpi = (struct ulpi_regs *)0; | |
30 | ||
3e6e809f | 31 | static int ulpi_integrity_check(struct ulpi_viewport *ulpi_vp) |
f93022c3 | 32 | { |
4256101f IG |
33 | u32 val, tval = ULPI_TEST_VALUE; |
34 | int err, i; | |
f93022c3 JR |
35 | |
36 | /* Use the 'special' test value to check all bits */ | |
37 | for (i = 0; i < 2; i++, tval <<= 1) { | |
3e6e809f | 38 | err = ulpi_write(ulpi_vp, &ulpi->scratch, tval); |
f93022c3 JR |
39 | if (err) |
40 | return err; | |
41 | ||
3e6e809f | 42 | val = ulpi_read(ulpi_vp, &ulpi->scratch); |
f93022c3 JR |
43 | if (val != tval) { |
44 | printf("ULPI integrity check failed\n"); | |
45 | return val; | |
46 | } | |
47 | } | |
48 | ||
49 | return 0; | |
50 | } | |
51 | ||
3e6e809f | 52 | int ulpi_init(struct ulpi_viewport *ulpi_vp) |
f93022c3 JR |
53 | { |
54 | u32 val, id = 0; | |
55 | u8 *reg = &ulpi->product_id_high; | |
56 | int i; | |
57 | ||
58 | /* Assemble ID from four ULPI ID registers (8 bits each). */ | |
59 | for (i = 0; i < ULPI_ID_REGS_COUNT; i++) { | |
3e6e809f | 60 | val = ulpi_read(ulpi_vp, reg - i); |
f93022c3 JR |
61 | if (val == ULPI_ERROR) |
62 | return val; | |
63 | ||
64 | id = (id << 8) | val; | |
65 | } | |
66 | ||
67 | /* Split ID into vendor and product ID. */ | |
68 | debug("ULPI transceiver ID 0x%04x:0x%04x\n", id >> 16, id & 0xffff); | |
69 | ||
3e6e809f | 70 | return ulpi_integrity_check(ulpi_vp); |
f93022c3 JR |
71 | } |
72 | ||
3e6e809f | 73 | int ulpi_select_transceiver(struct ulpi_viewport *ulpi_vp, unsigned speed) |
f93022c3 | 74 | { |
1113a79b | 75 | u32 tspeed = ULPI_FC_FULL_SPEED; |
f93022c3 JR |
76 | u32 val; |
77 | ||
78 | switch (speed) { | |
79 | case ULPI_FC_HIGH_SPEED: | |
80 | case ULPI_FC_FULL_SPEED: | |
81 | case ULPI_FC_LOW_SPEED: | |
82 | case ULPI_FC_FS4LS: | |
83 | tspeed = speed; | |
84 | break; | |
85 | default: | |
cf9f95f2 IG |
86 | printf("ULPI: %s: wrong transceiver speed specified: %u, " |
87 | "falling back to full speed\n", __func__, speed); | |
f93022c3 JR |
88 | } |
89 | ||
3e6e809f | 90 | val = ulpi_read(ulpi_vp, &ulpi->function_ctrl); |
f93022c3 JR |
91 | if (val == ULPI_ERROR) |
92 | return val; | |
93 | ||
94 | /* clear the previous speed setting */ | |
95 | val = (val & ~ULPI_FC_XCVRSEL_MASK) | tspeed; | |
96 | ||
3e6e809f | 97 | return ulpi_write(ulpi_vp, &ulpi->function_ctrl, val); |
f93022c3 JR |
98 | } |
99 | ||
141288b3 | 100 | int ulpi_set_vbus(struct ulpi_viewport *ulpi_vp, int on, int ext_power) |
f93022c3 JR |
101 | { |
102 | u32 flags = ULPI_OTG_DRVVBUS; | |
103 | u8 *reg = on ? &ulpi->otg_ctrl_set : &ulpi->otg_ctrl_clear; | |
104 | ||
105 | if (ext_power) | |
106 | flags |= ULPI_OTG_DRVVBUS_EXT; | |
f93022c3 | 107 | |
3e6e809f | 108 | return ulpi_write(ulpi_vp, reg, flags); |
f93022c3 JR |
109 | } |
110 | ||
141288b3 LS |
111 | int ulpi_set_vbus_indicator(struct ulpi_viewport *ulpi_vp, int external, |
112 | int passthu, int complement) | |
113 | { | |
114 | u32 flags, val; | |
115 | u8 *reg; | |
116 | ||
117 | reg = external ? &ulpi->otg_ctrl_set : &ulpi->otg_ctrl_clear; | |
118 | val = ulpi_write(ulpi_vp, reg, ULPI_OTG_EXTVBUSIND); | |
119 | if (val) | |
120 | return val; | |
121 | ||
122 | flags = passthu ? ULPI_IFACE_PASSTHRU : 0; | |
123 | flags |= complement ? ULPI_IFACE_EXTVBUS_COMPLEMENT : 0; | |
124 | ||
125 | val = ulpi_read(ulpi_vp, &ulpi->iface_ctrl); | |
126 | if (val == ULPI_ERROR) | |
127 | return val; | |
128 | ||
129 | val = val & ~(ULPI_IFACE_PASSTHRU & ULPI_IFACE_EXTVBUS_COMPLEMENT); | |
130 | val |= flags; | |
131 | val = ulpi_write(ulpi_vp, &ulpi->iface_ctrl, val); | |
132 | if (val) | |
133 | return val; | |
134 | ||
135 | return 0; | |
136 | } | |
137 | ||
3e6e809f | 138 | int ulpi_set_pd(struct ulpi_viewport *ulpi_vp, int enable) |
f93022c3 JR |
139 | { |
140 | u32 val = ULPI_OTG_DP_PULLDOWN | ULPI_OTG_DM_PULLDOWN; | |
141 | u8 *reg = enable ? &ulpi->otg_ctrl_set : &ulpi->otg_ctrl_clear; | |
142 | ||
3e6e809f | 143 | return ulpi_write(ulpi_vp, reg, val); |
f93022c3 JR |
144 | } |
145 | ||
3e6e809f | 146 | int ulpi_opmode_sel(struct ulpi_viewport *ulpi_vp, unsigned opmode) |
f93022c3 | 147 | { |
1113a79b | 148 | u32 topmode = ULPI_FC_OPMODE_NORMAL; |
f93022c3 JR |
149 | u32 val; |
150 | ||
151 | switch (opmode) { | |
152 | case ULPI_FC_OPMODE_NORMAL: | |
153 | case ULPI_FC_OPMODE_NONDRIVING: | |
154 | case ULPI_FC_OPMODE_DISABLE_NRZI: | |
155 | case ULPI_FC_OPMODE_NOSYNC_NOEOP: | |
156 | topmode = opmode; | |
157 | break; | |
158 | default: | |
cf9f95f2 IG |
159 | printf("ULPI: %s: wrong OpMode specified: %u, " |
160 | "falling back to OpMode Normal\n", __func__, opmode); | |
f93022c3 JR |
161 | } |
162 | ||
3e6e809f | 163 | val = ulpi_read(ulpi_vp, &ulpi->function_ctrl); |
f93022c3 JR |
164 | if (val == ULPI_ERROR) |
165 | return val; | |
166 | ||
167 | /* clear the previous opmode setting */ | |
168 | val = (val & ~ULPI_FC_OPMODE_MASK) | topmode; | |
169 | ||
3e6e809f | 170 | return ulpi_write(ulpi_vp, &ulpi->function_ctrl, val); |
f93022c3 JR |
171 | } |
172 | ||
3e6e809f | 173 | int ulpi_serial_mode_enable(struct ulpi_viewport *ulpi_vp, unsigned smode) |
f93022c3 JR |
174 | { |
175 | switch (smode) { | |
176 | case ULPI_IFACE_6_PIN_SERIAL_MODE: | |
177 | case ULPI_IFACE_3_PIN_SERIAL_MODE: | |
178 | break; | |
179 | default: | |
cf9f95f2 IG |
180 | printf("ULPI: %s: unrecognized Serial Mode specified: %u\n", |
181 | __func__, smode); | |
f93022c3 JR |
182 | return ULPI_ERROR; |
183 | } | |
184 | ||
3e6e809f | 185 | return ulpi_write(ulpi_vp, &ulpi->iface_ctrl_set, smode); |
f93022c3 JR |
186 | } |
187 | ||
3e6e809f | 188 | int ulpi_suspend(struct ulpi_viewport *ulpi_vp) |
f93022c3 | 189 | { |
4256101f | 190 | int err; |
f93022c3 | 191 | |
3e6e809f | 192 | err = ulpi_write(ulpi_vp, &ulpi->function_ctrl_clear, |
f93022c3 JR |
193 | ULPI_FC_SUSPENDM); |
194 | if (err) | |
195 | printf("ULPI: %s: failed writing the suspend bit\n", __func__); | |
196 | ||
197 | return err; | |
198 | } | |
199 | ||
200 | /* | |
201 | * Wait for ULPI PHY reset to complete. | |
202 | * Actual wait for reset must be done in a view port specific way, | |
203 | * because it involves checking the DIR line. | |
204 | */ | |
3e6e809f | 205 | static int __ulpi_reset_wait(struct ulpi_viewport *ulpi_vp) |
f93022c3 JR |
206 | { |
207 | u32 val; | |
208 | int timeout = CONFIG_USB_ULPI_TIMEOUT; | |
209 | ||
210 | /* Wait for the RESET bit to become zero */ | |
211 | while (--timeout) { | |
212 | /* | |
213 | * This function is generic and suppose to work | |
214 | * with any viewport, so we cheat here and don't check | |
215 | * for the error of ulpi_read(), if there is one, then | |
216 | * there will be a timeout. | |
217 | */ | |
3e6e809f | 218 | val = ulpi_read(ulpi_vp, &ulpi->function_ctrl); |
f93022c3 JR |
219 | if (!(val & ULPI_FC_RESET)) |
220 | return 0; | |
221 | ||
222 | udelay(1); | |
223 | } | |
224 | ||
225 | printf("ULPI: %s: reset timed out\n", __func__); | |
226 | ||
227 | return ULPI_ERROR; | |
228 | } | |
3e6e809f G |
229 | int ulpi_reset_wait(struct ulpi_viewport *ulpi_vp) |
230 | __attribute__((weak, alias("__ulpi_reset_wait"))); | |
f93022c3 | 231 | |
3e6e809f | 232 | int ulpi_reset(struct ulpi_viewport *ulpi_vp) |
f93022c3 | 233 | { |
4256101f | 234 | int err; |
f93022c3 | 235 | |
3e6e809f | 236 | err = ulpi_write(ulpi_vp, |
f93022c3 JR |
237 | &ulpi->function_ctrl_set, ULPI_FC_RESET); |
238 | if (err) { | |
239 | printf("ULPI: %s: failed writing reset bit\n", __func__); | |
240 | return err; | |
241 | } | |
242 | ||
3e6e809f | 243 | return ulpi_reset_wait(ulpi_vp); |
f93022c3 | 244 | } |