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Merge with git://www.denx.de/git/u-boot.git#testing-USB
[people/ms/u-boot.git] / drivers / usb_ohci.c
CommitLineData
3e326ece
MK		 1/*
2 * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200.
3 *
4 * (C) Copyright 2003
5 * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
6 *
7 * Note: Much of this code has been derived from Linux 2.4
8 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
9 * (C) Copyright 2000-2002 David Brownell
10 *
11 * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
12 * ebenard@eukrea.com - based on s3c24x0's driver
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
ddf83a2f 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3e326ece
MK		 25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
32 */
33/*
34 * IMPORTANT NOTES
35 * 1 - you MUST define LITTLEENDIAN in the configuration file for the
36 * board or this driver will NOT work!
37 * 2 - this driver is intended for use with USB Mass Storage Devices
38 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
39 * 3 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
40 * to activate workaround for bug #41 or this driver will NOT work!
41 */
42
43#include <common.h>
44/* #include <pci.h> no PCI on the S3C24X0 */
45
7b59b3c7 46#ifdef CONFIG_USB_OHCI_NEW
3e326ece 47
53e336e9 48/* mk: are these really required? */
ddf83a2f
MK		 49#if defined(CONFIG_S3C2400)
50# include <s3c2400.h>
51#elif defined(CONFIG_S3C2410)
52# include <s3c2410.h>
53#elif defined(CONFIG_ARM920T)
54# include <asm/arch/hardware.h>
55#elif defined(CONFIG_CPU_MONAHANS)
56# include <asm/arch/pxa-regs.h>
53e336e9
MK		 57#elif defined(CONFIG_MPC5200)
58# include <mpc5xxx.h>
ddf83a2f 59#endif
3e326ece
MK		 60
61#include <malloc.h>
62#include <usb.h>
63#include "usb_ohci.h"
64
ae3b770e 65#define S3C24X0_merge
ddf83a2f
MK		 66
67#if defined(CONFIG_ARM920T) || \
68 defined(CONFIG_S3C2400) || \
ae3b770e
MK		 69 defined(CONFIG_S3C2410) || \
70 defined(CONFIG_440EP) || \
71 defined(CONFIG_MPC5200)
24e37645
MK		 72# define OHCI_USE_NPS /* force NoPowerSwitching mode */
73#endif
74
3e326ece 75#undef OHCI_VERBOSE_DEBUG /* not always helpful */
ae3b770e
MK		 76#undef DEBUG
77#undef SHOW_INFO
78#undef OHCI_FILL_TRACE
3e326ece
MK		 79
80/* For initializing controller (mask in an HCFS mode too) */
81#define OHCI_CONTROL_INIT \
82 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
83
84#define readl(a) (*((vu_long *)(a)))
85#define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
86
87#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
88
89#undef DEBUG
90#ifdef DEBUG
91#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
92#else
93#define dbg(format, arg...) do {} while(0)
94#endif /* DEBUG */
95#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
96#undef SHOW_INFO
97#ifdef SHOW_INFO
98#define info(format, arg...) printf("INFO: " format "\n", ## arg)
99#else
100#define info(format, arg...) do {} while(0)
101#endif
102
ae3b770e
MK		 103#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
104# define m16_swap(x) (x)
105# define m32_swap(x) (x)
106#else
107# define m16_swap(x) swap_16(x)
108# define m32_swap(x) swap_32(x)
109#endif
3e326ece
MK		 110
111/* global ohci_t */
112static ohci_t gohci;
113/* this must be aligned to a 256 byte boundary */
114struct ohci_hcca ghcca[1];
115/* a pointer to the aligned storage */
116struct ohci_hcca *phcca;
117/* this allocates EDs for all possible endpoints */
118struct ohci_device ohci_dev;
119/* urb_priv */
120urb_priv_t urb_priv;
121/* RHSC flag */
122int got_rhsc;
123/* device which was disconnected */
124struct usb_device *devgone;
125
ddf83a2f
MK		 126#ifdef S3C24X0_merge
127/* flag guarding URB transation */
128int urb_finished = 0;
129#endif
130
131
3e326ece
MK		 132/*-------------------------------------------------------------------------*/
133
134/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
135 * The erratum (#4) description is incorrect. AMD's workaround waits
136 * till some bits (mostly reserved) are clear; ok for all revs.
137 */
138#define OHCI_QUIRK_AMD756 0xabcd
139#define read_roothub(hc, register, mask) ({ \
140 u32 temp = readl (&hc->regs->roothub.register); \
141 if (hc->flags & OHCI_QUIRK_AMD756) \
142 while (temp & mask) \
143 temp = readl (&hc->regs->roothub.register); \
144 temp; })
145
146static u32 roothub_a (struct ohci *hc)
147 { return read_roothub (hc, a, 0xfc0fe000); }
148static inline u32 roothub_b (struct ohci *hc)
149 { return readl (&hc->regs->roothub.b); }
150static inline u32 roothub_status (struct ohci *hc)
151 { return readl (&hc->regs->roothub.status); }
152static u32 roothub_portstatus (struct ohci *hc, int i)
153 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
154
155
156/* forward declaration */
157static int hc_interrupt (void);
158static void
159td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
160 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
161
162/*-------------------------------------------------------------------------*
163 * URB support functions
164 *-------------------------------------------------------------------------*/
165
166/* free HCD-private data associated with this URB */
167
168static void urb_free_priv (urb_priv_t * urb)
169{
170 int i;
171 int last;
172 struct td * td;
173
174 last = urb->length - 1;
175 if (last >= 0) {
176 for (i = 0; i <= last; i++) {
177 td = urb->td[i];
178 if (td) {
179 td->usb_dev = NULL;
180 urb->td[i] = NULL;
181 }
182 }
183 }
184}
185
186/*-------------------------------------------------------------------------*/
187
188#ifdef DEBUG
189static int sohci_get_current_frame_number (struct usb_device * dev);
190
191/* debug| print the main components of an URB
192 * small: 0) header + data packets 1) just header */
193
194static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
195 int transfer_len, struct devrequest * setup, char * str, int small)
196{
197 urb_priv_t * purb = &urb_priv;
198
199 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
200 str,
201 sohci_get_current_frame_number (dev),
202 usb_pipedevice (pipe),
203 usb_pipeendpoint (pipe),
204 usb_pipeout (pipe)? 'O': 'I',
205 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
206 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
207 purb->actual_length,
208 transfer_len, dev->status);
209#ifdef OHCI_VERBOSE_DEBUG
210 if (!small) {
211 int i, len;
212
213 if (usb_pipecontrol (pipe)) {
214 printf (__FILE__ ": cmd(8):");
215 for (i = 0; i < 8 ; i++)
216 printf (" %02x", ((__u8 *) setup) [i]);
217 printf ("\n");
218 }
219 if (transfer_len > 0 && buffer) {
220 printf (__FILE__ ": data(%d/%d):",
221 purb->actual_length,
222 transfer_len);
223 len = usb_pipeout (pipe)?
224 transfer_len: purb->actual_length;
225 for (i = 0; i < 16 && i < len; i++)
226 printf (" %02x", ((__u8 *) buffer) [i]);
227 printf ("%s\n", i < len? "...": "");
228 }
229 }
230#endif
231}
232
233/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
234void ep_print_int_eds (ohci_t *ohci, char * str) {
235 int i, j;
236 __u32 * ed_p;
237 for (i= 0; i < 32; i++) {
238 j = 5;
239 ed_p = &(ohci->hcca->int_table [i]);
240 if (*ed_p == 0)
241 continue;
242 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
243 while (*ed_p != 0 && j--) {
244 ed_t *ed = (ed_t *)m32_swap(ed_p);
245 printf (" ed: %4x;", ed->hwINFO);
246 ed_p = &ed->hwNextED;
247 }
248 printf ("\n");
249 }
250}
251
252static void ohci_dump_intr_mask (char *label, __u32 mask)
253{
254 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
255 label,
256 mask,
257 (mask & OHCI_INTR_MIE) ? " MIE" : "",
258 (mask & OHCI_INTR_OC) ? " OC" : "",
259 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
260 (mask & OHCI_INTR_FNO) ? " FNO" : "",
261 (mask & OHCI_INTR_UE) ? " UE" : "",
262 (mask & OHCI_INTR_RD) ? " RD" : "",
263 (mask & OHCI_INTR_SF) ? " SF" : "",
264 (mask & OHCI_INTR_WDH) ? " WDH" : "",
265 (mask & OHCI_INTR_SO) ? " SO" : ""
266 );
267}
268
269static void maybe_print_eds (char *label, __u32 value)
270{
271 ed_t *edp = (ed_t *)value;
272
273 if (value) {
274 dbg ("%s %08x", label, value);
275 dbg ("%08x", edp->hwINFO);
276 dbg ("%08x", edp->hwTailP);
277 dbg ("%08x", edp->hwHeadP);
278 dbg ("%08x", edp->hwNextED);
279 }
280}
281
282static char * hcfs2string (int state)
283{
284 switch (state) {
285 case OHCI_USB_RESET: return "reset";
286 case OHCI_USB_RESUME: return "resume";
287 case OHCI_USB_OPER: return "operational";
288 case OHCI_USB_SUSPEND: return "suspend";
289 }
290 return "?";
291}
292
293/* dump control and status registers */
294static void ohci_dump_status (ohci_t *controller)
295{
296 struct ohci_regs *regs = controller->regs;
297 __u32 temp;
298
299 temp = readl (&regs->revision) & 0xff;
300 if (temp != 0x10)
301 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
302
303 temp = readl (&regs->control);
304 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
305 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
306 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
307 (temp & OHCI_CTRL_IR) ? " IR" : "",
308 hcfs2string (temp & OHCI_CTRL_HCFS),
309 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
310 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
311 (temp & OHCI_CTRL_IE) ? " IE" : "",
312 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
313 temp & OHCI_CTRL_CBSR
314 );
315
316 temp = readl (&regs->cmdstatus);
317 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
318 (temp & OHCI_SOC) >> 16,
319 (temp & OHCI_OCR) ? " OCR" : "",
320 (temp & OHCI_BLF) ? " BLF" : "",
321 (temp & OHCI_CLF) ? " CLF" : "",
322 (temp & OHCI_HCR) ? " HCR" : ""
323 );
324
325 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
326 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
327
328 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
329
330 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
331 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
332
333 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
334 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
335
336 maybe_print_eds ("donehead", readl (&regs->donehead));
337}
338
339static void ohci_dump_roothub (ohci_t *controller, int verbose)
340{
341 __u32 temp, ndp, i;
342
343 temp = roothub_a (controller);
344 ndp = (temp & RH_A_NDP);
345#ifdef CONFIG_AT91C_PQFP_UHPBUG
346 ndp = (ndp == 2) ? 1:0;
3e326ece
MK		 347#endif
348 if (verbose) {
349 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
350 ((temp & RH_A_POTPGT) >> 24) & 0xff,
351 (temp & RH_A_NOCP) ? " NOCP" : "",
352 (temp & RH_A_OCPM) ? " OCPM" : "",
353 (temp & RH_A_DT) ? " DT" : "",
354 (temp & RH_A_NPS) ? " NPS" : "",
355 (temp & RH_A_PSM) ? " PSM" : "",
356 ndp
357 );
358 temp = roothub_b (controller);
359 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
360 temp,
361 (temp & RH_B_PPCM) >> 16,
362 (temp & RH_B_DR)
363 );
364 temp = roothub_status (controller);
365 dbg ("roothub.status: %08x%s%s%s%s%s%s",
366 temp,
367 (temp & RH_HS_CRWE) ? " CRWE" : "",
368 (temp & RH_HS_OCIC) ? " OCIC" : "",
369 (temp & RH_HS_LPSC) ? " LPSC" : "",
370 (temp & RH_HS_DRWE) ? " DRWE" : "",
371 (temp & RH_HS_OCI) ? " OCI" : "",
372 (temp & RH_HS_LPS) ? " LPS" : ""
373 );
374 }
375
376 for (i = 0; i < ndp; i++) {
377 temp = roothub_portstatus (controller, i);
378 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
379 i,
380 temp,
381 (temp & RH_PS_PRSC) ? " PRSC" : "",
382 (temp & RH_PS_OCIC) ? " OCIC" : "",
383 (temp & RH_PS_PSSC) ? " PSSC" : "",
384 (temp & RH_PS_PESC) ? " PESC" : "",
385 (temp & RH_PS_CSC) ? " CSC" : "",
386
387 (temp & RH_PS_LSDA) ? " LSDA" : "",
388 (temp & RH_PS_PPS) ? " PPS" : "",
389 (temp & RH_PS_PRS) ? " PRS" : "",
390 (temp & RH_PS_POCI) ? " POCI" : "",
391 (temp & RH_PS_PSS) ? " PSS" : "",
392
393 (temp & RH_PS_PES) ? " PES" : "",
394 (temp & RH_PS_CCS) ? " CCS" : ""
395 );
396 }
397}
398
399static void ohci_dump (ohci_t *controller, int verbose)
400{
401 dbg ("OHCI controller usb-%s state", controller->slot_name);
402
403 /* dumps some of the state we know about */
404 ohci_dump_status (controller);
405 if (verbose)
406 ep_print_int_eds (controller, "hcca");
407 dbg ("hcca frame #%04x", controller->hcca->frame_no);
408 ohci_dump_roothub (controller, 1);
409}
410
411
412#endif /* DEBUG */
413
414/*-------------------------------------------------------------------------*
415 * Interface functions (URB)
416 *-------------------------------------------------------------------------*/
417
418/* get a transfer request */
419
420int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
421 int transfer_len, struct devrequest *setup, int interval)
422{
423 ohci_t *ohci;
424 ed_t * ed;
425 urb_priv_t *purb_priv;
426 int i, size = 0;
427
428 ohci = &gohci;
429
430 /* when controller's hung, permit only roothub cleanup attempts
431 * such as powering down ports */
432 if (ohci->disabled) {
433 err("sohci_submit_job: EPIPE");
434 return -1;
435 }
ddf83a2f
MK		 436#ifdef S3C24X0_merge
437 /* if we have an unfinished URB from previous transaction let's
438 * fail and scream as quickly as possible so as not to corrupt
439 * further communication */
440 if (!urb_finished) {
441 err("sohci_submit_job: URB NOT FINISHED");
442 return -1;
443 }
444 /* we're about to begin a new transaction here so mark the URB unfinished */
445 urb_finished = 0;
446#endif
3e326ece
MK		 447
448 /* every endpoint has a ed, locate and fill it */
449 if (!(ed = ep_add_ed (dev, pipe))) {
450 err("sohci_submit_job: ENOMEM");
451 return -1;
452 }
453
454 /* for the private part of the URB we need the number of TDs (size) */
455 switch (usb_pipetype (pipe)) {
456 case PIPE_BULK: /* one TD for every 4096 Byte */
457 size = (transfer_len - 1) / 4096 + 1;
458 break;
459 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
460 size = (transfer_len == 0)? 2:
461 (transfer_len - 1) / 4096 + 3;
462 break;
463 }
464
465 if (size >= (N_URB_TD - 1)) {
466 err("need %d TDs, only have %d", size, N_URB_TD);
467 return -1;
468 }
469 purb_priv = &urb_priv;
470 purb_priv->pipe = pipe;
471
472 /* fill the private part of the URB */
473 purb_priv->length = size;
474 purb_priv->ed = ed;
475 purb_priv->actual_length = 0;
476
477 /* allocate the TDs */
478 /* note that td[0] was allocated in ep_add_ed */
479 for (i = 0; i < size; i++) {
480 purb_priv->td[i] = td_alloc (dev);
481 if (!purb_priv->td[i]) {
482 purb_priv->length = i;
483 urb_free_priv (purb_priv);
484 err("sohci_submit_job: ENOMEM");
485 return -1;
486 }
487 }
488
489 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
490 urb_free_priv (purb_priv);
491 err("sohci_submit_job: EINVAL");
492 return -1;
493 }
494
495 /* link the ed into a chain if is not already */
496 if (ed->state != ED_OPER)
497 ep_link (ohci, ed);
498
499 /* fill the TDs and link it to the ed */
500 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
501
502 return 0;
503}
504
505/*-------------------------------------------------------------------------*/
506
507#ifdef DEBUG
508/* tell us the current USB frame number */
509
510static int sohci_get_current_frame_number (struct usb_device *usb_dev)
511{
512 ohci_t *ohci = &gohci;
513
514 return m16_swap (ohci->hcca->frame_no);
515}
516#endif
517
518/*-------------------------------------------------------------------------*
519 * ED handling functions
520 *-------------------------------------------------------------------------*/
521
522/* link an ed into one of the HC chains */
523
524static int ep_link (ohci_t *ohci, ed_t *edi)
525{
526 volatile ed_t *ed = edi;
527
528 ed->state = ED_OPER;
529
530 switch (ed->type) {
531 case PIPE_CONTROL:
532 ed->hwNextED = 0;
533 if (ohci->ed_controltail == NULL) {
534 writel (ed, &ohci->regs->ed_controlhead);
535 } else {
ae3b770e 536 ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
3e326ece
MK		 537 }
538 ed->ed_prev = ohci->ed_controltail;
539 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
540 !ohci->ed_rm_list[1] && !ohci->sleeping) {
541 ohci->hc_control |= OHCI_CTRL_CLE;
542 writel (ohci->hc_control, &ohci->regs->control);
543 }
544 ohci->ed_controltail = edi;
545 break;
546
547 case PIPE_BULK:
548 ed->hwNextED = 0;
549 if (ohci->ed_bulktail == NULL) {
550 writel (ed, &ohci->regs->ed_bulkhead);
551 } else {
ae3b770e 552 ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
3e326ece
MK		 553 }
554 ed->ed_prev = ohci->ed_bulktail;
555 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
556 !ohci->ed_rm_list[1] && !ohci->sleeping) {
557 ohci->hc_control |= OHCI_CTRL_BLE;
558 writel (ohci->hc_control, &ohci->regs->control);
559 }
560 ohci->ed_bulktail = edi;
561 break;
562 }
563 return 0;
564}
565
566/*-------------------------------------------------------------------------*/
567
568/* unlink an ed from one of the HC chains.
569 * just the link to the ed is unlinked.
570 * the link from the ed still points to another operational ed or 0
571 * so the HC can eventually finish the processing of the unlinked ed */
572
53e336e9 573static int ep_unlink (ohci_t *ohci, ed_t *edi)
3e326ece 574{
53e336e9
MK		 575 volatile ed_t *ed = edi;
576
3e326ece
MK		 577 ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
578
579 switch (ed->type) {
580 case PIPE_CONTROL:
581 if (ed->ed_prev == NULL) {
582 if (!ed->hwNextED) {
583 ohci->hc_control &= ~OHCI_CTRL_CLE;
584 writel (ohci->hc_control, &ohci->regs->control);
585 }
586 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
587 } else {
588 ed->ed_prev->hwNextED = ed->hwNextED;
589 }
590 if (ohci->ed_controltail == ed) {
591 ohci->ed_controltail = ed->ed_prev;
592 } else {
593 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
594 }
595 break;
596
597 case PIPE_BULK:
598 if (ed->ed_prev == NULL) {
599 if (!ed->hwNextED) {
600 ohci->hc_control &= ~OHCI_CTRL_BLE;
601 writel (ohci->hc_control, &ohci->regs->control);
602 }
603 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
604 } else {
605 ed->ed_prev->hwNextED = ed->hwNextED;
606 }
607 if (ohci->ed_bulktail == ed) {
608 ohci->ed_bulktail = ed->ed_prev;
609 } else {
610 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
611 }
612 break;
613 }
614 ed->state = ED_UNLINK;
615 return 0;
616}
617
618
619/*-------------------------------------------------------------------------*/
620
ddf83a2f
MK		 621/* add/reinit an endpoint; this should be done once at the
622 * usb_set_configuration command, but the USB stack is a little bit
623 * stateless so we do it at every transaction if the state of the ed
624 * is ED_NEW then a dummy td is added and the state is changed to
625 * ED_UNLINK in all other cases the state is left unchanged the ed
626 * info fields are setted anyway even though most of them should not
627 * change
628 */
3e326ece
MK		 629static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
630{
631 td_t *td;
632 ed_t *ed_ret;
633 volatile ed_t *ed;
634
635 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
636 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
637
638 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
639 err("ep_add_ed: pending delete");
640 /* pending delete request */
641 return NULL;
642 }
643
644 if (ed->state == ED_NEW) {
645 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
646 /* dummy td; end of td list for ed */
647 td = td_alloc (usb_dev);
ae3b770e 648 ed->hwTailP = m32_swap ((unsigned long)td);
3e326ece
MK		 649 ed->hwHeadP = ed->hwTailP;
650 ed->state = ED_UNLINK;
651 ed->type = usb_pipetype (pipe);
652 ohci_dev.ed_cnt++;
653 }
654
655 ed->hwINFO = m32_swap (usb_pipedevice (pipe)
656 | usb_pipeendpoint (pipe) << 7
657 | (usb_pipeisoc (pipe)? 0x8000: 0)
658 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
659 | usb_pipeslow (pipe) << 13
660 | usb_maxpacket (usb_dev, pipe) << 16);
661
662 return ed_ret;
663}
664
665/*-------------------------------------------------------------------------*
666 * TD handling functions
667 *-------------------------------------------------------------------------*/
668
669/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
670
671static void td_fill (ohci_t *ohci, unsigned int info,
672 void *data, int len,
673 struct usb_device *dev, int index, urb_priv_t *urb_priv)
674{
675 volatile td_t *td, *td_pt;
676#ifdef OHCI_FILL_TRACE
677 int i;
678#endif
679
680 if (index > urb_priv->length) {
681 err("index > length");
682 return;
683 }
684 /* use this td as the next dummy */
685 td_pt = urb_priv->td [index];
686 td_pt->hwNextTD = 0;
687
688 /* fill the old dummy TD */
689 td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
690
691 td->ed = urb_priv->ed;
692 td->next_dl_td = NULL;
693 td->index = index;
694 td->data = (__u32)data;
695#ifdef OHCI_FILL_TRACE
696 if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
697 for (i = 0; i < len; i++)
698 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
699 printf("\n");
700 }
701#endif
702 if (!len)
703 data = 0;
704
705 td->hwINFO = m32_swap (info);
ae3b770e 706 td->hwCBP = m32_swap ((unsigned long)data);
3e326ece 707 if (data)
ae3b770e 708 td->hwBE = m32_swap ((unsigned long)(data + len - 1));
3e326ece
MK		 709 else
710 td->hwBE = 0;
ae3b770e 711 td->hwNextTD = m32_swap ((unsigned long)td_pt);
ddf83a2f 712#ifndef S3C24X0_merge
3e326ece 713 td->hwPSW [0] = m16_swap (((__u32)data & 0x0FFF) | 0xE000);
ddf83a2f 714#endif
3e326ece
MK		 715
716 /* append to queue */
717 td->ed->hwTailP = td->hwNextTD;
718}
719
720/*-------------------------------------------------------------------------*/
721
722/* prepare all TDs of a transfer */
723
724static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
725 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
726{
727 ohci_t *ohci = &gohci;
728 int data_len = transfer_len;
729 void *data;
730 int cnt = 0;
731 __u32 info = 0;
732 unsigned int toggle = 0;
733
734 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
735 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
736 toggle = TD_T_TOGGLE;
737 } else {
738 toggle = TD_T_DATA0;
739 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
740 }
741 urb->td_cnt = 0;
742 if (data_len)
743 data = buffer;
744 else
745 data = 0;
746
747 switch (usb_pipetype (pipe)) {
748 case PIPE_BULK:
749 info = usb_pipeout (pipe)?
750 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
751 while(data_len > 4096) {
752 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
753 data += 4096; data_len -= 4096; cnt++;
754 }
755 info = usb_pipeout (pipe)?
756 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
757 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
758 cnt++;
759
760 if (!ohci->sleeping)
761 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
762 break;
763
764 case PIPE_CONTROL:
765 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
766 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
767 if (data_len > 0) {
768 info = usb_pipeout (pipe)?
769 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
770 /* NOTE: mishandles transfers >8K, some >4K */
771 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
772 }
773 info = usb_pipeout (pipe)?
774 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
775 td_fill (ohci, info, data, 0, dev, cnt++, urb);
776 if (!ohci->sleeping)
777 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
778 break;
779 }
780 if (urb->length != cnt)
781 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
782}
783
784/*-------------------------------------------------------------------------*
785 * Done List handling functions
786 *-------------------------------------------------------------------------*/
787
788
789/* calculate the transfer length and update the urb */
790
791static void dl_transfer_length(td_t * td)
792{
793 __u32 tdINFO, tdBE, tdCBP;
794 urb_priv_t *lurb_priv = &urb_priv;
795
796 tdINFO = m32_swap (td->hwINFO);
797 tdBE = m32_swap (td->hwBE);
798 tdCBP = m32_swap (td->hwCBP);
799
800
801 if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
802 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
803 if (tdBE != 0) {
804 if (td->hwCBP == 0)
805 lurb_priv->actual_length += tdBE - td->data + 1;
806 else
807 lurb_priv->actual_length += tdCBP - td->data;
808 }
809 }
810}
811
812/*-------------------------------------------------------------------------*/
813
814/* replies to the request have to be on a FIFO basis so
815 * we reverse the reversed done-list */
816
817static td_t * dl_reverse_done_list (ohci_t *ohci)
818{
819 __u32 td_list_hc;
820 td_t *td_rev = NULL;
821 td_t *td_list = NULL;
822 urb_priv_t *lurb_priv = NULL;
823
824 td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
825 ohci->hcca->done_head = 0;
826
827 while (td_list_hc) {
828 td_list = (td_t *)td_list_hc;
829
830 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
831 lurb_priv = &urb_priv;
832 dbg(" USB-error/status: %x : %p",
833 TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
834 if (td_list->ed->hwHeadP & m32_swap (0x1)) {
835 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
836 td_list->ed->hwHeadP =
837 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
838 (td_list->ed->hwHeadP & m32_swap (0x2));
839 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
840 } else
841 td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
842 }
53e336e9
MK		 843#ifdef CONFIG_MPC5200
844 td_list->hwNextTD = 0;
845#endif
3e326ece
MK		 846 }
847
848 td_list->next_dl_td = td_rev;
849 td_rev = td_list;
850 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
851 }
852 return td_list;
853}
854
855/*-------------------------------------------------------------------------*/
856
857/* td done list */
858static int dl_done_list (ohci_t *ohci, td_t *td_list)
859{
860 td_t *td_list_next = NULL;
861 ed_t *ed;
862 int cc = 0;
863 int stat = 0;
864 /* urb_t *urb; */
865 urb_priv_t *lurb_priv;
866 __u32 tdINFO, edHeadP, edTailP;
867
868 while (td_list) {
869 td_list_next = td_list->next_dl_td;
870
871 lurb_priv = &urb_priv;
872 tdINFO = m32_swap (td_list->hwINFO);
873
874 ed = td_list->ed;
875
876 dl_transfer_length(td_list);
877
878 /* error code of transfer */
879 cc = TD_CC_GET (tdINFO);
880 if (cc != 0) {
881 dbg("ConditionCode %#x", cc);
882 stat = cc_to_error[cc];
883 }
ddf83a2f
MK		 884#ifdef S3C24X0_merge
885 /* see if this done list makes for all TD's of current URB,
886 * and mark the URB finished if so */
887 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
ae3b770e
MK		 888#if 1
889 if ((ed->state & (ED_OPER | ED_UNLINK)) &&
890 (lurb_priv->state != URB_DEL))
891#else
ddf83a2f 892 if ((ed->state & (ED_OPER | ED_UNLINK)))
ae3b770e 893#endif
ddf83a2f
MK		 894 urb_finished = 1;
895 else
896 dbg("dl_done_list: strange.., ED state %x, ed->state\n");
897 } else
898 dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
899 lurb_priv->length);
900#endif
3e326ece
MK		 901 if (ed->state != ED_NEW) {
902 edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
903 edTailP = m32_swap (ed->hwTailP);
904
905 /* unlink eds if they are not busy */
906 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
907 ep_unlink (ohci, ed);
908 }
909
910 td_list = td_list_next;
911 }
912 return stat;
913}
914
915/*-------------------------------------------------------------------------*
916 * Virtual Root Hub
917 *-------------------------------------------------------------------------*/
918
919/* Device descriptor */
920static __u8 root_hub_dev_des[] =
921{
922 0x12, /* __u8 bLength; */
923 0x01, /* __u8 bDescriptorType; Device */
924 0x10, /* __u16 bcdUSB; v1.1 */
925 0x01,
926 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
927 0x00, /* __u8 bDeviceSubClass; */
928 0x00, /* __u8 bDeviceProtocol; */
929 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
930 0x00, /* __u16 idVendor; */
931 0x00,
932 0x00, /* __u16 idProduct; */
933 0x00,
934 0x00, /* __u16 bcdDevice; */
935 0x00,
936 0x00, /* __u8 iManufacturer; */
937 0x01, /* __u8 iProduct; */
938 0x00, /* __u8 iSerialNumber; */
939 0x01 /* __u8 bNumConfigurations; */
940};
941
942
943/* Configuration descriptor */
944static __u8 root_hub_config_des[] =
945{
946 0x09, /* __u8 bLength; */
947 0x02, /* __u8 bDescriptorType; Configuration */
948 0x19, /* __u16 wTotalLength; */
949 0x00,
950 0x01, /* __u8 bNumInterfaces; */
951 0x01, /* __u8 bConfigurationValue; */
952 0x00, /* __u8 iConfiguration; */
953 0x40, /* __u8 bmAttributes;
954 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
955 0x00, /* __u8 MaxPower; */
956
957 /* interface */
958 0x09, /* __u8 if_bLength; */
959 0x04, /* __u8 if_bDescriptorType; Interface */
960 0x00, /* __u8 if_bInterfaceNumber; */
961 0x00, /* __u8 if_bAlternateSetting; */
962 0x01, /* __u8 if_bNumEndpoints; */
963 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
964 0x00, /* __u8 if_bInterfaceSubClass; */
965 0x00, /* __u8 if_bInterfaceProtocol; */
966 0x00, /* __u8 if_iInterface; */
967
968 /* endpoint */
969 0x07, /* __u8 ep_bLength; */
970 0x05, /* __u8 ep_bDescriptorType; Endpoint */
971 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
972 0x03, /* __u8 ep_bmAttributes; Interrupt */
973 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
974 0x00,
975 0xff /* __u8 ep_bInterval; 255 ms */
976};
977
978static unsigned char root_hub_str_index0[] =
979{
980 0x04, /* __u8 bLength; */
981 0x03, /* __u8 bDescriptorType; String-descriptor */
982 0x09, /* __u8 lang ID */
983 0x04, /* __u8 lang ID */
984};
985
986static unsigned char root_hub_str_index1[] =
987{
988 28, /* __u8 bLength; */
989 0x03, /* __u8 bDescriptorType; String-descriptor */
990 'O', /* __u8 Unicode */
991 0, /* __u8 Unicode */
992 'H', /* __u8 Unicode */
993 0, /* __u8 Unicode */
994 'C', /* __u8 Unicode */
995 0, /* __u8 Unicode */
996 'I', /* __u8 Unicode */
997 0, /* __u8 Unicode */
998 ' ', /* __u8 Unicode */
999 0, /* __u8 Unicode */
1000 'R', /* __u8 Unicode */
1001 0, /* __u8 Unicode */
1002 'o', /* __u8 Unicode */
1003 0, /* __u8 Unicode */
1004 'o', /* __u8 Unicode */
1005 0, /* __u8 Unicode */
1006 't', /* __u8 Unicode */
1007 0, /* __u8 Unicode */
1008 ' ', /* __u8 Unicode */
1009 0, /* __u8 Unicode */
1010 'H', /* __u8 Unicode */
1011 0, /* __u8 Unicode */
1012 'u', /* __u8 Unicode */
1013 0, /* __u8 Unicode */
1014 'b', /* __u8 Unicode */
1015 0, /* __u8 Unicode */
1016};
1017
1018/* Hub class-specific descriptor is constructed dynamically */
1019
1020
1021/*-------------------------------------------------------------------------*/
1022
1023#define OK(x) len = (x); break
1024#ifdef DEBUG
1025#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
1026#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
1027#else
1028#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
1029#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
1030#endif
1031#define RD_RH_STAT roothub_status(&gohci)
1032#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
1033
1034/* request to virtual root hub */
1035
1036int rh_check_port_status(ohci_t *controller)
1037{
1038 __u32 temp, ndp, i;
1039 int res;
1040
1041 res = -1;
1042 temp = roothub_a (controller);
1043 ndp = (temp & RH_A_NDP);
1044#ifdef CONFIG_AT91C_PQFP_UHPBUG
1045 ndp = (ndp == 2) ? 1:0;
1046#endif
1047 for (i = 0; i < ndp; i++) {
1048 temp = roothub_portstatus (controller, i);
1049 /* check for a device disconnect */
1050 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1051 (RH_PS_PESC | RH_PS_CSC)) &&
1052 ((temp & RH_PS_CCS) == 0)) {
1053 res = i;
1054 break;
1055 }
1056 }
1057 return res;
1058}
1059
1060static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1061 void *buffer, int transfer_len, struct devrequest *cmd)
1062{
1063 void * data = buffer;
1064 int leni = transfer_len;
1065 int len = 0;
1066 int stat = 0;
1067 __u32 datab[4];
1068 __u8 *data_buf = (__u8 *)datab;
1069 __u16 bmRType_bReq;
1070 __u16 wValue;
1071 __u16 wIndex;
1072 __u16 wLength;
1073
1074#ifdef DEBUG
1075urb_priv.actual_length = 0;
1076pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1077#else
1078 wait_ms(1);
1079#endif
1080 if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1081 info("Root-Hub submit IRQ: NOT implemented");
1082 return 0;
1083 }
1084
1085 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
ae3b770e
MK		 1086#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
1087 wValue = __swap_16(cmd->value);
1088 wIndex = __swap_16(cmd->index);
1089 wLength = __swap_16(cmd->length);
1090#else
3e326ece
MK		 1091 wValue = m16_swap (cmd->value);
1092 wIndex = m16_swap (cmd->index);
1093 wLength = m16_swap (cmd->length);
ae3b770e 1094#endif /* CONFIG_440EP || CONFIG_MPC5200 */
3e326ece
MK		 1095
1096 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1097 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1098
1099 switch (bmRType_bReq) {
1100 /* Request Destination:
1101 without flags: Device,
1102 RH_INTERFACE: interface,
1103 RH_ENDPOINT: endpoint,
1104 RH_CLASS means HUB here,
1105 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1106 */
1107
ae3b770e
MK		 1108#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
1109 case RH_GET_STATUS:
1110 *(__u16 *) data_buf = __swap_16(1); OK (2);
1111 case RH_GET_STATUS | RH_INTERFACE:
1112 *(__u16 *) data_buf = __swap_16(0); OK (2);
1113 case RH_GET_STATUS | RH_ENDPOINT:
1114 *(__u16 *) data_buf = __swap_16(0); OK (2);
1115 case RH_GET_STATUS | RH_CLASS:
1116 *(__u32 *) data_buf = __swap_32(
1117 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1118 OK (4);
1119 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1120 *(__u32 *) data_buf = __swap_32(RD_RH_PORTSTAT); OK (4);
1121#else
3e326ece
MK		 1122 case RH_GET_STATUS:
1123 *(__u16 *) data_buf = m16_swap (1); OK (2);
1124 case RH_GET_STATUS | RH_INTERFACE:
1125 *(__u16 *) data_buf = m16_swap (0); OK (2);
1126 case RH_GET_STATUS | RH_ENDPOINT:
1127 *(__u16 *) data_buf = m16_swap (0); OK (2);
1128 case RH_GET_STATUS | RH_CLASS:
1129 *(__u32 *) data_buf = m32_swap (
1130 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1131 OK (4);
1132 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1133 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
ae3b770e 1134#endif /* CONFIG_440EP || CONFIG_MPC5200 */
3e326ece
MK		 1135
1136 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1137 switch (wValue) {
1138 case (RH_ENDPOINT_STALL): OK (0);
1139 }
1140 break;
1141
1142 case RH_CLEAR_FEATURE | RH_CLASS:
1143 switch (wValue) {
1144 case RH_C_HUB_LOCAL_POWER:
1145 OK(0);
1146 case (RH_C_HUB_OVER_CURRENT):
1147 WR_RH_STAT(RH_HS_OCIC); OK (0);
1148 }
1149 break;
1150
1151 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1152 switch (wValue) {
1153 case (RH_PORT_ENABLE):
1154 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1155 case (RH_PORT_SUSPEND):
1156 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1157 case (RH_PORT_POWER):
1158 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1159 case (RH_C_PORT_CONNECTION):
1160 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1161 case (RH_C_PORT_ENABLE):
1162 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1163 case (RH_C_PORT_SUSPEND):
1164 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1165 case (RH_C_PORT_OVER_CURRENT):
1166 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1167 case (RH_C_PORT_RESET):
1168 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1169 }
1170 break;
1171
1172 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1173 switch (wValue) {
1174 case (RH_PORT_SUSPEND):
1175 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1176 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1177 if (RD_RH_PORTSTAT & RH_PS_CCS)
1178 WR_RH_PORTSTAT (RH_PS_PRS);
1179 OK (0);
1180 case (RH_PORT_POWER):
1181 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1182 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1183 if (RD_RH_PORTSTAT & RH_PS_CCS)
1184 WR_RH_PORTSTAT (RH_PS_PES );
1185 OK (0);
1186 }
1187 break;
1188
1189 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1190
1191 case RH_GET_DESCRIPTOR:
1192 switch ((wValue & 0xff00) >> 8) {
1193 case (0x01): /* device descriptor */
1194 len = min_t(unsigned int,
1195 leni,
1196 min_t(unsigned int,
1197 sizeof (root_hub_dev_des),
1198 wLength));
1199 data_buf = root_hub_dev_des; OK(len);
1200 case (0x02): /* configuration descriptor */
1201 len = min_t(unsigned int,
1202 leni,
1203 min_t(unsigned int,
1204 sizeof (root_hub_config_des),
1205 wLength));
1206 data_buf = root_hub_config_des; OK(len);
1207 case (0x03): /* string descriptors */
1208 if(wValue==0x0300) {
1209 len = min_t(unsigned int,
1210 leni,
1211 min_t(unsigned int,
1212 sizeof (root_hub_str_index0),
1213 wLength));
1214 data_buf = root_hub_str_index0;
1215 OK(len);
1216 }
1217 if(wValue==0x0301) {
1218 len = min_t(unsigned int,
1219 leni,
1220 min_t(unsigned int,
1221 sizeof (root_hub_str_index1),
1222 wLength));
1223 data_buf = root_hub_str_index1;
1224 OK(len);
1225 }
1226 default:
1227 stat = USB_ST_STALLED;
1228 }
1229 break;
1230
1231 case RH_GET_DESCRIPTOR | RH_CLASS:
1232 {
1233 __u32 temp = roothub_a (&gohci);
1234
1235 data_buf [0] = 9; /* min length; */
1236 data_buf [1] = 0x29;
1237 data_buf [2] = temp & RH_A_NDP;
1238#ifdef CONFIG_AT91C_PQFP_UHPBUG
1239 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1240#endif
3e326ece
MK		 1241 data_buf [3] = 0;
1242 if (temp & RH_A_PSM) /* per-port power switching? */
1243 data_buf [3] |= 0x1;
1244 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1245 data_buf [3] |= 0x10;
3e326ece
MK		 1246 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1247 data_buf [3] |= 0x8;
3e326ece
MK		 1248
1249 /* corresponds to data_buf[4-7] */
1250 datab [1] = 0;
1251 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1252 temp = roothub_b (&gohci);
1253 data_buf [7] = temp & RH_B_DR;
1254 if (data_buf [2] < 7) {
1255 data_buf [8] = 0xff;
1256 } else {
1257 data_buf [0] += 2;
1258 data_buf [8] = (temp & RH_B_DR) >> 8;
1259 data_buf [10] = data_buf [9] = 0xff;
1260 }
1261
1262 len = min_t(unsigned int, leni,
ddf83a2f 1263 min_t(unsigned int, data_buf [0], wLength));
3e326ece
MK		 1264 OK (len);
1265 }
1266
1267 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1268
1269 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1270
1271 default:
1272 dbg ("unsupported root hub command");
1273 stat = USB_ST_STALLED;
1274 }
1275
1276#ifdef DEBUG
1277 ohci_dump_roothub (&gohci, 1);
1278#else
1279 wait_ms(1);
1280#endif
1281
1282 len = min_t(int, len, leni);
1283 if (data != data_buf)
1284 memcpy (data, data_buf, len);
1285 dev->act_len = len;
1286 dev->status = stat;
1287
1288#ifdef DEBUG
1289 if (transfer_len)
1290 urb_priv.actual_length = transfer_len;
1291 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1292#else
1293 wait_ms(1);
1294#endif
1295
1296 return stat;
1297}
1298
1299/*-------------------------------------------------------------------------*/
1300
1301/* common code for handling submit messages - used for all but root hub */
1302/* accesses. */
1303int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1304 int transfer_len, struct devrequest *setup, int interval)
1305{
1306 int stat = 0;
1307 int maxsize = usb_maxpacket(dev, pipe);
1308 int timeout;
1309
1310 /* device pulled? Shortcut the action. */
1311 if (devgone == dev) {
1312 dev->status = USB_ST_CRC_ERR;
1313 return 0;
1314 }
1315
1316#ifdef DEBUG
1317 urb_priv.actual_length = 0;
1318 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1319#else
1320 wait_ms(1);
1321#endif
1322 if (!maxsize) {
1323 err("submit_common_message: pipesize for pipe %lx is zero",
1324 pipe);
1325 return -1;
1326 }
1327
1328 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1329 err("sohci_submit_job failed");
1330 return -1;
1331 }
1332
ae3b770e 1333#if 0
3e326ece
MK		 1334 wait_ms(10);
1335 /* ohci_dump_status(&gohci); */
ae3b770e 1336#endif
3e326ece
MK		 1337
1338 /* allow more time for a BULK device to react - some are slow */
1339#define BULK_TO 5000 /* timeout in milliseconds */
1340 if (usb_pipetype (pipe) == PIPE_BULK)
1341 timeout = BULK_TO;
1342 else
1343 timeout = 100;
1344
1345 /* wait for it to complete */
1346 for (;;) {
1347 /* check whether the controller is done */
1348 stat = hc_interrupt();
1349 if (stat < 0) {
1350 stat = USB_ST_CRC_ERR;
1351 break;
1352 }
ddf83a2f
MK		 1353
1354#ifdef S3C24X0_merge
1355 /* NOTE: since we are not interrupt driven in U-Boot and always
1356 * handle only one URB at a time, we cannot assume the
1357 * transaction finished on the first successful return from
1358 * hc_interrupt().. unless the flag for current URB is set,
1359 * meaning that all TD's to/from device got actually
1360 * transferred and processed. If the current URB is not
1361 * finished we need to re-iterate this loop so as
1362 * hc_interrupt() gets called again as there needs to be some
1363 * more TD's to process still */
1364 if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
1365#else
3e326ece 1366 if (stat >= 0 && stat != 0xff) {
ddf83a2f 1367#endif
3e326ece
MK		 1368 /* 0xff is returned for an SF-interrupt */
1369 break;
1370 }
ddf83a2f 1371
3e326ece
MK		 1372 if (--timeout) {
1373 wait_ms(1);
1374 } else {
1375 err("CTL:TIMEOUT ");
ddf83a2f
MK		 1376#ifdef S3C24X0_merge
1377 dbg("submit_common_msg: TO status %x\n", stat);
ae3b770e 1378 stat = USB_ST_CRC_ERR;
ddf83a2f
MK		 1379 urb_finished = 1;
1380#endif
3e326ece
MK		 1381 stat = USB_ST_CRC_ERR;
1382 break;
1383 }
1384 }
ddf83a2f 1385#ifndef S3C24X0_merge
3e326ece
MK		 1386 /* we got an Root Hub Status Change interrupt */
1387 if (got_rhsc) {
1388#ifdef DEBUG
1389 ohci_dump_roothub (&gohci, 1);
1390#endif
1391 got_rhsc = 0;
1392 /* abuse timeout */
1393 timeout = rh_check_port_status(&gohci);
1394 if (timeout >= 0) {
1395#if 0 /* this does nothing useful, but leave it here in case that changes */
1396 /* the called routine adds 1 to the passed value */
1397 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1398#endif
1399 /*
1400 * XXX
1401 * This is potentially dangerous because it assumes
1402 * that only one device is ever plugged in!
1403 */
1404 devgone = dev;
1405 }
1406 }
ddf83a2f 1407#endif /* S3C24X0_merge */
3e326ece
MK		 1408
1409 dev->status = stat;
1410 dev->act_len = transfer_len;
1411
1412#ifdef DEBUG
1413 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1414#else
1415 wait_ms(1);
1416#endif
1417
1418 /* free TDs in urb_priv */
1419 urb_free_priv (&urb_priv);
1420 return 0;
1421}
1422
1423/* submit routines called from usb.c */
1424int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1425 int transfer_len)
1426{
1427 info("submit_bulk_msg");
1428 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1429}
1430
1431int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1432 int transfer_len, struct devrequest *setup)
1433{
1434 int maxsize = usb_maxpacket(dev, pipe);
1435
1436 info("submit_control_msg");
1437#ifdef DEBUG
1438 urb_priv.actual_length = 0;
1439 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1440#else
1441 wait_ms(1);
1442#endif
1443 if (!maxsize) {
1444 err("submit_control_message: pipesize for pipe %lx is zero",
1445 pipe);
1446 return -1;
1447 }
1448 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1449 gohci.rh.dev = dev;
1450 /* root hub - redirect */
1451 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1452 setup);
1453 }
1454
1455 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1456}
1457
1458int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1459 int transfer_len, int interval)
1460{
1461 info("submit_int_msg");
1462 return -1;
1463}
1464
1465/*-------------------------------------------------------------------------*
1466 * HC functions
1467 *-------------------------------------------------------------------------*/
1468
1469/* reset the HC and BUS */
1470
1471static int hc_reset (ohci_t *ohci)
1472{
1473 int timeout = 30;
1474 int smm_timeout = 50; /* 0,5 sec */
1475
1476 dbg("%s\n", __FUNCTION__);
1477
1478 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1479 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1480 info("USB HC TakeOver from SMM");
1481 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1482 wait_ms (10);
1483 if (--smm_timeout == 0) {
1484 err("USB HC TakeOver failed!");
1485 return -1;
1486 }
1487 }
1488 }
1489
1490 /* Disable HC interrupts */
1491 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1492
1493 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1494 ohci->slot_name,
1495 readl(&ohci->regs->control));
1496
1497 /* Reset USB (needed by some controllers) */
53e336e9
MK		 1498 ohci->hc_control = 0;
1499 writel (ohci->hc_control, &ohci->regs->control);
3e326ece
MK		 1500
1501 /* HC Reset requires max 10 us delay */
1502 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1503 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1504 if (--timeout == 0) {
1505 err("USB HC reset timed out!");
1506 return -1;
1507 }
1508 udelay (1);
1509 }
1510 return 0;
1511}
1512
1513/*-------------------------------------------------------------------------*/
1514
1515/* Start an OHCI controller, set the BUS operational
1516 * enable interrupts
1517 * connect the virtual root hub */
1518
1519static int hc_start (ohci_t * ohci)
1520{
1521 __u32 mask;
1522 unsigned int fminterval;
1523
1524 ohci->disabled = 1;
1525
1526 /* Tell the controller where the control and bulk lists are
1527 * The lists are empty now. */
1528
1529 writel (0, &ohci->regs->ed_controlhead);
1530 writel (0, &ohci->regs->ed_bulkhead);
1531
1532 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1533
1534 fminterval = 0x2edf;
1535 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1536 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1537 writel (fminterval, &ohci->regs->fminterval);
1538 writel (0x628, &ohci->regs->lsthresh);
1539
1540 /* start controller operations */
1541 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1542 ohci->disabled = 0;
1543 writel (ohci->hc_control, &ohci->regs->control);
1544
1545 /* disable all interrupts */
1546 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1547 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1548 OHCI_INTR_OC | OHCI_INTR_MIE);
1549 writel (mask, &ohci->regs->intrdisable);
1550 /* clear all interrupts */
1551 mask &= ~OHCI_INTR_MIE;
1552 writel (mask, &ohci->regs->intrstatus);
1553 /* Choose the interrupts we care about now - but w/o MIE */
1554 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1555 writel (mask, &ohci->regs->intrenable);
1556
1557#ifdef OHCI_USE_NPS
1558 /* required for AMD-756 and some Mac platforms */
1559 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1560 &ohci->regs->roothub.a);
1561 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1562#endif /* OHCI_USE_NPS */
1563
1564#define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1565 /* POTPGT delay is bits 24-31, in 2 ms units. */
1566 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1567
1568 /* connect the virtual root hub */
1569 ohci->rh.devnum = 0;
1570
1571 return 0;
1572}
1573
1574/*-------------------------------------------------------------------------*/
1575
1576/* an interrupt happens */
1577
ddf83a2f 1578static int hc_interrupt (void)
3e326ece
MK		 1579{
1580 ohci_t *ohci = &gohci;
1581 struct ohci_regs *regs = ohci->regs;
1582 int ints;
1583 int stat = -1;
1584
ddf83a2f
MK		 1585#ifdef S3C24X0_merge
1586
1587 if ((ohci->hcca->done_head != 0) &&
1588 !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1589 ints = OHCI_INTR_WDH;
1590 } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1591 ohci->disabled++;
1592 err ("%s device removed!", ohci->slot_name);
1593 return -1;
1594 } else if ((ints &= readl (&regs->intrenable)) == 0) {
1595 dbg("hc_interrupt: returning..\n");
1596 return 0xff;
1597 }
1598#else
3e326ece
MK		 1599 if ((ohci->hcca->done_head != 0) && !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1600 ints = OHCI_INTR_WDH;
1601 } else {
1602 ints = readl (&regs->intrstatus);
1603 }
ddf83a2f 1604#endif
3e326ece
MK		 1605 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1606
1607 if (ints & OHCI_INTR_RHSC) {
1608 got_rhsc = 1;
ddf83a2f
MK		 1609#ifdef S3C24X0_merge
1610 stat = 0xff;
1611#endif
3e326ece
MK		 1612 }
1613
1614 if (ints & OHCI_INTR_UE) {
1615 ohci->disabled++;
1616 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1617 ohci->slot_name);
1618 /* e.g. due to PCI Master/Target Abort */
1619
1620#ifdef DEBUG
1621 ohci_dump (ohci, 1);
1622#else
1623 wait_ms(1);
1624#endif
1625 /* FIXME: be optimistic, hope that bug won't repeat often. */
1626 /* Make some non-interrupt context restart the controller. */
1627 /* Count and limit the retries though; either hardware or */
1628 /* software errors can go forever... */
1629 hc_reset (ohci);
1630 return -1;
1631 }
1632
1633 if (ints & OHCI_INTR_WDH) {
1634 wait_ms(1);
1635 writel (OHCI_INTR_WDH, &regs->intrdisable);
1636 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1637 writel (OHCI_INTR_WDH, &regs->intrenable);
1638 }
1639
1640 if (ints & OHCI_INTR_SO) {
1641 dbg("USB Schedule overrun\n");
1642 writel (OHCI_INTR_SO, &regs->intrenable);
1643 stat = -1;
1644 }
1645
1646 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1647 if (ints & OHCI_INTR_SF) {
1648 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1649 wait_ms(1);
1650 writel (OHCI_INTR_SF, &regs->intrdisable);
1651 if (ohci->ed_rm_list[frame] != NULL)
1652 writel (OHCI_INTR_SF, &regs->intrenable);
1653 stat = 0xff;
1654 }
1655
1656 writel (ints, &regs->intrstatus);
1657 return stat;
1658}
1659
1660/*-------------------------------------------------------------------------*/
1661
1662/*-------------------------------------------------------------------------*/
1663
1664/* De-allocate all resources.. */
1665
1666static void hc_release_ohci (ohci_t *ohci)
1667{
1668 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1669
1670 if (!ohci->disabled)
1671 hc_reset (ohci);
1672}
1673
1674/*-------------------------------------------------------------------------*/
1675
1676/*
1677 * low level initalisation routine, called from usb.c
1678 */
1679static char ohci_inited = 0;
1680
1681int usb_lowlevel_init(void)
1682{
24e37645 1683
ddf83a2f 1684#ifdef CFG_USB_OHCI_CPU_INIT
24e37645
MK		 1685 /* cpu dependant init */
1686 if(usb_cpu_init())
3e326ece 1687 return -1;
24e37645 1688#endif
3e326ece 1689
ddf83a2f 1690#ifdef CFG_USB_OHCI_BOARD_INIT
24e37645
MK		 1691 /* board dependant init */
1692 if(usb_board_init())
1693 return -1;
1694#endif
3e326ece
MK		 1695 memset (&gohci, 0, sizeof (ohci_t));
1696 memset (&urb_priv, 0, sizeof (urb_priv_t));
1697
1698 /* align the storage */
1699 if ((__u32)&ghcca[0] & 0xff) {
1700 err("HCCA not aligned!!");
1701 return -1;
1702 }
1703 phcca = &ghcca[0];
1704 info("aligned ghcca %p", phcca);
1705 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1706 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1707 err("EDs not aligned!!");
1708 return -1;
1709 }
1710 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1711 if ((__u32)gtd & 0x7) {
1712 err("TDs not aligned!!");
1713 return -1;
1714 }
1715 ptd = gtd;
1716 gohci.hcca = phcca;
1717 memset (phcca, 0, sizeof (struct ohci_hcca));
1718
1719 gohci.disabled = 1;
1720 gohci.sleeping = 0;
1721 gohci.irq = -1;
24e37645 1722 gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
3e326ece
MK		 1723
1724 gohci.flags = 0;
301f1aa3 1725 gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
3e326ece
MK		 1726
1727 if (hc_reset (&gohci) < 0) {
1728 hc_release_ohci (&gohci);
1729 err ("can't reset usb-%s", gohci.slot_name);
ddf83a2f 1730#ifdef CFG_USB_OHCI_BOARD_INIT
24e37645 1731 /* board dependant cleanup */
ddf83a2f 1732 usb_board_init_fail();
24e37645
MK		 1733#endif
1734
ddf83a2f 1735#ifdef CFG_USB_OHCI_CPU_INIT
24e37645 1736 /* cpu dependant cleanup */
ddf83a2f 1737 usb_cpu_init_fail();
24e37645 1738#endif
3e326ece
MK		 1739 return -1;
1740 }
1741
1742 /* FIXME this is a second HC reset; why?? */
1743 /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1744 wait_ms(10); */
3e326ece
MK		 1745 if (hc_start (&gohci) < 0) {
1746 err ("can't start usb-%s", gohci.slot_name);
1747 hc_release_ohci (&gohci);
1748 /* Initialization failed */
ddf83a2f 1749#ifdef CFG_USB_OHCI_BOARD_INIT
24e37645
MK		 1750 /* board dependant cleanup */
1751 usb_board_stop();
1752#endif
1753
ddf83a2f 1754#ifdef CFG_USB_OHCI_CPU_INIT
24e37645
MK		 1755 /* cpu dependant cleanup */
1756 usb_cpu_stop();
1757#endif
3e326ece
MK		 1758 return -1;
1759 }
1760
1761#ifdef DEBUG
1762 ohci_dump (&gohci, 1);
1763#else
1764 wait_ms(1);
ddf83a2f
MK		 1765# ifdef S3C24X0_merge
1766 urb_finished = 1;
1767# endif
3e326ece
MK		 1768#endif
1769 ohci_inited = 1;
1770 return 0;
1771}
1772
1773int usb_lowlevel_stop(void)
1774{
1775 /* this gets called really early - before the controller has */
1776 /* even been initialized! */
1777 if (!ohci_inited)
1778 return 0;
1779 /* TODO release any interrupts, etc. */
1780 /* call hc_release_ohci() here ? */
1781 hc_reset (&gohci);
1782
ddf83a2f 1783#ifdef CFG_USB_OHCI_BOARD_INIT
3e326ece
MK		 1784 /* board dependant cleanup */
1785 if(usb_board_stop())
1786 return -1;
24e37645
MK		 1787#endif
1788
ddf83a2f 1789#ifdef CFG_USB_OHCI_CPU_INIT
24e37645
MK		 1790 /* cpu dependant cleanup */
1791 if(usb_cpu_stop())
1792 return -1;
1793#endif
3e326ece
MK		 1794
1795 return 0;
1796}
7b59b3c7 1797#endif /* CONFIG_USB_OHCI_NEW */
"Das U-Boot" Source Tree