[thirdparty/kernel/stable.git] / drivers / vfio / pci / vfio_pci_private.h

/*
 * Copyright (C) 2012 Red Hat, Inc.  All rights reserved.
 *     Author: Alex Williamson <alex.williamson@redhat.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Derived from original vfio:
 * Copyright 2010 Cisco Systems, Inc.  All rights reserved.
 * Author: Tom Lyon, pugs@cisco.com
 */

#include <linux/mutex.h>
#include <linux/pci.h>
#include <linux/irqbypass.h>
#include <linux/types.h>

#ifndef VFIO_PCI_PRIVATE_H
#define VFIO_PCI_PRIVATE_H

#define VFIO_PCI_OFFSET_SHIFT   40

#define VFIO_PCI_OFFSET_TO_INDEX(off)	(off >> VFIO_PCI_OFFSET_SHIFT)
#define VFIO_PCI_INDEX_TO_OFFSET(index)	((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
#define VFIO_PCI_OFFSET_MASK	(((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)

/* Special capability IDs predefined access */
#define PCI_CAP_ID_INVALID		0xFF	/* default raw access */
#define PCI_CAP_ID_INVALID_VIRT		0xFE	/* default virt access */

/* Cap maximum number of ioeventfds per device (arbitrary) */
#define VFIO_PCI_IOEVENTFD_MAX		1000

struct vfio_pci_ioeventfd {
	struct list_head	next;
	struct virqfd		*virqfd;
	void __iomem		*addr;
	uint64_t		data;
	loff_t			pos;
	int			bar;
	int			count;
};

struct vfio_pci_irq_ctx {
	struct eventfd_ctx	*trigger;
	struct virqfd		*unmask;
	struct virqfd		*mask;
	char			*name;
	bool			masked;
	struct irq_bypass_producer	producer;
};

struct vfio_pci_device;
struct vfio_pci_region;

struct vfio_pci_regops {
	size_t	(*rw)(struct vfio_pci_device *vdev, char __user *buf,
		      size_t count, loff_t *ppos, bool iswrite);
	void	(*release)(struct vfio_pci_device *vdev,
			   struct vfio_pci_region *region);
	int	(*mmap)(struct vfio_pci_device *vdev,
			struct vfio_pci_region *region,
			struct vm_area_struct *vma);
	int	(*add_capability)(struct vfio_pci_device *vdev,
				  struct vfio_pci_region *region,
				  struct vfio_info_cap *caps);
};

struct vfio_pci_region {
	u32				type;
	u32				subtype;
	const struct vfio_pci_regops	*ops;
	void				*data;
	size_t				size;
	u32				flags;
};

struct vfio_pci_dummy_resource {
	struct resource		resource;
	int			index;
	struct list_head	res_next;
};

struct vfio_pci_reflck {
	struct kref		kref;
	struct mutex		lock;
};

struct vfio_pci_device {
	struct pci_dev		*pdev;
	void __iomem		*barmap[PCI_STD_RESOURCE_END + 1];
	bool			bar_mmap_supported[PCI_STD_RESOURCE_END + 1];
	u8			*pci_config_map;
	u8			*vconfig;
	struct perm_bits	*msi_perm;
	spinlock_t		irqlock;
	struct mutex		igate;
	struct vfio_pci_irq_ctx	*ctx;
	int			num_ctx;
	int			irq_type;
	int			num_regions;
	struct vfio_pci_region	*region;
	u8			msi_qmax;
	u8			msix_bar;
	u16			msix_size;
	u32			msix_offset;
	u32			rbar[7];
	bool			pci_2_3;
	bool			virq_disabled;
	bool			reset_works;
	bool			extended_caps;
	bool			bardirty;
	bool			has_vga;
	bool			needs_reset;
	bool			nointx;
	struct pci_saved_state	*pci_saved_state;
	struct vfio_pci_reflck	*reflck;
	int			refcnt;
	int			ioeventfds_nr;
	struct eventfd_ctx	*err_trigger;
	struct eventfd_ctx	*req_trigger;
	struct list_head	dummy_resources_list;
	struct mutex		ioeventfds_lock;
	struct list_head	ioeventfds_list;
};

#define is_intx(vdev) (vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX)
#define is_msi(vdev) (vdev->irq_type == VFIO_PCI_MSI_IRQ_INDEX)
#define is_msix(vdev) (vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX)
#define is_irq_none(vdev) (!(is_intx(vdev) || is_msi(vdev) || is_msix(vdev)))
#define irq_is(vdev, type) (vdev->irq_type == type)

extern void vfio_pci_intx_mask(struct vfio_pci_device *vdev);
extern void vfio_pci_intx_unmask(struct vfio_pci_device *vdev);

extern int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev,
				   uint32_t flags, unsigned index,
				   unsigned start, unsigned count, void *data);

extern ssize_t vfio_pci_config_rw(struct vfio_pci_device *vdev,
				  char __user *buf, size_t count,
				  loff_t *ppos, bool iswrite);

extern ssize_t vfio_pci_bar_rw(struct vfio_pci_device *vdev, char __user *buf,
			       size_t count, loff_t *ppos, bool iswrite);

extern ssize_t vfio_pci_vga_rw(struct vfio_pci_device *vdev, char __user *buf,
			       size_t count, loff_t *ppos, bool iswrite);

extern long vfio_pci_ioeventfd(struct vfio_pci_device *vdev, loff_t offset,
			       uint64_t data, int count, int fd);

extern int vfio_pci_init_perm_bits(void);
extern void vfio_pci_uninit_perm_bits(void);

extern int vfio_config_init(struct vfio_pci_device *vdev);
extern void vfio_config_free(struct vfio_pci_device *vdev);

extern int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
					unsigned int type, unsigned int subtype,
					const struct vfio_pci_regops *ops,
					size_t size, u32 flags, void *data);
#ifdef CONFIG_VFIO_PCI_IGD
extern int vfio_pci_igd_init(struct vfio_pci_device *vdev);
#else
static inline int vfio_pci_igd_init(struct vfio_pci_device *vdev)
{
	return -ENODEV;
}
#endif
#ifdef CONFIG_VFIO_PCI_NVLINK2
extern int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev);
extern int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev);
#else
static inline int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev)
{
	return -ENODEV;
}

static inline int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev)
{
	return -ENODEV;
}
#endif
#endif /* VFIO_PCI_PRIVATE_H */
Commit	Line	Data
89e1f7d4 AW	1	/*
	2	* Copyright (C) 2012 Red Hat, Inc. All rights reserved.
	3	* Author: Alex Williamson <alex.williamson@redhat.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	* Derived from original vfio:
	10	* Copyright 2010 Cisco Systems, Inc. All rights reserved.
	11	* Author: Tom Lyon, pugs@cisco.com
	12	*/
	13
	14	#include <linux/mutex.h>
	15	#include <linux/pci.h>
6d7425f1	16	#include <linux/irqbypass.h>
28541d41	17	#include <linux/types.h>
89e1f7d4 AW	18
	19	#ifndef VFIO_PCI_PRIVATE_H
	20	#define VFIO_PCI_PRIVATE_H
	21
	22	#define VFIO_PCI_OFFSET_SHIFT 40
	23
	24	#define VFIO_PCI_OFFSET_TO_INDEX(off) (off >> VFIO_PCI_OFFSET_SHIFT)
	25	#define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
	26	#define VFIO_PCI_OFFSET_MASK (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)
	27
345d7104 AW	28	/* Special capability IDs predefined access */
	29	#define PCI_CAP_ID_INVALID 0xFF /* default raw access */
	30	#define PCI_CAP_ID_INVALID_VIRT 0xFE /* default virt access */
	31
30656177 AW	32	/* Cap maximum number of ioeventfds per device (arbitrary) */
	33	#define VFIO_PCI_IOEVENTFD_MAX 1000
	34
	35	struct vfio_pci_ioeventfd {
	36	struct list_head next;
	37	struct virqfd *virqfd;
	38	void __iomem *addr;
	39	uint64_t data;
	40	loff_t pos;
	41	int bar;
	42	int count;
	43	};
	44
89e1f7d4 AW	45	struct vfio_pci_irq_ctx {
	46	struct eventfd_ctx *trigger;
	47	struct virqfd *unmask;
	48	struct virqfd *mask;
	49	char *name;
	50	bool masked;
6d7425f1	51	struct irq_bypass_producer producer;
89e1f7d4 AW	52	};
89e1f7d4 AW	53
28541d41 AW	54	struct vfio_pci_device;
	55	struct vfio_pci_region;
	56
	57	struct vfio_pci_regops {
	58	size_t (rw)(struct vfio_pci_device vdev, char __user *buf,
	59	size_t count, loff_t *ppos, bool iswrite);
	60	void (release)(struct vfio_pci_device vdev,
	61	struct vfio_pci_region *region);
a15b1883 AK	62	int (mmap)(struct vfio_pci_device vdev,
	63	struct vfio_pci_region *region,
	64	struct vm_area_struct *vma);
c2c0f1cd AK	65	int (add_capability)(struct vfio_pci_device vdev,
	66	struct vfio_pci_region *region,
	67	struct vfio_info_cap *caps);
28541d41 AW	68	};
	69
	70	struct vfio_pci_region {
	71	u32 type;
	72	u32 subtype;
	73	const struct vfio_pci_regops *ops;
	74	void *data;
	75	size_t size;
	76	u32 flags;
	77	};
	78
05f0c03f YX	79	struct vfio_pci_dummy_resource {
	80	struct resource resource;
	81	int index;
	82	struct list_head res_next;
	83	};
	84
e309df5b AW	85	struct vfio_pci_reflck {
	86	struct kref kref;
	87	struct mutex lock;
	88	};
	89
89e1f7d4 AW	90	struct vfio_pci_device {
	91	struct pci_dev *pdev;
	92	void __iomem *barmap[PCI_STD_RESOURCE_END + 1];
05f0c03f	93	bool bar_mmap_supported[PCI_STD_RESOURCE_END + 1];
89e1f7d4 AW	94	u8 *pci_config_map;
	95	u8 *vconfig;
	96	struct perm_bits *msi_perm;
	97	spinlock_t irqlock;
	98	struct mutex igate;
89e1f7d4 AW	99	struct vfio_pci_irq_ctx *ctx;
	100	int num_ctx;
	101	int irq_type;
28541d41 AW	102	int num_regions;
28541d41 AW	103	struct vfio_pci_region *region;
89e1f7d4 AW	104	u8 msi_qmax;
	105	u8 msix_bar;
	106	u16 msix_size;
	107	u32 msix_offset;
	108	u32 rbar[7];
	109	bool pci_2_3;
	110	bool virq_disabled;
	111	bool reset_works;
	112	bool extended_caps;
	113	bool bardirty;
84237a82	114	bool has_vga;
bc4fba77	115	bool needs_reset;
45074405	116	bool nointx;
89e1f7d4	117	struct pci_saved_state *pci_saved_state;
e309df5b	118	struct vfio_pci_reflck *reflck;
61d79256	119	int refcnt;
30656177	120	int ioeventfds_nr;
dad9f897	121	struct eventfd_ctx *err_trigger;
6140a8f5	122	struct eventfd_ctx *req_trigger;
05f0c03f	123	struct list_head dummy_resources_list;
30656177 AW	124	struct mutex ioeventfds_lock;
30656177 AW	125	struct list_head ioeventfds_list;
89e1f7d4 AW	126	};
	127
	128	#define is_intx(vdev) (vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX)
	129	#define is_msi(vdev) (vdev->irq_type == VFIO_PCI_MSI_IRQ_INDEX)
	130	#define is_msix(vdev) (vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX)
	131	#define is_irq_none(vdev) (!(is_intx(vdev) \|\| is_msi(vdev) \|\| is_msix(vdev)))
	132	#define irq_is(vdev, type) (vdev->irq_type == type)
	133
	134	extern void vfio_pci_intx_mask(struct vfio_pci_device *vdev);
	135	extern void vfio_pci_intx_unmask(struct vfio_pci_device *vdev);
	136
	137	extern int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev,
	138	uint32_t flags, unsigned index,
	139	unsigned start, unsigned count, void *data);
	140
906ee99d AW	141	extern ssize_t vfio_pci_config_rw(struct vfio_pci_device *vdev,
	142	char __user *buf, size_t count,
	143	loff_t *ppos, bool iswrite);
	144
	145	extern ssize_t vfio_pci_bar_rw(struct vfio_pci_device vdev, char __user buf,
	146	size_t count, loff_t *ppos, bool iswrite);
89e1f7d4	147
84237a82 AW	148	extern ssize_t vfio_pci_vga_rw(struct vfio_pci_device vdev, char __user buf,
	149	size_t count, loff_t *ppos, bool iswrite);
	150
30656177 AW	151	extern long vfio_pci_ioeventfd(struct vfio_pci_device *vdev, loff_t offset,
	152	uint64_t data, int count, int fd);
	153
89e1f7d4 AW	154	extern int vfio_pci_init_perm_bits(void);
	155	extern void vfio_pci_uninit_perm_bits(void);
	156
89e1f7d4 AW	157	extern int vfio_config_init(struct vfio_pci_device *vdev);
89e1f7d4 AW	158	extern void vfio_config_free(struct vfio_pci_device *vdev);
28541d41 AW	159
	160	extern int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
	161	unsigned int type, unsigned int subtype,
	162	const struct vfio_pci_regops *ops,
	163	size_t size, u32 flags, void *data);
5846ff54	164	#ifdef CONFIG_VFIO_PCI_IGD
f572a960	165	extern int vfio_pci_igd_init(struct vfio_pci_device *vdev);
5846ff54	166	#else
f572a960	167	static inline int vfio_pci_igd_init(struct vfio_pci_device *vdev)
5846ff54 AW	168	{
	169	return -ENODEV;
	170	}
	171	#endif
7f928917 AK	172	#ifdef CONFIG_VFIO_PCI_NVLINK2
	173	extern int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev);
	174	extern int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev);
	175	#else
	176	static inline int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev)
	177	{
	178	return -ENODEV;
	179	}
	180
	181	static inline int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev)
	182	{
	183	return -ENODEV;
	184	}
	185	#endif
89e1f7d4	186	#endif /* VFIO_PCI_PRIVATE_H */