[thirdparty/kernel/stable.git] / drivers / vfio / pci / vfio_pci_private.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) 2012 Red Hat, Inc.  All rights reserved.
 *     Author: Alex Williamson <alex.williamson@redhat.com>
 *
 * Derived from original vfio:
 * Copyright 2010 Cisco Systems, Inc.  All rights reserved.
 * Author: Tom Lyon, pugs@cisco.com
 */

#include <linux/mutex.h>
#include <linux/pci.h>
#include <linux/irqbypass.h>
#include <linux/types.h>

#ifndef VFIO_PCI_PRIVATE_H
#define VFIO_PCI_PRIVATE_H

#define VFIO_PCI_OFFSET_SHIFT   40

#define VFIO_PCI_OFFSET_TO_INDEX(off)	(off >> VFIO_PCI_OFFSET_SHIFT)
#define VFIO_PCI_INDEX_TO_OFFSET(index)	((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
#define VFIO_PCI_OFFSET_MASK	(((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)

/* Special capability IDs predefined access */
#define PCI_CAP_ID_INVALID		0xFF	/* default raw access */
#define PCI_CAP_ID_INVALID_VIRT		0xFE	/* default virt access */

/* Cap maximum number of ioeventfds per device (arbitrary) */
#define VFIO_PCI_IOEVENTFD_MAX		1000

struct vfio_pci_ioeventfd {
	struct list_head	next;
	struct virqfd		*virqfd;
	void __iomem		*addr;
	uint64_t		data;
	loff_t			pos;
	int			bar;
	int			count;
};

struct vfio_pci_irq_ctx {
	struct eventfd_ctx	*trigger;
	struct virqfd		*unmask;
	struct virqfd		*mask;
	char			*name;
	bool			masked;
	struct irq_bypass_producer	producer;
};

struct vfio_pci_device;
struct vfio_pci_region;

struct vfio_pci_regops {
	size_t	(*rw)(struct vfio_pci_device *vdev, char __user *buf,
		      size_t count, loff_t *ppos, bool iswrite);
	void	(*release)(struct vfio_pci_device *vdev,
			   struct vfio_pci_region *region);
	int	(*mmap)(struct vfio_pci_device *vdev,
			struct vfio_pci_region *region,
			struct vm_area_struct *vma);
	int	(*add_capability)(struct vfio_pci_device *vdev,
				  struct vfio_pci_region *region,
				  struct vfio_info_cap *caps);
};

struct vfio_pci_region {
	u32				type;
	u32				subtype;
	const struct vfio_pci_regops	*ops;
	void				*data;
	size_t				size;
	u32				flags;
};

struct vfio_pci_dummy_resource {
	struct resource		resource;
	int			index;
	struct list_head	res_next;
};

struct vfio_pci_reflck {
	struct kref		kref;
	struct mutex		lock;
};

struct vfio_pci_device {
	struct pci_dev		*pdev;
	void __iomem		*barmap[PCI_STD_RESOURCE_END + 1];
	bool			bar_mmap_supported[PCI_STD_RESOURCE_END + 1];
	u8			*pci_config_map;
	u8			*vconfig;
	struct perm_bits	*msi_perm;
	spinlock_t		irqlock;
	struct mutex		igate;
	struct vfio_pci_irq_ctx	*ctx;
	int			num_ctx;
	int			irq_type;
	int			num_regions;
	struct vfio_pci_region	*region;
	u8			msi_qmax;
	u8			msix_bar;
	u16			msix_size;
	u32			msix_offset;
	u32			rbar[7];
	bool			pci_2_3;
	bool			virq_disabled;
	bool			reset_works;
	bool			extended_caps;
	bool			bardirty;
	bool			has_vga;
	bool			needs_reset;
	bool			nointx;
	bool			needs_pm_restore;
	struct pci_saved_state	*pci_saved_state;
	struct pci_saved_state	*pm_save;
	struct vfio_pci_reflck	*reflck;
	int			refcnt;
	int			ioeventfds_nr;
	struct eventfd_ctx	*err_trigger;
	struct eventfd_ctx	*req_trigger;
	struct list_head	dummy_resources_list;
	struct mutex		ioeventfds_lock;
	struct list_head	ioeventfds_list;
};

#define is_intx(vdev) (vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX)
#define is_msi(vdev) (vdev->irq_type == VFIO_PCI_MSI_IRQ_INDEX)
#define is_msix(vdev) (vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX)
#define is_irq_none(vdev) (!(is_intx(vdev) || is_msi(vdev) || is_msix(vdev)))
#define irq_is(vdev, type) (vdev->irq_type == type)

extern void vfio_pci_intx_mask(struct vfio_pci_device *vdev);
extern void vfio_pci_intx_unmask(struct vfio_pci_device *vdev);

extern int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev,
				   uint32_t flags, unsigned index,
				   unsigned start, unsigned count, void *data);

extern ssize_t vfio_pci_config_rw(struct vfio_pci_device *vdev,
				  char __user *buf, size_t count,
				  loff_t *ppos, bool iswrite);

extern ssize_t vfio_pci_bar_rw(struct vfio_pci_device *vdev, char __user *buf,
			       size_t count, loff_t *ppos, bool iswrite);

extern ssize_t vfio_pci_vga_rw(struct vfio_pci_device *vdev, char __user *buf,
			       size_t count, loff_t *ppos, bool iswrite);

extern long vfio_pci_ioeventfd(struct vfio_pci_device *vdev, loff_t offset,
			       uint64_t data, int count, int fd);

extern int vfio_pci_init_perm_bits(void);
extern void vfio_pci_uninit_perm_bits(void);

extern int vfio_config_init(struct vfio_pci_device *vdev);
extern void vfio_config_free(struct vfio_pci_device *vdev);

extern int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
					unsigned int type, unsigned int subtype,
					const struct vfio_pci_regops *ops,
					size_t size, u32 flags, void *data);

extern int vfio_pci_set_power_state(struct vfio_pci_device *vdev,
				    pci_power_t state);

#ifdef CONFIG_VFIO_PCI_IGD
extern int vfio_pci_igd_init(struct vfio_pci_device *vdev);
#else
static inline int vfio_pci_igd_init(struct vfio_pci_device *vdev)
{
	return -ENODEV;
}
#endif
#ifdef CONFIG_VFIO_PCI_NVLINK2
extern int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev);
extern int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev);
#else
static inline int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev)
{
	return -ENODEV;
}

static inline int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev)
{
	return -ENODEV;
}
#endif
#endif /* VFIO_PCI_PRIVATE_H */
Commit	Line	Data
d2912cb1	1	/* SPDX-License-Identifier: GPL-2.0-only */
89e1f7d4 AW	2	/*
	3	* Copyright (C) 2012 Red Hat, Inc. All rights reserved.
	4	* Author: Alex Williamson <alex.williamson@redhat.com>
	5	*
89e1f7d4 AW	6	* Derived from original vfio:
	7	* Copyright 2010 Cisco Systems, Inc. All rights reserved.
	8	* Author: Tom Lyon, pugs@cisco.com
	9	*/
	10
	11	#include <linux/mutex.h>
	12	#include <linux/pci.h>
6d7425f1	13	#include <linux/irqbypass.h>
28541d41	14	#include <linux/types.h>
89e1f7d4 AW	15
	16	#ifndef VFIO_PCI_PRIVATE_H
	17	#define VFIO_PCI_PRIVATE_H
	18
	19	#define VFIO_PCI_OFFSET_SHIFT 40
	20
	21	#define VFIO_PCI_OFFSET_TO_INDEX(off) (off >> VFIO_PCI_OFFSET_SHIFT)
	22	#define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
	23	#define VFIO_PCI_OFFSET_MASK (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)
	24
345d7104 AW	25	/* Special capability IDs predefined access */
	26	#define PCI_CAP_ID_INVALID 0xFF /* default raw access */
	27	#define PCI_CAP_ID_INVALID_VIRT 0xFE /* default virt access */
	28
30656177 AW	29	/* Cap maximum number of ioeventfds per device (arbitrary) */
	30	#define VFIO_PCI_IOEVENTFD_MAX 1000
	31
	32	struct vfio_pci_ioeventfd {
	33	struct list_head next;
	34	struct virqfd *virqfd;
	35	void __iomem *addr;
	36	uint64_t data;
	37	loff_t pos;
	38	int bar;
	39	int count;
	40	};
	41
89e1f7d4 AW	42	struct vfio_pci_irq_ctx {
	43	struct eventfd_ctx *trigger;
	44	struct virqfd *unmask;
	45	struct virqfd *mask;
	46	char *name;
	47	bool masked;
6d7425f1	48	struct irq_bypass_producer producer;
89e1f7d4 AW	49	};
89e1f7d4 AW	50
28541d41 AW	51	struct vfio_pci_device;
	52	struct vfio_pci_region;
	53
	54	struct vfio_pci_regops {
	55	size_t (rw)(struct vfio_pci_device vdev, char __user *buf,
	56	size_t count, loff_t *ppos, bool iswrite);
	57	void (release)(struct vfio_pci_device vdev,
	58	struct vfio_pci_region *region);
a15b1883 AK	59	int (mmap)(struct vfio_pci_device vdev,
	60	struct vfio_pci_region *region,
	61	struct vm_area_struct *vma);
c2c0f1cd AK	62	int (add_capability)(struct vfio_pci_device vdev,
	63	struct vfio_pci_region *region,
	64	struct vfio_info_cap *caps);
28541d41 AW	65	};
	66
	67	struct vfio_pci_region {
	68	u32 type;
	69	u32 subtype;
	70	const struct vfio_pci_regops *ops;
	71	void *data;
	72	size_t size;
	73	u32 flags;
	74	};
	75
05f0c03f YX	76	struct vfio_pci_dummy_resource {
	77	struct resource resource;
	78	int index;
	79	struct list_head res_next;
	80	};
	81
e309df5b AW	82	struct vfio_pci_reflck {
	83	struct kref kref;
	84	struct mutex lock;
	85	};
	86
89e1f7d4 AW	87	struct vfio_pci_device {
	88	struct pci_dev *pdev;
	89	void __iomem *barmap[PCI_STD_RESOURCE_END + 1];
05f0c03f	90	bool bar_mmap_supported[PCI_STD_RESOURCE_END + 1];
89e1f7d4 AW	91	u8 *pci_config_map;
	92	u8 *vconfig;
	93	struct perm_bits *msi_perm;
	94	spinlock_t irqlock;
	95	struct mutex igate;
89e1f7d4 AW	96	struct vfio_pci_irq_ctx *ctx;
	97	int num_ctx;
	98	int irq_type;
28541d41 AW	99	int num_regions;
28541d41 AW	100	struct vfio_pci_region *region;
89e1f7d4 AW	101	u8 msi_qmax;
	102	u8 msix_bar;
	103	u16 msix_size;
	104	u32 msix_offset;
	105	u32 rbar[7];
	106	bool pci_2_3;
	107	bool virq_disabled;
	108	bool reset_works;
	109	bool extended_caps;
	110	bool bardirty;
84237a82	111	bool has_vga;
bc4fba77	112	bool needs_reset;
45074405	113	bool nointx;
51ef3a00	114	bool needs_pm_restore;
89e1f7d4	115	struct pci_saved_state *pci_saved_state;
51ef3a00	116	struct pci_saved_state *pm_save;
e309df5b	117	struct vfio_pci_reflck *reflck;
61d79256	118	int refcnt;
30656177	119	int ioeventfds_nr;
dad9f897	120	struct eventfd_ctx *err_trigger;
6140a8f5	121	struct eventfd_ctx *req_trigger;
05f0c03f	122	struct list_head dummy_resources_list;
30656177 AW	123	struct mutex ioeventfds_lock;
30656177 AW	124	struct list_head ioeventfds_list;
89e1f7d4 AW	125	};
	126
	127	#define is_intx(vdev) (vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX)
	128	#define is_msi(vdev) (vdev->irq_type == VFIO_PCI_MSI_IRQ_INDEX)
	129	#define is_msix(vdev) (vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX)
	130	#define is_irq_none(vdev) (!(is_intx(vdev) \|\| is_msi(vdev) \|\| is_msix(vdev)))
	131	#define irq_is(vdev, type) (vdev->irq_type == type)
	132
	133	extern void vfio_pci_intx_mask(struct vfio_pci_device *vdev);
	134	extern void vfio_pci_intx_unmask(struct vfio_pci_device *vdev);
	135
	136	extern int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev,
	137	uint32_t flags, unsigned index,
	138	unsigned start, unsigned count, void *data);
	139
906ee99d AW	140	extern ssize_t vfio_pci_config_rw(struct vfio_pci_device *vdev,
	141	char __user *buf, size_t count,
	142	loff_t *ppos, bool iswrite);
	143
	144	extern ssize_t vfio_pci_bar_rw(struct vfio_pci_device vdev, char __user buf,
	145	size_t count, loff_t *ppos, bool iswrite);
89e1f7d4	146
84237a82 AW	147	extern ssize_t vfio_pci_vga_rw(struct vfio_pci_device vdev, char __user buf,
	148	size_t count, loff_t *ppos, bool iswrite);
	149
30656177 AW	150	extern long vfio_pci_ioeventfd(struct vfio_pci_device *vdev, loff_t offset,
	151	uint64_t data, int count, int fd);
	152
89e1f7d4 AW	153	extern int vfio_pci_init_perm_bits(void);
	154	extern void vfio_pci_uninit_perm_bits(void);
	155
89e1f7d4 AW	156	extern int vfio_config_init(struct vfio_pci_device *vdev);
89e1f7d4 AW	157	extern void vfio_config_free(struct vfio_pci_device *vdev);
28541d41 AW	158
	159	extern int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
	160	unsigned int type, unsigned int subtype,
	161	const struct vfio_pci_regops *ops,
	162	size_t size, u32 flags, void *data);
51ef3a00 AW	163
	164	extern int vfio_pci_set_power_state(struct vfio_pci_device *vdev,
	165	pci_power_t state);
	166
5846ff54	167	#ifdef CONFIG_VFIO_PCI_IGD
f572a960	168	extern int vfio_pci_igd_init(struct vfio_pci_device *vdev);
5846ff54	169	#else
f572a960	170	static inline int vfio_pci_igd_init(struct vfio_pci_device *vdev)
5846ff54 AW	171	{
	172	return -ENODEV;
	173	}
	174	#endif
7f928917 AK	175	#ifdef CONFIG_VFIO_PCI_NVLINK2
	176	extern int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev);
	177	extern int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev);
	178	#else
	179	static inline int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev)
	180	{
	181	return -ENODEV;
	182	}
	183
	184	static inline int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev)
	185	{
	186	return -ENODEV;
	187	}
	188	#endif
89e1f7d4	189	#endif /* VFIO_PCI_PRIVATE_H */