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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
c1080626 JS |
2 | /* |
3 | * TV encoder driver for Allwinner SoCs. | |
4 | * | |
5 | * (C) Copyright 2013-2014 Luc Verhaegen <libv@skynet.be> | |
6 | * (C) Copyright 2014-2015 Hans de Goede <hdegoede@redhat.com> | |
7 | * (C) Copyright 2017 Jernej Skrabec <jernej.skrabec@siol.net> | |
c1080626 JS |
8 | */ |
9 | ||
10 | #include <common.h> | |
11 | ||
12 | #include <asm/arch/tve.h> | |
13 | #include <asm/io.h> | |
14 | ||
15 | void tvencoder_mode_set(struct sunxi_tve_reg * const tve, enum tve_mode mode) | |
16 | { | |
17 | switch (mode) { | |
18 | case tve_mode_vga: | |
19 | writel(SUNXI_TVE_GCTRL_DAC_INPUT(0, 1) | | |
20 | SUNXI_TVE_GCTRL_DAC_INPUT(1, 2) | | |
21 | SUNXI_TVE_GCTRL_DAC_INPUT(2, 3), &tve->gctrl); | |
22 | writel(SUNXI_TVE_CFG0_VGA, &tve->cfg0); | |
23 | writel(SUNXI_TVE_DAC_CFG0_VGA, &tve->dac_cfg0); | |
24 | writel(SUNXI_TVE_UNKNOWN1_VGA, &tve->unknown1); | |
25 | break; | |
26 | case tve_mode_composite_pal_nc: | |
27 | writel(SUNXI_TVE_CHROMA_FREQ_PAL_NC, &tve->chroma_freq); | |
28 | /* Fall through */ | |
29 | case tve_mode_composite_pal: | |
30 | writel(SUNXI_TVE_GCTRL_DAC_INPUT(0, 1) | | |
31 | SUNXI_TVE_GCTRL_DAC_INPUT(1, 2) | | |
32 | SUNXI_TVE_GCTRL_DAC_INPUT(2, 3) | | |
33 | SUNXI_TVE_GCTRL_DAC_INPUT(3, 4), &tve->gctrl); | |
34 | writel(SUNXI_TVE_CFG0_PAL, &tve->cfg0); | |
35 | writel(SUNXI_TVE_DAC_CFG0_COMPOSITE, &tve->dac_cfg0); | |
36 | writel(SUNXI_TVE_FILTER_COMPOSITE, &tve->filter); | |
37 | writel(SUNXI_TVE_PORCH_NUM_PAL, &tve->porch_num); | |
38 | writel(SUNXI_TVE_LINE_NUM_PAL, &tve->line_num); | |
39 | writel(SUNXI_TVE_BLANK_BLACK_LEVEL_PAL, | |
40 | &tve->blank_black_level); | |
41 | writel(SUNXI_TVE_UNKNOWN1_COMPOSITE, &tve->unknown1); | |
42 | writel(SUNXI_TVE_CBR_LEVEL_PAL, &tve->cbr_level); | |
43 | writel(SUNXI_TVE_BURST_WIDTH_COMPOSITE, &tve->burst_width); | |
44 | writel(SUNXI_TVE_UNKNOWN2_PAL, &tve->unknown2); | |
45 | writel(SUNXI_TVE_ACTIVE_NUM_COMPOSITE, &tve->active_num); | |
46 | writel(SUNXI_TVE_CHROMA_BW_GAIN_COMP, &tve->chroma_bw_gain); | |
47 | writel(SUNXI_TVE_NOTCH_WIDTH_COMPOSITE, &tve->notch_width); | |
48 | writel(SUNXI_TVE_RESYNC_NUM_PAL, &tve->resync_num); | |
49 | writel(SUNXI_TVE_SLAVE_PARA_COMPOSITE, &tve->slave_para); | |
50 | break; | |
51 | case tve_mode_composite_pal_m: | |
52 | writel(SUNXI_TVE_CHROMA_FREQ_PAL_M, &tve->chroma_freq); | |
53 | writel(SUNXI_TVE_COLOR_BURST_PAL_M, &tve->color_burst); | |
54 | /* Fall through */ | |
55 | case tve_mode_composite_ntsc: | |
56 | writel(SUNXI_TVE_GCTRL_DAC_INPUT(0, 1) | | |
57 | SUNXI_TVE_GCTRL_DAC_INPUT(1, 2) | | |
58 | SUNXI_TVE_GCTRL_DAC_INPUT(2, 3) | | |
59 | SUNXI_TVE_GCTRL_DAC_INPUT(3, 4), &tve->gctrl); | |
60 | writel(SUNXI_TVE_CFG0_NTSC, &tve->cfg0); | |
61 | writel(SUNXI_TVE_DAC_CFG0_COMPOSITE, &tve->dac_cfg0); | |
62 | writel(SUNXI_TVE_FILTER_COMPOSITE, &tve->filter); | |
63 | writel(SUNXI_TVE_PORCH_NUM_NTSC, &tve->porch_num); | |
64 | writel(SUNXI_TVE_LINE_NUM_NTSC, &tve->line_num); | |
65 | writel(SUNXI_TVE_BLANK_BLACK_LEVEL_NTSC, | |
66 | &tve->blank_black_level); | |
67 | writel(SUNXI_TVE_UNKNOWN1_COMPOSITE, &tve->unknown1); | |
68 | writel(SUNXI_TVE_CBR_LEVEL_NTSC, &tve->cbr_level); | |
69 | writel(SUNXI_TVE_BURST_PHASE_NTSC, &tve->burst_phase); | |
70 | writel(SUNXI_TVE_BURST_WIDTH_COMPOSITE, &tve->burst_width); | |
71 | writel(SUNXI_TVE_UNKNOWN2_NTSC, &tve->unknown2); | |
72 | writel(SUNXI_TVE_SYNC_VBI_LEVEL_NTSC, &tve->sync_vbi_level); | |
73 | writel(SUNXI_TVE_ACTIVE_NUM_COMPOSITE, &tve->active_num); | |
74 | writel(SUNXI_TVE_CHROMA_BW_GAIN_COMP, &tve->chroma_bw_gain); | |
75 | writel(SUNXI_TVE_NOTCH_WIDTH_COMPOSITE, &tve->notch_width); | |
76 | writel(SUNXI_TVE_RESYNC_NUM_NTSC, &tve->resync_num); | |
77 | writel(SUNXI_TVE_SLAVE_PARA_COMPOSITE, &tve->slave_para); | |
78 | break; | |
79 | } | |
80 | } | |
81 | ||
82 | void tvencoder_enable(struct sunxi_tve_reg * const tve) | |
83 | { | |
84 | setbits_le32(&tve->gctrl, SUNXI_TVE_GCTRL_ENABLE); | |
85 | } |