projects / people / ms / gcc.git / blame
| Commit | Line | Data |
|---|---|---|
| 8aeea6e6 | 1 | ;; Machine description for GNU compiler, VAX Version |
| 7adcbafe | 2 | ;; Copyright (C) 1987-2022 Free Software Foundation, Inc. |
| ab835497 | 3 | |
| e7d9d16b | 4 | ;; This file is part of GCC. |
| ab835497 | 5 | |
| e7d9d16b | 6 | ;; GCC is free software; you can redistribute it and/or modify |
| ab835497 | 7 | ;; it under the terms of the GNU General Public License as published by |
| 2f83c7d6 | 8 | ;; the Free Software Foundation; either version 3, or (at your option) |
| ab835497 RK |
9 | ;; any later version. |
| 10 | ||
| e7d9d16b | 11 | ;; GCC is distributed in the hope that it will be useful, |
| ab835497 RK |
12 | ;; but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | ;; GNU General Public License for more details. | |
| 15 | ||
| 16 | ;; You should have received a copy of the GNU General Public License | |
| 2f83c7d6 NC |
17 | ;; along with GCC; see the file COPYING3. If not see |
| 18 | ;; <http://www.gnu.org/licenses/>. | |
| ab835497 RK |
19 | |
| 20 | ||
| 21 | ;;- Instruction patterns. When multiple patterns apply, | |
| 22 | ;;- the first one in the file is chosen. | |
| 23 | ;;- | |
| 821bde61 | 24 | ;;- See file "rtl.def" for documentation on define_insn, match_*, et al. |
| ab835497 | 25 | |
| ec20cffb JT |
26 | ;; UNSPEC_VOLATILE usage: |
| 27 | ||
| a3515605 RH |
28 | (define_c_enum "unspecv" [ |
| 29 | VUNSPEC_BLOCKAGE ; 'blockage' insn to prevent scheduling across an | |
| 0f8def68 | 30 | ; insn in the code. |
| a3515605 RH |
31 | VUNSPEC_SYNC_ISTREAM ; sequence of insns to sync the I-stream |
| 32 | VUNSPEC_PEM ; 'procedure_entry_mask' insn. | |
| 33 | ]) | |
| 34 | ||
| 3057f1ab MR |
35 | ;; UNSPEC usage: |
| 36 | ||
| 37 | (define_c_enum "unspec" [ | |
| 38 | UNSPEC_SETMEM_FILL ; 'fill' operand to 'setmem' insn. | |
| 39 | ]) | |
| 40 | ||
| a3515605 RH |
41 | (define_constants |
| 42 | [(VAX_AP_REGNUM 12) ; Register 12 contains the argument pointer | |
| 0f8def68 JBG |
43 | (VAX_FP_REGNUM 13) ; Register 13 contains the frame pointer |
| 44 | (VAX_SP_REGNUM 14) ; Register 14 contains the stack pointer | |
| 45 | (VAX_PC_REGNUM 15) ; Register 15 contains the program counter | |
| e552abe2 MR |
46 | (VAX_PSL_REGNUM 16) ; Register 16 contains the processor status |
| 47 | ; and condition codes in particular | |
| ec20cffb JT |
48 | ] |
| 49 | ) | |
| 50 | ||
| aabcd309 | 51 | ;; Integer modes supported on VAX, with a mapping from machine mode |
| 20acd226 | 52 | ;; to mnemonic suffix. DImode is always a special case. |
| 3abcb3a7 | 53 | (define_mode_iterator VAXint [QI HI SI]) |
| c4e75102 MT |
54 | (define_mode_iterator VAXintQH [QI HI]) |
| 55 | (define_mode_iterator VAXintQHSD [QI HI SI DI]) | |
| 56 | (define_mode_attr isfx [(QI "b") (HI "w") (SI "l") (DI "q")]) | |
| ab835497 | 57 | |
| 20acd226 | 58 | ;; Similar for float modes supported on VAX. |
| 3abcb3a7 | 59 | (define_mode_iterator VAXfp [SF DF]) |
| 20acd226 | 60 | (define_mode_attr fsfx [(SF "f") (DF "%#")]) |
| ab835497 | 61 | |
| 821bde61 | 62 | ;; Some output patterns want integer immediates with a prefix... |
| 20acd226 | 63 | (define_mode_attr iprefx [(QI "B") (HI "H") (SI "N")]) |
| ab835497 | 64 | |
| e552abe2 MR |
65 | (define_mode_iterator VAXcc [CC CCN CCNZ CCZ]) |
| 66 | (define_mode_iterator VAXccnz [CCN CCNZ CCZ]) | |
| e552abe2 MR |
67 | |
| 68 | (define_code_iterator any_extract [sign_extract zero_extract]) | |
| 69 | ||
| c4e75102 MT |
70 | ;; |
| 71 | (include "constraints.md") | |
| 72 | (include "predicates.md") | |
| 73 | ||
| e552abe2 | 74 | ;; Make instructions that set the N, N+Z, and Z condition codes respectively. |
| 7f5c4d23 | 75 | (define_subst "subst_<mode>" |
| e552abe2 MR |
76 | [(set (match_operand 0 "") |
| 77 | (match_operand 1 "")) | |
| 78 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| ab835497 | 79 | "" |
| e552abe2 MR |
80 | [(set (reg:VAXccnz VAX_PSL_REGNUM) |
| 81 | (compare:VAXccnz (match_dup 1) | |
| 82 | (const_int 0))) | |
| 83 | (set (match_dup 0) | |
| 84 | (match_dup 1))]) | |
| 85 | ||
| 7f5c4d23 | 86 | (define_subst "subst_f<VAXccnz:mode>" |
| c38bbf5e MR |
87 | [(set (match_operand:VAXfp 0 "") |
| 88 | (match_operand:VAXfp 1 "")) | |
| e552abe2 MR |
89 | (clobber (reg:CC VAX_PSL_REGNUM))] |
| 90 | "" | |
| 91 | [(set (reg:VAXccnz VAX_PSL_REGNUM) | |
| 92 | (compare:VAXccnz (match_dup 1) | |
| c38bbf5e | 93 | (const_double_zero:VAXfp))) |
| e552abe2 MR |
94 | (set (match_dup 0) |
| 95 | (match_dup 1))]) | |
| 96 | ||
| 97 | ;; Select all from the attributes below that apply to a given insn that | |
| 98 | ;; has a clobber on CC for the comparison elimination pass to use it in | |
| 99 | ;; place of a subsequent comparison instruction matching the mode used | |
| 100 | ;; by a comparison operator in branch. | |
| 101 | ;; | |
| 102 | ;; For example a branch doing `eq' in SImode will use `*cmpsi_ccz', so | |
| 103 | ;; to eliminate it a `*movsi_ccz', etc. pattern will be required via the | |
| 104 | ;; `ccz' substitution. Analogously for the other CC modes. | |
| 105 | ;; | |
| 106 | ;; The general `cc' mode, which sets all of the C, N, V and Z condition | |
| 107 | ;; codes, has to be handled specially as it makes no sense for the usual | |
| 108 | ;; comparison against zero, so no substitution has been defined for it. | |
| 109 | (define_subst_attr "ccn" "subst_ccn" "" "_ccn") | |
| 110 | (define_subst_attr "ccnz" "subst_ccnz" "" "_ccnz") | |
| 111 | (define_subst_attr "ccz" "subst_ccz" "" "_ccz") | |
| 112 | (define_subst_attr "fccn" "subst_fccn" "" "_ccn") | |
| 113 | (define_subst_attr "fccnz" "subst_fccnz" "" "_ccnz") | |
| 114 | (define_subst_attr "fccz" "subst_fccz" "" "_ccz") | |
| 115 | ||
| 116 | (define_insn "*cmp<VAXint:mode>_<VAXcc:mode>" | |
| 117 | [(set (reg:VAXcc VAX_PSL_REGNUM) | |
| 118 | (compare:VAXcc (match_operand:VAXint 0 "general_operand" "nrmT,nrmT") | |
| 119 | (match_operand:VAXint 1 "general_operand" "I,nrmT")))] | |
| 120 | "reload_completed" | |
| f90b7a5a PB |
121 | "@ |
| 122 | tst<VAXint:isfx> %0 | |
| 123 | cmp<VAXint:isfx> %0,%1") | |
| ab835497 | 124 | |
| e552abe2 MR |
125 | ;; We don't have a CMPQ instruction, but we can set the N and Z condition |
| 126 | ;; codes with MOVQ, and also this comparison can be folded into a preceding | |
| 127 | ;; operation by the post-reload comparison elimination pass. | |
| 128 | (define_insn "*cmpdi_<VAXccnz:mode>" | |
| 129 | [(set (reg:VAXccnz VAX_PSL_REGNUM) | |
| 130 | (compare:VAXccnz (match_operand:DI 0 "general_operand" "r,nmT") | |
| 131 | (match_operand:DI 1 "const_zero_operand" "I,I"))) | |
| 132 | (clobber (match_scratch:DI 2 "=X,r"))] | |
| 133 | "reload_completed" | |
| 134 | "@ | |
| 135 | movq %0,%0 | |
| 136 | movq %0,%2") | |
| 137 | ||
| 138 | (define_insn "*cmp<VAXfp:mode>_<VAXccnz:mode>" | |
| 139 | [(set (reg:VAXccnz VAX_PSL_REGNUM) | |
| 140 | (compare:VAXccnz (match_operand:VAXfp 0 "general_operand" "gF,gF") | |
| 141 | (match_operand:VAXfp 1 "general_operand" "G,gF")))] | |
| 142 | "reload_completed" | |
| 00a8faa3 | 143 | "@ |
| 20acd226 SB |
144 | tst<VAXfp:fsfx> %0 |
| 145 | cmp<VAXfp:fsfx> %0,%1") | |
| ab835497 | 146 | |
| e552abe2 MR |
147 | (define_insn "*bit<VAXint:mode>_<VAXccnz:mode>" |
| 148 | [(set (reg:VAXccnz VAX_PSL_REGNUM) | |
| 149 | (compare:VAXccnz | |
| 150 | (and:VAXint (match_operand:VAXint 0 "general_operand" "nrmT") | |
| 151 | (match_operand:VAXint 1 "general_operand" "nrmT")) | |
| 152 | (const_int 0)))] | |
| 153 | "reload_completed" | |
| 20acd226 | 154 | "bit<VAXint:isfx> %0,%1") |
| ab835497 | 155 | |
| 8aeea6e6 | 156 | ;; The VAX has no sCOND insns. It does have add/subtract with carry |
| 76f941a8 DA |
157 | ;; which could be used to implement the sltu and sgeu patterns. However, |
| 158 | ;; to do this properly requires a complete rewrite of the compare insns | |
| 159 | ;; to keep them together with the sltu/sgeu insns until after the | |
| 160 | ;; reload pass is complete. The previous implementation didn't do this | |
| 161 | ;; and has been deleted. | |
| ab835497 | 162 | |
| ab835497 | 163 | \f |
| e552abe2 | 164 | (define_insn_and_split "mov<mode>" |
| 20acd226 SB |
165 | [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g") |
| 166 | (match_operand:VAXfp 1 "general_operand" "G,gF"))] | |
| ab835497 | 167 | "" |
| e552abe2 MR |
168 | "#" |
| 169 | "reload_completed" | |
| 170 | [(parallel | |
| 171 | [(set (match_dup 0) | |
| 172 | (match_dup 1)) | |
| 173 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 174 | "") | |
| 175 | ||
| 176 | (define_insn "*mov<mode><fccn><fccnz><fccz>" | |
| 177 | [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g") | |
| 178 | (match_operand:VAXfp 1 "general_operand" "G,gF")) | |
| 179 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 180 | "reload_completed" | |
| ab835497 | 181 | "@ |
| 20acd226 SB |
182 | clr<VAXfp:fsfx> %0 |
| 183 | mov<VAXfp:fsfx> %1,%0") | |
| ab835497 | 184 | |
| 8aeea6e6 | 185 | ;; Some VAXen don't support this instruction. |
| e552abe2 | 186 | ;;(define_insn_and_split "movti" |
| 3c085897 | 187 | ;; [(set (match_operand:TI 0 "nonimmediate_operand" "=g") |
| ab835497 RK |
188 | ;; (match_operand:TI 1 "general_operand" "g"))] |
| 189 | ;; "" | |
| e552abe2 MR |
190 | ;; "#" |
| 191 | ;; "reload_completed" | |
| 192 | ;; [(parallel | |
| 193 | ;; [(set (match_dup 0) | |
| 194 | ;; (match_dup 1)) | |
| 195 | ;; (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 196 | ;; "") | |
| 197 | ;; | |
| 198 | ;;(define_insn "*movti<ccn><ccnz><ccz>" | |
| 199 | ;; [(set (match_operand:TI 0 "nonimmediate_operand" "=g") | |
| 200 | ;; (match_operand:TI 1 "general_operand" "g")) | |
| 201 | ;; (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 202 | ;; "reload_completed" | |
| 3c085897 | 203 | ;; "movo %1,%0") |
| ab835497 | 204 | |
| e552abe2 | 205 | (define_insn_and_split "movdi" |
| c4e75102 MT |
206 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") |
| 207 | (match_operand:DI 1 "general_operand" "g"))] | |
| ab835497 | 208 | "" |
| e552abe2 MR |
209 | "#" |
| 210 | "reload_completed" | |
| 211 | [(parallel | |
| 212 | [(set (match_dup 0) | |
| 213 | (match_dup 1)) | |
| 214 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 215 | "") | |
| 216 | ||
| 217 | ;; In some cases `vax_output_int_move' splits a `DImode' move into a pair | |
| 218 | ;; of `SImode' moves, in which case the flags aren't usefully set. Have | |
| 219 | ;; separate patterns then, for the cases where the move may and may not be | |
| 220 | ;; split each. We use the outer condition only so in some cases we will | |
| 221 | ;; fail to notice the move does not actually get split, but this is OK. | |
| 222 | (define_insn "*movdi_maybe_split" | |
| 223 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") | |
| 224 | (match_operand:DI 1 "general_operand" "g")) | |
| 225 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 226 | "reload_completed && vax_maybe_split_dimode_move (operands)" | |
| 227 | "* return vax_output_int_move (insn, operands, DImode);") | |
| 228 | ||
| 229 | (define_insn "*movdi_unsplit<ccn><ccnz><ccz>" | |
| 230 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") | |
| 231 | (match_operand:DI 1 "general_operand" "g")) | |
| 232 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 233 | "reload_completed && !vax_maybe_split_dimode_move (operands)" | |
| c4e75102 | 234 | "* return vax_output_int_move (insn, operands, DImode);") |
| ab835497 | 235 | |
| 8aeea6e6 | 236 | ;; The VAX move instructions have space-time tradeoffs. On a MicroVAX |
| 00a8faa3 RK |
237 | ;; register-register mov instructions take 3 bytes and 2 CPU cycles. clrl |
| 238 | ;; takes 2 bytes and 3 cycles. mov from constant to register takes 2 cycles | |
| 239 | ;; if the constant is smaller than 4 bytes, 3 cycles for a longword | |
| 240 | ;; constant. movz, mneg, and mcom are as fast as mov, so movzwl is faster | |
| 241 | ;; than movl for positive constants that fit in 16 bits but not 6 bits. cvt | |
| 242 | ;; instructions take 4 cycles. inc takes 3 cycles. The machine description | |
| 243 | ;; is willing to trade 1 byte for 1 cycle (clrl instead of movl $0; cvtwl | |
| 244 | ;; instead of movl). | |
| 245 | ||
| 246 | ;; Cycle counts for other models may vary (on a VAX 750 they are similar, | |
| 247 | ;; but on a VAX 9000 most move and add instructions with one constant | |
| 248 | ;; operand take 1 cycle). | |
| 249 | ||
| 250 | ;; Loads of constants between 64 and 128 used to be done with | |
| 251 | ;; "addl3 $63,#,dst" but this is slower than movzbl and takes as much space. | |
| 252 | ||
| c4e75102 MT |
253 | (define_expand "movsi" |
| 254 | [(set (match_operand:SI 0 "nonimmediate_operand" "") | |
| 255 | (match_operand:SI 1 "general_operand" ""))] | |
| 256 | "" | |
| 257 | " | |
| 258 | { | |
| 259 | #ifdef NO_EXTERNAL_INDIRECT_ADDRESS | |
| 260 | if (flag_pic | |
| 261 | && GET_CODE (operands[1]) == CONST | |
| 262 | && GET_CODE (XEXP (XEXP (operands[1], 0), 0)) == SYMBOL_REF | |
| 263 | && !SYMBOL_REF_LOCAL_P (XEXP (XEXP (operands[1], 0), 0))) | |
| 264 | { | |
| 265 | rtx symbol_ref = XEXP (XEXP (operands[1], 0), 0); | |
| 266 | rtx const_int = XEXP (XEXP (operands[1], 0), 1); | |
| 267 | rtx temp = reload_in_progress ? operands[0] : gen_reg_rtx (Pmode); | |
| 268 | emit_move_insn (temp, symbol_ref); | |
| 269 | emit_move_insn (operands[0], gen_rtx_PLUS (SImode, temp, const_int)); | |
| 270 | DONE; | |
| 271 | } | |
| 272 | #endif | |
| 273 | }") | |
| 274 | ||
| e552abe2 | 275 | (define_insn_and_split "movsi_2" |
| c4e75102 MT |
276 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| 277 | (match_operand:SI 1 "nonsymbolic_operand" "nrmT"))] | |
| 278 | "" | |
| e552abe2 MR |
279 | "#" |
| 280 | "reload_completed" | |
| 281 | [(parallel | |
| 282 | [(set (match_dup 0) | |
| 283 | (match_dup 1)) | |
| 284 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 285 | "") | |
| 286 | ||
| 287 | (define_insn "*movsi_2<ccn><ccnz><ccz>" | |
| 288 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 289 | (match_operand:SI 1 "nonsymbolic_operand" "nrmT")) | |
| 290 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 291 | "reload_completed" | |
| c4e75102 MT |
292 | "* return vax_output_int_move (insn, operands, SImode);") |
| 293 | ||
| e552abe2 | 294 | (define_insn_and_split "mov<mode>" |
| c4e75102 MT |
295 | [(set (match_operand:VAXintQH 0 "nonimmediate_operand" "=g") |
| 296 | (match_operand:VAXintQH 1 "general_operand" "g"))] | |
| ab835497 | 297 | "" |
| e552abe2 MR |
298 | "#" |
| 299 | "reload_completed" | |
| 300 | [(parallel | |
| 301 | [(set (match_dup 0) | |
| 302 | (match_dup 1)) | |
| 303 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 304 | "") | |
| 305 | ||
| 306 | (define_insn "*mov<mode><ccn><ccnz><ccz>" | |
| 307 | [(set (match_operand:VAXintQH 0 "nonimmediate_operand" "=g") | |
| 308 | (match_operand:VAXintQH 1 "general_operand" "g")) | |
| 309 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 310 | "reload_completed" | |
| 20acd226 | 311 | "* return vax_output_int_move (insn, operands, <MODE>mode);") |
| 00a8faa3 | 312 | |
| e552abe2 MR |
313 | (define_insn_and_split "movstricthi" |
| 314 | [(set (strict_low_part (match_operand:HI 0 "register_operand" "+r")) | |
| 00a8faa3 RK |
315 | (match_operand:HI 1 "general_operand" "g"))] |
| 316 | "" | |
| e552abe2 MR |
317 | "#" |
| 318 | "reload_completed" | |
| 319 | [(parallel | |
| 320 | [(set (strict_low_part (match_dup 0)) | |
| 321 | (match_dup 1)) | |
| 322 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 323 | "") | |
| 324 | ||
| 325 | (define_insn "*movstricthi<ccn><ccnz><ccz>" | |
| 326 | [(set (strict_low_part (match_operand:HI 0 "register_operand" "+r")) | |
| 327 | (match_operand:HI 1 "general_operand" "g")) | |
| 328 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 329 | "reload_completed" | |
| 00a8faa3 RK |
330 | "* |
| 331 | { | |
| d97c1295 | 332 | if (CONST_INT_P (operands[1])) |
| ab835497 RK |
333 | { |
| 334 | int i = INTVAL (operands[1]); | |
| 00a8faa3 RK |
335 | if (i == 0) |
| 336 | return \"clrw %0\"; | |
| 337 | else if ((unsigned int)i < 64) | |
| 338 | return \"movw %1,%0\"; | |
| 339 | else if ((unsigned int)~i < 64) | |
| 340 | return \"mcomw %H1,%0\"; | |
| 341 | else if ((unsigned int)i < 256) | |
| 342 | return \"movzbw %1,%0\"; | |
| ab835497 RK |
343 | } |
| 344 | return \"movw %1,%0\"; | |
| 345 | }") | |
| 346 | ||
| e552abe2 MR |
347 | (define_insn_and_split "movstrictqi" |
| 348 | [(set (strict_low_part (match_operand:QI 0 "register_operand" "+r")) | |
| 00a8faa3 RK |
349 | (match_operand:QI 1 "general_operand" "g"))] |
| 350 | "" | |
| e552abe2 MR |
351 | "#" |
| 352 | "reload_completed" | |
| 353 | [(parallel | |
| 354 | [(set (strict_low_part (match_dup 0)) | |
| 355 | (match_dup 1)) | |
| 356 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 357 | "") | |
| 358 | ||
| 359 | (define_insn "*movstrictqi<ccn><ccnz><ccz>" | |
| 360 | [(set (strict_low_part (match_operand:QI 0 "register_operand" "+r")) | |
| 361 | (match_operand:QI 1 "general_operand" "g")) | |
| 362 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 363 | "reload_completed" | |
| 00a8faa3 RK |
364 | "* |
| 365 | { | |
| d97c1295 | 366 | if (CONST_INT_P (operands[1])) |
| ab835497 RK |
367 | { |
| 368 | int i = INTVAL (operands[1]); | |
| 00a8faa3 RK |
369 | if (i == 0) |
| 370 | return \"clrb %0\"; | |
| 371 | else if ((unsigned int)~i < 64) | |
| 372 | return \"mcomb %B1,%0\"; | |
| ab835497 RK |
373 | } |
| 374 | return \"movb %1,%0\"; | |
| 375 | }") | |
| 376 | ||
| 7133bb7f | 377 | ;; This is here to accept 4 arguments and pass the first 3 along |
| e93fbce8 | 378 | ;; to the movmemhi1 pattern that really does the work. |
| 76715c32 | 379 | (define_expand "cpymemhi" |
| e93fbce8 MR |
380 | [(set (match_operand:BLK 0 "memory_operand" "") |
| 381 | (match_operand:BLK 1 "memory_operand" "")) | |
| 382 | (use (match_operand:HI 2 "general_operand" "")) | |
| 7133bb7f RS |
383 | (match_operand 3 "" "")] |
| 384 | "" | |
| 385 | " | |
| c4e75102 | 386 | { |
| e93fbce8 MR |
387 | emit_insn (gen_movmemhi1 (operands[0], operands[1], operands[2])); |
| 388 | DONE; | |
| 389 | }") | |
| 390 | ||
| 391 | (define_expand "movmemhi" | |
| 392 | [(set (match_operand:BLK 0 "memory_operand" "") | |
| 393 | (match_operand:BLK 1 "memory_operand" "")) | |
| 394 | (use (match_operand:HI 2 "general_operand" "")) | |
| 395 | (match_operand 3 "" "")] | |
| 396 | "" | |
| 397 | " | |
| 398 | { | |
| 399 | emit_insn (gen_movmemhi1 (operands[0], operands[1], operands[2])); | |
| 7133bb7f | 400 | DONE; |
| c4e75102 | 401 | }") |
| 7133bb7f | 402 | |
| ab835497 RK |
403 | ;; The definition of this insn does not really explain what it does, |
| 404 | ;; but it should suffice | |
| 405 | ;; that anything generated as this insn will be recognized as one | |
| 406 | ;; and that it won't successfully combine with anything. | |
| c4e75102 | 407 | |
| e552abe2 | 408 | (define_insn_and_split "movmemhi1" |
| c4e75102 MT |
409 | [(set (match_operand:BLK 0 "memory_operand" "=o") |
| 410 | (match_operand:BLK 1 "memory_operand" "o")) | |
| ab835497 RK |
411 | (use (match_operand:HI 2 "general_operand" "g")) |
| 412 | (clobber (reg:SI 0)) | |
| 413 | (clobber (reg:SI 1)) | |
| 414 | (clobber (reg:SI 2)) | |
| 415 | (clobber (reg:SI 3)) | |
| 416 | (clobber (reg:SI 4)) | |
| 417 | (clobber (reg:SI 5))] | |
| 418 | "" | |
| e552abe2 MR |
419 | "#" |
| 420 | "reload_completed" | |
| 421 | [(parallel | |
| 422 | [(set (match_dup 0) | |
| 423 | (match_dup 1)) | |
| 424 | (use (match_dup 2)) | |
| 425 | (clobber (reg:SI 0)) | |
| 426 | (clobber (reg:SI 1)) | |
| 427 | (clobber (reg:SI 2)) | |
| 428 | (clobber (reg:SI 3)) | |
| 429 | (clobber (reg:SI 4)) | |
| 430 | (clobber (reg:SI 5)) | |
| 431 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 432 | "") | |
| 433 | ||
| 434 | (define_insn "*movmemhi1" | |
| 435 | [(set (match_operand:BLK 0 "memory_operand" "=o") | |
| 436 | (match_operand:BLK 1 "memory_operand" "o")) | |
| 437 | (use (match_operand:HI 2 "general_operand" "g")) | |
| 438 | (clobber (reg:SI 0)) | |
| 439 | (clobber (reg:SI 1)) | |
| 440 | (clobber (reg:SI 2)) | |
| 441 | (clobber (reg:SI 3)) | |
| 442 | (clobber (reg:SI 4)) | |
| 443 | (clobber (reg:SI 5)) | |
| 444 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 445 | "reload_completed" | |
| ab835497 | 446 | "movc3 %2,%1,%0") |
| 3057f1ab MR |
447 | |
| 448 | ;; This is here to accept 4 arguments and pass the first 3 along | |
| 449 | ;; to the setmemhi1 pattern that really does the work. | |
| 450 | (define_expand "setmemhi" | |
| 451 | [(set (match_operand:BLK 0 "memory_operand" "") | |
| 452 | (match_operand:QI 2 "general_operand" "")) | |
| 453 | (use (match_operand:HI 1 "general_operand" "")) | |
| 454 | (match_operand 3 "" "")] | |
| 455 | "" | |
| 456 | " | |
| 457 | { | |
| 458 | emit_insn (gen_setmemhi1 (operands[0], operands[1], operands[2])); | |
| 459 | DONE; | |
| 460 | }") | |
| 461 | ||
| 462 | ;; The srcaddr operand of MOVC5 is not dereferenced if srclen is zero, so we | |
| 463 | ;; set it to (%ap) somewhat arbitrarily chosen for the shortest encoding. | |
| 464 | (define_insn_and_split "setmemhi1" | |
| 465 | [(set (match_operand:BLK 0 "memory_operand" "=o") | |
| 466 | (unspec:BLK [(use (match_operand:QI 2 "general_operand" "g"))] | |
| 467 | UNSPEC_SETMEM_FILL)) | |
| 468 | (use (match_operand:HI 1 "general_operand" "g")) | |
| 469 | (clobber (reg:SI 0)) | |
| 470 | (clobber (reg:SI 1)) | |
| 471 | (clobber (reg:SI 2)) | |
| 472 | (clobber (reg:SI 3)) | |
| 473 | (clobber (reg:SI 4)) | |
| 474 | (clobber (reg:SI 5))] | |
| 475 | "" | |
| 476 | "#" | |
| 477 | "reload_completed" | |
| 478 | [(parallel | |
| 479 | [(set (match_dup 0) | |
| 480 | (unspec:BLK [(use (match_dup 2))] UNSPEC_SETMEM_FILL)) | |
| 481 | (use (match_dup 1)) | |
| 482 | (clobber (reg:SI 0)) | |
| 483 | (clobber (reg:SI 1)) | |
| 484 | (clobber (reg:SI 2)) | |
| 485 | (clobber (reg:SI 3)) | |
| 486 | (clobber (reg:SI 4)) | |
| 487 | (clobber (reg:SI 5)) | |
| 488 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 489 | "") | |
| 490 | ||
| 491 | (define_insn "*setmemhi1" | |
| 492 | [(set (match_operand:BLK 0 "memory_operand" "=o") | |
| 493 | (unspec:BLK [(use (match_operand:QI 2 "general_operand" "g"))] | |
| 494 | UNSPEC_SETMEM_FILL)) | |
| 495 | (use (match_operand:HI 1 "general_operand" "g")) | |
| 496 | (clobber (reg:SI 0)) | |
| 497 | (clobber (reg:SI 1)) | |
| 498 | (clobber (reg:SI 2)) | |
| 499 | (clobber (reg:SI 3)) | |
| 500 | (clobber (reg:SI 4)) | |
| 501 | (clobber (reg:SI 5)) | |
| 502 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 503 | "reload_completed" | |
| 504 | "movc5 $0,(%%ap),%2,%1,%0") | |
| ab835497 RK |
505 | \f |
| 506 | ;; Extension and truncation insns. | |
| 507 | ||
| e552abe2 | 508 | (define_insn_and_split "truncsiqi2" |
| 17ad4377 | 509 | [(set (match_operand:QI 0 "nonimmediate_operand" "=g") |
| c4e75102 | 510 | (truncate:QI (match_operand:SI 1 "nonimmediate_operand" "nrmT")))] |
| ab835497 | 511 | "" |
| e552abe2 MR |
512 | "#" |
| 513 | "reload_completed" | |
| 514 | [(parallel | |
| 515 | [(set (match_dup 0) | |
| 516 | (truncate:QI (match_dup 1))) | |
| 517 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 518 | "") | |
| 519 | ||
| 520 | (define_insn "*truncsiqi2<ccn><ccnz><ccz>" | |
| 521 | [(set (match_operand:QI 0 "nonimmediate_operand" "=g") | |
| 522 | (truncate:QI (match_operand:SI 1 "nonimmediate_operand" "nrmT"))) | |
| 523 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 524 | "reload_completed" | |
| ab835497 RK |
525 | "cvtlb %1,%0") |
| 526 | ||
| e552abe2 | 527 | (define_insn_and_split "truncsihi2" |
| 17ad4377 | 528 | [(set (match_operand:HI 0 "nonimmediate_operand" "=g") |
| c4e75102 | 529 | (truncate:HI (match_operand:SI 1 "nonimmediate_operand" "nrmT")))] |
| ab835497 | 530 | "" |
| e552abe2 MR |
531 | "#" |
| 532 | "reload_completed" | |
| 533 | [(parallel | |
| 534 | [(set (match_dup 0) | |
| 535 | (truncate:HI (match_dup 1))) | |
| 536 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 537 | "") | |
| 538 | ||
| 539 | (define_insn "*truncsihi2<ccn><ccnz><ccz>" | |
| 540 | [(set (match_operand:HI 0 "nonimmediate_operand" "=g") | |
| 541 | (truncate:HI (match_operand:SI 1 "nonimmediate_operand" "nrmT"))) | |
| 542 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 543 | "reload_completed" | |
| ab835497 RK |
544 | "cvtlw %1,%0") |
| 545 | ||
| e552abe2 | 546 | (define_insn_and_split "trunchiqi2" |
| 17ad4377 | 547 | [(set (match_operand:QI 0 "nonimmediate_operand" "=g") |
| ab835497 RK |
548 | (truncate:QI (match_operand:HI 1 "nonimmediate_operand" "g")))] |
| 549 | "" | |
| e552abe2 MR |
550 | "#" |
| 551 | "reload_completed" | |
| 552 | [(parallel | |
| 553 | [(set (match_dup 0) | |
| 554 | (truncate:QI (match_dup 1))) | |
| 555 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 556 | "") | |
| 557 | ||
| 558 | (define_insn "*trunchiqi2<ccn><ccnz><ccz>" | |
| 559 | [(set (match_operand:QI 0 "nonimmediate_operand" "=g") | |
| 560 | (truncate:QI (match_operand:HI 1 "nonimmediate_operand" "g"))) | |
| 561 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 562 | "reload_completed" | |
| ab835497 RK |
563 | "cvtwb %1,%0") |
| 564 | ||
| e552abe2 | 565 | (define_insn_and_split "extendhisi2" |
| 17ad4377 | 566 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| ab835497 RK |
567 | (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "g")))] |
| 568 | "" | |
| e552abe2 MR |
569 | "#" |
| 570 | "reload_completed" | |
| 571 | [(parallel | |
| 572 | [(set (match_dup 0) | |
| 573 | (sign_extend:SI (match_dup 1))) | |
| 574 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 575 | "") | |
| 576 | ||
| 577 | (define_insn "*extendhisi2<ccn><ccnz><ccz>" | |
| 578 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 579 | (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "g"))) | |
| 580 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 581 | "reload_completed" | |
| ab835497 RK |
582 | "cvtwl %1,%0") |
| 583 | ||
| e552abe2 | 584 | (define_insn_and_split "extendqihi2" |
| 17ad4377 | 585 | [(set (match_operand:HI 0 "nonimmediate_operand" "=g") |
| ab835497 RK |
586 | (sign_extend:HI (match_operand:QI 1 "nonimmediate_operand" "g")))] |
| 587 | "" | |
| e552abe2 MR |
588 | "#" |
| 589 | "reload_completed" | |
| 590 | [(parallel | |
| 591 | [(set (match_dup 0) | |
| 592 | (sign_extend:HI (match_dup 1))) | |
| 593 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 594 | "") | |
| 595 | ||
| 596 | (define_insn "*extendqihi2<ccn><ccnz><ccz>" | |
| 597 | [(set (match_operand:HI 0 "nonimmediate_operand" "=g") | |
| 598 | (sign_extend:HI (match_operand:QI 1 "nonimmediate_operand" "g"))) | |
| 599 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 600 | "reload_completed" | |
| ab835497 RK |
601 | "cvtbw %1,%0") |
| 602 | ||
| e552abe2 | 603 | (define_insn_and_split "extendqisi2" |
| 17ad4377 | 604 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| ab835497 RK |
605 | (sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "g")))] |
| 606 | "" | |
| e552abe2 MR |
607 | "#" |
| 608 | "reload_completed" | |
| 609 | [(parallel | |
| 610 | [(set (match_dup 0) | |
| 611 | (sign_extend:SI (match_dup 1))) | |
| 612 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 613 | "") | |
| 614 | ||
| 615 | (define_insn "*extendqisi2<ccn><ccnz><ccz>" | |
| 616 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 617 | (sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "g"))) | |
| 618 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 619 | "reload_completed" | |
| ab835497 RK |
620 | "cvtbl %1,%0") |
| 621 | ||
| e552abe2 | 622 | (define_insn_and_split "extendsfdf2" |
| 17ad4377 | 623 | [(set (match_operand:DF 0 "nonimmediate_operand" "=g") |
| ab835497 RK |
624 | (float_extend:DF (match_operand:SF 1 "general_operand" "gF")))] |
| 625 | "" | |
| e552abe2 MR |
626 | "#" |
| 627 | "reload_completed" | |
| 628 | [(parallel | |
| 629 | [(set (match_dup 0) | |
| 630 | (float_extend:DF (match_dup 1))) | |
| 631 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 632 | "") | |
| 633 | ||
| 634 | (define_insn "*extendsfdf2<fccn><fccnz><fccz>" | |
| 635 | [(set (match_operand:DF 0 "nonimmediate_operand" "=g") | |
| 636 | (float_extend:DF (match_operand:SF 1 "general_operand" "gF"))) | |
| 637 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 638 | "reload_completed" | |
| ab835497 RK |
639 | "cvtf%# %1,%0") |
| 640 | ||
| e552abe2 | 641 | (define_insn_and_split "truncdfsf2" |
| 17ad4377 | 642 | [(set (match_operand:SF 0 "nonimmediate_operand" "=g") |
| ab835497 RK |
643 | (float_truncate:SF (match_operand:DF 1 "general_operand" "gF")))] |
| 644 | "" | |
| e552abe2 MR |
645 | "#" |
| 646 | "reload_completed" | |
| 647 | [(parallel | |
| 648 | [(set (match_dup 0) | |
| 649 | (float_truncate:SF (match_dup 1))) | |
| 650 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 651 | "") | |
| 652 | ||
| 653 | (define_insn "*truncdfsf2<fccn><fccnz><fccz>" | |
| 654 | [(set (match_operand:SF 0 "nonimmediate_operand" "=g") | |
| 655 | (float_truncate:SF (match_operand:DF 1 "general_operand" "gF"))) | |
| 656 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 657 | "reload_completed" | |
| ab835497 RK |
658 | "cvt%#f %1,%0") |
| 659 | ||
| e552abe2 | 660 | (define_insn_and_split "zero_extendhisi2" |
| 17ad4377 | 661 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| ab835497 RK |
662 | (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "g")))] |
| 663 | "" | |
| e552abe2 MR |
664 | "#" |
| 665 | "reload_completed" | |
| 666 | [(parallel | |
| 667 | [(set (match_dup 0) | |
| 668 | (zero_extend:SI (match_dup 1))) | |
| 669 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 670 | "") | |
| 671 | ||
| 672 | (define_insn "*zero_extendhisi2<ccn><ccnz><ccz>" | |
| 673 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 674 | (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "g"))) | |
| 675 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 676 | "reload_completed" | |
| ab835497 RK |
677 | "movzwl %1,%0") |
| 678 | ||
| e552abe2 | 679 | (define_insn_and_split "zero_extendqihi2" |
| 17ad4377 | 680 | [(set (match_operand:HI 0 "nonimmediate_operand" "=g") |
| ab835497 RK |
681 | (zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "g")))] |
| 682 | "" | |
| e552abe2 MR |
683 | "#" |
| 684 | "reload_completed" | |
| 685 | [(parallel | |
| 686 | [(set (match_dup 0) | |
| 687 | (zero_extend:HI (match_dup 1))) | |
| 688 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 689 | "") | |
| 690 | ||
| 691 | (define_insn "*zero_extendqihi2<ccn><ccnz><ccz>" | |
| 692 | [(set (match_operand:HI 0 "nonimmediate_operand" "=g") | |
| 693 | (zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "g"))) | |
| 694 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 695 | "reload_completed" | |
| ab835497 RK |
696 | "movzbw %1,%0") |
| 697 | ||
| e552abe2 | 698 | (define_insn_and_split "zero_extendqisi2" |
| 17ad4377 | 699 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| ab835497 RK |
700 | (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "g")))] |
| 701 | "" | |
| e552abe2 MR |
702 | "#" |
| 703 | "reload_completed" | |
| 704 | [(parallel | |
| 705 | [(set (match_dup 0) | |
| 706 | (zero_extend:SI (match_dup 1))) | |
| 707 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 708 | "") | |
| 709 | ||
| 710 | (define_insn "*zero_extendqisi2<ccn><ccnz><ccz>" | |
| 711 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 712 | (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "g"))) | |
| 713 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 714 | "reload_completed" | |
| ab835497 RK |
715 | "movzbl %1,%0") |
| 716 | \f | |
| 717 | ;; Fix-to-float conversion insns. | |
| 718 | ||
| e552abe2 | 719 | (define_insn_and_split "float<VAXint:mode><VAXfp:mode>2" |
| 20acd226 SB |
720 | [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g") |
| 721 | (float:VAXfp (match_operand:VAXint 1 "nonimmediate_operand" "g")))] | |
| ab835497 | 722 | "" |
| e552abe2 MR |
723 | "#" |
| 724 | "reload_completed" | |
| 725 | [(parallel | |
| 726 | [(set (match_dup 0) | |
| 727 | (float:VAXfp (match_dup 1))) | |
| 728 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 729 | "") | |
| 730 | ||
| 731 | (define_insn "*float<VAXint:mode><VAXfp:mode>2<fccn><fccnz><fccz>" | |
| 732 | [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g") | |
| 733 | (float:VAXfp (match_operand:VAXint 1 "nonimmediate_operand" "g"))) | |
| 734 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 735 | "reload_completed" | |
| 20acd226 | 736 | "cvt<VAXint:isfx><VAXfp:fsfx> %1,%0") |
| ab835497 | 737 | |
| ab835497 RK |
738 | ;; Float-to-fix conversion insns. |
| 739 | ||
| e552abe2 | 740 | (define_insn_and_split "fix_trunc<VAXfp:mode><VAXint:mode>2" |
| 20acd226 | 741 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g") |
| 5e4aec98 | 742 | (fix:VAXint (match_operand:VAXfp 1 "general_operand" "gF")))] |
| ab835497 | 743 | "" |
| e552abe2 MR |
744 | "#" |
| 745 | "reload_completed" | |
| 746 | [(parallel | |
| 747 | [(set (match_dup 0) | |
| 748 | (fix:VAXint (match_dup 1))) | |
| 749 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 750 | "") | |
| 751 | ||
| 752 | (define_insn "*fix_trunc<VAXfp:mode><VAXint:mode>2<ccn><ccnz><ccz>" | |
| 753 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g") | |
| 754 | (fix:VAXint (match_operand:VAXfp 1 "general_operand" "gF"))) | |
| 755 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 756 | "reload_completed" | |
| 20acd226 | 757 | "cvt<VAXfp:fsfx><VAXint:isfx> %1,%0") |
| 5e4aec98 RH |
758 | |
| 759 | (define_expand "fixuns_trunc<VAXfp:mode><VAXint:mode>2" | |
| 760 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "") | |
| 761 | (fix:VAXint (match_operand:VAXfp 1 "general_operand")))] | |
| 762 | "") | |
| ab835497 RK |
763 | \f |
| 764 | ;;- All kinds of add instructions. | |
| 765 | ||
| e552abe2 | 766 | (define_insn_and_split "add<mode>3" |
| 20acd226 SB |
767 | [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g,g") |
| 768 | (plus:VAXfp (match_operand:VAXfp 1 "general_operand" "0,gF,gF") | |
| 769 | (match_operand:VAXfp 2 "general_operand" "gF,0,gF")))] | |
| ab835497 | 770 | "" |
| e552abe2 MR |
771 | "#" |
| 772 | "reload_completed" | |
| 773 | [(parallel | |
| 774 | [(set (match_dup 0) | |
| 775 | (plus:VAXfp (match_dup 1) | |
| 776 | (match_dup 2))) | |
| 777 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 778 | "") | |
| 779 | ||
| 780 | (define_insn "*add<mode>3<fccn><fccnz><fccz>" | |
| 781 | [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g,g") | |
| 782 | (plus:VAXfp (match_operand:VAXfp 1 "general_operand" "0,gF,gF") | |
| 783 | (match_operand:VAXfp 2 "general_operand" "gF,0,gF"))) | |
| 784 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 785 | "reload_completed" | |
| ab835497 | 786 | "@ |
| 20acd226 SB |
787 | add<VAXfp:fsfx>2 %2,%0 |
| 788 | add<VAXfp:fsfx>2 %1,%0 | |
| 789 | add<VAXfp:fsfx>3 %1,%2,%0") | |
| ab835497 | 790 | |
| e552abe2 | 791 | (define_insn_and_split "add<mode>3" |
| 20acd226 | 792 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g") |
| c4e75102 | 793 | (plus:VAXint (match_operand:VAXint 1 "general_operand" "nrmT") |
| f78ac4f2 | 794 | (match_operand:VAXint 2 "general_operand" "nrmT")))] |
| ab835497 | 795 | "" |
| e552abe2 MR |
796 | "#" |
| 797 | "reload_completed" | |
| 798 | [(parallel | |
| 799 | [(set (match_dup 0) | |
| 800 | (plus:VAXint (match_dup 1) | |
| 801 | (match_dup 2))) | |
| 802 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 803 | "") | |
| 804 | ||
| 805 | (define_insn "*add<mode>3<ccn><ccnz><ccz>" | |
| 806 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g") | |
| 807 | (plus:VAXint (match_operand:VAXint 1 "general_operand" "nrmT") | |
| 808 | (match_operand:VAXint 2 "general_operand" "nrmT"))) | |
| 809 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 810 | "reload_completed" | |
| 20acd226 | 811 | "* return vax_output_int_add (insn, operands, <MODE>mode);") |
| ab835497 | 812 | |
| c4e75102 MT |
813 | (define_expand "adddi3" |
| 814 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") | |
| 815 | (plus:DI (match_operand:DI 1 "general_operand" "g") | |
| 816 | (match_operand:DI 2 "general_operand" "g")))] | |
| 817 | "!reload_in_progress" | |
| 818 | "vax_expand_addsub_di_operands (operands, PLUS); DONE;") | |
| 819 | ||
| e552abe2 | 820 | (define_insn_and_split "adcdi3" |
| c4e75102 MT |
821 | [(set (match_operand:DI 0 "nonimmediate_addsub_di_operand" "=Rr") |
| 822 | (plus:DI (match_operand:DI 1 "general_addsub_di_operand" "%0") | |
| 823 | (match_operand:DI 2 "general_addsub_di_operand" "nRr")))] | |
| 824 | "TARGET_QMATH" | |
| e552abe2 MR |
825 | "#" |
| 826 | "&& reload_completed" | |
| 827 | [(parallel | |
| 828 | [(set (match_dup 0) | |
| 829 | (plus:DI (match_dup 1) | |
| 830 | (match_dup 2))) | |
| 831 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 832 | "") | |
| 833 | ||
| 834 | (define_insn "*adcdi3<ccn>" | |
| 835 | [(set (match_operand:DI 0 "nonimmediate_addsub_di_operand" "=Rr") | |
| 836 | (plus:DI (match_operand:DI 1 "general_addsub_di_operand" "%0") | |
| 837 | (match_operand:DI 2 "general_addsub_di_operand" "nRr"))) | |
| 838 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 839 | "TARGET_QMATH && reload_completed" | |
| c4e75102 MT |
840 | "* return vax_output_int_add (insn, operands, DImode);") |
| 841 | ||
| ab835497 | 842 | ;; The add-with-carry (adwc) instruction only accepts two operands. |
| e552abe2 | 843 | (define_insn_and_split "adddi3_old" |
| 17ad4377 | 844 | [(set (match_operand:DI 0 "nonimmediate_operand" "=ro>,ro>") |
| ab835497 | 845 | (plus:DI (match_operand:DI 1 "general_operand" "%0,ro>") |
| c4e75102 MT |
846 | (match_operand:DI 2 "general_operand" "Fsro,Fs")))] |
| 847 | "!TARGET_QMATH" | |
| e552abe2 MR |
848 | "#" |
| 849 | "&& reload_completed" | |
| 850 | [(parallel | |
| 851 | [(set (match_dup 0) | |
| 852 | (plus:DI (match_dup 1) | |
| 853 | (match_dup 2))) | |
| 854 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 855 | "") | |
| 856 | ||
| 857 | (define_insn "*adddi3_old<ccn>" | |
| 858 | [(set (match_operand:DI 0 "nonimmediate_operand" "=ro>,ro>") | |
| 859 | (plus:DI (match_operand:DI 1 "general_operand" "%0,ro>") | |
| 860 | (match_operand:DI 2 "general_operand" "Fsro,Fs"))) | |
| 861 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 862 | "!TARGET_QMATH && reload_completed" | |
| c4e75102 | 863 | "* return vax_output_int_add (insn, operands, DImode);") |
| ab835497 RK |
864 | \f |
| 865 | ;;- All kinds of subtract instructions. | |
| 866 | ||
| e552abe2 | 867 | (define_insn_and_split "sub<mode>3" |
| 20acd226 SB |
868 | [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g") |
| 869 | (minus:VAXfp (match_operand:VAXfp 1 "general_operand" "0,gF") | |
| 870 | (match_operand:VAXfp 2 "general_operand" "gF,gF")))] | |
| ab835497 | 871 | "" |
| e552abe2 MR |
872 | "#" |
| 873 | "reload_completed" | |
| 874 | [(parallel | |
| 875 | [(set (match_dup 0) | |
| 876 | (minus:VAXfp (match_dup 1) | |
| 877 | (match_dup 2))) | |
| 878 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 879 | "") | |
| 880 | ||
| 881 | (define_insn "*sub<mode>3<fccn><fccnz><fccz>" | |
| 882 | [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g") | |
| 883 | (minus:VAXfp (match_operand:VAXfp 1 "general_operand" "0,gF") | |
| 884 | (match_operand:VAXfp 2 "general_operand" "gF,gF"))) | |
| 885 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 886 | "reload_completed" | |
| ab835497 | 887 | "@ |
| 20acd226 SB |
888 | sub<VAXfp:fsfx>2 %2,%0 |
| 889 | sub<VAXfp:fsfx>3 %2,%1,%0") | |
| ab835497 | 890 | |
| e552abe2 | 891 | (define_insn_and_split "sub<mode>3" |
| 20acd226 | 892 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g") |
| c4e75102 | 893 | (minus:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT") |
| f78ac4f2 | 894 | (match_operand:VAXint 2 "general_operand" "nrmT,nrmT")))] |
| ab835497 | 895 | "" |
| e552abe2 MR |
896 | "#" |
| 897 | "reload_completed" | |
| 898 | [(parallel | |
| 899 | [(set (match_dup 0) | |
| 900 | (minus:VAXint (match_dup 1) | |
| 901 | (match_dup 2))) | |
| 902 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 903 | "") | |
| 904 | ||
| 905 | (define_insn "*sub<mode>3<ccn><ccnz><ccz>" | |
| 906 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g") | |
| 907 | (minus:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT") | |
| 908 | (match_operand:VAXint 2 "general_operand" "nrmT,nrmT"))) | |
| 909 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 910 | "reload_completed" | |
| 911 | "@ | |
| 912 | sub<VAXint:isfx>2 %2,%0 | |
| 913 | sub<VAXint:isfx>3 %2,%1,%0") | |
| 914 | ||
| 915 | (define_insn "*sub<mode>3_cc" | |
| 916 | [(set (reg:CC VAX_PSL_REGNUM) | |
| 917 | (compare:CC (match_operand:VAXint 1 "general_operand" "0,nrmT") | |
| 918 | (match_operand:VAXint 2 "general_operand" "nrmT,nrmT"))) | |
| 919 | (set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g") | |
| 920 | (minus:VAXint (match_dup 1) | |
| 921 | (match_dup 2)))] | |
| 922 | "reload_completed" | |
| ab835497 | 923 | "@ |
| 20acd226 SB |
924 | sub<VAXint:isfx>2 %2,%0 |
| 925 | sub<VAXint:isfx>3 %2,%1,%0") | |
| ab835497 | 926 | |
| c4e75102 MT |
927 | (define_expand "subdi3" |
| 928 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") | |
| 929 | (minus:DI (match_operand:DI 1 "general_operand" "g") | |
| 930 | (match_operand:DI 2 "general_operand" "g")))] | |
| 931 | "!reload_in_progress" | |
| 932 | "vax_expand_addsub_di_operands (operands, MINUS); DONE;") | |
| 933 | ||
| e552abe2 | 934 | (define_insn_and_split "sbcdi3" |
| 73f793e3 | 935 | [(set (match_operand:DI 0 "nonimmediate_addsub_di_operand" "=Rr,Rr") |
| c4e75102 MT |
936 | (minus:DI (match_operand:DI 1 "general_addsub_di_operand" "0,I") |
| 937 | (match_operand:DI 2 "general_addsub_di_operand" "nRr,Rr")))] | |
| 938 | "TARGET_QMATH" | |
| e552abe2 MR |
939 | "#" |
| 940 | "&& reload_completed" | |
| 941 | [(parallel | |
| 942 | [(set (match_dup 0) | |
| 943 | (minus:DI (match_dup 1) | |
| 944 | (match_dup 2))) | |
| 945 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 946 | "") | |
| 947 | ||
| 948 | (define_insn "*sbcdi3<ccn>" | |
| 949 | [(set (match_operand:DI 0 "nonimmediate_addsub_di_operand" "=Rr,Rr") | |
| 950 | (minus:DI (match_operand:DI 1 "general_addsub_di_operand" "0,I") | |
| 951 | (match_operand:DI 2 "general_addsub_di_operand" "nRr,Rr"))) | |
| 952 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 953 | "TARGET_QMATH && reload_completed" | |
| c4e75102 MT |
954 | "* return vax_output_int_subtract (insn, operands, DImode);") |
| 955 | ||
| ab835497 | 956 | ;; The subtract-with-carry (sbwc) instruction only takes two operands. |
| e552abe2 | 957 | (define_insn_and_split "subdi3_old" |
| 17ad4377 | 958 | [(set (match_operand:DI 0 "nonimmediate_operand" "=or>,or>") |
| ab835497 | 959 | (minus:DI (match_operand:DI 1 "general_operand" "0,or>") |
| c4e75102 MT |
960 | (match_operand:DI 2 "general_operand" "Fsor,Fs")))] |
| 961 | "!TARGET_QMATH" | |
| e552abe2 MR |
962 | "#" |
| 963 | "&& reload_completed" | |
| 964 | [(parallel | |
| 965 | [(set (match_dup 0) | |
| 966 | (minus:DI (match_dup 1) | |
| 967 | (match_dup 2))) | |
| 968 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 969 | "") | |
| 970 | ||
| 971 | (define_insn "*subdi3_old<ccn>" | |
| 972 | [(set (match_operand:DI 0 "nonimmediate_operand" "=or>,or>") | |
| 973 | (minus:DI (match_operand:DI 1 "general_operand" "0,or>") | |
| 974 | (match_operand:DI 2 "general_operand" "Fsor,Fs"))) | |
| 975 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 976 | "!TARGET_QMATH && reload_completed" | |
| c4e75102 | 977 | "* return vax_output_int_subtract (insn, operands, DImode);") |
| ab835497 RK |
978 | \f |
| 979 | ;;- Multiply instructions. | |
| 980 | ||
| e552abe2 | 981 | (define_insn_and_split "mul<mode>3" |
| 20acd226 SB |
982 | [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g,g") |
| 983 | (mult:VAXfp (match_operand:VAXfp 1 "general_operand" "0,gF,gF") | |
| 984 | (match_operand:VAXfp 2 "general_operand" "gF,0,gF")))] | |
| ab835497 | 985 | "" |
| e552abe2 MR |
986 | "#" |
| 987 | "reload_completed" | |
| 988 | [(parallel | |
| 989 | [(set (match_dup 0) | |
| 990 | (mult:VAXfp (match_dup 1) | |
| 991 | (match_dup 2))) | |
| 992 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 993 | "") | |
| 994 | ||
| 995 | (define_insn "*mul<mode>3<fccn><fccnz><fccz>" | |
| 996 | [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g,g") | |
| 997 | (mult:VAXfp (match_operand:VAXfp 1 "general_operand" "0,gF,gF") | |
| 998 | (match_operand:VAXfp 2 "general_operand" "gF,0,gF"))) | |
| 999 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1000 | "reload_completed" | |
| ab835497 | 1001 | "@ |
| 20acd226 SB |
1002 | mul<VAXfp:fsfx>2 %2,%0 |
| 1003 | mul<VAXfp:fsfx>2 %1,%0 | |
| 1004 | mul<VAXfp:fsfx>3 %1,%2,%0") | |
| ab835497 | 1005 | |
| e552abe2 | 1006 | (define_insn_and_split "mul<mode>3" |
| 20acd226 | 1007 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g,g") |
| c4e75102 | 1008 | (mult:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT,nrmT") |
| f78ac4f2 | 1009 | (match_operand:VAXint 2 "general_operand" "nrmT,0,nrmT")))] |
| ab835497 | 1010 | "" |
| e552abe2 MR |
1011 | "#" |
| 1012 | "reload_completed" | |
| 1013 | [(parallel | |
| 1014 | [(set (match_dup 0) | |
| 1015 | (mult:VAXint (match_dup 1) | |
| 1016 | (match_dup 2))) | |
| 1017 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1018 | "") | |
| 1019 | ||
| 1020 | (define_insn "*mul<mode>3<ccn><ccnz><ccz>" | |
| 1021 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g,g") | |
| 1022 | (mult:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT,nrmT") | |
| 1023 | (match_operand:VAXint 2 "general_operand" "nrmT,0,nrmT"))) | |
| 1024 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1025 | "reload_completed" | |
| ab835497 | 1026 | "@ |
| 20acd226 SB |
1027 | mul<VAXint:isfx>2 %2,%0 |
| 1028 | mul<VAXint:isfx>2 %1,%0 | |
| 1029 | mul<VAXint:isfx>3 %1,%2,%0") | |
| ab835497 | 1030 | |
| e552abe2 | 1031 | (define_insn_and_split "mulsidi3" |
| 17ad4377 | 1032 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") |
| 2b39f513 MR |
1033 | (mult:DI |
| 1034 | (sign_extend:DI (match_operand:SI 1 "general_operand" "nrmT")) | |
| 1035 | (sign_extend:DI (match_operand:SI 2 "general_operand" "nrmT"))))] | |
| ab835497 | 1036 | "" |
| e552abe2 MR |
1037 | "#" |
| 1038 | "reload_completed" | |
| 1039 | [(parallel | |
| 1040 | [(set (match_dup 0) | |
| 1041 | (mult:DI | |
| 1042 | (sign_extend:DI (match_dup 1)) | |
| 1043 | (sign_extend:DI (match_dup 2)))) | |
| 1044 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1045 | "") | |
| 1046 | ||
| 1047 | (define_insn "*mulsidi3<ccn><ccnz><ccz>" | |
| 1048 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") | |
| 1049 | (mult:DI | |
| 1050 | (sign_extend:DI (match_operand:SI 1 "general_operand" "nrmT")) | |
| 1051 | (sign_extend:DI (match_operand:SI 2 "general_operand" "nrmT")))) | |
| 1052 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1053 | "reload_completed" | |
| ab835497 RK |
1054 | "emul %1,%2,$0,%0") |
| 1055 | ||
| e552abe2 | 1056 | (define_insn_and_split "*maddsidi4" |
| 17ad4377 | 1057 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") |
| ab835497 | 1058 | (plus:DI |
| 2b39f513 MR |
1059 | (mult:DI |
| 1060 | (sign_extend:DI (match_operand:SI 1 "general_operand" "nrmT")) | |
| 1061 | (sign_extend:DI (match_operand:SI 2 "general_operand" "nrmT"))) | |
| 1062 | (sign_extend:DI (match_operand:SI 3 "general_operand" "g"))))] | |
| ab835497 | 1063 | "" |
| e552abe2 MR |
1064 | "#" |
| 1065 | "reload_completed" | |
| 1066 | [(parallel | |
| 1067 | [(set (match_dup 0) | |
| 1068 | (plus:DI | |
| 1069 | (mult:DI | |
| 1070 | (sign_extend:DI (match_dup 1)) | |
| 1071 | (sign_extend:DI (match_dup 2))) | |
| 1072 | (sign_extend:DI (match_dup 3)))) | |
| 1073 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1074 | "") | |
| 1075 | ||
| 1076 | (define_insn "*maddsidi4_2<ccn><ccnz><ccz>" | |
| 1077 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") | |
| 1078 | (plus:DI | |
| 1079 | (mult:DI | |
| 1080 | (sign_extend:DI (match_operand:SI 1 "general_operand" "nrmT")) | |
| 1081 | (sign_extend:DI (match_operand:SI 2 "general_operand" "nrmT"))) | |
| 1082 | (sign_extend:DI (match_operand:SI 3 "nonimmediate_operand" "g")))) | |
| 1083 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1084 | "reload_completed" | |
| ab835497 RK |
1085 | "emul %1,%2,%3,%0") |
| 1086 | ||
| 1087 | ;; 'F' constraint means type CONST_DOUBLE | |
| e552abe2 | 1088 | (define_insn_and_split "*maddsidi4_const" |
| 17ad4377 | 1089 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") |
| ab835497 | 1090 | (plus:DI |
| 2b39f513 MR |
1091 | (mult:DI |
| 1092 | (sign_extend:DI (match_operand:SI 1 "general_operand" "nrmT")) | |
| 1093 | (sign_extend:DI (match_operand:SI 2 "general_operand" "nrmT"))) | |
| 1094 | (match_operand:DI 3 "immediate_operand" "F")))] | |
| 821bde61 | 1095 | "GET_CODE (operands[3]) == CONST_DOUBLE |
| 2b39f513 | 1096 | && CONST_DOUBLE_HIGH (operands[3]) == (CONST_DOUBLE_LOW (operands[3]) >> 31)" |
| e552abe2 MR |
1097 | "#" |
| 1098 | "&& reload_completed" | |
| 1099 | [(parallel | |
| 1100 | [(set (match_dup 0) | |
| 1101 | (plus:DI | |
| 1102 | (mult:DI | |
| 1103 | (sign_extend:DI (match_dup 1)) | |
| 1104 | (sign_extend:DI (match_dup 2))) | |
| 1105 | (match_dup 3))) | |
| 1106 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1107 | "") | |
| 1108 | ||
| 1109 | (define_insn "*maddsidi4_const_2<ccn><ccnz><ccz>" | |
| 1110 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") | |
| 1111 | (plus:DI | |
| 1112 | (mult:DI | |
| 1113 | (sign_extend:DI (match_operand:SI 1 "general_operand" "nrmT")) | |
| 1114 | (sign_extend:DI (match_operand:SI 2 "general_operand" "nrmT"))) | |
| 1115 | (match_operand:DI 3 "immediate_operand" "F"))) | |
| 1116 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1117 | "GET_CODE (operands[3]) == CONST_DOUBLE | |
| 1118 | && CONST_DOUBLE_HIGH (operands[3]) == (CONST_DOUBLE_LOW (operands[3]) >> 31) | |
| 1119 | && reload_completed" | |
| ab835497 RK |
1120 | "* |
| 1121 | { | |
| 1122 | if (CONST_DOUBLE_HIGH (operands[3])) | |
| 3a598fbe | 1123 | operands[3] = GEN_INT (CONST_DOUBLE_LOW (operands[3])); |
| ab835497 RK |
1124 | return \"emul %1,%2,%3,%0\"; |
| 1125 | }") | |
| 1126 | \f | |
| 1127 | ;;- Divide instructions. | |
| 1128 | ||
| e552abe2 | 1129 | (define_insn_and_split "div<mode>3" |
| 20acd226 SB |
1130 | [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g") |
| 1131 | (div:VAXfp (match_operand:VAXfp 1 "general_operand" "0,gF") | |
| 1132 | (match_operand:VAXfp 2 "general_operand" "gF,gF")))] | |
| ab835497 | 1133 | "" |
| e552abe2 MR |
1134 | "#" |
| 1135 | "reload_completed" | |
| 1136 | [(parallel | |
| 1137 | [(set (match_dup 0) | |
| 1138 | (div:VAXfp (match_dup 1) | |
| 1139 | (match_dup 2))) | |
| 1140 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1141 | "") | |
| 1142 | ||
| 1143 | (define_insn "*div<mode>3<fccn><fccnz><fccz>" | |
| 1144 | [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g") | |
| 1145 | (div:VAXfp (match_operand:VAXfp 1 "general_operand" "0,gF") | |
| 1146 | (match_operand:VAXfp 2 "general_operand" "gF,gF"))) | |
| 1147 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1148 | "reload_completed" | |
| ab835497 | 1149 | "@ |
| 20acd226 SB |
1150 | div<VAXfp:fsfx>2 %2,%0 |
| 1151 | div<VAXfp:fsfx>3 %2,%1,%0") | |
| ab835497 | 1152 | |
| e552abe2 | 1153 | (define_insn_and_split "div<mode>3" |
| 20acd226 | 1154 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g") |
| c4e75102 | 1155 | (div:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT") |
| f78ac4f2 | 1156 | (match_operand:VAXint 2 "general_operand" "nrmT,nrmT")))] |
| ab835497 | 1157 | "" |
| e552abe2 MR |
1158 | "#" |
| 1159 | "reload_completed" | |
| 1160 | [(parallel | |
| 1161 | [(set (match_dup 0) | |
| 1162 | (div:VAXint (match_dup 1) | |
| 1163 | (match_dup 2))) | |
| 1164 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1165 | "") | |
| 1166 | ||
| 1167 | (define_insn "*div<mode>3<ccn><ccnz><ccz>" | |
| 1168 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g") | |
| 1169 | (div:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT") | |
| 1170 | (match_operand:VAXint 2 "general_operand" "nrmT,nrmT"))) | |
| 1171 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1172 | "reload_completed" | |
| ab835497 | 1173 | "@ |
| 20acd226 SB |
1174 | div<VAXint:isfx>2 %2,%0 |
| 1175 | div<VAXint:isfx>3 %2,%1,%0") | |
| ab835497 | 1176 | |
| 1be9edfa MR |
1177 | ;; This is left out because it is very slow; |
| 1178 | ;; we are better off programming around the "lack" of this insn. | |
| e552abe2 | 1179 | ;;(define_insn_and_split "divmoddisi4" |
| 1be9edfa MR |
1180 | ;; [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| 1181 | ;; (div:SI (match_operand:DI 1 "general_operand" "g") | |
| 1182 | ;; (match_operand:SI 2 "general_operand" "g"))) | |
| 1183 | ;; (set (match_operand:SI 3 "nonimmediate_operand" "=g") | |
| 1184 | ;; (mod:SI (match_dup 1) | |
| 1185 | ;; (match_dup 2)))] | |
| 1186 | ;; "" | |
| e552abe2 MR |
1187 | ;; "#" |
| 1188 | ;; "reload_completed" | |
| 1189 | ;; [(parallel | |
| 1190 | ;; [(set (match_dup 0) | |
| 1191 | ;; (div:SI (match_dup 1) | |
| 1192 | ;; (match_dup 2))) | |
| 1193 | ;; (set (match_dup 3) | |
| 1194 | ;; (mod:SI (match_dup 1) | |
| 1195 | ;; (match_dup 2))) | |
| 1196 | ;; (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1197 | ;; "") | |
| 1198 | ;; | |
| 1199 | ;;(define_insn "*divmoddisi4<ccn><ccnz><ccz>" | |
| 1200 | ;; [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 1201 | ;; (div:SI (match_operand:DI 1 "general_operand" "g") | |
| 1202 | ;; (match_operand:SI 2 "general_operand" "g"))) | |
| 1203 | ;; (set (match_operand:SI 3 "nonimmediate_operand" "=g") | |
| 1204 | ;; (mod:SI (match_dup 1) | |
| 1205 | ;; (match_dup 2))) | |
| 1206 | ;; (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1207 | ;; "reload_completed" | |
| 1be9edfa | 1208 | ;; "ediv %2,%1,%0,%3") |
| ab835497 | 1209 | \f |
| 8aeea6e6 | 1210 | ;; Bit-and on the VAX is done with a clear-bits insn. |
| 20acd226 SB |
1211 | (define_expand "and<mode>3" |
| 1212 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "") | |
| 1213 | (and:VAXint (not:VAXint (match_operand:VAXint 1 "general_operand" "")) | |
| f78ac4f2 | 1214 | (match_operand:VAXint 2 "general_operand" "")))] |
| ab835497 RK |
1215 | "" |
| 1216 | " | |
| 1217 | { | |
| 59482679 RS |
1218 | rtx op1 = operands[1]; |
| 1219 | ||
| 1220 | /* If there is a constant argument, complement that one. */ | |
| c4e75102 | 1221 | if (CONST_INT_P (operands[2]) && ! CONST_INT_P (op1)) |
| 59482679 RS |
1222 | { |
| 1223 | operands[1] = operands[2]; | |
| 1224 | operands[2] = op1; | |
| 1225 | op1 = operands[1]; | |
| 1226 | } | |
| 1227 | ||
| d97c1295 | 1228 | if (CONST_INT_P (op1)) |
| 3a598fbe | 1229 | operands[1] = GEN_INT (~INTVAL (op1)); |
| ab835497 | 1230 | else |
| 20acd226 | 1231 | operands[1] = expand_unop (<MODE>mode, one_cmpl_optab, op1, 0, 1); |
| ab835497 RK |
1232 | }") |
| 1233 | ||
| e552abe2 | 1234 | (define_insn_and_split "*and<mode>3" |
| 20acd226 | 1235 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g") |
| e552abe2 MR |
1236 | (and:VAXint (not:VAXint |
| 1237 | (match_operand:VAXint 1 "general_operand" "nrmT,nrmT")) | |
| c4e75102 | 1238 | (match_operand:VAXint 2 "general_operand" "0,nrmT")))] |
| ab835497 | 1239 | "" |
| e552abe2 MR |
1240 | "#" |
| 1241 | "reload_completed" | |
| 1242 | [(parallel | |
| 1243 | [(set (match_dup 0) | |
| 1244 | (and:VAXint (not:VAXint | |
| 1245 | (match_dup 1)) | |
| 1246 | (match_dup 2))) | |
| 1247 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1248 | "") | |
| 1249 | ||
| 1250 | (define_insn "*and<mode>3_2<ccn><ccnz><ccz>" | |
| 1251 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g") | |
| 1252 | (and:VAXint (not:VAXint | |
| 1253 | (match_operand:VAXint 1 "general_operand" "nrmT,nrmT")) | |
| 1254 | (match_operand:VAXint 2 "general_operand" "0,nrmT"))) | |
| 1255 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1256 | "reload_completed" | |
| ab835497 | 1257 | "@ |
| 20acd226 SB |
1258 | bic<VAXint:isfx>2 %1,%0 |
| 1259 | bic<VAXint:isfx>3 %1,%2,%0") | |
| ab835497 RK |
1260 | |
| 1261 | ;; The following used to be needed because constant propagation can | |
| 1262 | ;; create them starting from the bic insn patterns above. This is no | |
| 1263 | ;; longer a problem. However, having these patterns allows optimization | |
| 1264 | ;; opportunities in combine.c. | |
| 1265 | ||
| e552abe2 | 1266 | (define_insn_and_split "*and<mode>3_const_int" |
| 20acd226 | 1267 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g") |
| c4e75102 | 1268 | (and:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT") |
| f78ac4f2 | 1269 | (match_operand:VAXint 2 "const_int_operand" "n,n")))] |
| ab835497 | 1270 | "" |
| e552abe2 MR |
1271 | "#" |
| 1272 | "reload_completed" | |
| 1273 | [(parallel | |
| 1274 | [(set (match_dup 0) | |
| 1275 | (and:VAXint (match_dup 1) | |
| 1276 | (match_dup 2))) | |
| 1277 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1278 | "") | |
| 1279 | ||
| 1280 | (define_insn "*and<mode>3_2_const_int<ccn><ccnz><ccz>" | |
| 1281 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g") | |
| 1282 | (and:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT") | |
| 1283 | (match_operand:VAXint 2 "const_int_operand" "n,n"))) | |
| 1284 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1285 | "reload_completed" | |
| ab835497 | 1286 | "@ |
| 20acd226 SB |
1287 | bic<VAXint:isfx>2 %<VAXint:iprefx>2,%0 |
| 1288 | bic<VAXint:isfx>3 %<VAXint:iprefx>2,%1,%0") | |
| ab835497 | 1289 | |
| e552abe2 MR |
1290 | ;; We have no direct AND operation and consequently the RTL sequence |
| 1291 | ;; the "and<mode>3" pattern produces does not match the instruction | |
| 1292 | ;; the "*bit<mode>" pattern does for the purpose of the compare | |
| 1293 | ;; elimination pass. Try to get rid of the extra operation by hand | |
| 1294 | ;; and where the sequence is used to set the condition codes only | |
| 94279aac | 1295 | ;; convert MCOM/BIC => BIT. |
| e552abe2 MR |
1296 | (define_peephole2 |
| 1297 | [(parallel | |
| 1298 | [(set (match_operand:VAXint 0 "register_operand") | |
| 1299 | (not:VAXint (match_operand:VAXint 1 "general_operand"))) | |
| 1300 | (clobber (reg:CC VAX_PSL_REGNUM))]) | |
| 1301 | (parallel | |
| 1302 | [(set (reg:VAXccnz VAX_PSL_REGNUM) | |
| 1303 | (compare:VAXccnz | |
| 1304 | (and:VAXint (not:VAXint (match_dup 0)) | |
| 1305 | (match_operand:VAXint 3 "general_operand")) | |
| 1306 | (const_int 0))) | |
| 1307 | (set (match_operand:VAXint 2 "register_operand") | |
| 1308 | (and:VAXint (not:VAXint (match_dup 0)) | |
| 1309 | (match_dup 3)))])] | |
| 1310 | "peep2_reg_dead_p (2, operands[0]) && peep2_reg_dead_p (2, operands[2])" | |
| 1311 | [(set (reg:VAXccnz VAX_PSL_REGNUM) | |
| 1312 | (compare:VAXccnz | |
| 1313 | (and:VAXint (match_dup 1) | |
| 1314 | (match_dup 3)) | |
| 1315 | (const_int 0)))] | |
| 1316 | "") | |
| ab835497 RK |
1317 | \f |
| 1318 | ;;- Bit set instructions. | |
| 1319 | ||
| e552abe2 | 1320 | (define_insn_and_split "ior<mode>3" |
| 20acd226 | 1321 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g,g") |
| c4e75102 | 1322 | (ior:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT,nrmT") |
| f78ac4f2 | 1323 | (match_operand:VAXint 2 "general_operand" "nrmT,0,nrmT")))] |
| ab835497 | 1324 | "" |
| e552abe2 MR |
1325 | "#" |
| 1326 | "reload_completed" | |
| 1327 | [(parallel | |
| 1328 | [(set (match_dup 0) | |
| 1329 | (ior:VAXint (match_dup 1) | |
| 1330 | (match_dup 2))) | |
| 1331 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1332 | "") | |
| 1333 | ||
| 1334 | (define_insn "*ior<mode>3<ccn><ccnz><ccz>" | |
| 1335 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g,g") | |
| 1336 | (ior:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT,nrmT") | |
| 1337 | (match_operand:VAXint 2 "general_operand" "nrmT,0,nrmT"))) | |
| 1338 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1339 | "reload_completed" | |
| ab835497 | 1340 | "@ |
| 20acd226 SB |
1341 | bis<VAXint:isfx>2 %2,%0 |
| 1342 | bis<VAXint:isfx>2 %1,%0 | |
| 1343 | bis<VAXint:isfx>3 %2,%1,%0") | |
| ab835497 RK |
1344 | |
| 1345 | ;;- xor instructions. | |
| 1346 | ||
| e552abe2 | 1347 | (define_insn_and_split "xor<mode>3" |
| 20acd226 | 1348 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g,g") |
| c4e75102 | 1349 | (xor:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT,nrmT") |
| f78ac4f2 | 1350 | (match_operand:VAXint 2 "general_operand" "nrmT,0,nrmT")))] |
| ab835497 | 1351 | "" |
| e552abe2 MR |
1352 | "#" |
| 1353 | "reload_completed" | |
| 1354 | [(parallel | |
| 1355 | [(set (match_dup 0) | |
| 1356 | (xor:VAXint (match_dup 1) | |
| 1357 | (match_dup 2))) | |
| 1358 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1359 | "") | |
| 1360 | ||
| 1361 | (define_insn "*xor<mode>3<ccn><ccnz><ccz>" | |
| 1362 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g,g") | |
| 1363 | (xor:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT,nrmT") | |
| 1364 | (match_operand:VAXint 2 "general_operand" "nrmT,0,nrmT"))) | |
| 1365 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1366 | "reload_completed" | |
| ab835497 | 1367 | "@ |
| 20acd226 SB |
1368 | xor<VAXint:isfx>2 %2,%0 |
| 1369 | xor<VAXint:isfx>2 %1,%0 | |
| 1370 | xor<VAXint:isfx>3 %2,%1,%0") | |
| ab835497 | 1371 | \f |
| e552abe2 | 1372 | (define_insn_and_split "neg<mode>2" |
| 20acd226 SB |
1373 | [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g") |
| 1374 | (neg:VAXfp (match_operand:VAXfp 1 "general_operand" "gF")))] | |
| ab835497 | 1375 | "" |
| e552abe2 MR |
1376 | "#" |
| 1377 | "reload_completed" | |
| 1378 | [(parallel | |
| 1379 | [(set (match_dup 0) | |
| 1380 | (neg:VAXfp (match_dup 1))) | |
| 1381 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1382 | "") | |
| 1383 | ||
| 1384 | (define_insn "*neg<mode>2<fccn><fccnz><fccz>" | |
| 1385 | [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g") | |
| 1386 | (neg:VAXfp (match_operand:VAXfp 1 "general_operand" "gF"))) | |
| 1387 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1388 | "reload_completed" | |
| 20acd226 | 1389 | "mneg<VAXfp:fsfx> %1,%0") |
| ab835497 | 1390 | |
| e552abe2 | 1391 | (define_insn_and_split "neg<mode>2" |
| 20acd226 | 1392 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g") |
| c4e75102 | 1393 | (neg:VAXint (match_operand:VAXint 1 "general_operand" "nrmT")))] |
| ab835497 | 1394 | "" |
| e552abe2 MR |
1395 | "#" |
| 1396 | "reload_completed" | |
| 1397 | [(parallel | |
| 1398 | [(set (match_dup 0) | |
| 1399 | (neg:VAXint (match_dup 1))) | |
| 1400 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1401 | "") | |
| 1402 | ||
| 1403 | (define_insn "*neg<mode>2<ccn><ccnz><ccz>" | |
| 1404 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g") | |
| 1405 | (neg:VAXint (match_operand:VAXint 1 "general_operand" "nrmT"))) | |
| 1406 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1407 | "reload_completed" | |
| 1408 | "mneg<VAXint:isfx> %1,%0") | |
| 1409 | ||
| 1410 | (define_insn "*neg<mode>2_cc" | |
| 1411 | [(set (reg:CC VAX_PSL_REGNUM) | |
| 1412 | (compare:CC (const_int 0) | |
| 1413 | (neg:VAXint | |
| 1414 | (match_operand:VAXint 1 "general_operand" "0,nrmT")))) | |
| 1415 | (set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g") | |
| 1416 | (neg:VAXint (match_dup 1)))] | |
| 1417 | "reload_completed" | |
| 20acd226 | 1418 | "mneg<VAXint:isfx> %1,%0") |
| ab835497 | 1419 | |
| e552abe2 | 1420 | (define_insn_and_split "one_cmpl<mode>2" |
| 20acd226 | 1421 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g") |
| c4e75102 | 1422 | (not:VAXint (match_operand:VAXint 1 "general_operand" "nrmT")))] |
| ab835497 | 1423 | "" |
| e552abe2 MR |
1424 | "#" |
| 1425 | "reload_completed" | |
| 1426 | [(parallel | |
| 1427 | [(set (match_dup 0) | |
| 1428 | (not:VAXint (match_dup 1))) | |
| 1429 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1430 | "") | |
| ab835497 | 1431 | |
| e552abe2 MR |
1432 | (define_insn "*one_cmpl<mode>2<ccn><ccnz><ccz>" |
| 1433 | [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g") | |
| 1434 | (not:VAXint (match_operand:VAXint 1 "general_operand" "nrmT"))) | |
| 1435 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1436 | "reload_completed" | |
| 1437 | "mcom<VAXint:isfx> %1,%0") | |
| ab835497 | 1438 | \f |
| 8aeea6e6 | 1439 | ;; Arithmetic right shift on the VAX works by negating the shift count, |
| ab835497 | 1440 | ;; then emitting a right shift with the shift count negated. This means |
| 821bde61 | 1441 | ;; that all actual shift counts in the RTL will be positive. This |
| ab835497 RK |
1442 | ;; prevents converting shifts to ZERO_EXTRACTs with negative positions, |
| 1443 | ;; which isn't valid. | |
| 1444 | (define_expand "ashrsi3" | |
| 1445 | [(set (match_operand:SI 0 "general_operand" "=g") | |
| 1446 | (ashiftrt:SI (match_operand:SI 1 "general_operand" "g") | |
| f78ac4f2 | 1447 | (match_operand:QI 2 "general_operand" "g")))] |
| ab835497 RK |
1448 | "" |
| 1449 | " | |
| 1450 | { | |
| c4e75102 | 1451 | if (! CONST_INT_P(operands[2])) |
| c5c76735 | 1452 | operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); |
| ab835497 RK |
1453 | }") |
| 1454 | ||
| e552abe2 | 1455 | (define_insn_and_split "*ashlnegsi3_const_int" |
| 17ad4377 | 1456 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| c4e75102 | 1457 | (ashiftrt:SI (match_operand:SI 1 "general_operand" "nrmT") |
| ab835497 RK |
1458 | (match_operand:QI 2 "const_int_operand" "n")))] |
| 1459 | "" | |
| e552abe2 MR |
1460 | "#" |
| 1461 | "reload_completed" | |
| 1462 | [(parallel | |
| 1463 | [(set (match_dup 0) | |
| 1464 | (ashiftrt:SI (match_dup 1) | |
| 1465 | (match_dup 2))) | |
| 1466 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1467 | "") | |
| 1468 | ||
| 1469 | (define_insn "*ashlnegsi3_const_int_2<ccn><ccnz><ccz>" | |
| 1470 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 1471 | (ashiftrt:SI (match_operand:SI 1 "general_operand" "nrmT") | |
| 1472 | (match_operand:QI 2 "const_int_operand" "n"))) | |
| 1473 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1474 | "reload_completed" | |
| ab835497 RK |
1475 | "ashl $%n2,%1,%0") |
| 1476 | ||
| e552abe2 | 1477 | (define_insn_and_split "*ashlnegsi3" |
| 17ad4377 | 1478 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| c4e75102 | 1479 | (ashiftrt:SI (match_operand:SI 1 "general_operand" "nrmT") |
| ab835497 RK |
1480 | (neg:QI (match_operand:QI 2 "general_operand" "g"))))] |
| 1481 | "" | |
| e552abe2 MR |
1482 | "#" |
| 1483 | "reload_completed" | |
| 1484 | [(parallel | |
| 1485 | [(set (match_dup 0) | |
| 1486 | (ashiftrt:SI (match_dup 1) | |
| 1487 | (neg:QI (match_dup 2)))) | |
| 1488 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1489 | "") | |
| 1490 | ||
| 1491 | (define_insn "*ashlnegsi3_2<ccn><ccnz><ccz>" | |
| 1492 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 1493 | (ashiftrt:SI (match_operand:SI 1 "general_operand" "nrmT") | |
| 1494 | (neg:QI (match_operand:QI 2 "general_operand" "g")))) | |
| 1495 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1496 | "reload_completed" | |
| ab835497 RK |
1497 | "ashl %2,%1,%0") |
| 1498 | ||
| e552abe2 | 1499 | (define_insn_and_split "ashlsi3" |
| 17ad4377 | 1500 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| c4e75102 | 1501 | (ashift:SI (match_operand:SI 1 "general_operand" "nrmT") |
| ab835497 RK |
1502 | (match_operand:QI 2 "general_operand" "g")))] |
| 1503 | "" | |
| e552abe2 MR |
1504 | "#" |
| 1505 | "reload_completed" | |
| 1506 | [(parallel | |
| 1507 | [(set (match_dup 0) | |
| 1508 | (ashift:SI (match_dup 1) | |
| 1509 | (match_dup 2))) | |
| 1510 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1511 | "") | |
| 1512 | ||
| 1513 | (define_insn "*ashlsi3<ccn><ccnz><ccz>" | |
| 1514 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 1515 | (ashift:SI (match_operand:SI 1 "general_operand" "nrmT") | |
| 1516 | (match_operand:QI 2 "general_operand" "g"))) | |
| 1517 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1518 | "reload_completed" | |
| ab835497 RK |
1519 | "* |
| 1520 | { | |
| 1521 | if (operands[2] == const1_rtx && rtx_equal_p (operands[0], operands[1])) | |
| 1522 | return \"addl2 %0,%0\"; | |
| c4e75102 | 1523 | if (REG_P (operands[1]) && CONST_INT_P (operands[2])) |
| ab835497 RK |
1524 | { |
| 1525 | int i = INTVAL (operands[2]); | |
| 1526 | if (i == 1) | |
| 1527 | return \"addl3 %1,%1,%0\"; | |
| c4e75102 MT |
1528 | if (i == 2 && !optimize_size) |
| 1529 | { | |
| 1530 | if (push_operand (operands[0], SImode)) | |
| 1531 | return \"pushal 0[%1]\"; | |
| 1532 | return \"moval 0[%1],%0\"; | |
| 1533 | } | |
| 1534 | if (i == 3 && !optimize_size) | |
| 1535 | { | |
| 1536 | if (push_operand (operands[0], SImode)) | |
| 1537 | return \"pushaq 0[%1]\"; | |
| 1538 | return \"movaq 0[%1],%0\"; | |
| 1539 | } | |
| ab835497 RK |
1540 | } |
| 1541 | return \"ashl %2,%1,%0\"; | |
| 1542 | }") | |
| 1543 | ||
| 8aeea6e6 | 1544 | ;; Arithmetic right shift on the VAX works by negating the shift count. |
| ab835497 RK |
1545 | (define_expand "ashrdi3" |
| 1546 | [(set (match_operand:DI 0 "general_operand" "=g") | |
| 1547 | (ashiftrt:DI (match_operand:DI 1 "general_operand" "g") | |
| 1548 | (match_operand:QI 2 "general_operand" "g")))] | |
| 1549 | "" | |
| 1550 | " | |
| 1551 | { | |
| c5c76735 | 1552 | operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); |
| ab835497 RK |
1553 | }") |
| 1554 | ||
| e552abe2 | 1555 | (define_insn_and_split "ashldi3" |
| 17ad4377 | 1556 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") |
| ab835497 RK |
1557 | (ashift:DI (match_operand:DI 1 "general_operand" "g") |
| 1558 | (match_operand:QI 2 "general_operand" "g")))] | |
| 1559 | "" | |
| e552abe2 MR |
1560 | "#" |
| 1561 | "reload_completed" | |
| 1562 | [(parallel | |
| 1563 | [(set (match_dup 0) | |
| 1564 | (ashift:DI (match_dup 1) | |
| 1565 | (match_dup 2))) | |
| 1566 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1567 | "") | |
| 1568 | ||
| 1569 | (define_insn "*ashldi3<ccn><ccnz><ccz>" | |
| 1570 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") | |
| 1571 | (ashift:DI (match_operand:DI 1 "general_operand" "g") | |
| 1572 | (match_operand:QI 2 "general_operand" "g"))) | |
| 1573 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1574 | "reload_completed" | |
| 7691132c | 1575 | "ashq %2,%D1,%0") |
| ab835497 | 1576 | |
| e552abe2 | 1577 | (define_insn_and_split "*ashlnegdi3" |
| 17ad4377 | 1578 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") |
| ab835497 RK |
1579 | (ashiftrt:DI (match_operand:DI 1 "general_operand" "g") |
| 1580 | (neg:QI (match_operand:QI 2 "general_operand" "g"))))] | |
| 1581 | "" | |
| e552abe2 MR |
1582 | "#" |
| 1583 | "reload_completed" | |
| 1584 | [(parallel | |
| 1585 | [(set (match_dup 0) | |
| 1586 | (ashiftrt:DI (match_dup 1) | |
| 1587 | (neg:QI (match_dup 2)))) | |
| 1588 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1589 | "") | |
| 1590 | ||
| 1591 | (define_insn "*ashlnegdi3_2<ccn><ccnz><ccz>" | |
| 1592 | [(set (match_operand:DI 0 "nonimmediate_operand" "=g") | |
| 1593 | (ashiftrt:DI (match_operand:DI 1 "general_operand" "g") | |
| 1594 | (neg:QI (match_operand:QI 2 "general_operand" "g")))) | |
| 1595 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1596 | "reload_completed" | |
| 7691132c | 1597 | "ashq %2,%D1,%0") |
| ab835497 | 1598 | |
| 572e10f4 RK |
1599 | ;; We used to have expand_shift handle logical right shifts by using extzv, |
| 1600 | ;; but this make it very difficult to do lshrdi3. Since the VAX is the | |
| 1601 | ;; only machine with this kludge, it's better to just do this with a | |
| 1602 | ;; define_expand and remove that case from expand_shift. | |
| 1603 | ||
| 1604 | (define_expand "lshrsi3" | |
| 1605 | [(set (match_dup 3) | |
| 1606 | (minus:QI (const_int 32) | |
| 1607 | (match_dup 4))) | |
| c4e75102 | 1608 | (set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| 8fac469f | 1609 | (zero_extract:SI (match_operand:SI 1 "register_operand" "r") |
| 572e10f4 RK |
1610 | (match_dup 3) |
| 1611 | (match_operand:SI 2 "register_operand" "g")))] | |
| 1612 | "" | |
| 1613 | " | |
| 1614 | { | |
| 1615 | operands[3] = gen_reg_rtx (QImode); | |
| 1616 | operands[4] = gen_lowpart (QImode, operands[2]); | |
| 1617 | }") | |
| 1618 | ||
| 8aeea6e6 | 1619 | ;; Rotate right on the VAX works by negating the shift count. |
| ab835497 RK |
1620 | (define_expand "rotrsi3" |
| 1621 | [(set (match_operand:SI 0 "general_operand" "=g") | |
| 1622 | (rotatert:SI (match_operand:SI 1 "general_operand" "g") | |
| 1623 | (match_operand:QI 2 "general_operand" "g")))] | |
| 1624 | "" | |
| 1625 | " | |
| 1626 | { | |
| c4e75102 | 1627 | if (! CONST_INT_P (operands[2])) |
| c5c76735 | 1628 | operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); |
| ab835497 RK |
1629 | }") |
| 1630 | ||
| e552abe2 | 1631 | (define_insn_and_split "rotlsi3" |
| 17ad4377 | 1632 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| c4e75102 | 1633 | (rotate:SI (match_operand:SI 1 "general_operand" "nrmT") |
| ab835497 RK |
1634 | (match_operand:QI 2 "general_operand" "g")))] |
| 1635 | "" | |
| e552abe2 MR |
1636 | "#" |
| 1637 | "reload_completed" | |
| 1638 | [(parallel | |
| 1639 | [(set (match_dup 0) | |
| 1640 | (rotate:SI (match_dup 1) | |
| 1641 | (match_dup 2))) | |
| 1642 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1643 | "") | |
| 1644 | ||
| 1645 | (define_insn "*rotlsi3<ccn><ccnz><ccz>" | |
| 1646 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 1647 | (rotate:SI (match_operand:SI 1 "general_operand" "nrmT") | |
| 1648 | (match_operand:QI 2 "general_operand" "g"))) | |
| 1649 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1650 | "reload_completed" | |
| ab835497 RK |
1651 | "rotl %2,%1,%0") |
| 1652 | ||
| e552abe2 | 1653 | (define_insn_and_split "*rotrsi3_const_int" |
| 17ad4377 | 1654 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| c4e75102 | 1655 | (rotatert:SI (match_operand:SI 1 "general_operand" "nrmT") |
| ab835497 RK |
1656 | (match_operand:QI 2 "const_int_operand" "n")))] |
| 1657 | "" | |
| e552abe2 MR |
1658 | "#" |
| 1659 | "reload_completed" | |
| 1660 | [(parallel | |
| 1661 | [(set (match_dup 0) | |
| 1662 | (rotatert:SI (match_dup 1) | |
| 1663 | (match_dup 2))) | |
| 1664 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1665 | "") | |
| 1666 | ||
| 1667 | (define_insn "*rotrsi3_const_int_2<ccn><ccnz><ccz>" | |
| 1668 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 1669 | (rotatert:SI (match_operand:SI 1 "general_operand" "nrmT") | |
| 1670 | (match_operand:QI 2 "const_int_operand" "n"))) | |
| 1671 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1672 | "reload_completed" | |
| 49c8f4a4 | 1673 | "rotl %R2,%1,%0") |
| ab835497 | 1674 | |
| e552abe2 | 1675 | (define_insn_and_split "*rotrnegsi3" |
| 17ad4377 | 1676 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| c4e75102 | 1677 | (rotatert:SI (match_operand:SI 1 "general_operand" "nrmT") |
| ab835497 RK |
1678 | (neg:QI (match_operand:QI 2 "general_operand" "g"))))] |
| 1679 | "" | |
| e552abe2 MR |
1680 | "#" |
| 1681 | "reload_completed" | |
| 1682 | [(parallel | |
| 1683 | [(set (match_dup 0) | |
| 1684 | (rotatert:SI (match_dup 1) | |
| 1685 | (neg:QI (match_dup 2)))) | |
| 1686 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1687 | "") | |
| 1688 | ||
| 1689 | (define_insn "*rotrnegsi3_2<ccn><ccnz><ccz>" | |
| 1690 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 1691 | (rotatert:SI (match_operand:SI 1 "general_operand" "nrmT") | |
| 1692 | (neg:QI (match_operand:QI 2 "general_operand" "g")))) | |
| 1693 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1694 | "reload_completed" | |
| ab835497 RK |
1695 | "rotl %2,%1,%0") |
| 1696 | ||
| 1be9edfa | 1697 | ;; This insn is probably slower than a multiply and an add. |
| e552abe2 | 1698 | ;;(define_insn_and_split "*amulsi4" |
| 1be9edfa MR |
1699 | ;; [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| 1700 | ;; (mult:SI (plus:SI (match_operand:SI 1 "general_operand" "g") | |
| 1701 | ;; (match_operand:SI 2 "general_operand" "g")) | |
| 1702 | ;; (match_operand:SI 3 "general_operand" "g")))] | |
| 1703 | ;; "" | |
| e552abe2 MR |
1704 | ;; "#" |
| 1705 | ;; "reload_completed" | |
| 1706 | ;; [(parallel | |
| 1707 | ;; [(set (match_dup 0) | |
| 1708 | ;; (mult:SI (plus:SI (match_dup 1) | |
| 1709 | ;; (match_dup 2)) | |
| 1710 | ;; (match_dup 3))) | |
| 1711 | ;; (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1712 | ;; "") | |
| 1713 | ;; | |
| 1714 | ;;(define_insn "*amulsi4_2<ccn><ccnz><ccz>" | |
| 1715 | ;; [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 1716 | ;; (mult:SI (plus:SI (match_operand:SI 1 "general_operand" "g") | |
| 1717 | ;; (match_operand:SI 2 "general_operand" "g")) | |
| 1718 | ;; (match_operand:SI 3 "general_operand" "g"))) | |
| 1719 | ;; (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1720 | ;; "reload_completed" | |
| 1be9edfa | 1721 | ;; "index %1,$0x80000000,$0x7fffffff,%3,%2,%0") |
| ab835497 RK |
1722 | \f |
| 1723 | ;; Special cases of bit-field insns which we should | |
| 1724 | ;; recognize in preference to the general case. | |
| 8a8de750 MR |
1725 | ;; These handle aligned 8-bit and 16-bit fields |
| 1726 | ;; that can be done with move or convert instructions. | |
| ab835497 | 1727 | |
| e552abe2 | 1728 | (define_insn_and_split "*insv_aligned" |
| 4c293413 | 1729 | [(set (zero_extract:SI (match_operand:SI 0 "nonimmediate_operand" "+ro") |
| ab835497 RK |
1730 | (match_operand:QI 1 "const_int_operand" "n") |
| 1731 | (match_operand:SI 2 "const_int_operand" "n")) | |
| 1732 | (match_operand:SI 3 "general_operand" "g"))] | |
| b3f3bba3 | 1733 | "(INTVAL (operands[1]) == 8 || INTVAL (operands[1]) == 16) |
| ab835497 | 1734 | && INTVAL (operands[2]) % INTVAL (operands[1]) == 0 |
| 590f5d51 | 1735 | && (!MEM_P (operands[0]) |
| b3f3bba3 MR |
1736 | || ((!flag_pic |
| 1737 | || vax_acceptable_pic_operand_p (XEXP (operands[0], 0), | |
| 1738 | true, true)) | |
| 1739 | && !mode_dependent_address_p (XEXP (operands[0], 0), | |
| 1740 | MEM_ADDR_SPACE (operands[0])))) | |
| 8a8de750 MR |
1741 | && (!(REG_P (operands[0]) |
| 1742 | || (SUBREG_P (operands[0]) && REG_P (SUBREG_REG (operands[0])))) | |
| 1743 | || INTVAL (operands[2]) == 0)" | |
| e552abe2 MR |
1744 | "#" |
| 1745 | "&& reload_completed" | |
| 1746 | [(parallel | |
| 1747 | [(set (zero_extract:SI (match_dup 0) | |
| 1748 | (match_dup 1) | |
| 1749 | (match_dup 2)) | |
| 1750 | (match_dup 3)) | |
| 1751 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1752 | "") | |
| 1753 | ||
| 1754 | (define_insn "*insv_aligned_2<ccn><ccnz><ccz>" | |
| 1755 | [(set (zero_extract:SI (match_operand:SI 0 "nonimmediate_operand" "+ro") | |
| 1756 | (match_operand:QI 1 "const_int_operand" "n") | |
| 1757 | (match_operand:SI 2 "const_int_operand" "n")) | |
| 1758 | (match_operand:SI 3 "general_operand" "g")) | |
| 1759 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1760 | "(INTVAL (operands[1]) == 8 || INTVAL (operands[1]) == 16) | |
| 1761 | && INTVAL (operands[2]) % INTVAL (operands[1]) == 0 | |
| 1762 | && (!MEM_P (operands[0]) | |
| 1763 | || ((!flag_pic | |
| 1764 | || vax_acceptable_pic_operand_p (XEXP (operands[0], 0), | |
| 1765 | true, true)) | |
| 1766 | && !mode_dependent_address_p (XEXP (operands[0], 0), | |
| 1767 | MEM_ADDR_SPACE (operands[0])))) | |
| 1768 | && (!(REG_P (operands[0]) | |
| 1769 | || (SUBREG_P (operands[0]) && REG_P (SUBREG_REG (operands[0])))) | |
| 1770 | || INTVAL (operands[2]) == 0) | |
| 1771 | && reload_completed" | |
| ab835497 RK |
1772 | "* |
| 1773 | { | |
| 8a8de750 | 1774 | if (!REG_P (operands[0])) |
| ab835497 | 1775 | operands[0] |
| b72f00af RK |
1776 | = adjust_address (operands[0], |
| 1777 | INTVAL (operands[1]) == 8 ? QImode : HImode, | |
| 1778 | INTVAL (operands[2]) / 8); | |
| 8a8de750 MR |
1779 | else |
| 1780 | gcc_assert (INTVAL (operands[2]) == 0); | |
| ab835497 RK |
1781 | |
| 1782 | if (INTVAL (operands[1]) == 8) | |
| 1783 | return \"movb %3,%0\"; | |
| 1784 | return \"movw %3,%0\"; | |
| 1785 | }") | |
| 1786 | ||
| e552abe2 | 1787 | (define_insn_and_split "*extzv_aligned" |
| 17ad4377 | 1788 | [(set (match_operand:SI 0 "nonimmediate_operand" "=&g") |
| 4c293413 | 1789 | (zero_extract:SI (match_operand:SI 1 "nonimmediate_operand" "ro") |
| ab835497 RK |
1790 | (match_operand:QI 2 "const_int_operand" "n") |
| 1791 | (match_operand:SI 3 "const_int_operand" "n")))] | |
| 1792 | "(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16) | |
| 1793 | && INTVAL (operands[3]) % INTVAL (operands[2]) == 0 | |
| 590f5d51 | 1794 | && (!MEM_P (operands[1]) |
| b3f3bba3 MR |
1795 | || ((!flag_pic |
| 1796 | || vax_acceptable_pic_operand_p (XEXP (operands[1], 0), | |
| 1797 | true, true)) | |
| 1798 | && !mode_dependent_address_p (XEXP (operands[1], 0), | |
| 1799 | MEM_ADDR_SPACE (operands[1])))) | |
| 8a8de750 MR |
1800 | && (!(REG_P (operands[1]) |
| 1801 | || (SUBREG_P (operands[1]) && REG_P (SUBREG_REG (operands[1])))) | |
| 1802 | || INTVAL (operands[3]) == 0)" | |
| e552abe2 MR |
1803 | "#" |
| 1804 | "&& reload_completed" | |
| 1805 | [(parallel | |
| 1806 | [(set (match_dup 0) | |
| 1807 | (zero_extract:SI (match_dup 1) | |
| 1808 | (match_dup 2) | |
| 1809 | (match_dup 3))) | |
| 1810 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1811 | "") | |
| 1812 | ||
| 1813 | (define_insn "*extzv_aligned_2<ccn><ccnz><ccz>" | |
| 1814 | [(set (match_operand:SI 0 "nonimmediate_operand" "=&g") | |
| 1815 | (zero_extract:SI (match_operand:SI 1 "nonimmediate_operand" "ro") | |
| 1816 | (match_operand:QI 2 "const_int_operand" "n") | |
| 1817 | (match_operand:SI 3 "const_int_operand" "n"))) | |
| 1818 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1819 | "(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16) | |
| 1820 | && INTVAL (operands[3]) % INTVAL (operands[2]) == 0 | |
| 1821 | && (!MEM_P (operands[1]) | |
| 1822 | || ((!flag_pic | |
| 1823 | || vax_acceptable_pic_operand_p (XEXP (operands[1], 0), | |
| 1824 | true, true)) | |
| 1825 | && !mode_dependent_address_p (XEXP (operands[1], 0), | |
| 1826 | MEM_ADDR_SPACE (operands[1])))) | |
| 1827 | && (!(REG_P (operands[1]) | |
| 1828 | || (SUBREG_P (operands[1]) && REG_P (SUBREG_REG (operands[1])))) | |
| 1829 | || INTVAL (operands[3]) == 0) | |
| 1830 | && reload_completed" | |
| ab835497 RK |
1831 | "* |
| 1832 | { | |
| 8a8de750 | 1833 | if (!REG_P (operands[1])) |
| ab835497 | 1834 | operands[1] |
| b72f00af RK |
1835 | = adjust_address (operands[1], |
| 1836 | INTVAL (operands[2]) == 8 ? QImode : HImode, | |
| 1837 | INTVAL (operands[3]) / 8); | |
| 8a8de750 MR |
1838 | else |
| 1839 | gcc_assert (INTVAL (operands[3]) == 0); | |
| ab835497 RK |
1840 | |
| 1841 | if (INTVAL (operands[2]) == 8) | |
| 1842 | return \"movzbl %1,%0\"; | |
| 1843 | return \"movzwl %1,%0\"; | |
| 1844 | }") | |
| 1845 | ||
| e552abe2 | 1846 | (define_insn_and_split "*extv_aligned" |
| 17ad4377 | 1847 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| 4c293413 | 1848 | (sign_extract:SI (match_operand:SI 1 "nonimmediate_operand" "ro") |
| ab835497 RK |
1849 | (match_operand:QI 2 "const_int_operand" "n") |
| 1850 | (match_operand:SI 3 "const_int_operand" "n")))] | |
| 1851 | "(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16) | |
| 1852 | && INTVAL (operands[3]) % INTVAL (operands[2]) == 0 | |
| 590f5d51 | 1853 | && (!MEM_P (operands[1]) |
| b3f3bba3 MR |
1854 | || ((!flag_pic |
| 1855 | || vax_acceptable_pic_operand_p (XEXP (operands[1], 0), | |
| 1856 | true, true)) | |
| 1857 | && !mode_dependent_address_p (XEXP (operands[1], 0), | |
| 1858 | MEM_ADDR_SPACE (operands[1])))) | |
| 8a8de750 MR |
1859 | && (!(REG_P (operands[1]) |
| 1860 | || (SUBREG_P (operands[1]) && REG_P (SUBREG_REG (operands[1])))) | |
| 1861 | || INTVAL (operands[3]) == 0)" | |
| e552abe2 MR |
1862 | "#" |
| 1863 | "&& reload_completed" | |
| 1864 | [(parallel | |
| 1865 | [(set (match_dup 0) | |
| 1866 | (sign_extract:SI (match_dup 1) | |
| 1867 | (match_dup 2) | |
| 1868 | (match_dup 3))) | |
| 1869 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1870 | "") | |
| 1871 | ||
| 1872 | (define_insn "*extv_aligned_2<ccn><ccnz><ccz>" | |
| 1873 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 1874 | (sign_extract:SI (match_operand:SI 1 "nonimmediate_operand" "ro") | |
| 1875 | (match_operand:QI 2 "const_int_operand" "n") | |
| 1876 | (match_operand:SI 3 "const_int_operand" "n"))) | |
| 1877 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1878 | "(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16) | |
| 1879 | && INTVAL (operands[3]) % INTVAL (operands[2]) == 0 | |
| 1880 | && (!MEM_P (operands[1]) | |
| 1881 | || ((!flag_pic | |
| 1882 | || vax_acceptable_pic_operand_p (XEXP (operands[1], 0), | |
| 1883 | true, true)) | |
| 1884 | && !mode_dependent_address_p (XEXP (operands[1], 0), | |
| 1885 | MEM_ADDR_SPACE (operands[1])))) | |
| 1886 | && (!(REG_P (operands[1]) | |
| 1887 | || (SUBREG_P (operands[1]) && REG_P (SUBREG_REG (operands[1])))) | |
| 1888 | || INTVAL (operands[3]) == 0) | |
| 1889 | && reload_completed" | |
| ab835497 RK |
1890 | "* |
| 1891 | { | |
| 8a8de750 | 1892 | if (!REG_P (operands[1])) |
| ab835497 | 1893 | operands[1] |
| b72f00af RK |
1894 | = adjust_address (operands[1], |
| 1895 | INTVAL (operands[2]) == 8 ? QImode : HImode, | |
| 1896 | INTVAL (operands[3]) / 8); | |
| 8a8de750 MR |
1897 | else |
| 1898 | gcc_assert (INTVAL (operands[3]) == 0); | |
| ab835497 RK |
1899 | |
| 1900 | if (INTVAL (operands[2]) == 8) | |
| 1901 | return \"cvtbl %1,%0\"; | |
| 1902 | return \"cvtwl %1,%0\"; | |
| 1903 | }") | |
| 1904 | \f | |
| 4c293413 | 1905 | ;; Register and non-offsettable-memory SImode cases of bit-field insns. |
| ab835497 | 1906 | |
| e552abe2 MR |
1907 | (define_insn "*cmpv_<mode>" |
| 1908 | [(set (reg:VAXcc VAX_PSL_REGNUM) | |
| 1909 | (compare:VAXcc | |
| d38f8441 | 1910 | (sign_extract:SI (match_operand:SI 0 "nonimmediate_operand" "ro") |
| ab835497 | 1911 | (match_operand:QI 1 "general_operand" "g") |
| c4e75102 MT |
1912 | (match_operand:SI 2 "general_operand" "nrmT")) |
| 1913 | (match_operand:SI 3 "general_operand" "nrmT")))] | |
| e552abe2 | 1914 | "reload_completed" |
| ab835497 RK |
1915 | "cmpv %2,%1,%0,%3") |
| 1916 | ||
| e552abe2 MR |
1917 | (define_insn "*cmpzv_<mode>" |
| 1918 | [(set (reg:VAXcc VAX_PSL_REGNUM) | |
| 1919 | (compare:VAXcc | |
| d38f8441 | 1920 | (zero_extract:SI (match_operand:SI 0 "nonimmediate_operand" "ro") |
| ab835497 | 1921 | (match_operand:QI 1 "general_operand" "g") |
| c4e75102 MT |
1922 | (match_operand:SI 2 "general_operand" "nrmT")) |
| 1923 | (match_operand:SI 3 "general_operand" "nrmT")))] | |
| e552abe2 | 1924 | "reload_completed" |
| ab835497 RK |
1925 | "cmpzv %2,%1,%0,%3") |
| 1926 | ||
| 00a8faa3 RK |
1927 | ;; When the field position and size are constant and the destination |
| 1928 | ;; is a register, extv and extzv are much slower than a rotate followed | |
| ddd5a7c1 | 1929 | ;; by a bicl or sign extension. Because we might end up choosing ext[z]v |
| d0d99d5f | 1930 | ;; anyway, we can't allow immediate values for the primary source operand. |
| 00a8faa3 | 1931 | |
| e552abe2 | 1932 | (define_insn_and_split "*extv_non_const" |
| 17ad4377 | 1933 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| 4c293413 | 1934 | (sign_extract:SI (match_operand:SI 1 "nonimmediate_operand" "ro") |
| ab835497 | 1935 | (match_operand:QI 2 "general_operand" "g") |
| c4e75102 | 1936 | (match_operand:SI 3 "general_operand" "nrmT")))] |
| ab835497 | 1937 | "" |
| e552abe2 MR |
1938 | "#" |
| 1939 | "reload_completed" | |
| 1940 | [(parallel | |
| 1941 | [(set (match_dup 0) | |
| 1942 | (sign_extract:SI (match_dup 1) | |
| 1943 | (match_dup 2) | |
| 1944 | (match_dup 3))) | |
| 1945 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1946 | "") | |
| 1947 | ||
| 1948 | (define_insn "*extv_non_const_2<ccn><ccnz><ccz>" | |
| 1949 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 1950 | (sign_extract:SI (match_operand:SI 1 "nonimmediate_operand" "ro") | |
| 1951 | (match_operand:QI 2 "general_operand" "g") | |
| 1952 | (match_operand:SI 3 "general_operand" "nrmT"))) | |
| 1953 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1954 | "reload_completed" | |
| 00a8faa3 RK |
1955 | "* |
| 1956 | { | |
| c4e75102 MT |
1957 | if (! CONST_INT_P (operands[3]) || ! CONST_INT_P (operands[2]) |
| 1958 | || ! REG_P (operands[0]) | |
| 00a8faa3 RK |
1959 | || (INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16)) |
| 1960 | return \"extv %3,%2,%1,%0\"; | |
| 1961 | if (INTVAL (operands[2]) == 8) | |
| 1962 | return \"rotl %R3,%1,%0\;cvtbl %0,%0\"; | |
| 1963 | return \"rotl %R3,%1,%0\;cvtwl %0,%0\"; | |
| 1964 | }") | |
| ab835497 | 1965 | |
| e552abe2 | 1966 | (define_insn_and_split "*extzv_non_const" |
| 17ad4377 | 1967 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| 4c293413 | 1968 | (zero_extract:SI (match_operand:SI 1 "nonimmediate_operand" "ro") |
| ab835497 | 1969 | (match_operand:QI 2 "general_operand" "g") |
| c4e75102 | 1970 | (match_operand:SI 3 "general_operand" "nrmT")))] |
| ab835497 | 1971 | "" |
| e552abe2 MR |
1972 | "#" |
| 1973 | "reload_completed" | |
| 1974 | [(parallel | |
| 1975 | [(set (match_dup 0) | |
| 1976 | (zero_extract:SI (match_dup 1) | |
| 1977 | (match_dup 2) | |
| 1978 | (match_dup 3))) | |
| 1979 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 1980 | "") | |
| 1981 | ||
| 1982 | (define_insn "*extzv_non_const_2<ccn><ccnz><ccz>" | |
| 1983 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 1984 | (zero_extract:SI (match_operand:SI 1 "nonimmediate_operand" "ro") | |
| 1985 | (match_operand:QI 2 "general_operand" "g") | |
| 1986 | (match_operand:SI 3 "general_operand" "nrmT"))) | |
| 1987 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 1988 | "reload_completed" | |
| 00a8faa3 RK |
1989 | "* |
| 1990 | { | |
| c4e75102 MT |
1991 | if (! CONST_INT_P (operands[3]) || ! CONST_INT_P (operands[2]) |
| 1992 | || ! REG_P (operands[0])) | |
| 00a8faa3 RK |
1993 | return \"extzv %3,%2,%1,%0\"; |
| 1994 | if (INTVAL (operands[2]) == 8) | |
| 1995 | return \"rotl %R3,%1,%0\;movzbl %0,%0\"; | |
| 1996 | if (INTVAL (operands[2]) == 16) | |
| 1997 | return \"rotl %R3,%1,%0\;movzwl %0,%0\"; | |
| 1998 | if (INTVAL (operands[3]) & 31) | |
| 1999 | return \"rotl %R3,%1,%0\;bicl2 %M2,%0\"; | |
| 2000 | if (rtx_equal_p (operands[0], operands[1])) | |
| 2001 | return \"bicl2 %M2,%0\"; | |
| 2002 | return \"bicl3 %M2,%1,%0\"; | |
| 2003 | }") | |
| ab835497 RK |
2004 | |
| 2005 | ;; Non-register cases. | |
| 2006 | ;; nonimmediate_operand is used to make sure that mode-ambiguous cases | |
| 2007 | ;; don't match these (and therefore match the cases above instead). | |
| 2008 | ||
| e552abe2 MR |
2009 | (define_insn "*cmpv_2_<mode>" |
| 2010 | [(set (reg:VAXcc VAX_PSL_REGNUM) | |
| 2011 | (compare:VAXcc | |
| 83199882 | 2012 | (sign_extract:SI (match_operand:QI 0 "memory_operand" "m") |
| ab835497 | 2013 | (match_operand:QI 1 "general_operand" "g") |
| c4e75102 MT |
2014 | (match_operand:SI 2 "general_operand" "nrmT")) |
| 2015 | (match_operand:SI 3 "general_operand" "nrmT")))] | |
| e552abe2 | 2016 | "reload_completed" |
| ab835497 RK |
2017 | "cmpv %2,%1,%0,%3") |
| 2018 | ||
| e552abe2 MR |
2019 | (define_insn "*cmpzv_2_<mode>" |
| 2020 | [(set (reg:VAXcc VAX_PSL_REGNUM) | |
| 2021 | (compare:VAXcc | |
| d38f8441 | 2022 | (zero_extract:SI (match_operand:QI 0 "memory_operand" "m") |
| ab835497 | 2023 | (match_operand:QI 1 "general_operand" "g") |
| c4e75102 MT |
2024 | (match_operand:SI 2 "general_operand" "nrmT")) |
| 2025 | (match_operand:SI 3 "general_operand" "nrmT")))] | |
| e552abe2 | 2026 | "reload_completed" |
| ab835497 RK |
2027 | "cmpzv %2,%1,%0,%3") |
| 2028 | ||
| 0a9ea215 MR |
2029 | (define_expand "extv" |
| 2030 | [(set (match_operand:SI 0 "general_operand" "") | |
| 2031 | (sign_extract:SI (match_operand:SI 1 "general_operand" "") | |
| 2032 | (match_operand:QI 2 "general_operand" "") | |
| 2033 | (match_operand:SI 3 "general_operand" "")))] | |
| 2034 | "" | |
| 2035 | "") | |
| 2036 | ||
| e552abe2 | 2037 | (define_insn_and_split "*extv" |
| 17ad4377 | 2038 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| 83199882 | 2039 | (sign_extract:SI (match_operand:QI 1 "memory_operand" "m") |
| ab835497 | 2040 | (match_operand:QI 2 "general_operand" "g") |
| c4e75102 | 2041 | (match_operand:SI 3 "general_operand" "nrmT")))] |
| ab835497 | 2042 | "" |
| e552abe2 MR |
2043 | "#" |
| 2044 | "reload_completed" | |
| 2045 | [(parallel | |
| 2046 | [(set (match_dup 0) | |
| 2047 | (sign_extract:SI (match_dup 1) | |
| 2048 | (match_dup 2) | |
| 2049 | (match_dup 3))) | |
| 2050 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 2051 | "") | |
| 2052 | ||
| 2053 | (define_insn "*extv_2<ccn><ccnz><ccz>" | |
| 2054 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 2055 | (sign_extract:SI (match_operand:QI 1 "memory_operand" "m") | |
| 2056 | (match_operand:QI 2 "general_operand" "g") | |
| 2057 | (match_operand:SI 3 "general_operand" "nrmT"))) | |
| 2058 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 2059 | "reload_completed" | |
| 00a8faa3 RK |
2060 | "* |
| 2061 | { | |
| c4e75102 | 2062 | if (!REG_P (operands[0]) || !CONST_INT_P (operands[2]) |
| d97c1295 | 2063 | || !CONST_INT_P (operands[3]) |
| 00a8faa3 | 2064 | || (INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16) |
| d251be98 | 2065 | || INTVAL (operands[2]) + INTVAL (operands[3]) > 32 |
| 00a8faa3 | 2066 | || side_effects_p (operands[1]) |
| ff9d4590 | 2067 | || (MEM_P (operands[1]) |
| 5bfed9a9 GJL |
2068 | && mode_dependent_address_p (XEXP (operands[1], 0), |
| 2069 | MEM_ADDR_SPACE (operands[1])))) | |
| 00a8faa3 RK |
2070 | return \"extv %3,%2,%1,%0\"; |
| 2071 | if (INTVAL (operands[2]) == 8) | |
| 2072 | return \"rotl %R3,%1,%0\;cvtbl %0,%0\"; | |
| 2073 | return \"rotl %R3,%1,%0\;cvtwl %0,%0\"; | |
| 2074 | }") | |
| ab835497 | 2075 | |
| 83199882 RK |
2076 | (define_expand "extzv" |
| 2077 | [(set (match_operand:SI 0 "general_operand" "") | |
| 2078 | (zero_extract:SI (match_operand:SI 1 "general_operand" "") | |
| 2079 | (match_operand:QI 2 "general_operand" "") | |
| 2080 | (match_operand:SI 3 "general_operand" "")))] | |
| 2081 | "" | |
| 2082 | "") | |
| 2083 | ||
| e552abe2 | 2084 | (define_insn_and_split "*extzv" |
| 17ad4377 | 2085 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| 83199882 | 2086 | (zero_extract:SI (match_operand:QI 1 "memory_operand" "m") |
| ab835497 | 2087 | (match_operand:QI 2 "general_operand" "g") |
| c4e75102 | 2088 | (match_operand:SI 3 "general_operand" "nrmT")))] |
| ab835497 | 2089 | "" |
| e552abe2 MR |
2090 | "#" |
| 2091 | "reload_completed" | |
| 2092 | [(parallel | |
| 2093 | [(set (match_dup 0) | |
| 2094 | (zero_extract:SI (match_dup 1) | |
| 2095 | (match_dup 2) | |
| 2096 | (match_dup 3))) | |
| 2097 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 2098 | "") | |
| 2099 | ||
| 2100 | (define_insn "*extzv_2<ccn><ccnz><ccz>" | |
| 2101 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 2102 | (zero_extract:SI (match_operand:QI 1 "memory_operand" "m") | |
| 2103 | (match_operand:QI 2 "general_operand" "g") | |
| 2104 | (match_operand:SI 3 "general_operand" "nrmT"))) | |
| 2105 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 2106 | "reload_completed" | |
| 00a8faa3 RK |
2107 | "* |
| 2108 | { | |
| c4e75102 | 2109 | if (!REG_P (operands[0]) || !CONST_INT_P (operands[2]) |
| d97c1295 | 2110 | || !CONST_INT_P (operands[3]) |
| d251be98 | 2111 | || INTVAL (operands[2]) + INTVAL (operands[3]) > 32 |
| 00a8faa3 | 2112 | || side_effects_p (operands[1]) |
| ff9d4590 | 2113 | || (MEM_P (operands[1]) |
| 5bfed9a9 GJL |
2114 | && mode_dependent_address_p (XEXP (operands[1], 0), |
| 2115 | MEM_ADDR_SPACE (operands[1])))) | |
| 00a8faa3 RK |
2116 | return \"extzv %3,%2,%1,%0\"; |
| 2117 | if (INTVAL (operands[2]) == 8) | |
| 2118 | return \"rotl %R3,%1,%0\;movzbl %0,%0\"; | |
| 2119 | if (INTVAL (operands[2]) == 16) | |
| 2120 | return \"rotl %R3,%1,%0\;movzwl %0,%0\"; | |
| c4e75102 MT |
2121 | if (MEM_P (operands[1]) |
| 2122 | && GET_CODE (XEXP (operands[1], 0)) == PLUS | |
| 2123 | && REG_P (XEXP (XEXP (operands[1], 0), 0)) | |
| 2124 | && CONST_INT_P (XEXP (XEXP (operands[1], 0), 1)) | |
| 2125 | && CONST_INT_P (operands[2]) | |
| 2126 | && CONST_INT_P (operands[3])) | |
| 2127 | { | |
| 2128 | HOST_WIDE_INT o = INTVAL (XEXP (XEXP (operands[1], 0), 1)); | |
| 2129 | HOST_WIDE_INT l = INTVAL (operands[2]); | |
| 2130 | HOST_WIDE_INT v = INTVAL (operands[3]); | |
| 2131 | if ((o & 3) && (o & 3) * 8 + v + l <= 32) | |
| 2132 | { | |
| 2133 | rtx tmp; | |
| 2134 | tmp = XEXP (XEXP (operands[1], 0), 0); | |
| 2135 | if (o & ~3) | |
| 2136 | tmp = gen_rtx_PLUS (SImode, tmp, GEN_INT (o & ~3)); | |
| 2137 | operands[1] = gen_rtx_MEM (QImode, tmp); | |
| 2138 | operands[3] = GEN_INT (v + (o & 3) * 8); | |
| 2139 | } | |
| 2140 | if (optimize_size) | |
| 2141 | return \"extzv %3,%2,%1,%0\"; | |
| 2142 | } | |
| 00a8faa3 RK |
2143 | return \"rotl %R3,%1,%0\;bicl2 %M2,%0\"; |
| 2144 | }") | |
| ab835497 | 2145 | |
| e552abe2 MR |
2146 | ;; Combine EXTV/CMPL and EXTZV/CMPL sequences where the output of |
| 2147 | ;; extraction is used for the comparison only into CMPV and CMPZV | |
| 2148 | ;; respectively. | |
| 2149 | (define_peephole2 | |
| 2150 | [(parallel | |
| 2151 | [(set (match_operand:SI 0 "register_operand") | |
| 2152 | (any_extract:SI (match_operand 1 "general_operand") | |
| 2153 | (match_operand:QI 2 "general_operand") | |
| 2154 | (match_operand:SI 3 "general_operand"))) | |
| 2155 | (clobber (reg:CC VAX_PSL_REGNUM))]) | |
| 2156 | (set (reg:VAXcc VAX_PSL_REGNUM) | |
| 2157 | (compare:VAXcc (match_dup 0) | |
| 2158 | (match_operand:SI 4 "general_operand")))] | |
| 2159 | "peep2_reg_dead_p (2, operands[0])" | |
| 2160 | [(set (reg:VAXcc VAX_PSL_REGNUM) | |
| 2161 | (compare:VAXcc | |
| 2162 | (any_extract:SI (match_dup 1) | |
| 2163 | (match_dup 2) | |
| 2164 | (match_dup 3)) | |
| 2165 | (match_dup 4)))] | |
| 2166 | "") | |
| 2167 | ||
| 83199882 RK |
2168 | (define_expand "insv" |
| 2169 | [(set (zero_extract:SI (match_operand:SI 0 "general_operand" "") | |
| 2170 | (match_operand:QI 1 "general_operand" "") | |
| 2171 | (match_operand:SI 2 "general_operand" "")) | |
| 2172 | (match_operand:SI 3 "general_operand" ""))] | |
| 2173 | "" | |
| 2174 | "") | |
| 2175 | ||
| e552abe2 | 2176 | ;; This one actually doesn't change CC. |
| 4c293413 MR |
2177 | (define_insn "*insv" |
| 2178 | [(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+m") | |
| ab835497 | 2179 | (match_operand:QI 1 "general_operand" "g") |
| c4e75102 MT |
2180 | (match_operand:SI 2 "general_operand" "nrmT")) |
| 2181 | (match_operand:SI 3 "general_operand" "nrmT"))] | |
| ab835497 | 2182 | "" |
| c4e75102 MT |
2183 | "* |
| 2184 | { | |
| 2185 | if (MEM_P (operands[0]) | |
| 2186 | && GET_CODE (XEXP (operands[0], 0)) == PLUS | |
| 2187 | && REG_P (XEXP (XEXP (operands[0], 0), 0)) | |
| 2188 | && CONST_INT_P (XEXP (XEXP (operands[0], 0), 1)) | |
| 2189 | && CONST_INT_P (operands[1]) | |
| 2190 | && CONST_INT_P (operands[2])) | |
| 2191 | { | |
| 2192 | HOST_WIDE_INT o = INTVAL (XEXP (XEXP (operands[0], 0), 1)); | |
| 2193 | HOST_WIDE_INT v = INTVAL (operands[2]); | |
| 2194 | HOST_WIDE_INT l = INTVAL (operands[1]); | |
| 2195 | if ((o & 3) && (o & 3) * 8 + v + l <= 32) | |
| 2196 | { | |
| 2197 | rtx tmp; | |
| 2198 | tmp = XEXP (XEXP (operands[0], 0), 0); | |
| 2199 | if (o & ~3) | |
| 2200 | tmp = gen_rtx_PLUS (SImode, tmp, GEN_INT (o & ~3)); | |
| 2201 | operands[0] = gen_rtx_MEM (QImode, tmp); | |
| 2202 | operands[2] = GEN_INT (v + (o & 3) * 8); | |
| 2203 | } | |
| 2204 | } | |
| 2205 | return \"insv %3,%2,%1,%0\"; | |
| 2206 | }") | |
| ab835497 | 2207 | |
| e552abe2 | 2208 | ;; This one actually doesn't change CC. |
| 4c293413 MR |
2209 | (define_insn "*insv_2" |
| 2210 | [(set (zero_extract:SI (match_operand:SI 0 "nonimmediate_operand" "+ro") | |
| ab835497 | 2211 | (match_operand:QI 1 "general_operand" "g") |
| c4e75102 MT |
2212 | (match_operand:SI 2 "general_operand" "nrmT")) |
| 2213 | (match_operand:SI 3 "general_operand" "nrmT"))] | |
| ab835497 RK |
2214 | "" |
| 2215 | "insv %3,%2,%1,%0") | |
| 2216 | \f | |
| 20acd226 | 2217 | ;; Unconditional jump |
| ab835497 RK |
2218 | (define_insn "jump" |
| 2219 | [(set (pc) | |
| 2220 | (label_ref (match_operand 0 "" "")))] | |
| 2221 | "" | |
| 2222 | "jbr %l0") | |
| 2223 | ||
| 20acd226 | 2224 | ;; Conditional jumps |
| ab835497 | 2225 | |
| f90b7a5a | 2226 | (define_expand "cbranch<mode>4" |
| e552abe2 MR |
2227 | [(set (pc) |
| 2228 | (if_then_else | |
| 2229 | (match_operator 0 "ordered_comparison_operator" | |
| 2230 | [(match_operand:VAXint 1 "general_operand" "") | |
| 2231 | (match_operand:VAXint 2 "general_operand" "")]) | |
| 2232 | (label_ref (match_operand 3 "" "")) | |
| 2233 | (pc)))] | |
| 2234 | "" | |
| 2235 | "") | |
| 2236 | ||
| 2237 | (define_insn_and_split "*cbranch<VAXint:mode>4_<VAXcc:mode>" | |
| 2238 | [(set (pc) | |
| 2239 | (if_then_else | |
| 7f5c4d23 | 2240 | (match_operator 0 "vax_<VAXcc:mode>_comparison_operator" |
| e552abe2 MR |
2241 | [(match_operand:VAXint 1 "general_operand" "nrmT") |
| 2242 | (match_operand:VAXint 2 "general_operand" "nrmT")]) | |
| 2243 | (label_ref (match_operand 3 "" "")) | |
| 2244 | (pc)))] | |
| 2245 | "" | |
| 2246 | "#" | |
| 2247 | "reload_completed" | |
| 2248 | [(set (reg:VAXcc VAX_PSL_REGNUM) | |
| 2249 | (compare:VAXcc (match_dup 1) (match_dup 2))) | |
| f90b7a5a | 2250 | (set (pc) |
| e552abe2 MR |
2251 | (if_then_else |
| 2252 | (match_op_dup 0 [(reg:VAXcc VAX_PSL_REGNUM) | |
| 2253 | (const_int 0)]) | |
| 2254 | (label_ref (match_operand 3 "" "")) | |
| 2255 | (pc)))] | |
| 2256 | "") | |
| f90b7a5a PB |
2257 | |
| 2258 | (define_expand "cbranch<mode>4" | |
| e552abe2 MR |
2259 | [(set (pc) |
| 2260 | (if_then_else | |
| 2261 | (match_operator 0 "ordered_comparison_operator" | |
| 2262 | [(match_operand:VAXfp 1 "general_operand" "") | |
| 2263 | (match_operand:VAXfp 2 "general_operand" "")]) | |
| 2264 | (label_ref (match_operand 3 "" "")) | |
| 2265 | (pc)))] | |
| 2266 | "" | |
| 2267 | "") | |
| 2268 | ||
| 2269 | (define_insn_and_split "*cbranch<VAXfp:mode>4_<VAXccnz:mode>" | |
| 2270 | [(set (pc) | |
| 2271 | (if_then_else | |
| 7f5c4d23 | 2272 | (match_operator 0 "vax_<VAXccnz:mode>_comparison_operator" |
| e552abe2 MR |
2273 | [(match_operand:VAXfp 1 "general_operand" "gF") |
| 2274 | (match_operand:VAXfp 2 "general_operand" "gF")]) | |
| 2275 | (label_ref (match_operand 3 "" "")) | |
| 2276 | (pc)))] | |
| 2277 | "" | |
| 2278 | "#" | |
| 2279 | "reload_completed" | |
| 2280 | [(set (reg:VAXccnz VAX_PSL_REGNUM) | |
| 2281 | (compare:VAXccnz (match_dup 1) (match_dup 2))) | |
| f90b7a5a | 2282 | (set (pc) |
| e552abe2 MR |
2283 | (if_then_else |
| 2284 | (match_op_dup 0 [(reg:VAXccnz VAX_PSL_REGNUM) | |
| 2285 | (const_int 0)]) | |
| 2286 | (label_ref (match_operand 3 "" "")) | |
| 2287 | (pc)))] | |
| 2288 | "") | |
| 2289 | ||
| 2290 | (define_insn "*branch_<mode>" | |
| ab835497 | 2291 | [(set (pc) |
| 7f5c4d23 | 2292 | (if_then_else (match_operator 0 "vax_<mode>_comparison_operator" |
| e552abe2 | 2293 | [(reg:VAXcc VAX_PSL_REGNUM) |
| f90b7a5a PB |
2294 | (const_int 0)]) |
| 2295 | (label_ref (match_operand 1 "" "")) | |
| ab835497 | 2296 | (pc)))] |
| e552abe2 | 2297 | "reload_completed" |
| 91ae8fbc | 2298 | "j%k0 %l1") |
| ab835497 RK |
2299 | |
| 2300 | ;; Recognize reversed jumps. | |
| e552abe2 | 2301 | (define_insn "*branch_<mode>_reversed" |
| ab835497 | 2302 | [(set (pc) |
| 7f5c4d23 | 2303 | (if_then_else (match_operator 0 "vax_<mode>_comparison_operator" |
| e552abe2 | 2304 | [(reg:VAXcc VAX_PSL_REGNUM) |
| ab835497 RK |
2305 | (const_int 0)]) |
| 2306 | (pc) | |
| 2307 | (label_ref (match_operand 1 "" ""))))] | |
| e552abe2 | 2308 | "reload_completed" |
| 91ae8fbc | 2309 | "j%K0 %l1") ; %K0 negates condition |
| ab835497 | 2310 | \f |
| 2daed095 | 2311 | ;; Recognize jbs, jlbs, jbc and jlbc instructions. Note that the operand |
| d38cfc1e RK |
2312 | ;; of jlbs and jlbc insns are SImode in the hardware. However, if it is |
| 2313 | ;; memory, we use QImode in the insn. So we can't use those instructions | |
| 2314 | ;; for mode-dependent addresses. | |
| ab835497 RK |
2315 | |
| 2316 | (define_insn "" | |
| 2317 | [(set (pc) | |
| 2318 | (if_then_else | |
| 83199882 | 2319 | (ne (zero_extract:SI (match_operand:QI 0 "memory_operand" "Q,g") |
| ab835497 | 2320 | (const_int 1) |
| c4e75102 | 2321 | (match_operand:SI 1 "general_operand" "I,nrmT")) |
| ab835497 RK |
2322 | (const_int 0)) |
| 2323 | (label_ref (match_operand 2 "" "")) | |
| 2324 | (pc)))] | |
| 2325 | "" | |
| 2326 | "@ | |
| 2327 | jlbs %0,%l2 | |
| 2328 | jbs %1,%0,%l2") | |
| 2329 | ||
| 2330 | (define_insn "" | |
| 2331 | [(set (pc) | |
| 2332 | (if_then_else | |
| 83199882 | 2333 | (eq (zero_extract:SI (match_operand:QI 0 "memory_operand" "Q,g") |
| ab835497 | 2334 | (const_int 1) |
| c4e75102 | 2335 | (match_operand:SI 1 "general_operand" "I,nrmT")) |
| ab835497 RK |
2336 | (const_int 0)) |
| 2337 | (label_ref (match_operand 2 "" "")) | |
| 2338 | (pc)))] | |
| 2339 | "" | |
| 2340 | "@ | |
| 2341 | jlbc %0,%l2 | |
| 2342 | jbc %1,%0,%l2") | |
| 2343 | ||
| 2344 | (define_insn "" | |
| 2345 | [(set (pc) | |
| 2346 | (if_then_else | |
| 2347 | (ne (zero_extract:SI (match_operand:SI 0 "register_operand" "r,r") | |
| 2348 | (const_int 1) | |
| c4e75102 | 2349 | (match_operand:SI 1 "general_operand" "I,nrmT")) |
| ab835497 RK |
2350 | (const_int 0)) |
| 2351 | (label_ref (match_operand 2 "" "")) | |
| 2352 | (pc)))] | |
| 2353 | "" | |
| 2354 | "@ | |
| 2355 | jlbs %0,%l2 | |
| 2356 | jbs %1,%0,%l2") | |
| 2357 | ||
| 2358 | (define_insn "" | |
| 2359 | [(set (pc) | |
| 2360 | (if_then_else | |
| 2361 | (eq (zero_extract:SI (match_operand:SI 0 "register_operand" "r,r") | |
| 2362 | (const_int 1) | |
| c4e75102 | 2363 | (match_operand:SI 1 "general_operand" "I,nrmT")) |
| ab835497 RK |
2364 | (const_int 0)) |
| 2365 | (label_ref (match_operand 2 "" "")) | |
| 2366 | (pc)))] | |
| 2367 | "" | |
| 2368 | "@ | |
| 2369 | jlbc %0,%l2 | |
| 2370 | jbc %1,%0,%l2") | |
| 2371 | \f | |
| 2372 | ;; Subtract-and-jump and Add-and-jump insns. | |
| 2373 | ;; These are not used when output is for the Unix assembler | |
| 2374 | ;; because it does not know how to modify them to reach far. | |
| 2375 | ||
| 2376 | ;; Normal sob insns. | |
| 2377 | ||
| e552abe2 | 2378 | (define_insn_and_split "*jsobgtr" |
| ab835497 RK |
2379 | [(set (pc) |
| 2380 | (if_then_else | |
| 17ad4377 | 2381 | (gt (plus:SI (match_operand:SI 0 "nonimmediate_operand" "+g") |
| 412dc348 RK |
2382 | (const_int -1)) |
| 2383 | (const_int 0)) | |
| ab835497 RK |
2384 | (label_ref (match_operand 1 "" "")) |
| 2385 | (pc))) | |
| 2386 | (set (match_dup 0) | |
| 2387 | (plus:SI (match_dup 0) | |
| 2388 | (const_int -1)))] | |
| 2389 | "!TARGET_UNIX_ASM" | |
| e552abe2 MR |
2390 | "#" |
| 2391 | "&& reload_completed" | |
| 2392 | [(parallel | |
| 2393 | [(set (pc) | |
| 2394 | (if_then_else | |
| 2395 | (gt (plus:SI (match_dup 0) | |
| 2396 | (const_int -1)) | |
| 2397 | (const_int 0)) | |
| 2398 | (label_ref (match_dup 1)) | |
| 2399 | (pc))) | |
| 2400 | (set (match_dup 0) | |
| 2401 | (plus:SI (match_dup 0) | |
| 2402 | (const_int -1))) | |
| 2403 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 2404 | "") | |
| 2405 | ||
| 2406 | (define_insn "*jsobgtr_2" | |
| 2407 | [(set (pc) | |
| 2408 | (if_then_else | |
| 2409 | (gt (plus:SI (match_operand:SI 0 "nonimmediate_operand" "+g") | |
| 2410 | (const_int -1)) | |
| 2411 | (const_int 0)) | |
| 2412 | (label_ref (match_operand 1 "" "")) | |
| 2413 | (pc))) | |
| 2414 | (set (match_dup 0) | |
| 2415 | (plus:SI (match_dup 0) | |
| 2416 | (const_int -1))) | |
| 2417 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 2418 | "!TARGET_UNIX_ASM && reload_completed" | |
| ab835497 RK |
2419 | "jsobgtr %0,%l1") |
| 2420 | ||
| e552abe2 | 2421 | (define_insn_and_split "*jsobgeq" |
| ab835497 RK |
2422 | [(set (pc) |
| 2423 | (if_then_else | |
| 17ad4377 | 2424 | (ge (plus:SI (match_operand:SI 0 "nonimmediate_operand" "+g") |
| 412dc348 RK |
2425 | (const_int -1)) |
| 2426 | (const_int 0)) | |
| ab835497 RK |
2427 | (label_ref (match_operand 1 "" "")) |
| 2428 | (pc))) | |
| 2429 | (set (match_dup 0) | |
| 2430 | (plus:SI (match_dup 0) | |
| 2431 | (const_int -1)))] | |
| 2432 | "!TARGET_UNIX_ASM" | |
| e552abe2 MR |
2433 | "#" |
| 2434 | "&& reload_completed" | |
| 2435 | [(parallel | |
| 2436 | [(set (pc) | |
| 2437 | (if_then_else | |
| 2438 | (ge (plus:SI (match_dup 0) | |
| 2439 | (const_int -1)) | |
| 2440 | (const_int 0)) | |
| 2441 | (label_ref (match_dup 1)) | |
| 2442 | (pc))) | |
| 2443 | (set (match_dup 0) | |
| 2444 | (plus:SI (match_dup 0) | |
| 2445 | (const_int -1))) | |
| 2446 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 2447 | "") | |
| 2448 | ||
| 2449 | (define_insn "*jsobgeq_2" | |
| 2450 | [(set (pc) | |
| 2451 | (if_then_else | |
| 2452 | (ge (plus:SI (match_operand:SI 0 "nonimmediate_operand" "+g") | |
| 2453 | (const_int -1)) | |
| 2454 | (const_int 0)) | |
| 2455 | (label_ref (match_operand 1 "" "")) | |
| 2456 | (pc))) | |
| 2457 | (set (match_dup 0) | |
| 2458 | (plus:SI (match_dup 0) | |
| 2459 | (const_int -1))) | |
| 2460 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 2461 | "!TARGET_UNIX_ASM && reload_completed" | |
| ab835497 RK |
2462 | "jsobgeq %0,%l1") |
| 2463 | ||
| 2464 | ;; Normal aob insns. Define a version for when operands[1] is a constant. | |
| e552abe2 | 2465 | (define_insn_and_split "*jaoblss" |
| ab835497 RK |
2466 | [(set (pc) |
| 2467 | (if_then_else | |
| 17ad4377 | 2468 | (lt (plus:SI (match_operand:SI 0 "nonimmediate_operand" "+g") |
| ab835497 | 2469 | (const_int 1)) |
| c4e75102 | 2470 | (match_operand:SI 1 "general_operand" "nrmT")) |
| ab835497 RK |
2471 | (label_ref (match_operand 2 "" "")) |
| 2472 | (pc))) | |
| 2473 | (set (match_dup 0) | |
| 2474 | (plus:SI (match_dup 0) | |
| 2475 | (const_int 1)))] | |
| 2476 | "!TARGET_UNIX_ASM" | |
| e552abe2 MR |
2477 | "#" |
| 2478 | "&& reload_completed" | |
| 2479 | [(parallel | |
| 2480 | [(set (pc) | |
| 2481 | (if_then_else | |
| 2482 | (lt (plus:SI (match_dup 0) | |
| 2483 | (const_int 1)) | |
| 2484 | (match_dup 1)) | |
| 2485 | (label_ref (match_dup 2)) | |
| 2486 | (pc))) | |
| 2487 | (set (match_dup 0) | |
| 2488 | (plus:SI (match_dup 0) | |
| 2489 | (const_int 1))) | |
| 2490 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 2491 | "") | |
| 2492 | ||
| 2493 | (define_insn "*jaoblss_2" | |
| 2494 | [(set (pc) | |
| 2495 | (if_then_else | |
| 2496 | (lt (plus:SI (match_operand:SI 0 "nonimmediate_operand" "+g") | |
| 2497 | (const_int 1)) | |
| 2498 | (match_operand:SI 1 "general_operand" "nrmT")) | |
| 2499 | (label_ref (match_operand 2 "" "")) | |
| 2500 | (pc))) | |
| 2501 | (set (match_dup 0) | |
| 2502 | (plus:SI (match_dup 0) | |
| 2503 | (const_int 1))) | |
| 2504 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 2505 | "!TARGET_UNIX_ASM && reload_completed" | |
| ab835497 RK |
2506 | "jaoblss %1,%0,%l2") |
| 2507 | ||
| e552abe2 | 2508 | (define_insn_and_split "*jaoblss_const" |
| ab835497 RK |
2509 | [(set (pc) |
| 2510 | (if_then_else | |
| 17ad4377 | 2511 | (lt (match_operand:SI 0 "nonimmediate_operand" "+g") |
| c4e75102 | 2512 | (match_operand:SI 1 "general_operand" "nrmT")) |
| ab835497 RK |
2513 | (label_ref (match_operand 2 "" "")) |
| 2514 | (pc))) | |
| 2515 | (set (match_dup 0) | |
| 2516 | (plus:SI (match_dup 0) | |
| 2517 | (const_int 1)))] | |
| d97c1295 | 2518 | "!TARGET_UNIX_ASM && CONST_INT_P (operands[1])" |
| e552abe2 MR |
2519 | "#" |
| 2520 | "&& reload_completed" | |
| 2521 | [(parallel | |
| 2522 | [(set (pc) | |
| 2523 | (if_then_else | |
| 2524 | (lt (match_dup 0) | |
| 2525 | (match_dup 1)) | |
| 2526 | (label_ref (match_dup 2)) | |
| 2527 | (pc))) | |
| 2528 | (set (match_dup 0) | |
| 2529 | (plus:SI (match_dup 0) | |
| 2530 | (const_int 1))) | |
| 2531 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 2532 | "") | |
| 2533 | ||
| 2534 | (define_insn "*jaoblss_const_2" | |
| 2535 | [(set (pc) | |
| 2536 | (if_then_else | |
| 2537 | (lt (match_operand:SI 0 "nonimmediate_operand" "+g") | |
| 2538 | (match_operand:SI 1 "general_operand" "nrmT")) | |
| 2539 | (label_ref (match_operand 2 "" "")) | |
| 2540 | (pc))) | |
| 2541 | (set (match_dup 0) | |
| 2542 | (plus:SI (match_dup 0) | |
| 2543 | (const_int 1))) | |
| 2544 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 2545 | "!TARGET_UNIX_ASM && CONST_INT_P (operands[1]) && reload_completed" | |
| ab835497 RK |
2546 | "jaoblss %P1,%0,%l2") |
| 2547 | ||
| e552abe2 | 2548 | (define_insn_and_split "*jaobleq" |
| ab835497 RK |
2549 | [(set (pc) |
| 2550 | (if_then_else | |
| 17ad4377 | 2551 | (le (plus:SI (match_operand:SI 0 "nonimmediate_operand" "+g") |
| ab835497 | 2552 | (const_int 1)) |
| c4e75102 | 2553 | (match_operand:SI 1 "general_operand" "nrmT")) |
| ab835497 RK |
2554 | (label_ref (match_operand 2 "" "")) |
| 2555 | (pc))) | |
| 2556 | (set (match_dup 0) | |
| 2557 | (plus:SI (match_dup 0) | |
| 2558 | (const_int 1)))] | |
| 2559 | "!TARGET_UNIX_ASM" | |
| e552abe2 MR |
2560 | "#" |
| 2561 | "&& reload_completed" | |
| 2562 | [(parallel | |
| 2563 | [(set (pc) | |
| 2564 | (if_then_else | |
| 2565 | (le (plus:SI (match_dup 0) | |
| 2566 | (const_int 1)) | |
| 2567 | (match_dup 1)) | |
| 2568 | (label_ref (match_dup 2)) | |
| 2569 | (pc))) | |
| 2570 | (set (match_dup 0) | |
| 2571 | (plus:SI (match_dup 0) | |
| 2572 | (const_int 1))) | |
| 2573 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 2574 | "") | |
| 2575 | ||
| 2576 | (define_insn "*jaobleq_2" | |
| 2577 | [(set (pc) | |
| 2578 | (if_then_else | |
| 2579 | (le (plus:SI (match_operand:SI 0 "nonimmediate_operand" "+g") | |
| 2580 | (const_int 1)) | |
| 2581 | (match_operand:SI 1 "general_operand" "nrmT")) | |
| 2582 | (label_ref (match_operand 2 "" "")) | |
| 2583 | (pc))) | |
| 2584 | (set (match_dup 0) | |
| 2585 | (plus:SI (match_dup 0) | |
| 2586 | (const_int 1))) | |
| 2587 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 2588 | "!TARGET_UNIX_ASM && reload_completed" | |
| ab835497 RK |
2589 | "jaobleq %1,%0,%l2") |
| 2590 | ||
| e552abe2 | 2591 | (define_insn_and_split "*jaobleq_const" |
| ab835497 RK |
2592 | [(set (pc) |
| 2593 | (if_then_else | |
| 17ad4377 | 2594 | (le (match_operand:SI 0 "nonimmediate_operand" "+g") |
| c4e75102 | 2595 | (match_operand:SI 1 "general_operand" "nrmT")) |
| ab835497 RK |
2596 | (label_ref (match_operand 2 "" "")) |
| 2597 | (pc))) | |
| 2598 | (set (match_dup 0) | |
| 2599 | (plus:SI (match_dup 0) | |
| 2600 | (const_int 1)))] | |
| d97c1295 | 2601 | "!TARGET_UNIX_ASM && CONST_INT_P (operands[1])" |
| e552abe2 MR |
2602 | "#" |
| 2603 | "&& reload_completed" | |
| 2604 | [(parallel | |
| 2605 | [(set (pc) | |
| 2606 | (if_then_else | |
| 2607 | (le (match_dup 0) | |
| 2608 | (match_dup 1)) | |
| 2609 | (label_ref (match_dup 2)) | |
| 2610 | (pc))) | |
| 2611 | (set (match_dup 0) | |
| 2612 | (plus:SI (match_dup 0) | |
| 2613 | (const_int 1))) | |
| 2614 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 2615 | "") | |
| 2616 | ||
| 2617 | (define_insn "*jaobleq_const_2" | |
| 2618 | [(set (pc) | |
| 2619 | (if_then_else | |
| 2620 | (le (match_operand:SI 0 "nonimmediate_operand" "+g") | |
| 2621 | (match_operand:SI 1 "general_operand" "nrmT")) | |
| 2622 | (label_ref (match_operand 2 "" "")) | |
| 2623 | (pc))) | |
| 2624 | (set (match_dup 0) | |
| 2625 | (plus:SI (match_dup 0) | |
| 2626 | (const_int 1))) | |
| 2627 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 2628 | "!TARGET_UNIX_ASM && CONST_INT_P (operands[1]) && reload_completed" | |
| ab835497 RK |
2629 | "jaobleq %P1,%0,%l2") |
| 2630 | ||
| 2631 | ;; Something like a sob insn, but compares against -1. | |
| 2632 | ;; This finds `while (foo--)' which was changed to `while (--foo != -1)'. | |
| 2633 | ||
| e552abe2 | 2634 | (define_insn_and_split "*jsobneq_minus_one" |
| ab835497 RK |
2635 | [(set (pc) |
| 2636 | (if_then_else | |
| 17ad4377 | 2637 | (ne (match_operand:SI 0 "nonimmediate_operand" "+g") |
| ab835497 RK |
2638 | (const_int 0)) |
| 2639 | (label_ref (match_operand 1 "" "")) | |
| 2640 | (pc))) | |
| 2641 | (set (match_dup 0) | |
| 2642 | (plus:SI (match_dup 0) | |
| 2643 | (const_int -1)))] | |
| 2644 | "" | |
| e552abe2 MR |
2645 | "#" |
| 2646 | "reload_completed" | |
| 2647 | [(parallel | |
| 2648 | [(set (pc) | |
| 2649 | (if_then_else | |
| 2650 | (ne (match_dup 0) | |
| 2651 | (const_int 0)) | |
| 2652 | (label_ref (match_dup 1)) | |
| 2653 | (pc))) | |
| 2654 | (set (match_dup 0) | |
| 2655 | (plus:SI (match_dup 0) | |
| 2656 | (const_int -1))) | |
| 2657 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 2658 | "") | |
| 2659 | ||
| 2660 | (define_insn "*jsobneq_minus_one_2" | |
| 2661 | [(set (pc) | |
| 2662 | (if_then_else | |
| 2663 | (ne (match_operand:SI 0 "nonimmediate_operand" "+g") | |
| 2664 | (const_int 0)) | |
| 2665 | (label_ref (match_operand 1 "" "")) | |
| 2666 | (pc))) | |
| 2667 | (set (match_dup 0) | |
| 2668 | (plus:SI (match_dup 0) | |
| 2669 | (const_int -1))) | |
| 2670 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 2671 | "reload_completed" | |
| ab835497 RK |
2672 | "decl %0\;jgequ %l1") |
| 2673 | \f | |
| 264ddbaa RH |
2674 | (define_expand "call_pop" |
| 2675 | [(parallel [(call (match_operand:QI 0 "memory_operand" "") | |
| 2676 | (match_operand:SI 1 "const_int_operand" "")) | |
| 0f8def68 JBG |
2677 | (set (reg:SI VAX_SP_REGNUM) |
| 2678 | (plus:SI (reg:SI VAX_SP_REGNUM) | |
| 264ddbaa RH |
2679 | (match_operand:SI 3 "immediate_operand" "")))])] |
| 2680 | "" | |
| 264ddbaa | 2681 | { |
| 90285d8d | 2682 | gcc_assert (INTVAL (operands[3]) <= 255 * 4 && INTVAL (operands[3]) % 4 == 0); |
| ec20cffb JT |
2683 | |
| 2684 | /* Operand 1 is the number of bytes to be popped by DW_CFA_GNU_args_size | |
| 2685 | during EH unwinding. We must include the argument count pushed by | |
| 2686 | the calls instruction. */ | |
| 2687 | operands[1] = GEN_INT (INTVAL (operands[3]) + 4); | |
| 2688 | }) | |
| 264ddbaa RH |
2689 | |
| 2690 | (define_insn "*call_pop" | |
| ab835497 | 2691 | [(call (match_operand:QI 0 "memory_operand" "m") |
| f5963e61 | 2692 | (match_operand:SI 1 "const_int_operand" "n")) |
| 0f8def68 JBG |
2693 | (set (reg:SI VAX_SP_REGNUM) (plus:SI (reg:SI VAX_SP_REGNUM) |
| 2694 | (match_operand:SI 2 "immediate_operand" "i")))] | |
| ab835497 | 2695 | "" |
| ec20cffb JT |
2696 | { |
| 2697 | operands[1] = GEN_INT ((INTVAL (operands[1]) - 4) / 4); | |
| 2698 | return "calls %1,%0"; | |
| 2699 | }) | |
| 264ddbaa RH |
2700 | |
| 2701 | (define_expand "call_value_pop" | |
| 2702 | [(parallel [(set (match_operand 0 "" "") | |
| 2703 | (call (match_operand:QI 1 "memory_operand" "") | |
| 2704 | (match_operand:SI 2 "const_int_operand" ""))) | |
| 0f8def68 JBG |
2705 | (set (reg:SI VAX_SP_REGNUM) |
| 2706 | (plus:SI (reg:SI VAX_SP_REGNUM) | |
| 264ddbaa RH |
2707 | (match_operand:SI 4 "immediate_operand" "")))])] |
| 2708 | "" | |
| 264ddbaa | 2709 | { |
| 90285d8d | 2710 | gcc_assert (INTVAL (operands[4]) <= 255 * 4 && INTVAL (operands[4]) % 4 == 0); |
| ec20cffb JT |
2711 | |
| 2712 | /* Operand 2 is the number of bytes to be popped by DW_CFA_GNU_args_size | |
| 2713 | during EH unwinding. We must include the argument count pushed by | |
| 2714 | the calls instruction. */ | |
| 2715 | operands[2] = GEN_INT (INTVAL (operands[4]) + 4); | |
| 2716 | }) | |
| ab835497 | 2717 | |
| 264ddbaa RH |
2718 | (define_insn "*call_value_pop" |
| 2719 | [(set (match_operand 0 "" "") | |
| ab835497 | 2720 | (call (match_operand:QI 1 "memory_operand" "m") |
| f5963e61 | 2721 | (match_operand:SI 2 "const_int_operand" "n"))) |
| 0f8def68 JBG |
2722 | (set (reg:SI VAX_SP_REGNUM) (plus:SI (reg:SI VAX_SP_REGNUM) |
| 2723 | (match_operand:SI 3 "immediate_operand" "i")))] | |
| ab835497 | 2724 | "" |
| ec20cffb JT |
2725 | "* |
| 2726 | { | |
| 2727 | operands[2] = GEN_INT ((INTVAL (operands[2]) - 4) / 4); | |
| 2728 | return \"calls %2,%1\"; | |
| 2729 | }") | |
| 2730 | ||
| 2731 | (define_expand "call" | |
| 2732 | [(call (match_operand:QI 0 "memory_operand" "") | |
| 2733 | (match_operand:SI 1 "const_int_operand" ""))] | |
| 2734 | "" | |
| 2735 | " | |
| 2736 | { | |
| 2737 | /* Operand 1 is the number of bytes to be popped by DW_CFA_GNU_args_size | |
| 2738 | during EH unwinding. We must include the argument count pushed by | |
| 2739 | the calls instruction. */ | |
| 2740 | operands[1] = GEN_INT (INTVAL (operands[1]) + 4); | |
| 2741 | }") | |
| ab835497 | 2742 | |
| ec20cffb JT |
2743 | (define_insn "*call" |
| 2744 | [(call (match_operand:QI 0 "memory_operand" "m") | |
| f78ac4f2 | 2745 | (match_operand:SI 1 "const_int_operand" ""))] |
| ab835497 | 2746 | "" |
| 264ddbaa | 2747 | "calls $0,%0") |
| ab835497 | 2748 | |
| ec20cffb JT |
2749 | (define_expand "call_value" |
| 2750 | [(set (match_operand 0 "" "") | |
| 2751 | (call (match_operand:QI 1 "memory_operand" "") | |
| c4e75102 | 2752 | (match_operand:SI 2 "const_int_operand" "")))] |
| ec20cffb JT |
2753 | "" |
| 2754 | " | |
| 2755 | { | |
| 2756 | /* Operand 2 is the number of bytes to be popped by DW_CFA_GNU_args_size | |
| 2757 | during EH unwinding. We must include the argument count pushed by | |
| 2758 | the calls instruction. */ | |
| 2759 | operands[2] = GEN_INT (INTVAL (operands[2]) + 4); | |
| 2760 | }") | |
| 2761 | ||
| 2762 | (define_insn "*call_value" | |
| 264ddbaa | 2763 | [(set (match_operand 0 "" "") |
| ab835497 | 2764 | (call (match_operand:QI 1 "memory_operand" "m") |
| ec20cffb | 2765 | (match_operand:SI 2 "const_int_operand" "")))] |
| ab835497 | 2766 | "" |
| 264ddbaa | 2767 | "calls $0,%1") |
| ab835497 | 2768 | |
| d0d02377 RS |
2769 | ;; Call subroutine returning any type. |
| 2770 | ||
| 2771 | (define_expand "untyped_call" | |
| 2772 | [(parallel [(call (match_operand 0 "" "") | |
| c4e75102 MT |
2773 | (const_int 0)) |
| 2774 | (match_operand 1 "" "") | |
| 2775 | (match_operand 2 "" "")])] | |
| d0d02377 RS |
2776 | "" |
| 2777 | " | |
| 2778 | { | |
| 2779 | int i; | |
| 2780 | ||
| 2781 | emit_call_insn (gen_call_pop (operands[0], const0_rtx, NULL, const0_rtx)); | |
| 2782 | ||
| 2783 | for (i = 0; i < XVECLEN (operands[2], 0); i++) | |
| 2784 | { | |
| 2785 | rtx set = XVECEXP (operands[2], 0, i); | |
| 2786 | emit_move_insn (SET_DEST (set), SET_SRC (set)); | |
| 2787 | } | |
| 2788 | ||
| 2789 | /* The optimizer does not know that the call sets the function value | |
| 2790 | registers we stored in the result block. We avoid problems by | |
| 2791 | claiming that all hard registers are used and clobbered at this | |
| 2792 | point. */ | |
| 2793 | emit_insn (gen_blockage ()); | |
| 2794 | ||
| 2795 | DONE; | |
| 2796 | }") | |
| 2797 | ||
| 2798 | ;; UNSPEC_VOLATILE is considered to use and clobber all hard registers and | |
| 2799 | ;; all of memory. This blocks insns from being moved across this point. | |
| 2800 | ||
| 2801 | (define_insn "blockage" | |
| ec20cffb | 2802 | [(unspec_volatile [(const_int 0)] VUNSPEC_BLOCKAGE)] |
| d0d02377 RS |
2803 | "" |
| 2804 | "") | |
| 2805 | ||
| a3515605 RH |
2806 | (define_insn "procedure_entry_mask" |
| 2807 | [(unspec_volatile [(match_operand 0 "const_int_operand")] VUNSPEC_PEM)] | |
| 2808 | "" | |
| 2809 | ".word %x0") | |
| 2810 | ||
| ab835497 RK |
2811 | (define_insn "return" |
| 2812 | [(return)] | |
| 2813 | "" | |
| 2814 | "ret") | |
| 2815 | ||
| a3515605 RH |
2816 | (define_expand "prologue" |
| 2817 | [(const_int 0)] | |
| 2818 | "" | |
| 2819 | { | |
| 2820 | vax_expand_prologue (); | |
| 2821 | DONE; | |
| 2822 | }) | |
| 2823 | ||
| 396ad517 JDA |
2824 | (define_expand "epilogue" |
| 2825 | [(return)] | |
| 2826 | "" | |
| 2827 | " | |
| 2828 | { | |
| 2829 | emit_jump_insn (gen_return ()); | |
| 2830 | DONE; | |
| 2831 | }") | |
| 2832 | ||
| ab835497 RK |
2833 | (define_insn "nop" |
| 2834 | [(const_int 0)] | |
| 2835 | "" | |
| 2836 | "nop") | |
| 2837 | ||
| d0b97e0a RS |
2838 | ;; This had a wider constraint once, and it had trouble. |
| 2839 | ;; If you are tempted to try `g', please don't--it's not worth | |
| 2840 | ;; the risk we will reopen the same bug. | |
| ab835497 | 2841 | (define_insn "indirect_jump" |
| 5b9b177a | 2842 | [(set (pc) (match_operand:SI 0 "register_operand" "r"))] |
| d0b97e0a | 2843 | "" |
| ab835497 RK |
2844 | "jmp (%0)") |
| 2845 | ||
| 7133bb7f | 2846 | ;; This is here to accept 5 arguments (as passed by expand_end_case) |
| 05dde071 SB |
2847 | ;; and pass the first 4 along to the casesi1 pattern that really does |
| 2848 | ;; the actual casesi work. We emit a jump here to the default label | |
| 2849 | ;; _before_ the casesi so that we can be sure that the casesi never | |
| 2850 | ;; drops through. | |
| 2851 | ;; This is suboptimal perhaps, but so is much of the rest of this | |
| 2852 | ;; machine description. For what it's worth, HPPA uses the same trick. | |
| 2853 | ;; | |
| 2854 | ;; operand 0 is index | |
| 2855 | ;; operand 1 is the minimum bound (a const_int) | |
| 2856 | ;; operand 2 is the maximum bound - minimum bound + 1 (also a const_int) | |
| 2857 | ;; operand 3 is CODE_LABEL for the table; | |
| 2858 | ;; operand 4 is the CODE_LABEL to go to if index out of range (ie. default). | |
| 2859 | ;; | |
| 2860 | ;; We emit: | |
| 2861 | ;; i = index - minimum_bound | |
| 2862 | ;; if (i > (maximum_bound - minimum_bound + 1) goto default; | |
| 2863 | ;; casesi (i, 0, table); | |
| 2864 | ;; | |
| 7133bb7f | 2865 | (define_expand "casesi" |
| 05dde071 SB |
2866 | [(match_operand:SI 0 "general_operand" "") |
| 2867 | (match_operand:SI 1 "general_operand" "") | |
| 2868 | (match_operand:SI 2 "general_operand" "") | |
| 2869 | (match_operand 3 "" "") | |
| 2870 | (match_operand 4 "" "")] | |
| 7133bb7f | 2871 | "" |
| 7ee02381 | 2872 | { |
| f90b7a5a PB |
2873 | rtx test; |
| 2874 | ||
| 05dde071 SB |
2875 | /* i = index - minimum_bound; |
| 2876 | But only if the lower bound is not already zero. */ | |
| 2877 | if (operands[1] != const0_rtx) | |
| 2878 | { | |
| 2879 | rtx index = gen_reg_rtx (SImode); | |
| 2880 | emit_insn (gen_addsi3 (index, | |
| 2881 | operands[0], | |
| 20d68fa0 | 2882 | gen_int_mode (-INTVAL (operands[1]), SImode))); |
| 05dde071 SB |
2883 | operands[0] = index; |
| 2884 | } | |
| 2885 | ||
| f90b7a5a PB |
2886 | /* if (i > (maximum_bound - minimum_bound + 1)) goto default; */ |
| 2887 | test = gen_rtx_fmt_ee (GTU, VOIDmode, operands[0], operands[2]); | |
| 2888 | emit_jump_insn (gen_cbranchsi4 (test, operands[0], operands[2], operands[4])); | |
| 05dde071 SB |
2889 | |
| 2890 | /* casesi (i, 0, table); */ | |
| 2891 | emit_jump_insn (gen_casesi1 (operands[0], operands[2], operands[3])); | |
| 7133bb7f | 2892 | DONE; |
| 7ee02381 | 2893 | }) |
| 7133bb7f | 2894 | |
| 05dde071 | 2895 | ;; This insn is a bit of a lier. It actually falls through if no case |
| 35fd3193 | 2896 | ;; matches. But, we prevent that from ever happening by emitting a jump |
| 05dde071 | 2897 | ;; before this, see the define_expand above. |
| e552abe2 | 2898 | (define_insn_and_split "casesi1" |
| 05dde071 SB |
2899 | [(match_operand:SI 1 "const_int_operand" "n") |
| 2900 | (set (pc) | |
| 2901 | (plus:SI (sign_extend:SI | |
| e552abe2 MR |
2902 | (mem:HI (plus:SI |
| 2903 | (mult:SI | |
| 2904 | (match_operand:SI 0 "general_operand" "nrmT") | |
| 2905 | (const_int 2)) | |
| 2906 | (pc)))) | |
| 05dde071 | 2907 | (label_ref:SI (match_operand 2 "" ""))))] |
| ab835497 | 2908 | "" |
| e552abe2 MR |
2909 | "#" |
| 2910 | "reload_completed" | |
| 2911 | [(parallel | |
| 2912 | [(match_dup 1) | |
| 2913 | (set (pc) | |
| 2914 | (plus:SI (sign_extend:SI | |
| 2915 | (mem:HI (plus:SI | |
| 2916 | (mult:SI | |
| 2917 | (match_dup 0) | |
| 2918 | (const_int 2)) | |
| 2919 | (pc)))) | |
| 2920 | (label_ref:SI (match_dup 2)))) | |
| 2921 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 2922 | "") | |
| 2923 | ||
| 2924 | (define_insn "*casesi1" | |
| 2925 | [(match_operand:SI 1 "const_int_operand" "n") | |
| 2926 | (set (pc) | |
| 2927 | (plus:SI (sign_extend:SI | |
| 2928 | (mem:HI (plus:SI | |
| 2929 | (mult:SI | |
| 2930 | (match_operand:SI 0 "general_operand" "nrmT") | |
| 2931 | (const_int 2)) | |
| 2932 | (pc)))) | |
| 2933 | (label_ref:SI (match_operand 2 "" "")))) | |
| 2934 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 2935 | "reload_completed" | |
| ab835497 RK |
2936 | "casel %0,$0,%1") |
| 2937 | \f | |
| e552abe2 | 2938 | (define_insn_and_split "*pushsym" |
| c4e75102 | 2939 | [(set (match_operand:SI 0 "push_operand" "=g") |
| 85f5a7d6 | 2940 | (match_operand:SI 1 "pic_symbolic_operand" "A"))] |
| c4e75102 | 2941 | "" |
| e552abe2 MR |
2942 | "#" |
| 2943 | "reload_completed" | |
| 2944 | [(parallel | |
| 2945 | [(set (match_dup 0) | |
| 2946 | (match_dup 1)) | |
| 2947 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 2948 | "") | |
| 2949 | ||
| 2950 | (define_insn "*pushsym_2<ccn><ccnz><ccz>" | |
| 2951 | [(set (match_operand:SI 0 "push_operand" "=g") | |
| 2952 | (match_operand:SI 1 "pic_symbolic_operand" "A")) | |
| 2953 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 2954 | "reload_completed" | |
| c4e75102 MT |
2955 | "pushab %a1") |
| 2956 | ||
| e552abe2 | 2957 | (define_insn_and_split "*movsym" |
| c4e75102 | 2958 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| 85f5a7d6 | 2959 | (match_operand:SI 1 "pic_symbolic_operand" "A"))] |
| c4e75102 | 2960 | "" |
| e552abe2 MR |
2961 | "#" |
| 2962 | "reload_completed" | |
| 2963 | [(parallel | |
| 2964 | [(set (match_dup 0) | |
| 2965 | (match_dup 1)) | |
| 2966 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 2967 | "") | |
| 2968 | ||
| 2969 | (define_insn "*movsym_2<ccn><ccnz><ccz>" | |
| 2970 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 2971 | (match_operand:SI 1 "pic_symbolic_operand" "A")) | |
| 2972 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 2973 | "reload_completed" | |
| c4e75102 MT |
2974 | "movab %a1,%0") |
| 2975 | ||
| e552abe2 | 2976 | (define_insn_and_split "*pushsymreg" |
| c4e75102 | 2977 | [(set (match_operand:SI 0 "push_operand" "=g") |
| 85f5a7d6 MR |
2978 | (plus:SI (match_operand:SI 1 "register_operand" "%r") |
| 2979 | (match_operand:SI 2 "pic_symbolic_operand" "A")))] | |
| 2980 | "flag_pic" | |
| e552abe2 MR |
2981 | "#" |
| 2982 | "&& reload_completed" | |
| 2983 | [(parallel | |
| 2984 | [(set (match_dup 0) | |
| 2985 | (plus:SI (match_dup 1) | |
| 2986 | (match_dup 2))) | |
| 2987 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 2988 | "") | |
| 2989 | ||
| 2990 | (define_insn "*pushsymreg_2<ccn><ccnz><ccz>" | |
| 2991 | [(set (match_operand:SI 0 "push_operand" "=g") | |
| 2992 | (plus:SI (match_operand:SI 1 "register_operand" "%r") | |
| 2993 | (match_operand:SI 2 "pic_symbolic_operand" "A"))) | |
| 2994 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 2995 | "flag_pic && reload_completed" | |
| 85f5a7d6 | 2996 | "pushab %a2[%1]") |
| c4e75102 | 2997 | |
| e552abe2 | 2998 | (define_insn_and_split "*movsymreg" |
| c4e75102 | 2999 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| 85f5a7d6 MR |
3000 | (plus:SI (match_operand:SI 1 "register_operand" "%r") |
| 3001 | (match_operand:SI 2 "pic_symbolic_operand" "A")))] | |
| 3002 | "flag_pic" | |
| e552abe2 MR |
3003 | "#" |
| 3004 | "&& reload_completed" | |
| 3005 | [(parallel | |
| 3006 | [(set (match_dup 0) | |
| 3007 | (plus:SI (match_dup 1) | |
| 3008 | (match_dup 2))) | |
| 3009 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 3010 | "") | |
| 3011 | ||
| 3012 | (define_insn "*movsymreg_2<ccn><ccnz><ccz>" | |
| 3013 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 3014 | (plus:SI (match_operand:SI 1 "register_operand" "%r") | |
| 3015 | (match_operand:SI 2 "pic_symbolic_operand" "A"))) | |
| 3016 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 3017 | "flag_pic && reload_completed" | |
| 85f5a7d6 | 3018 | "movab %a2[%1],%0") |
| c4e75102 | 3019 | \f |
| 821bde61 | 3020 | ;;- load or push effective address |
| ab835497 RK |
3021 | ;; These come after the move and add/sub patterns |
| 3022 | ;; because we don't want pushl $1 turned into pushad 1. | |
| 3023 | ;; or addl3 r1,r2,r3 turned into movab 0(r1)[r2],r3. | |
| 3024 | ||
| 6da0ede8 RS |
3025 | ;; It does not work to use constraints to distinguish pushes from moves, |
| 3026 | ;; because < matches any autodecrement, not just a push. | |
| 3027 | ||
| e552abe2 | 3028 | (define_insn_and_split "pushaddr<mode>" |
| c4e75102 MT |
3029 | [(set (match_operand:SI 0 "push_operand" "=g") |
| 3030 | (match_operand:VAXintQHSD 1 "address_operand" "p"))] | |
| ab835497 | 3031 | "" |
| e552abe2 MR |
3032 | "#" |
| 3033 | "reload_completed" | |
| 3034 | [(parallel | |
| 3035 | [(set (match_dup 0) | |
| 3036 | (match_dup 1)) | |
| 3037 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 3038 | "") | |
| 3039 | ||
| 3040 | (define_insn "*pushaddr<mode><ccn><ccnz><ccz>" | |
| 3041 | [(set (match_operand:SI 0 "push_operand" "=g") | |
| 3042 | (match_operand:VAXintQHSD 1 "address_operand" "p")) | |
| 3043 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 3044 | "reload_completed" | |
| c4e75102 | 3045 | "pusha<VAXintQHSD:isfx> %a1") |
| ab835497 | 3046 | |
| e552abe2 | 3047 | (define_insn_and_split "movaddr<mode>" |
| 17ad4377 | 3048 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| c4e75102 | 3049 | (match_operand:VAXintQHSD 1 "address_operand" "p"))] |
| ab835497 | 3050 | "" |
| e552abe2 MR |
3051 | "#" |
| 3052 | "reload_completed" | |
| 3053 | [(parallel | |
| 3054 | [(set (match_dup 0) | |
| 3055 | (match_dup 1)) | |
| 3056 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 3057 | "") | |
| 3058 | ||
| 3059 | (define_insn "*movaddr<mode><ccn><ccnz><ccz>" | |
| 3060 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 3061 | (match_operand:VAXintQHSD 1 "address_operand" "p")) | |
| 3062 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 3063 | "reload_completed" | |
| c4e75102 | 3064 | "mova<VAXintQHSD:isfx> %a1,%0") |
| ab835497 | 3065 | |
| e552abe2 | 3066 | (define_insn_and_split "pushaddr<mode>" |
| c4e75102 MT |
3067 | [(set (match_operand:SI 0 "push_operand" "=g") |
| 3068 | (match_operand:VAXfp 1 "address_operand" "p"))] | |
| ab835497 | 3069 | "" |
| e552abe2 MR |
3070 | "#" |
| 3071 | "reload_completed" | |
| 3072 | [(parallel | |
| 3073 | [(set (match_dup 0) | |
| 3074 | (match_dup 1)) | |
| 3075 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 3076 | "") | |
| 3077 | ||
| 3078 | (define_insn "*pushaddr<mode><ccn><ccnz><ccz>" | |
| 3079 | [(set (match_operand:SI 0 "push_operand" "=g") | |
| 3080 | (match_operand:VAXfp 1 "address_operand" "p")) | |
| 3081 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 3082 | "reload_completed" | |
| c4e75102 | 3083 | "pusha<VAXfp:fsfx> %a1") |
| ab835497 | 3084 | |
| e552abe2 | 3085 | (define_insn_and_split "movaddr<mode>" |
| 17ad4377 | 3086 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") |
| c4e75102 | 3087 | (match_operand:VAXfp 1 "address_operand" "p"))] |
| ab835497 | 3088 | "" |
| e552abe2 MR |
3089 | "#" |
| 3090 | "reload_completed" | |
| 3091 | [(parallel | |
| 3092 | [(set (match_dup 0) | |
| 3093 | (match_dup 1)) | |
| 3094 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 3095 | "") | |
| 3096 | ||
| 3097 | (define_insn "*movaddr<mode>" | |
| 3098 | [(set (match_operand:SI 0 "nonimmediate_operand" "=g") | |
| 3099 | (match_operand:VAXfp 1 "address_operand" "p")) | |
| 3100 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 3101 | "reload_completed" | |
| c4e75102 | 3102 | "mova<VAXfp:fsfx> %a1,%0") |
| ab835497 RK |
3103 | \f |
| 3104 | ;; These used to be peepholes, but it is more straightforward to do them | |
| 3105 | ;; as single insns. However, we must force the output to be a register | |
| 3106 | ;; if it is not an offsettable address so that we know that we can assign | |
| 821bde61 | 3107 | ;; to it twice. |
| ab835497 RK |
3108 | |
| 3109 | ;; If we had a good way of evaluating the relative costs, these could be | |
| 3110 | ;; machine-independent. | |
| 3111 | ||
| 3112 | ;; Optimize extzv ...,z; andl2 ...,z | |
| 3113 | ;; or ashl ...,z; andl2 ...,z | |
| 3114 | ;; with other operands constant. This is what the combiner converts the | |
| 3115 | ;; above sequences to before attempting to recognize the new insn. | |
| 3116 | ||
| e552abe2 | 3117 | (define_insn_and_split "*andashlnegsi4" |
| 17ad4377 | 3118 | [(set (match_operand:SI 0 "nonimmediate_operand" "=ro") |
| c4e75102 | 3119 | (and:SI (ashiftrt:SI (match_operand:SI 1 "general_operand" "nrmT") |
| ab835497 RK |
3120 | (match_operand:QI 2 "const_int_operand" "n")) |
| 3121 | (match_operand:SI 3 "const_int_operand" "n")))] | |
| 3122 | "(INTVAL (operands[3]) & ~((1 << (32 - INTVAL (operands[2]))) - 1)) == 0" | |
| e552abe2 MR |
3123 | "#" |
| 3124 | "&& reload_completed" | |
| 3125 | [(parallel | |
| 3126 | [(set (match_dup 0) | |
| 3127 | (and:SI (ashiftrt:SI (match_dup 1) | |
| 3128 | (match_dup 2)) | |
| 3129 | (match_dup 3))) | |
| 3130 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 3131 | "") | |
| 3132 | ||
| 3133 | (define_insn "*andashlnegsi4_2<ccn><ccnz><ccz>" | |
| 3134 | [(set (match_operand:SI 0 "nonimmediate_operand" "=ro") | |
| 3135 | (and:SI (ashiftrt:SI (match_operand:SI 1 "general_operand" "nrmT") | |
| 3136 | (match_operand:QI 2 "const_int_operand" "n")) | |
| 3137 | (match_operand:SI 3 "const_int_operand" "n"))) | |
| 3138 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 3139 | "(INTVAL (operands[3]) & ~((1 << (32 - INTVAL (operands[2]))) - 1)) == 0 | |
| 3140 | && reload_completed" | |
| ab835497 RK |
3141 | "* |
| 3142 | { | |
| 3143 | unsigned long mask1 = INTVAL (operands[3]); | |
| 3144 | unsigned long mask2 = (1 << (32 - INTVAL (operands[2]))) - 1; | |
| 3145 | ||
| 3146 | if ((mask1 & mask2) != mask1) | |
| 3a598fbe | 3147 | operands[3] = GEN_INT (mask1 & mask2); |
| ab835497 RK |
3148 | |
| 3149 | return \"rotl %R2,%1,%0\;bicl2 %N3,%0\"; | |
| 3150 | }") | |
| 3151 | ||
| 3152 | ;; left-shift and mask | |
| 3153 | ;; The only case where `ashl' is better is if the mask only turns off | |
| 3154 | ;; bits that the ashl would anyways, in which case it should have been | |
| 3155 | ;; optimized away. | |
| 3156 | ||
| e552abe2 | 3157 | (define_insn_and_split "*andashlsi4" |
| 17ad4377 | 3158 | [(set (match_operand:SI 0 "nonimmediate_operand" "=ro") |
| c4e75102 | 3159 | (and:SI (ashift:SI (match_operand:SI 1 "general_operand" "nrmT") |
| ab835497 RK |
3160 | (match_operand:QI 2 "const_int_operand" "n")) |
| 3161 | (match_operand:SI 3 "const_int_operand" "n")))] | |
| 3162 | "" | |
| e552abe2 MR |
3163 | "#" |
| 3164 | "reload_completed" | |
| 3165 | [(parallel | |
| 3166 | [(set (match_dup 0) | |
| 3167 | (and:SI (ashift:SI (match_dup 1) | |
| 3168 | (match_dup 2)) | |
| 3169 | (match_dup 3))) | |
| 3170 | (clobber (reg:CC VAX_PSL_REGNUM))])] | |
| 3171 | "") | |
| 3172 | ||
| 3173 | (define_insn "*andashlsi4_2<ccn><ccnz><ccz>" | |
| 3174 | [(set (match_operand:SI 0 "nonimmediate_operand" "=ro") | |
| 3175 | (and:SI (ashift:SI (match_operand:SI 1 "general_operand" "nrmT") | |
| 3176 | (match_operand:QI 2 "const_int_operand" "n")) | |
| 3177 | (match_operand:SI 3 "const_int_operand" "n"))) | |
| 3178 | (clobber (reg:CC VAX_PSL_REGNUM))] | |
| 3179 | "reload_completed" | |
| ab835497 RK |
3180 | "* |
| 3181 | { | |
| c5c76735 JL |
3182 | operands[3] |
| 3183 | = GEN_INT (INTVAL (operands[3]) & ~((1 << INTVAL (operands[2])) - 1)); | |
| ab835497 RK |
3184 | return \"rotl %2,%1,%0\;bicl2 %N3,%0\"; |
| 3185 | }") | |
| ec20cffb JT |
3186 | |
| 3187 | ;; Instruction sequence to sync the VAX instruction stream. | |
| 3188 | (define_insn "sync_istream" | |
| 3189 | [(unspec_volatile [(const_int 0)] VUNSPEC_SYNC_ISTREAM)] | |
| 3190 | "" | |
| 3191 | "movpsl -(%|sp)\;pushal 1(%|pc)\;rei") | |
| c4e75102 MT |
3192 | |
| 3193 | (define_expand "nonlocal_goto" | |
| 3194 | [(use (match_operand 0 "general_operand" "")) | |
| 3195 | (use (match_operand 1 "general_operand" "")) | |
| 3196 | (use (match_operand 2 "general_operand" "")) | |
| 3197 | (use (match_operand 3 "general_operand" ""))] | |
| 3198 | "" | |
| 3199 | { | |
| 3200 | rtx lab = operands[1]; | |
| 3201 | rtx stack = operands[2]; | |
| 3202 | rtx fp = operands[3]; | |
| 3203 | ||
| 3204 | emit_clobber (gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode))); | |
| 3205 | emit_clobber (gen_rtx_MEM (BLKmode, hard_frame_pointer_rtx)); | |
| 3206 | ||
| 3207 | emit_move_insn (hard_frame_pointer_rtx, fp); | |
| 9eac0f2a | 3208 | emit_stack_restore (SAVE_NONLOCAL, stack); |
| c4e75102 MT |
3209 | |
| 3210 | emit_use (hard_frame_pointer_rtx); | |
| 3211 | emit_use (stack_pointer_rtx); | |
| 3212 | ||
| 3213 | /* We'll convert this to direct jump via a peephole optimization. */ | |
| 3214 | emit_indirect_jump (copy_to_reg (lab)); | |
| 3215 | emit_barrier (); | |
| 3216 | DONE; | |
| 3217 | }) | |
| ea84baeb MR |
3218 | |
| 3219 | (include "builtins.md") |