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65963943 1/* Generate code from machine description to emit insns as rtl.
d050d723 2 Copyright (C) 1987, 1988, 1991, 1994, 1995, 1997, 1998, 1999, 2000
b492151d 3 Free Software Foundation, Inc.
65963943
RK
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
a35311b0
RK
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
65963943
RK
21
22
0d64891c 23#include "hconfig.h"
0b93b64e 24#include "system.h"
65963943 25#include "rtl.h"
f8b6598e 26#include "errors.h"
c88c0d42 27#include "gensupport.h"
65963943 28
65963943 29
65963943
RK
30static int max_opno;
31static int max_dup_opno;
ede7cd44 32static int max_scratch_opno;
65963943
RK
33static int register_constraints;
34static int insn_code_number;
35static int insn_index_number;
36
37/* Data structure for recording the patterns of insns that have CLOBBERs.
38 We use this to output a function that adds these CLOBBERs to a
39 previously-allocated PARALLEL expression. */
40
41struct clobber_pat
42{
e5f6a288 43 struct clobber_ent *insns;
65963943
RK
44 rtx pattern;
45 int first_clobber;
46 struct clobber_pat *next;
47} *clobber_list;
48
e5f6a288
RK
49/* Records one insn that uses the clobber list. */
50
51struct clobber_ent
52{
53 int code_number; /* Counts only insns. */
54 struct clobber_ent *next;
55};
56
a94ae8f5
KG
57static void max_operand_1 PARAMS ((rtx));
58static int max_operand_vec PARAMS ((rtx, int));
59static void print_code PARAMS ((RTX_CODE));
60static void gen_exp PARAMS ((rtx, enum rtx_code));
61static void gen_insn PARAMS ((rtx));
62static void gen_expand PARAMS ((rtx));
63static void gen_split PARAMS ((rtx));
64static void output_add_clobbers PARAMS ((void));
65static void gen_rtx_scratch PARAMS ((rtx, enum rtx_code));
66static void output_peephole2_scratches PARAMS ((rtx));
e009aaf3
JL
67
68\f
65963943
RK
69static void
70max_operand_1 (x)
71 rtx x;
72{
73 register RTX_CODE code;
74 register int i;
75 register int len;
6f7d635c 76 register const char *fmt;
65963943
RK
77
78 if (x == 0)
79 return;
80
81 code = GET_CODE (x);
82
83 if (code == MATCH_OPERAND && XSTR (x, 2) != 0 && *XSTR (x, 2) != '\0')
84 register_constraints = 1;
85 if (code == MATCH_SCRATCH && XSTR (x, 1) != 0 && *XSTR (x, 1) != '\0')
86 register_constraints = 1;
87 if (code == MATCH_OPERAND || code == MATCH_OPERATOR
88 || code == MATCH_PARALLEL)
89 max_opno = MAX (max_opno, XINT (x, 0));
8fabbfe6 90 if (code == MATCH_DUP || code == MATCH_OP_DUP || code == MATCH_PAR_DUP)
65963943 91 max_dup_opno = MAX (max_dup_opno, XINT (x, 0));
ede7cd44
RH
92 if (code == MATCH_SCRATCH)
93 max_scratch_opno = MAX (max_scratch_opno, XINT (x, 0));
65963943
RK
94
95 fmt = GET_RTX_FORMAT (code);
96 len = GET_RTX_LENGTH (code);
97 for (i = 0; i < len; i++)
98 {
99 if (fmt[i] == 'e' || fmt[i] == 'u')
100 max_operand_1 (XEXP (x, i));
101 else if (fmt[i] == 'E')
102 {
103 int j;
104 for (j = 0; j < XVECLEN (x, i); j++)
105 max_operand_1 (XVECEXP (x, i, j));
106 }
107 }
108}
109
110static int
111max_operand_vec (insn, arg)
112 rtx insn;
113 int arg;
114{
115 register int len = XVECLEN (insn, arg);
116 register int i;
117
118 max_opno = -1;
119 max_dup_opno = -1;
ede7cd44 120 max_scratch_opno = -1;
65963943
RK
121
122 for (i = 0; i < len; i++)
123 max_operand_1 (XVECEXP (insn, arg, i));
124
125 return max_opno + 1;
126}
127\f
128static void
129print_code (code)
130 RTX_CODE code;
131{
5f06c983 132 register const char *p1;
65963943 133 for (p1 = GET_RTX_NAME (code); *p1; p1++)
92a438d1 134 putchar (TOUPPER(*p1));
65963943
RK
135}
136
ede7cd44
RH
137static void
138gen_rtx_scratch (x, subroutine_type)
139 rtx x;
140 enum rtx_code subroutine_type;
141{
142 if (subroutine_type == DEFINE_PEEPHOLE2)
143 {
144 printf ("operand%d", XINT (x, 0));
145 }
146 else
147 {
148 printf ("gen_rtx_SCRATCH (%smode)", GET_MODE_NAME (GET_MODE (x)));
149 }
150}
151
65963943
RK
152/* Print a C expression to construct an RTX just like X,
153 substituting any operand references appearing within. */
154
155static void
ede7cd44 156gen_exp (x, subroutine_type)
65963943 157 rtx x;
ede7cd44 158 enum rtx_code subroutine_type;
65963943
RK
159{
160 register RTX_CODE code;
161 register int i;
162 register int len;
6f7d635c 163 register const char *fmt;
65963943
RK
164
165 if (x == 0)
166 {
3d678dca 167 printf ("NULL_RTX");
65963943
RK
168 return;
169 }
170
171 code = GET_CODE (x);
172
173 switch (code)
174 {
175 case MATCH_OPERAND:
176 case MATCH_DUP:
177 printf ("operand%d", XINT (x, 0));
178 return;
179
180 case MATCH_OP_DUP:
4ceb7595
JC
181 printf ("gen_rtx (GET_CODE (operand%d), ", XINT (x, 0));
182 if (GET_MODE (x) == VOIDmode)
183 printf ("GET_MODE (operand%d)", XINT (x, 0));
184 else
185 printf ("%smode", GET_MODE_NAME (GET_MODE (x)));
65963943
RK
186 for (i = 0; i < XVECLEN (x, 1); i++)
187 {
188 printf (",\n\t\t");
ede7cd44 189 gen_exp (XVECEXP (x, 1, i), subroutine_type);
65963943
RK
190 }
191 printf (")");
192 return;
193
194 case MATCH_OPERATOR:
195 printf ("gen_rtx (GET_CODE (operand%d)", XINT (x, 0));
196 printf (", %smode", GET_MODE_NAME (GET_MODE (x)));
197 for (i = 0; i < XVECLEN (x, 2); i++)
198 {
199 printf (",\n\t\t");
ede7cd44 200 gen_exp (XVECEXP (x, 2, i), subroutine_type);
65963943
RK
201 }
202 printf (")");
203 return;
204
205 case MATCH_PARALLEL:
8fabbfe6 206 case MATCH_PAR_DUP:
65963943
RK
207 printf ("operand%d", XINT (x, 0));
208 return;
209
210 case MATCH_SCRATCH:
ede7cd44 211 gen_rtx_scratch (x, subroutine_type);
65963943
RK
212 return;
213
214 case ADDRESS:
215 fatal ("ADDRESS expression code used in named instruction pattern");
216
217 case PC:
218 printf ("pc_rtx");
219 return;
220
221 case CC0:
222 printf ("cc0_rtx");
223 return;
224
225 case CONST_INT:
226 if (INTVAL (x) == 0)
3d678dca
RS
227 printf ("const0_rtx");
228 else if (INTVAL (x) == 1)
229 printf ("const1_rtx");
230 else if (INTVAL (x) == -1)
231 printf ("constm1_rtx");
232 else if (INTVAL (x) == STORE_FLAG_VALUE)
233 printf ("const_true_rtx");
234 else
76d31c63
JL
235 {
236 printf ("GEN_INT (");
237 printf (HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
238 printf (")");
239 }
3d678dca
RS
240 return;
241
242 case CONST_DOUBLE:
243 /* These shouldn't be written in MD files. Instead, the appropriate
244 routines in varasm.c should be called. */
245 abort ();
1d300e19
KG
246
247 default:
248 break;
65963943
RK
249 }
250
3b80f6ca 251 printf ("gen_rtx_");
65963943 252 print_code (code);
3b80f6ca 253 printf (" (%smode", GET_MODE_NAME (GET_MODE (x)));
65963943
RK
254
255 fmt = GET_RTX_FORMAT (code);
256 len = GET_RTX_LENGTH (code);
257 for (i = 0; i < len; i++)
258 {
259 if (fmt[i] == '0')
260 break;
a558d864 261 printf (",\n\t");
65963943 262 if (fmt[i] == 'e' || fmt[i] == 'u')
ede7cd44 263 gen_exp (XEXP (x, i), subroutine_type);
65963943 264 else if (fmt[i] == 'i')
3d678dca 265 printf ("%u", XINT (x, i));
65963943
RK
266 else if (fmt[i] == 's')
267 printf ("\"%s\"", XSTR (x, i));
268 else if (fmt[i] == 'E')
269 {
270 int j;
271 printf ("gen_rtvec (%d", XVECLEN (x, i));
272 for (j = 0; j < XVECLEN (x, i); j++)
273 {
274 printf (",\n\t\t");
ede7cd44 275 gen_exp (XVECEXP (x, i, j), subroutine_type);
65963943
RK
276 }
277 printf (")");
278 }
279 else
280 abort ();
281 }
282 printf (")");
283}
284\f
285/* Generate the `gen_...' function for a DEFINE_INSN. */
286
287static void
288gen_insn (insn)
289 rtx insn;
290{
291 int operands;
292 register int i;
293
294 /* See if the pattern for this insn ends with a group of CLOBBERs of (hard)
295 registers or MATCH_SCRATCHes. If so, store away the information for
0f41302f 296 later. */
65963943
RK
297
298 if (XVEC (insn, 1))
299 {
300 for (i = XVECLEN (insn, 1) - 1; i > 0; i--)
301 if (GET_CODE (XVECEXP (insn, 1, i)) != CLOBBER
302 || (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) != REG
303 && GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) != MATCH_SCRATCH))
304 break;
305
306 if (i != XVECLEN (insn, 1) - 1)
307 {
e5f6a288
RK
308 register struct clobber_pat *p;
309 register struct clobber_ent *link
310 = (struct clobber_ent *) xmalloc (sizeof (struct clobber_ent));
311 register int j;
312
313 link->code_number = insn_code_number;
314
315 /* See if any previous CLOBBER_LIST entry is the same as this
316 one. */
317
318 for (p = clobber_list; p; p = p->next)
319 {
320 if (p->first_clobber != i + 1
321 || XVECLEN (p->pattern, 1) != XVECLEN (insn, 1))
322 continue;
323
324 for (j = i + 1; j < XVECLEN (insn, 1); j++)
325 {
326 rtx old = XEXP (XVECEXP (p->pattern, 1, j), 0);
327 rtx new = XEXP (XVECEXP (insn, 1, j), 0);
328
329 /* OLD and NEW are the same if both are to be a SCRATCH
f5f178e0 330 of the same mode,
e5f6a288 331 or if both are registers of the same mode and number. */
f5f178e0
RS
332 if (! (GET_MODE (old) == GET_MODE (new)
333 && ((GET_CODE (old) == MATCH_SCRATCH
334 && GET_CODE (new) == MATCH_SCRATCH)
335 || (GET_CODE (old) == REG && GET_CODE (new) == REG
336 && REGNO (old) == REGNO (new)))))
e5f6a288
RK
337 break;
338 }
339
340 if (j == XVECLEN (insn, 1))
341 break;
342 }
343
344 if (p == 0)
345 {
346 p = (struct clobber_pat *) xmalloc (sizeof (struct clobber_pat));
65963943 347
e5f6a288
RK
348 p->insns = 0;
349 p->pattern = insn;
350 p->first_clobber = i + 1;
351 p->next = clobber_list;
352 clobber_list = p;
353 }
354
355 link->next = p->insns;
356 p->insns = link;
65963943
RK
357 }
358 }
359
6b6ca844
RK
360 /* Don't mention instructions whose names are the null string
361 or begin with '*'. They are in the machine description just
362 to be recognized. */
363 if (XSTR (insn, 0)[0] == 0 || XSTR (insn, 0)[0] == '*')
65963943
RK
364 return;
365
366 /* Find out how many operands this function has,
367 and also whether any of them have register constraints. */
368 register_constraints = 0;
369 operands = max_operand_vec (insn, 1);
370 if (max_dup_opno >= operands)
371 fatal ("match_dup operand number has no match_operand");
372
373 /* Output the function name and argument declarations. */
374 printf ("rtx\ngen_%s (", XSTR (insn, 0));
375 for (i = 0; i < operands; i++)
913d0833
KG
376 if (i)
377 printf (", operand%d", i);
378 else
379 printf ("operand%d", i);
65963943
RK
380 printf (")\n");
381 for (i = 0; i < operands; i++)
382 printf (" rtx operand%d;\n", i);
383 printf ("{\n");
384
385 /* Output code to construct and return the rtl for the instruction body */
386
387 if (XVECLEN (insn, 1) == 1)
388 {
389 printf (" return ");
ede7cd44 390 gen_exp (XVECEXP (insn, 1, 0), DEFINE_INSN);
65963943
RK
391 printf (";\n}\n\n");
392 }
393 else
394 {
c5c76735
JL
395 printf (" return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (%d",
396 XVECLEN (insn, 1));
397
65963943
RK
398 for (i = 0; i < XVECLEN (insn, 1); i++)
399 {
400 printf (",\n\t\t");
ede7cd44 401 gen_exp (XVECEXP (insn, 1, i), DEFINE_INSN);
65963943
RK
402 }
403 printf ("));\n}\n\n");
404 }
405}
406\f
407/* Generate the `gen_...' function for a DEFINE_EXPAND. */
408
409static void
410gen_expand (expand)
411 rtx expand;
412{
413 int operands;
414 register int i;
415
416 if (strlen (XSTR (expand, 0)) == 0)
417 fatal ("define_expand lacks a name");
418 if (XVEC (expand, 1) == 0)
419 fatal ("define_expand for %s lacks a pattern", XSTR (expand, 0));
420
421 /* Find out how many operands this function has,
422 and also whether any of them have register constraints. */
423 register_constraints = 0;
424
425 operands = max_operand_vec (expand, 1);
426
427 /* Output the function name and argument declarations. */
428 printf ("rtx\ngen_%s (", XSTR (expand, 0));
429 for (i = 0; i < operands; i++)
913d0833
KG
430 if (i)
431 printf (", operand%d", i);
432 else
433 printf ("operand%d", i);
65963943
RK
434 printf (")\n");
435 for (i = 0; i < operands; i++)
436 printf (" rtx operand%d;\n", i);
437 printf ("{\n");
438
439 /* If we don't have any C code to write, only one insn is being written,
440 and no MATCH_DUPs are present, we can just return the desired insn
441 like we do for a DEFINE_INSN. This saves memory. */
442 if ((XSTR (expand, 3) == 0 || *XSTR (expand, 3) == '\0')
443 && operands > max_dup_opno
444 && XVECLEN (expand, 1) == 1)
445 {
446 printf (" return ");
ede7cd44 447 gen_exp (XVECEXP (expand, 1, 0), DEFINE_EXPAND);
65963943
RK
448 printf (";\n}\n\n");
449 return;
450 }
451
452 /* For each operand referred to only with MATCH_DUPs,
453 make a local variable. */
454 for (i = operands; i <= max_dup_opno; i++)
455 printf (" rtx operand%d;\n", i);
ede7cd44
RH
456 for (; i <= max_scratch_opno; i++)
457 printf (" rtx operand%d;\n", i);
65963943
RK
458 printf (" rtx _val = 0;\n");
459 printf (" start_sequence ();\n");
460
461 /* The fourth operand of DEFINE_EXPAND is some code to be executed
462 before the actual construction.
463 This code expects to refer to `operands'
464 just as the output-code in a DEFINE_INSN does,
465 but here `operands' is an automatic array.
466 So copy the operand values there before executing it. */
467 if (XSTR (expand, 3) && *XSTR (expand, 3))
468 {
e2bef702
RH
469 printf (" {\n");
470 if (operands > 0 || max_dup_opno >= 0 || max_scratch_opno >= 0)
471 printf (" rtx operands[%d];\n",
472 MAX (operands, MAX (max_scratch_opno, max_dup_opno) + 1));
65963943
RK
473 /* Output code to copy the arguments into `operands'. */
474 for (i = 0; i < operands; i++)
e2bef702 475 printf (" operands[%d] = operand%d;\n", i, i);
65963943
RK
476
477 /* Output the special code to be executed before the sequence
478 is generated. */
479 printf ("%s\n", XSTR (expand, 3));
480
481 /* Output code to copy the arguments back out of `operands'
482 (unless we aren't going to use them at all). */
483 if (XVEC (expand, 1) != 0)
484 {
485 for (i = 0; i < operands; i++)
e2bef702 486 printf (" operand%d = operands[%d];\n", i, i);
65963943 487 for (; i <= max_dup_opno; i++)
e2bef702 488 printf (" operand%d = operands[%d];\n", i, i);
ede7cd44 489 for (; i <= max_scratch_opno; i++)
e2bef702 490 printf (" operand%d = operands[%d];\n", i, i);
65963943 491 }
e2bef702 492 printf (" }\n");
65963943
RK
493 }
494
495 /* Output code to construct the rtl for the instruction bodies.
496 Use emit_insn to add them to the sequence being accumulated.
497 But don't do this if the user's code has set `no_more' nonzero. */
498
499 for (i = 0; i < XVECLEN (expand, 1); i++)
500 {
501 rtx next = XVECEXP (expand, 1, i);
502 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
503 || (GET_CODE (next) == PARALLEL
504 && GET_CODE (XVECEXP (next, 0, 0)) == SET
505 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
506 || GET_CODE (next) == RETURN)
507 printf (" emit_jump_insn (");
508 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
509 || GET_CODE (next) == CALL
510 || (GET_CODE (next) == PARALLEL
511 && GET_CODE (XVECEXP (next, 0, 0)) == SET
512 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
513 || (GET_CODE (next) == PARALLEL
514 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
515 printf (" emit_call_insn (");
516 else if (GET_CODE (next) == CODE_LABEL)
517 printf (" emit_label (");
518 else if (GET_CODE (next) == MATCH_OPERAND
d3ca5cdd 519 || GET_CODE (next) == MATCH_DUP
65963943 520 || GET_CODE (next) == MATCH_OPERATOR
65963943 521 || GET_CODE (next) == MATCH_OP_DUP
d3ca5cdd
JW
522 || GET_CODE (next) == MATCH_PARALLEL
523 || GET_CODE (next) == MATCH_PAR_DUP
65963943
RK
524 || GET_CODE (next) == PARALLEL)
525 printf (" emit (");
526 else
527 printf (" emit_insn (");
ede7cd44 528 gen_exp (next, DEFINE_EXPAND);
65963943
RK
529 printf (");\n");
530 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
531 && GET_CODE (SET_SRC (next)) == LABEL_REF)
532 printf (" emit_barrier ();");
533 }
534
535 /* Call `gen_sequence' to make a SEQUENCE out of all the
536 insns emitted within this gen_... function. */
537
65963943 538 printf (" _val = gen_sequence ();\n");
65963943
RK
539 printf (" end_sequence ();\n");
540 printf (" return _val;\n}\n\n");
541}
542
543/* Like gen_expand, but generates a SEQUENCE. */
0f41302f 544
65963943
RK
545static void
546gen_split (split)
547 rtx split;
548{
549 register int i;
550 int operands;
c1b59dce 551 const char *name = "split";
ede7cd44
RH
552
553 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
554 name = "peephole2";
65963943
RK
555
556 if (XVEC (split, 0) == 0)
ede7cd44
RH
557 fatal ("define_%s (definition %d) lacks a pattern", name,
558 insn_index_number);
65963943 559 else if (XVEC (split, 2) == 0)
ede7cd44 560 fatal ("define_%s (definition %d) lacks a replacement pattern", name,
3462dc45 561 insn_index_number);
65963943
RK
562
563 /* Find out how many operands this function has. */
564
565 max_operand_vec (split, 2);
ede7cd44 566 operands = MAX (max_opno, MAX (max_dup_opno, max_scratch_opno)) + 1;
65963943 567
ede7cd44
RH
568 /* Output the prototype, function name and argument declarations. */
569 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
570 {
a94ae8f5 571 printf ("extern rtx gen_%s_%d PARAMS ((rtx, rtx *));\n",
ede7cd44
RH
572 name, insn_code_number);
573 printf ("rtx\ngen_%s_%d (curr_insn, operands)\n\
574 rtx curr_insn ATTRIBUTE_UNUSED;\n\
575 rtx *operands;\n",
576 name, insn_code_number);
577 }
578 else
579 {
a94ae8f5 580 printf ("extern rtx gen_split_%d PARAMS ((rtx *));\n", insn_code_number);
ede7cd44
RH
581 printf ("rtx\ngen_%s_%d (operands)\n rtx *operands;\n", name,
582 insn_code_number);
583 }
65963943
RK
584 printf ("{\n");
585
586 /* Declare all local variables. */
587 for (i = 0; i < operands; i++)
588 printf (" rtx operand%d;\n", i);
91afd8f5 589 printf (" rtx _val = 0;\n");
ede7cd44
RH
590
591 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
592 output_peephole2_scratches (split);
593
65963943
RK
594 printf (" start_sequence ();\n");
595
596 /* The fourth operand of DEFINE_SPLIT is some code to be executed
597 before the actual construction. */
598
599 if (XSTR (split, 3))
600 printf ("%s\n", XSTR (split, 3));
601
602 /* Output code to copy the arguments back out of `operands' */
603 for (i = 0; i < operands; i++)
604 printf (" operand%d = operands[%d];\n", i, i);
605
606 /* Output code to construct the rtl for the instruction bodies.
607 Use emit_insn to add them to the sequence being accumulated.
608 But don't do this if the user's code has set `no_more' nonzero. */
609
610 for (i = 0; i < XVECLEN (split, 2); i++)
611 {
612 rtx next = XVECEXP (split, 2, i);
613 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
614 || (GET_CODE (next) == PARALLEL
615 && GET_CODE (XVECEXP (next, 0, 0)) == SET
616 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
617 || GET_CODE (next) == RETURN)
618 printf (" emit_jump_insn (");
619 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
620 || GET_CODE (next) == CALL
621 || (GET_CODE (next) == PARALLEL
622 && GET_CODE (XVECEXP (next, 0, 0)) == SET
623 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
624 || (GET_CODE (next) == PARALLEL
625 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
626 printf (" emit_call_insn (");
627 else if (GET_CODE (next) == CODE_LABEL)
628 printf (" emit_label (");
629 else if (GET_CODE (next) == MATCH_OPERAND
630 || GET_CODE (next) == MATCH_OPERATOR
631 || GET_CODE (next) == MATCH_PARALLEL
632 || GET_CODE (next) == MATCH_OP_DUP
633 || GET_CODE (next) == MATCH_DUP
634 || GET_CODE (next) == PARALLEL)
635 printf (" emit (");
636 else
637 printf (" emit_insn (");
ede7cd44 638 gen_exp (next, GET_CODE (split));
65963943
RK
639 printf (");\n");
640 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
641 && GET_CODE (SET_SRC (next)) == LABEL_REF)
642 printf (" emit_barrier ();");
643 }
644
645 /* Call `gen_sequence' to make a SEQUENCE out of all the
646 insns emitted within this gen_... function. */
647
65963943 648 printf (" _val = gen_sequence ();\n");
65963943
RK
649 printf (" end_sequence ();\n");
650 printf (" return _val;\n}\n\n");
651}
652\f
653/* Write a function, `add_clobbers', that is given a PARALLEL of sufficient
654 size for the insn and an INSN_CODE, and inserts the required CLOBBERs at
655 the end of the vector. */
656
657static void
658output_add_clobbers ()
659{
660 struct clobber_pat *clobber;
e5f6a288 661 struct clobber_ent *ent;
65963943
RK
662 int i;
663
664 printf ("\n\nvoid\nadd_clobbers (pattern, insn_code_number)\n");
665 printf (" rtx pattern;\n int insn_code_number;\n");
666 printf ("{\n");
65963943
RK
667 printf (" switch (insn_code_number)\n");
668 printf (" {\n");
669
670 for (clobber = clobber_list; clobber; clobber = clobber->next)
671 {
e5f6a288
RK
672 for (ent = clobber->insns; ent; ent = ent->next)
673 printf (" case %d:\n", ent->code_number);
65963943
RK
674
675 for (i = clobber->first_clobber; i < XVECLEN (clobber->pattern, 1); i++)
676 {
677 printf (" XVECEXP (pattern, 0, %d) = ", i);
ede7cd44
RH
678 gen_exp (XVECEXP (clobber->pattern, 1, i),
679 GET_CODE (clobber->pattern));
65963943
RK
680 printf (";\n");
681 }
682
e5f6a288 683 printf (" break;\n\n");
65963943
RK
684 }
685
686 printf (" default:\n");
687 printf (" abort ();\n");
688 printf (" }\n");
689 printf ("}\n");
690}
691\f
ede7cd44
RH
692/* Generate code to invoke find_free_register () as needed for the
693 scratch registers used by the peephole2 pattern in SPLIT. */
694
695static void
696output_peephole2_scratches (split)
697 rtx split;
698{
699 int i;
700 int insn_nr = 0;
701
ede7cd44 702 printf (" HARD_REG_SET _regs_allocated;\n");
ede7cd44
RH
703 printf (" CLEAR_HARD_REG_SET (_regs_allocated);\n");
704
705 for (i = 0; i < XVECLEN (split, 0); i++)
706 {
707 rtx elt = XVECEXP (split, 0, i);
708 if (GET_CODE (elt) == MATCH_SCRATCH)
709 {
710 int last_insn_nr = insn_nr;
711 int cur_insn_nr = insn_nr;
712 int j;
713 for (j = i + 1; j < XVECLEN (split, 0); j++)
714 if (GET_CODE (XVECEXP (split, 0, j)) == MATCH_DUP)
715 {
716 if (XINT (XVECEXP (split, 0, j), 0) == XINT (elt, 0))
717 last_insn_nr = cur_insn_nr;
718 }
719 else if (GET_CODE (XVECEXP (split, 0, j)) != MATCH_SCRATCH)
720 cur_insn_nr++;
23280139
RH
721
722 printf (" if ((operands[%d] = peep2_find_free_register (%d, %d, \"%s\", %smode, &_regs_allocated)) == NULL_RTX)\n\
ede7cd44
RH
723 return NULL;\n",
724 XINT (elt, 0),
23280139 725 insn_nr, last_insn_nr,
ede7cd44
RH
726 XSTR (elt, 1),
727 GET_MODE_NAME (GET_MODE (elt)));
728
729 }
730 else if (GET_CODE (elt) != MATCH_DUP)
731 insn_nr++;
732 }
733}
65963943 734
a94ae8f5 735extern int main PARAMS ((int, char **));
c1b59dce 736
65963943
RK
737int
738main (argc, argv)
739 int argc;
740 char **argv;
741{
742 rtx desc;
65963943 743
f8b6598e 744 progname = "genemit";
65963943
RK
745
746 if (argc <= 1)
747 fatal ("No input file name.");
748
c88c0d42
CP
749 if (init_md_reader (argv[1]) != SUCCESS_EXIT_CODE)
750 return (FATAL_EXIT_CODE);
65963943 751
65963943
RK
752 /* Assign sequential codes to all entries in the machine description
753 in parallel with the tables in insn-output.c. */
754
755 insn_code_number = 0;
756 insn_index_number = 0;
757
758 printf ("/* Generated automatically by the program `genemit'\n\
759from the machine description file `md'. */\n\n");
760
761 printf ("#include \"config.h\"\n");
729da3f5 762 printf ("#include \"system.h\"\n");
65963943 763 printf ("#include \"rtl.h\"\n");
6baf1cc8 764 printf ("#include \"tm_p.h\"\n");
49ad7cfa 765 printf ("#include \"function.h\"\n");
65963943
RK
766 printf ("#include \"expr.h\"\n");
767 printf ("#include \"real.h\"\n");
1d300e19 768 printf ("#include \"flags.h\"\n");
65963943 769 printf ("#include \"output.h\"\n");
7f7f8214
KG
770 printf ("#include \"insn-config.h\"\n");
771 printf ("#include \"insn-flags.h\"\n");
772 printf ("#include \"insn-codes.h\"\n");
ede7cd44 773 printf ("#include \"hard-reg-set.h\"\n");
23280139 774 printf ("#include \"recog.h\"\n");
ede7cd44 775 printf ("#include \"resource.h\"\n");
7f7f8214 776 printf ("#include \"reload.h\"\n\n");
53bfe9cd
JC
777 printf ("#define FAIL return (end_sequence (), _val)\n");
778 printf ("#define DONE return (_val = gen_sequence (), end_sequence (), _val)\n");
65963943
RK
779
780 /* Read the machine description. */
781
782 while (1)
783 {
c88c0d42 784 int line_no;
65963943 785
c88c0d42
CP
786 desc = read_md_rtx (&line_no, &insn_code_number);
787 if (desc == NULL)
788 break;
ede7cd44 789
c88c0d42 790 switch (GET_CODE (desc))
65963943 791 {
c88c0d42
CP
792 case DEFINE_INSN:
793 gen_insn (desc);
794 break;
795
796 case DEFINE_EXPAND:
797 gen_expand (desc);
798 break;
799
800 case DEFINE_SPLIT:
801 gen_split (desc);
802 break;
803
804 case DEFINE_PEEPHOLE2:
805 gen_split (desc);
806 break;
807
808 default:
809 break;
810 }
65963943
RK
811 ++insn_index_number;
812 }
813
814 /* Write out the routine to add CLOBBERs to a pattern. */
815 output_add_clobbers ();
816
65963943 817 fflush (stdout);
c1b59dce 818 return (ferror (stdout) != 0 ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
65963943 819}
a995e389
RH
820
821/* Define this so we can link with print-rtl.o to get debug_rtx function. */
822const char *
823get_insn_name (code)
c1b59dce 824 int code ATTRIBUTE_UNUSED;
a995e389
RH
825{
826 return NULL;
827}