]>
Commit | Line | Data |
---|---|---|
0bb604ca | 1 | /* If-conversion support. |
3aea1f79 | 2 | Copyright (C) 2000-2014 Free Software Foundation, Inc. |
0bb604ca | 3 | |
f12b58b3 | 4 | This file is part of GCC. |
0bb604ca | 5 | |
f12b58b3 | 6 | GCC is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by | |
8c4c00c1 | 8 | the Free Software Foundation; either version 3, or (at your option) |
0bb604ca | 9 | any later version. |
10 | ||
f12b58b3 | 11 | GCC is distributed in the hope that it will be useful, but WITHOUT |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
14 | License for more details. | |
0bb604ca | 15 | |
16 | You should have received a copy of the GNU General Public License | |
8c4c00c1 | 17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
0bb604ca | 19 | |
20 | #include "config.h" | |
21 | #include "system.h" | |
805e22b2 | 22 | #include "coretypes.h" |
23 | #include "tm.h" | |
0bb604ca | 24 | |
25 | #include "rtl.h" | |
26 | #include "regs.h" | |
a3020f2f | 27 | #include "hashtab.h" |
28 | #include "hash-set.h" | |
29 | #include "vec.h" | |
30 | #include "machmode.h" | |
31 | #include "hard-reg-set.h" | |
32 | #include "input.h" | |
0bb604ca | 33 | #include "function.h" |
34 | #include "flags.h" | |
35 | #include "insn-config.h" | |
36 | #include "recog.h" | |
fe70d0e3 | 37 | #include "except.h" |
94ea8568 | 38 | #include "predict.h" |
39 | #include "dominance.h" | |
40 | #include "cfg.h" | |
41 | #include "cfgrtl.h" | |
42 | #include "cfganal.h" | |
43 | #include "cfgcleanup.h" | |
0bb604ca | 44 | #include "basic-block.h" |
45 | #include "expr.h" | |
46 | #include "output.h" | |
34517c64 | 47 | #include "insn-codes.h" |
8ed073f5 | 48 | #include "optabs.h" |
0b205f4c | 49 | #include "diagnostic-core.h" |
0bb604ca | 50 | #include "tm_p.h" |
7f42fe24 | 51 | #include "cfgloop.h" |
a844986a | 52 | #include "target.h" |
77fce4cd | 53 | #include "tree-pass.h" |
3072d30e | 54 | #include "df.h" |
4ff06051 | 55 | #include "dbgcnt.h" |
ee828140 | 56 | #include "shrink-wrap.h" |
e5a23585 | 57 | #include "ifcvt.h" |
0bb604ca | 58 | |
0bb604ca | 59 | #ifndef HAVE_conditional_move |
60 | #define HAVE_conditional_move 0 | |
61 | #endif | |
62 | #ifndef HAVE_incscc | |
63 | #define HAVE_incscc 0 | |
64 | #endif | |
65 | #ifndef HAVE_decscc | |
66 | #define HAVE_decscc 0 | |
67 | #endif | |
10a2674d | 68 | #ifndef HAVE_trap |
69 | #define HAVE_trap 0 | |
70 | #endif | |
0bb604ca | 71 | |
72 | #ifndef MAX_CONDITIONAL_EXECUTE | |
4a9d7ef7 | 73 | #define MAX_CONDITIONAL_EXECUTE \ |
74 | (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \ | |
75 | + 1) | |
0bb604ca | 76 | #endif |
77 | ||
3072d30e | 78 | #define IFCVT_MULTIPLE_DUMPS 1 |
79 | ||
cd665a06 | 80 | #define NULL_BLOCK ((basic_block) NULL) |
0bb604ca | 81 | |
abd03efe | 82 | /* True if after combine pass. */ |
83 | static bool ifcvt_after_combine; | |
84 | ||
0bb604ca | 85 | /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */ |
86 | static int num_possible_if_blocks; | |
87 | ||
88 | /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional | |
89 | execution. */ | |
90 | static int num_updated_if_blocks; | |
91 | ||
3072d30e | 92 | /* # of changes made. */ |
bdce7739 | 93 | static int num_true_changes; |
0bb604ca | 94 | |
1d855d4c | 95 | /* Whether conditional execution changes were made. */ |
96 | static int cond_exec_changed_p; | |
97 | ||
0bb604ca | 98 | /* Forward references. */ |
7ecb5bb2 | 99 | static int count_bb_insns (const_basic_block); |
0217cfff | 100 | static bool cheap_bb_rtx_cost_p (const_basic_block, int, int); |
ca0df1e3 | 101 | static rtx_insn *first_active_insn (basic_block); |
102 | static rtx_insn *last_active_insn (basic_block, int); | |
4cd001d5 | 103 | static rtx_insn *find_active_insn_before (basic_block, rtx_insn *); |
104 | static rtx_insn *find_active_insn_after (basic_block, rtx_insn *); | |
952f0048 | 105 | static basic_block block_fallthru (basic_block); |
4cd001d5 | 106 | static int cond_exec_process_insns (ce_if_block *, rtx_insn *, rtx, rtx, int, |
107 | int); | |
93ee8dfb | 108 | static rtx cond_exec_get_condition (rtx_insn *); |
2d650f54 | 109 | static rtx noce_get_condition (rtx_insn *, rtx_insn **, bool); |
7ecb5bb2 | 110 | static int noce_operand_ok (const_rtx); |
b3e7c666 | 111 | static void merge_if_block (ce_if_block *); |
952f0048 | 112 | static int find_cond_trap (basic_block, edge, edge); |
113 | static basic_block find_if_header (basic_block, int); | |
114 | static int block_jumps_and_fallthru_p (basic_block, basic_block); | |
03dbd7cc | 115 | static int noce_find_if_block (basic_block, edge, edge, int); |
b3e7c666 | 116 | static int cond_exec_find_if_block (ce_if_block *); |
952f0048 | 117 | static int find_if_case_1 (basic_block, edge, edge); |
118 | static int find_if_case_2 (basic_block, edge, edge); | |
952f0048 | 119 | static int dead_or_predicable (basic_block, basic_block, basic_block, |
4115ac36 | 120 | edge, int); |
952f0048 | 121 | static void noce_emit_move_insn (rtx, rtx); |
ca0df1e3 | 122 | static rtx_insn *block_has_only_trap (basic_block); |
0bb604ca | 123 | \f |
124 | /* Count the number of non-jump active insns in BB. */ | |
125 | ||
126 | static int | |
7ecb5bb2 | 127 | count_bb_insns (const_basic_block bb) |
0bb604ca | 128 | { |
129 | int count = 0; | |
ca0df1e3 | 130 | rtx_insn *insn = BB_HEAD (bb); |
0bb604ca | 131 | |
132 | while (1) | |
133 | { | |
177a616b | 134 | if (active_insn_p (insn) && !JUMP_P (insn)) |
0bb604ca | 135 | count++; |
136 | ||
5496dbfc | 137 | if (insn == BB_END (bb)) |
0bb604ca | 138 | break; |
139 | insn = NEXT_INSN (insn); | |
140 | } | |
141 | ||
142 | return count; | |
143 | } | |
144 | ||
6c4193b5 | 145 | /* Determine whether the total insn_rtx_cost on non-jump insns in |
146 | basic block BB is less than MAX_COST. This function returns | |
0217cfff | 147 | false if the cost of any instruction could not be estimated. |
148 | ||
149 | The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE | |
150 | as those insns are being speculated. MAX_COST is scaled with SCALE | |
151 | plus a small fudge factor. */ | |
6c01453c | 152 | |
6c4193b5 | 153 | static bool |
0217cfff | 154 | cheap_bb_rtx_cost_p (const_basic_block bb, int scale, int max_cost) |
6c01453c | 155 | { |
156 | int count = 0; | |
ca0df1e3 | 157 | rtx_insn *insn = BB_HEAD (bb); |
f529eb25 | 158 | bool speed = optimize_bb_for_speed_p (bb); |
6c01453c | 159 | |
abd03efe | 160 | /* Set scale to REG_BR_PROB_BASE to void the identical scaling |
161 | applied to insn_rtx_cost when optimizing for size. Only do | |
162 | this after combine because if-conversion might interfere with | |
163 | passes before combine. | |
164 | ||
165 | Use optimize_function_for_speed_p instead of the pre-defined | |
166 | variable speed to make sure it is set to same value for all | |
167 | basic blocks in one if-conversion transformation. */ | |
168 | if (!optimize_function_for_speed_p (cfun) && ifcvt_after_combine) | |
169 | scale = REG_BR_PROB_BASE; | |
0217cfff | 170 | /* Our branch probability/scaling factors are just estimates and don't |
171 | account for cases where we can get speculation for free and other | |
172 | secondary benefits. So we fudge the scale factor to make speculating | |
abd03efe | 173 | appear a little more profitable when optimizing for performance. */ |
174 | else | |
175 | scale += REG_BR_PROB_BASE / 8; | |
176 | ||
177 | ||
0217cfff | 178 | max_cost *= scale; |
179 | ||
6c01453c | 180 | while (1) |
181 | { | |
0a8a047c | 182 | if (NONJUMP_INSN_P (insn)) |
183 | { | |
0217cfff | 184 | int cost = insn_rtx_cost (PATTERN (insn), speed) * REG_BR_PROB_BASE; |
0a8a047c | 185 | if (cost == 0) |
6c4193b5 | 186 | return false; |
187 | ||
188 | /* If this instruction is the load or set of a "stack" register, | |
189 | such as a floating point register on x87, then the cost of | |
8b5eeb90 | 190 | speculatively executing this insn may need to include |
191 | the additional cost of popping its result off of the | |
192 | register stack. Unfortunately, correctly recognizing and | |
193 | accounting for this additional overhead is tricky, so for | |
194 | now we simply prohibit such speculative execution. */ | |
6c4193b5 | 195 | #ifdef STACK_REGS |
196 | { | |
197 | rtx set = single_set (insn); | |
198 | if (set && STACK_REG_P (SET_DEST (set))) | |
8b5eeb90 | 199 | return false; |
6c4193b5 | 200 | } |
201 | #endif | |
202 | ||
0a8a047c | 203 | count += cost; |
6c4193b5 | 204 | if (count >= max_cost) |
205 | return false; | |
0a8a047c | 206 | } |
207 | else if (CALL_P (insn)) | |
6c4193b5 | 208 | return false; |
e592f6ea | 209 | |
6c01453c | 210 | if (insn == BB_END (bb)) |
211 | break; | |
212 | insn = NEXT_INSN (insn); | |
213 | } | |
214 | ||
6c4193b5 | 215 | return true; |
6c01453c | 216 | } |
217 | ||
0bb604ca | 218 | /* Return the first non-jump active insn in the basic block. */ |
219 | ||
ca0df1e3 | 220 | static rtx_insn * |
952f0048 | 221 | first_active_insn (basic_block bb) |
0bb604ca | 222 | { |
ca0df1e3 | 223 | rtx_insn *insn = BB_HEAD (bb); |
0bb604ca | 224 | |
6d7dc5b9 | 225 | if (LABEL_P (insn)) |
0bb604ca | 226 | { |
5496dbfc | 227 | if (insn == BB_END (bb)) |
ca0df1e3 | 228 | return NULL; |
0bb604ca | 229 | insn = NEXT_INSN (insn); |
230 | } | |
231 | ||
9845d120 | 232 | while (NOTE_P (insn) || DEBUG_INSN_P (insn)) |
0bb604ca | 233 | { |
5496dbfc | 234 | if (insn == BB_END (bb)) |
ca0df1e3 | 235 | return NULL; |
0bb604ca | 236 | insn = NEXT_INSN (insn); |
237 | } | |
238 | ||
6d7dc5b9 | 239 | if (JUMP_P (insn)) |
ca0df1e3 | 240 | return NULL; |
0bb604ca | 241 | |
242 | return insn; | |
243 | } | |
244 | ||
1d855d4c | 245 | /* Return the last non-jump active (non-jump) insn in the basic block. */ |
0bb604ca | 246 | |
ca0df1e3 | 247 | static rtx_insn * |
952f0048 | 248 | last_active_insn (basic_block bb, int skip_use_p) |
0bb604ca | 249 | { |
ca0df1e3 | 250 | rtx_insn *insn = BB_END (bb); |
251 | rtx_insn *head = BB_HEAD (bb); | |
1d855d4c | 252 | |
6d7dc5b9 | 253 | while (NOTE_P (insn) |
254 | || JUMP_P (insn) | |
9845d120 | 255 | || DEBUG_INSN_P (insn) |
1d855d4c | 256 | || (skip_use_p |
6d7dc5b9 | 257 | && NONJUMP_INSN_P (insn) |
1d855d4c | 258 | && GET_CODE (PATTERN (insn)) == USE)) |
0bb604ca | 259 | { |
1d855d4c | 260 | if (insn == head) |
ca0df1e3 | 261 | return NULL; |
1d855d4c | 262 | insn = PREV_INSN (insn); |
0bb604ca | 263 | } |
0bb604ca | 264 | |
6d7dc5b9 | 265 | if (LABEL_P (insn)) |
ca0df1e3 | 266 | return NULL; |
1d855d4c | 267 | |
268 | return insn; | |
0bb604ca | 269 | } |
a9a81f26 | 270 | |
7f91ac8e | 271 | /* Return the active insn before INSN inside basic block CURR_BB. */ |
272 | ||
4cd001d5 | 273 | static rtx_insn * |
274 | find_active_insn_before (basic_block curr_bb, rtx_insn *insn) | |
7f91ac8e | 275 | { |
276 | if (!insn || insn == BB_HEAD (curr_bb)) | |
4cd001d5 | 277 | return NULL; |
7f91ac8e | 278 | |
279 | while ((insn = PREV_INSN (insn)) != NULL_RTX) | |
280 | { | |
281 | if (NONJUMP_INSN_P (insn) || JUMP_P (insn) || CALL_P (insn)) | |
282 | break; | |
283 | ||
284 | /* No other active insn all the way to the start of the basic block. */ | |
285 | if (insn == BB_HEAD (curr_bb)) | |
4cd001d5 | 286 | return NULL; |
7f91ac8e | 287 | } |
288 | ||
289 | return insn; | |
290 | } | |
291 | ||
292 | /* Return the active insn after INSN inside basic block CURR_BB. */ | |
293 | ||
4cd001d5 | 294 | static rtx_insn * |
295 | find_active_insn_after (basic_block curr_bb, rtx_insn *insn) | |
7f91ac8e | 296 | { |
297 | if (!insn || insn == BB_END (curr_bb)) | |
4cd001d5 | 298 | return NULL; |
7f91ac8e | 299 | |
300 | while ((insn = NEXT_INSN (insn)) != NULL_RTX) | |
301 | { | |
302 | if (NONJUMP_INSN_P (insn) || JUMP_P (insn) || CALL_P (insn)) | |
303 | break; | |
304 | ||
305 | /* No other active insn all the way to the end of the basic block. */ | |
306 | if (insn == BB_END (curr_bb)) | |
4cd001d5 | 307 | return NULL; |
7f91ac8e | 308 | } |
309 | ||
310 | return insn; | |
311 | } | |
312 | ||
672b9f24 | 313 | /* Return the basic block reached by falling though the basic block BB. */ |
1d855d4c | 314 | |
315 | static basic_block | |
952f0048 | 316 | block_fallthru (basic_block bb) |
1d855d4c | 317 | { |
7f58c05e | 318 | edge e = find_fallthru_edge (bb->succs); |
1d855d4c | 319 | |
320 | return (e) ? e->dest : NULL_BLOCK; | |
321 | } | |
f07f6526 | 322 | |
323 | /* Return true if RTXs A and B can be safely interchanged. */ | |
324 | ||
325 | static bool | |
326 | rtx_interchangeable_p (const_rtx a, const_rtx b) | |
327 | { | |
328 | if (!rtx_equal_p (a, b)) | |
329 | return false; | |
330 | ||
331 | if (GET_CODE (a) != MEM) | |
332 | return true; | |
333 | ||
334 | /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory | |
335 | reference is not. Interchanging a dead type-unsafe memory reference with | |
336 | a live type-safe one creates a live type-unsafe memory reference, in other | |
337 | words, it makes the program illegal. | |
338 | We check here conservatively whether the two memory references have equal | |
339 | memory attributes. */ | |
340 | ||
341 | return mem_attrs_eq_p (get_mem_attrs (a), get_mem_attrs (b)); | |
342 | } | |
343 | ||
0bb604ca | 344 | \f |
345 | /* Go through a bunch of insns, converting them to conditional | |
346 | execution format if possible. Return TRUE if all of the non-note | |
347 | insns were processed. */ | |
348 | ||
349 | static int | |
b3e7c666 | 350 | cond_exec_process_insns (ce_if_block *ce_info ATTRIBUTE_UNUSED, |
4cd001d5 | 351 | /* if block information */rtx_insn *start, |
952f0048 | 352 | /* first insn to look at */rtx end, |
353 | /* last insn to look at */rtx test, | |
9eb946de | 354 | /* conditional execution test */int prob_val, |
952f0048 | 355 | /* probability of branch taken. */int mod_ok) |
0bb604ca | 356 | { |
357 | int must_be_last = FALSE; | |
4cd001d5 | 358 | rtx_insn *insn; |
1d855d4c | 359 | rtx xtest; |
7efd6cf1 | 360 | rtx pattern; |
0bb604ca | 361 | |
1d855d4c | 362 | if (!start || !end) |
363 | return FALSE; | |
364 | ||
0bb604ca | 365 | for (insn = start; ; insn = NEXT_INSN (insn)) |
366 | { | |
79d8d931 | 367 | /* dwarf2out can't cope with conditional prologues. */ |
368 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_PROLOGUE_END) | |
369 | return FALSE; | |
370 | ||
9845d120 | 371 | if (NOTE_P (insn) || DEBUG_INSN_P (insn)) |
0bb604ca | 372 | goto insn_done; |
373 | ||
9af5ce0c | 374 | gcc_assert (NONJUMP_INSN_P (insn) || CALL_P (insn)); |
0bb604ca | 375 | |
c1afeae3 | 376 | /* dwarf2out can't cope with conditional unwind info. */ |
97e155b1 | 377 | if (RTX_FRAME_RELATED_P (insn)) |
378 | return FALSE; | |
379 | ||
6e71ac22 | 380 | /* Remove USE insns that get in the way. */ |
381 | if (reload_completed && GET_CODE (PATTERN (insn)) == USE) | |
c56d0c14 | 382 | { |
952f0048 | 383 | /* ??? Ug. Actually unlinking the thing is problematic, |
c56d0c14 | 384 | given what we'd have to coordinate with our callers. */ |
7bd3dcc4 | 385 | SET_INSN_DELETED (insn); |
c56d0c14 | 386 | goto insn_done; |
387 | } | |
388 | ||
0bb604ca | 389 | /* Last insn wasn't last? */ |
390 | if (must_be_last) | |
391 | return FALSE; | |
392 | ||
393 | if (modified_in_p (test, insn)) | |
394 | { | |
395 | if (!mod_ok) | |
396 | return FALSE; | |
397 | must_be_last = TRUE; | |
398 | } | |
399 | ||
400 | /* Now build the conditional form of the instruction. */ | |
7efd6cf1 | 401 | pattern = PATTERN (insn); |
1d855d4c | 402 | xtest = copy_rtx (test); |
403 | ||
404 | /* If this is already a COND_EXEC, rewrite the test to be an AND of the | |
405 | two conditions. */ | |
406 | if (GET_CODE (pattern) == COND_EXEC) | |
407 | { | |
408 | if (GET_MODE (xtest) != GET_MODE (COND_EXEC_TEST (pattern))) | |
409 | return FALSE; | |
410 | ||
411 | xtest = gen_rtx_AND (GET_MODE (xtest), xtest, | |
412 | COND_EXEC_TEST (pattern)); | |
413 | pattern = COND_EXEC_CODE (pattern); | |
414 | } | |
415 | ||
416 | pattern = gen_rtx_COND_EXEC (VOIDmode, xtest, pattern); | |
7efd6cf1 | 417 | |
418 | /* If the machine needs to modify the insn being conditionally executed, | |
419 | say for example to force a constant integer operand into a temp | |
420 | register, do so here. */ | |
421 | #ifdef IFCVT_MODIFY_INSN | |
1d855d4c | 422 | IFCVT_MODIFY_INSN (ce_info, pattern, insn); |
7efd6cf1 | 423 | if (! pattern) |
424 | return FALSE; | |
425 | #endif | |
426 | ||
1d855d4c | 427 | validate_change (insn, &PATTERN (insn), pattern, 1); |
0bb604ca | 428 | |
9eb946de | 429 | if (CALL_P (insn) && prob_val >= 0) |
f7785736 | 430 | validate_change (insn, ®_NOTES (insn), |
3754d046 | 431 | gen_rtx_INT_LIST ((machine_mode) REG_BR_PROB, |
9eb946de | 432 | prob_val, REG_NOTES (insn)), 1); |
f7785736 | 433 | |
0bb604ca | 434 | insn_done: |
435 | if (insn == end) | |
436 | break; | |
437 | } | |
438 | ||
439 | return TRUE; | |
440 | } | |
441 | ||
442 | /* Return the condition for a jump. Do not do any special processing. */ | |
443 | ||
444 | static rtx | |
93ee8dfb | 445 | cond_exec_get_condition (rtx_insn *jump) |
0bb604ca | 446 | { |
447 | rtx test_if, cond; | |
448 | ||
b2816317 | 449 | if (any_condjump_p (jump)) |
b9988262 | 450 | test_if = SET_SRC (pc_set (jump)); |
0bb604ca | 451 | else |
452 | return NULL_RTX; | |
453 | cond = XEXP (test_if, 0); | |
454 | ||
455 | /* If this branches to JUMP_LABEL when the condition is false, | |
456 | reverse the condition. */ | |
457 | if (GET_CODE (XEXP (test_if, 2)) == LABEL_REF | |
b49f2e4b | 458 | && LABEL_REF_LABEL (XEXP (test_if, 2)) == JUMP_LABEL (jump)) |
4bf64bbb | 459 | { |
460 | enum rtx_code rev = reversed_comparison_code (cond, jump); | |
461 | if (rev == UNKNOWN) | |
462 | return NULL_RTX; | |
463 | ||
464 | cond = gen_rtx_fmt_ee (rev, GET_MODE (cond), XEXP (cond, 0), | |
465 | XEXP (cond, 1)); | |
466 | } | |
0bb604ca | 467 | |
468 | return cond; | |
469 | } | |
470 | ||
471 | /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it | |
472 | to conditional execution. Return TRUE if we were successful at | |
d30e015b | 473 | converting the block. */ |
0bb604ca | 474 | |
475 | static int | |
b3e7c666 | 476 | cond_exec_process_if_block (ce_if_block * ce_info, |
952f0048 | 477 | /* if block information */int do_multiple_p) |
0bb604ca | 478 | { |
1d855d4c | 479 | basic_block test_bb = ce_info->test_bb; /* last test block */ |
480 | basic_block then_bb = ce_info->then_bb; /* THEN */ | |
481 | basic_block else_bb = ce_info->else_bb; /* ELSE or NULL */ | |
0bb604ca | 482 | rtx test_expr; /* expression in IF_THEN_ELSE that is tested */ |
4cd001d5 | 483 | rtx_insn *then_start; /* first insn in THEN block */ |
484 | rtx_insn *then_end; /* last insn + 1 in THEN block */ | |
485 | rtx_insn *else_start = NULL; /* first insn in ELSE block or NULL */ | |
486 | rtx_insn *else_end = NULL; /* last insn + 1 in ELSE block */ | |
7299020b | 487 | int max; /* max # of insns to convert. */ |
0bb604ca | 488 | int then_mod_ok; /* whether conditional mods are ok in THEN */ |
489 | rtx true_expr; /* test for else block insns */ | |
490 | rtx false_expr; /* test for then block insns */ | |
9eb946de | 491 | int true_prob_val; /* probability of else block */ |
492 | int false_prob_val; /* probability of then block */ | |
c093ac49 | 493 | rtx_insn *then_last_head = NULL; /* Last match at the head of THEN */ |
494 | rtx_insn *else_last_head = NULL; /* Last match at the head of ELSE */ | |
495 | rtx_insn *then_first_tail = NULL; /* First match at the tail of THEN */ | |
496 | rtx_insn *else_first_tail = NULL; /* First match at the tail of ELSE */ | |
84c471f5 | 497 | int then_n_insns, else_n_insns, n_insns; |
4bf64bbb | 498 | enum rtx_code false_code; |
9eb946de | 499 | rtx note; |
0bb604ca | 500 | |
1d855d4c | 501 | /* If test is comprised of && or || elements, and we've failed at handling |
502 | all of them together, just use the last test if it is the special case of | |
503 | && elements without an ELSE block. */ | |
504 | if (!do_multiple_p && ce_info->num_multiple_test_blocks) | |
505 | { | |
506 | if (else_bb || ! ce_info->and_and_p) | |
507 | return FALSE; | |
508 | ||
509 | ce_info->test_bb = test_bb = ce_info->last_test_bb; | |
510 | ce_info->num_multiple_test_blocks = 0; | |
511 | ce_info->num_and_and_blocks = 0; | |
512 | ce_info->num_or_or_blocks = 0; | |
513 | } | |
514 | ||
0bb604ca | 515 | /* Find the conditional jump to the ELSE or JOIN part, and isolate |
516 | the test. */ | |
5496dbfc | 517 | test_expr = cond_exec_get_condition (BB_END (test_bb)); |
0bb604ca | 518 | if (! test_expr) |
519 | return FALSE; | |
520 | ||
2580b9b6 | 521 | /* If the conditional jump is more than just a conditional jump, |
522 | then we can not do conditional execution conversion on this block. */ | |
5496dbfc | 523 | if (! onlyjump_p (BB_END (test_bb))) |
2580b9b6 | 524 | return FALSE; |
525 | ||
1d855d4c | 526 | /* Collect the bounds of where we're to search, skipping any labels, jumps |
527 | and notes at the beginning and end of the block. Then count the total | |
528 | number of insns and see if it is small enough to convert. */ | |
529 | then_start = first_active_insn (then_bb); | |
530 | then_end = last_active_insn (then_bb, TRUE); | |
84c471f5 | 531 | then_n_insns = ce_info->num_then_insns = count_bb_insns (then_bb); |
532 | n_insns = then_n_insns; | |
1d855d4c | 533 | max = MAX_CONDITIONAL_EXECUTE; |
0bb604ca | 534 | |
535 | if (else_bb) | |
536 | { | |
84c471f5 | 537 | int n_matching; |
538 | ||
1d855d4c | 539 | max *= 2; |
540 | else_start = first_active_insn (else_bb); | |
541 | else_end = last_active_insn (else_bb, TRUE); | |
84c471f5 | 542 | else_n_insns = ce_info->num_else_insns = count_bb_insns (else_bb); |
543 | n_insns += else_n_insns; | |
544 | ||
545 | /* Look for matching sequences at the head and tail of the two blocks, | |
546 | and limit the range of insns to be converted if possible. */ | |
547 | n_matching = flow_find_cross_jump (then_bb, else_bb, | |
764aef11 | 548 | &then_first_tail, &else_first_tail, |
549 | NULL); | |
84c471f5 | 550 | if (then_first_tail == BB_HEAD (then_bb)) |
4cd001d5 | 551 | then_start = then_end = NULL; |
84c471f5 | 552 | if (else_first_tail == BB_HEAD (else_bb)) |
4cd001d5 | 553 | else_start = else_end = NULL; |
84c471f5 | 554 | |
555 | if (n_matching > 0) | |
556 | { | |
557 | if (then_end) | |
7f91ac8e | 558 | then_end = find_active_insn_before (then_bb, then_first_tail); |
84c471f5 | 559 | if (else_end) |
7f91ac8e | 560 | else_end = find_active_insn_before (else_bb, else_first_tail); |
84c471f5 | 561 | n_insns -= 2 * n_matching; |
562 | } | |
563 | ||
964c7827 | 564 | if (then_start |
565 | && else_start | |
566 | && then_n_insns > n_matching | |
567 | && else_n_insns > n_matching) | |
84c471f5 | 568 | { |
569 | int longest_match = MIN (then_n_insns - n_matching, | |
570 | else_n_insns - n_matching); | |
571 | n_matching | |
572 | = flow_find_head_matching_sequence (then_bb, else_bb, | |
573 | &then_last_head, | |
574 | &else_last_head, | |
575 | longest_match); | |
576 | ||
577 | if (n_matching > 0) | |
578 | { | |
4cd001d5 | 579 | rtx_insn *insn; |
84c471f5 | 580 | |
581 | /* We won't pass the insns in the head sequence to | |
582 | cond_exec_process_insns, so we need to test them here | |
583 | to make sure that they don't clobber the condition. */ | |
584 | for (insn = BB_HEAD (then_bb); | |
585 | insn != NEXT_INSN (then_last_head); | |
586 | insn = NEXT_INSN (insn)) | |
587 | if (!LABEL_P (insn) && !NOTE_P (insn) | |
588 | && !DEBUG_INSN_P (insn) | |
589 | && modified_in_p (test_expr, insn)) | |
590 | return FALSE; | |
591 | } | |
592 | ||
593 | if (then_last_head == then_end) | |
4cd001d5 | 594 | then_start = then_end = NULL; |
84c471f5 | 595 | if (else_last_head == else_end) |
4cd001d5 | 596 | else_start = else_end = NULL; |
84c471f5 | 597 | |
598 | if (n_matching > 0) | |
599 | { | |
600 | if (then_start) | |
7f91ac8e | 601 | then_start = find_active_insn_after (then_bb, then_last_head); |
84c471f5 | 602 | if (else_start) |
7f91ac8e | 603 | else_start = find_active_insn_after (else_bb, else_last_head); |
84c471f5 | 604 | n_insns -= 2 * n_matching; |
605 | } | |
606 | } | |
0bb604ca | 607 | } |
608 | ||
0bb604ca | 609 | if (n_insns > max) |
610 | return FALSE; | |
611 | ||
612 | /* Map test_expr/test_jump into the appropriate MD tests to use on | |
613 | the conditionally executed code. */ | |
952f0048 | 614 | |
0bb604ca | 615 | true_expr = test_expr; |
4bf64bbb | 616 | |
5496dbfc | 617 | false_code = reversed_comparison_code (true_expr, BB_END (test_bb)); |
4bf64bbb | 618 | if (false_code != UNKNOWN) |
619 | false_expr = gen_rtx_fmt_ee (false_code, GET_MODE (true_expr), | |
620 | XEXP (true_expr, 0), XEXP (true_expr, 1)); | |
621 | else | |
622 | false_expr = NULL_RTX; | |
0bb604ca | 623 | |
1d855d4c | 624 | #ifdef IFCVT_MODIFY_TESTS |
625 | /* If the machine description needs to modify the tests, such as setting a | |
626 | conditional execution register from a comparison, it can do so here. */ | |
627 | IFCVT_MODIFY_TESTS (ce_info, true_expr, false_expr); | |
628 | ||
8b332087 | 629 | /* See if the conversion failed. */ |
1d855d4c | 630 | if (!true_expr || !false_expr) |
631 | goto fail; | |
632 | #endif | |
633 | ||
9eb946de | 634 | note = find_reg_note (BB_END (test_bb), REG_BR_PROB, NULL_RTX); |
635 | if (note) | |
f7785736 | 636 | { |
9eb946de | 637 | true_prob_val = XINT (note, 0); |
638 | false_prob_val = REG_BR_PROB_BASE - true_prob_val; | |
f7785736 | 639 | } |
640 | else | |
9eb946de | 641 | { |
642 | true_prob_val = -1; | |
643 | false_prob_val = -1; | |
644 | } | |
f7785736 | 645 | |
1d855d4c | 646 | /* If we have && or || tests, do them here. These tests are in the adjacent |
647 | blocks after the first block containing the test. */ | |
648 | if (ce_info->num_multiple_test_blocks > 0) | |
649 | { | |
650 | basic_block bb = test_bb; | |
651 | basic_block last_test_bb = ce_info->last_test_bb; | |
652 | ||
b2976eba | 653 | if (! false_expr) |
654 | goto fail; | |
655 | ||
1d855d4c | 656 | do |
657 | { | |
4cd001d5 | 658 | rtx_insn *start, *end; |
1d855d4c | 659 | rtx t, f; |
367dc0cd | 660 | enum rtx_code f_code; |
1d855d4c | 661 | |
662 | bb = block_fallthru (bb); | |
663 | start = first_active_insn (bb); | |
664 | end = last_active_insn (bb, TRUE); | |
665 | if (start | |
666 | && ! cond_exec_process_insns (ce_info, start, end, false_expr, | |
667 | false_prob_val, FALSE)) | |
668 | goto fail; | |
669 | ||
670 | /* If the conditional jump is more than just a conditional jump, then | |
671 | we can not do conditional execution conversion on this block. */ | |
5496dbfc | 672 | if (! onlyjump_p (BB_END (bb))) |
1d855d4c | 673 | goto fail; |
674 | ||
675 | /* Find the conditional jump and isolate the test. */ | |
5496dbfc | 676 | t = cond_exec_get_condition (BB_END (bb)); |
1d855d4c | 677 | if (! t) |
678 | goto fail; | |
679 | ||
367dc0cd | 680 | f_code = reversed_comparison_code (t, BB_END (bb)); |
681 | if (f_code == UNKNOWN) | |
682 | goto fail; | |
1d855d4c | 683 | |
367dc0cd | 684 | f = gen_rtx_fmt_ee (f_code, GET_MODE (t), XEXP (t, 0), XEXP (t, 1)); |
1d855d4c | 685 | if (ce_info->and_and_p) |
686 | { | |
687 | t = gen_rtx_AND (GET_MODE (t), true_expr, t); | |
688 | f = gen_rtx_IOR (GET_MODE (t), false_expr, f); | |
689 | } | |
690 | else | |
691 | { | |
692 | t = gen_rtx_IOR (GET_MODE (t), true_expr, t); | |
693 | f = gen_rtx_AND (GET_MODE (t), false_expr, f); | |
694 | } | |
695 | ||
696 | /* If the machine description needs to modify the tests, such as | |
697 | setting a conditional execution register from a comparison, it can | |
698 | do so here. */ | |
699 | #ifdef IFCVT_MODIFY_MULTIPLE_TESTS | |
700 | IFCVT_MODIFY_MULTIPLE_TESTS (ce_info, bb, t, f); | |
701 | ||
8b332087 | 702 | /* See if the conversion failed. */ |
1d855d4c | 703 | if (!t || !f) |
704 | goto fail; | |
705 | #endif | |
706 | ||
707 | true_expr = t; | |
708 | false_expr = f; | |
709 | } | |
710 | while (bb != last_test_bb); | |
711 | } | |
712 | ||
0bb604ca | 713 | /* For IF-THEN-ELSE blocks, we don't allow modifications of the test |
714 | on then THEN block. */ | |
715 | then_mod_ok = (else_bb == NULL_BLOCK); | |
716 | ||
717 | /* Go through the THEN and ELSE blocks converting the insns if possible | |
718 | to conditional execution. */ | |
719 | ||
720 | if (then_end | |
4bf64bbb | 721 | && (! false_expr |
1d855d4c | 722 | || ! cond_exec_process_insns (ce_info, then_start, then_end, |
723 | false_expr, false_prob_val, | |
724 | then_mod_ok))) | |
0bb604ca | 725 | goto fail; |
726 | ||
1d855d4c | 727 | if (else_bb && else_end |
728 | && ! cond_exec_process_insns (ce_info, else_start, else_end, | |
f7785736 | 729 | true_expr, true_prob_val, TRUE)) |
0bb604ca | 730 | goto fail; |
731 | ||
1d855d4c | 732 | /* If we cannot apply the changes, fail. Do not go through the normal fail |
733 | processing, since apply_change_group will call cancel_changes. */ | |
0bb604ca | 734 | if (! apply_change_group ()) |
1d855d4c | 735 | { |
736 | #ifdef IFCVT_MODIFY_CANCEL | |
737 | /* Cancel any machine dependent changes. */ | |
738 | IFCVT_MODIFY_CANCEL (ce_info); | |
739 | #endif | |
740 | return FALSE; | |
741 | } | |
0bb604ca | 742 | |
7efd6cf1 | 743 | #ifdef IFCVT_MODIFY_FINAL |
8b332087 | 744 | /* Do any machine dependent final modifications. */ |
1d855d4c | 745 | IFCVT_MODIFY_FINAL (ce_info); |
7efd6cf1 | 746 | #endif |
747 | ||
0bb604ca | 748 | /* Conversion succeeded. */ |
450d042a | 749 | if (dump_file) |
750 | fprintf (dump_file, "%d insn%s converted to conditional execution.\n", | |
0bb604ca | 751 | n_insns, (n_insns == 1) ? " was" : "s were"); |
752 | ||
84c471f5 | 753 | /* Merge the blocks! If we had matching sequences, make sure to delete one |
754 | copy at the appropriate location first: delete the copy in the THEN branch | |
755 | for a tail sequence so that the remaining one is executed last for both | |
756 | branches, and delete the copy in the ELSE branch for a head sequence so | |
757 | that the remaining one is executed first for both branches. */ | |
758 | if (then_first_tail) | |
759 | { | |
4cd001d5 | 760 | rtx_insn *from = then_first_tail; |
84c471f5 | 761 | if (!INSN_P (from)) |
7f91ac8e | 762 | from = find_active_insn_after (then_bb, from); |
84c471f5 | 763 | delete_insn_chain (from, BB_END (then_bb), false); |
764 | } | |
765 | if (else_last_head) | |
766 | delete_insn_chain (first_active_insn (else_bb), else_last_head, false); | |
767 | ||
1d855d4c | 768 | merge_if_block (ce_info); |
769 | cond_exec_changed_p = TRUE; | |
0bb604ca | 770 | return TRUE; |
771 | ||
772 | fail: | |
7efd6cf1 | 773 | #ifdef IFCVT_MODIFY_CANCEL |
774 | /* Cancel any machine dependent changes. */ | |
1d855d4c | 775 | IFCVT_MODIFY_CANCEL (ce_info); |
7efd6cf1 | 776 | #endif |
777 | ||
0bb604ca | 778 | cancel_changes (0); |
779 | return FALSE; | |
780 | } | |
781 | \f | |
952f0048 | 782 | /* Used by noce_process_if_block to communicate with its subroutines. |
0bb604ca | 783 | |
784 | The subroutines know that A and B may be evaluated freely. They | |
952f0048 | 785 | know that X is a register. They should insert new instructions |
0bb604ca | 786 | before cond_earliest. */ |
787 | ||
788 | struct noce_if_info | |
789 | { | |
03dbd7cc | 790 | /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */ |
791 | basic_block test_bb, then_bb, else_bb, join_bb; | |
5b410d6a | 792 | |
793 | /* The jump that ends TEST_BB. */ | |
ca0df1e3 | 794 | rtx_insn *jump; |
e592f6ea | 795 | |
5b410d6a | 796 | /* The jump condition. */ |
797 | rtx cond; | |
798 | ||
799 | /* New insns should be inserted before this one. */ | |
2d650f54 | 800 | rtx_insn *cond_earliest; |
5b410d6a | 801 | |
802 | /* Insns in the THEN and ELSE block. There is always just this | |
803 | one insns in those blocks. The insns are single_set insns. | |
804 | If there was no ELSE block, INSN_B is the last insn before | |
805 | COND_EARLIEST, or NULL_RTX. In the former case, the insn | |
806 | operands are still valid, as if INSN_B was moved down below | |
807 | the jump. */ | |
ca0df1e3 | 808 | rtx_insn *insn_a, *insn_b; |
5b410d6a | 809 | |
810 | /* The SET_SRC of INSN_A and INSN_B. */ | |
811 | rtx a, b; | |
812 | ||
813 | /* The SET_DEST of INSN_A. */ | |
814 | rtx x; | |
ba45c933 | 815 | |
816 | /* True if this if block is not canonical. In the canonical form of | |
817 | if blocks, the THEN_BB is the block reached via the fallthru edge | |
818 | from TEST_BB. For the noce transformations, we allow the symmetric | |
819 | form as well. */ | |
820 | bool then_else_reversed; | |
4a9d7ef7 | 821 | |
822 | /* Estimated cost of the particular branch instruction. */ | |
823 | int branch_cost; | |
0bb604ca | 824 | }; |
825 | ||
952f0048 | 826 | static rtx noce_emit_store_flag (struct noce_if_info *, rtx, int, int); |
357b5a1f | 827 | static int noce_try_move (struct noce_if_info *); |
952f0048 | 828 | static int noce_try_store_flag (struct noce_if_info *); |
829 | static int noce_try_addcc (struct noce_if_info *); | |
830 | static int noce_try_store_flag_constants (struct noce_if_info *); | |
831 | static int noce_try_store_flag_mask (struct noce_if_info *); | |
832 | static rtx noce_emit_cmove (struct noce_if_info *, rtx, enum rtx_code, rtx, | |
833 | rtx, rtx, rtx); | |
834 | static int noce_try_cmove (struct noce_if_info *); | |
835 | static int noce_try_cmove_arith (struct noce_if_info *); | |
2d650f54 | 836 | static rtx noce_get_alt_condition (struct noce_if_info *, rtx, rtx_insn **); |
952f0048 | 837 | static int noce_try_minmax (struct noce_if_info *); |
838 | static int noce_try_abs (struct noce_if_info *); | |
1c98eaaa | 839 | static int noce_try_sign_mask (struct noce_if_info *); |
0bb604ca | 840 | |
841 | /* Helper function for noce_try_store_flag*. */ | |
842 | ||
843 | static rtx | |
952f0048 | 844 | noce_emit_store_flag (struct noce_if_info *if_info, rtx x, int reversep, |
845 | int normalize) | |
0bb604ca | 846 | { |
847 | rtx cond = if_info->cond; | |
848 | int cond_complex; | |
849 | enum rtx_code code; | |
850 | ||
851 | cond_complex = (! general_operand (XEXP (cond, 0), VOIDmode) | |
852 | || ! general_operand (XEXP (cond, 1), VOIDmode)); | |
853 | ||
854 | /* If earliest == jump, or when the condition is complex, try to | |
855 | build the store_flag insn directly. */ | |
856 | ||
857 | if (cond_complex) | |
a2d70772 | 858 | { |
859 | rtx set = pc_set (if_info->jump); | |
860 | cond = XEXP (SET_SRC (set), 0); | |
861 | if (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF | |
b49f2e4b | 862 | && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (if_info->jump)) |
a2d70772 | 863 | reversep = !reversep; |
864 | if (if_info->then_else_reversed) | |
865 | reversep = !reversep; | |
866 | } | |
0bb604ca | 867 | |
a3dbed00 | 868 | if (reversep) |
869 | code = reversed_comparison_code (cond, if_info->jump); | |
870 | else | |
871 | code = GET_CODE (cond); | |
872 | ||
0bb604ca | 873 | if ((if_info->cond_earliest == if_info->jump || cond_complex) |
874 | && (normalize == 0 || STORE_FLAG_VALUE == normalize)) | |
875 | { | |
ed3e6e5d | 876 | rtx src = gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (cond, 0), |
0bb604ca | 877 | XEXP (cond, 1)); |
ed3e6e5d | 878 | rtx set = gen_rtx_SET (VOIDmode, x, src); |
0bb604ca | 879 | |
880 | start_sequence (); | |
ed3e6e5d | 881 | rtx_insn *insn = emit_insn (set); |
0bb604ca | 882 | |
ed3e6e5d | 883 | if (recog_memoized (insn) >= 0) |
0bb604ca | 884 | { |
ed3e6e5d | 885 | rtx_insn *seq = get_insns (); |
0bb604ca | 886 | end_sequence (); |
ed3e6e5d | 887 | emit_insn (seq); |
0bb604ca | 888 | |
889 | if_info->cond_earliest = if_info->jump; | |
890 | ||
891 | return x; | |
892 | } | |
893 | ||
894 | end_sequence (); | |
895 | } | |
896 | ||
d7f916d2 | 897 | /* Don't even try if the comparison operands or the mode of X are weird. */ |
898 | if (cond_complex || !SCALAR_INT_MODE_P (GET_MODE (x))) | |
0bb604ca | 899 | return NULL_RTX; |
900 | ||
0bb604ca | 901 | return emit_store_flag (x, code, XEXP (cond, 0), |
902 | XEXP (cond, 1), VOIDmode, | |
903 | (code == LTU || code == LEU | |
904 | || code == GEU || code == GTU), normalize); | |
905 | } | |
906 | ||
357b5a1f | 907 | /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART. |
908 | X is the destination/target and Y is the value to copy. */ | |
909 | ||
8b8f1119 | 910 | static void |
952f0048 | 911 | noce_emit_move_insn (rtx x, rtx y) |
8b8f1119 | 912 | { |
3754d046 | 913 | machine_mode outmode; |
8b8f1119 | 914 | rtx outer, inner; |
915 | int bitpos; | |
916 | ||
917 | if (GET_CODE (x) != STRICT_LOW_PART) | |
918 | { | |
ed3e6e5d | 919 | rtx_insn *seq, *insn; |
920 | rtx target; | |
9d666332 | 921 | optab ot; |
922 | ||
923 | start_sequence (); | |
2b9a6d99 | 924 | /* Check that the SET_SRC is reasonable before calling emit_move_insn, |
925 | otherwise construct a suitable SET pattern ourselves. */ | |
926 | insn = (OBJECT_P (y) || CONSTANT_P (y) || GET_CODE (y) == SUBREG) | |
927 | ? emit_move_insn (x, y) | |
928 | : emit_insn (gen_rtx_SET (VOIDmode, x, y)); | |
9d666332 | 929 | seq = get_insns (); |
d4473c84 | 930 | end_sequence (); |
9d666332 | 931 | |
932 | if (recog_memoized (insn) <= 0) | |
6746fc82 | 933 | { |
934 | if (GET_CODE (x) == ZERO_EXTRACT) | |
935 | { | |
936 | rtx op = XEXP (x, 0); | |
937 | unsigned HOST_WIDE_INT size = INTVAL (XEXP (x, 1)); | |
938 | unsigned HOST_WIDE_INT start = INTVAL (XEXP (x, 2)); | |
939 | ||
e592f6ea | 940 | /* store_bit_field expects START to be relative to |
941 | BYTES_BIG_ENDIAN and adjusts this value for machines with | |
942 | BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to | |
6746fc82 | 943 | invoke store_bit_field again it is necessary to have the START |
944 | value from the first call. */ | |
945 | if (BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN) | |
946 | { | |
947 | if (MEM_P (op)) | |
948 | start = BITS_PER_UNIT - start - size; | |
949 | else | |
950 | { | |
951 | gcc_assert (REG_P (op)); | |
952 | start = BITS_PER_WORD - start - size; | |
953 | } | |
954 | } | |
9d666332 | 955 | |
6746fc82 | 956 | gcc_assert (start < (MEM_P (op) ? BITS_PER_UNIT : BITS_PER_WORD)); |
4bb60ec7 | 957 | store_bit_field (op, size, start, 0, 0, GET_MODE (x), y); |
6746fc82 | 958 | return; |
959 | } | |
960 | ||
961 | switch (GET_RTX_CLASS (GET_CODE (y))) | |
962 | { | |
963 | case RTX_UNARY: | |
ebb6e3c1 | 964 | ot = code_to_optab (GET_CODE (y)); |
6746fc82 | 965 | if (ot) |
966 | { | |
967 | start_sequence (); | |
968 | target = expand_unop (GET_MODE (y), ot, XEXP (y, 0), x, 0); | |
969 | if (target != NULL_RTX) | |
970 | { | |
971 | if (target != x) | |
972 | emit_move_insn (x, target); | |
973 | seq = get_insns (); | |
974 | } | |
975 | end_sequence (); | |
976 | } | |
977 | break; | |
e592f6ea | 978 | |
6746fc82 | 979 | case RTX_BIN_ARITH: |
980 | case RTX_COMM_ARITH: | |
ebb6e3c1 | 981 | ot = code_to_optab (GET_CODE (y)); |
6746fc82 | 982 | if (ot) |
983 | { | |
984 | start_sequence (); | |
985 | target = expand_binop (GET_MODE (y), ot, | |
986 | XEXP (y, 0), XEXP (y, 1), | |
987 | x, 0, OPTAB_DIRECT); | |
988 | if (target != NULL_RTX) | |
989 | { | |
990 | if (target != x) | |
991 | emit_move_insn (x, target); | |
992 | seq = get_insns (); | |
993 | } | |
994 | end_sequence (); | |
995 | } | |
996 | break; | |
e592f6ea | 997 | |
6746fc82 | 998 | default: |
999 | break; | |
1000 | } | |
1001 | } | |
e592f6ea | 1002 | |
9d666332 | 1003 | emit_insn (seq); |
8b8f1119 | 1004 | return; |
1005 | } | |
1006 | ||
1007 | outer = XEXP (x, 0); | |
1008 | inner = XEXP (outer, 0); | |
1009 | outmode = GET_MODE (outer); | |
701e46d0 | 1010 | bitpos = SUBREG_BYTE (outer) * BITS_PER_UNIT; |
4bb60ec7 | 1011 | store_bit_field (inner, GET_MODE_BITSIZE (outmode), bitpos, |
1012 | 0, 0, outmode, y); | |
8b8f1119 | 1013 | } |
1014 | ||
1a81ce76 | 1015 | /* Return sequence of instructions generated by if conversion. This |
1016 | function calls end_sequence() to end the current stream, ensures | |
1017 | that are instructions are unshared, recognizable non-jump insns. | |
1018 | On failure, this function returns a NULL_RTX. */ | |
1019 | ||
ca0df1e3 | 1020 | static rtx_insn * |
1a81ce76 | 1021 | end_ifcvt_sequence (struct noce_if_info *if_info) |
1cd4cfea | 1022 | { |
ca0df1e3 | 1023 | rtx_insn *insn; |
1024 | rtx_insn *seq = get_insns (); | |
1a81ce76 | 1025 | |
1cd4cfea | 1026 | set_used_flags (if_info->x); |
1027 | set_used_flags (if_info->cond); | |
79f85ed5 | 1028 | set_used_flags (if_info->a); |
1029 | set_used_flags (if_info->b); | |
1cd4cfea | 1030 | unshare_all_rtl_in_chain (seq); |
1a81ce76 | 1031 | end_sequence (); |
1032 | ||
672b9f24 | 1033 | /* Make sure that all of the instructions emitted are recognizable, |
1034 | and that we haven't introduced a new jump instruction. | |
0870fd6e | 1035 | As an exercise for the reader, build a general mechanism that |
1a81ce76 | 1036 | allows proper placement of required clobbers. */ |
672b9f24 | 1037 | for (insn = seq; insn; insn = NEXT_INSN (insn)) |
6d7dc5b9 | 1038 | if (JUMP_P (insn) |
672b9f24 | 1039 | || recog_memoized (insn) == -1) |
ca0df1e3 | 1040 | return NULL; |
672b9f24 | 1041 | |
1a81ce76 | 1042 | return seq; |
1cd4cfea | 1043 | } |
1044 | ||
357b5a1f | 1045 | /* Convert "if (a != b) x = a; else x = b" into "x = a" and |
1046 | "if (a == b) x = a; else x = b" into "x = b". */ | |
1047 | ||
1048 | static int | |
1049 | noce_try_move (struct noce_if_info *if_info) | |
1050 | { | |
1051 | rtx cond = if_info->cond; | |
1052 | enum rtx_code code = GET_CODE (cond); | |
ca0df1e3 | 1053 | rtx y; |
1054 | rtx_insn *seq; | |
357b5a1f | 1055 | |
1056 | if (code != NE && code != EQ) | |
1057 | return FALSE; | |
1058 | ||
1059 | /* This optimization isn't valid if either A or B could be a NaN | |
1060 | or a signed zero. */ | |
1061 | if (HONOR_NANS (GET_MODE (if_info->x)) | |
1062 | || HONOR_SIGNED_ZEROS (GET_MODE (if_info->x))) | |
1063 | return FALSE; | |
1064 | ||
1065 | /* Check whether the operands of the comparison are A and in | |
1066 | either order. */ | |
1067 | if ((rtx_equal_p (if_info->a, XEXP (cond, 0)) | |
1068 | && rtx_equal_p (if_info->b, XEXP (cond, 1))) | |
1069 | || (rtx_equal_p (if_info->a, XEXP (cond, 1)) | |
1070 | && rtx_equal_p (if_info->b, XEXP (cond, 0)))) | |
1071 | { | |
f07f6526 | 1072 | if (!rtx_interchangeable_p (if_info->a, if_info->b)) |
1073 | return FALSE; | |
1074 | ||
357b5a1f | 1075 | y = (code == EQ) ? if_info->a : if_info->b; |
1076 | ||
1077 | /* Avoid generating the move if the source is the destination. */ | |
1078 | if (! rtx_equal_p (if_info->x, y)) | |
1079 | { | |
1080 | start_sequence (); | |
1081 | noce_emit_move_insn (if_info->x, y); | |
1a81ce76 | 1082 | seq = end_ifcvt_sequence (if_info); |
1083 | if (!seq) | |
1084 | return FALSE; | |
8308e745 | 1085 | |
357b5a1f | 1086 | emit_insn_before_setloc (seq, if_info->jump, |
5169661d | 1087 | INSN_LOCATION (if_info->insn_a)); |
357b5a1f | 1088 | } |
1089 | return TRUE; | |
1090 | } | |
1091 | return FALSE; | |
1092 | } | |
1093 | ||
0bb604ca | 1094 | /* Convert "if (test) x = 1; else x = 0". |
1095 | ||
1096 | Only try 0 and STORE_FLAG_VALUE here. Other combinations will be | |
1097 | tried in noce_try_store_flag_constants after noce_try_cmove has had | |
1098 | a go at the conversion. */ | |
1099 | ||
1100 | static int | |
952f0048 | 1101 | noce_try_store_flag (struct noce_if_info *if_info) |
0bb604ca | 1102 | { |
1103 | int reversep; | |
ca0df1e3 | 1104 | rtx target; |
1105 | rtx_insn *seq; | |
0bb604ca | 1106 | |
971ba038 | 1107 | if (CONST_INT_P (if_info->b) |
0bb604ca | 1108 | && INTVAL (if_info->b) == STORE_FLAG_VALUE |
1109 | && if_info->a == const0_rtx) | |
1110 | reversep = 0; | |
1111 | else if (if_info->b == const0_rtx | |
971ba038 | 1112 | && CONST_INT_P (if_info->a) |
0bb604ca | 1113 | && INTVAL (if_info->a) == STORE_FLAG_VALUE |
a3dbed00 | 1114 | && (reversed_comparison_code (if_info->cond, if_info->jump) |
1115 | != UNKNOWN)) | |
0bb604ca | 1116 | reversep = 1; |
1117 | else | |
1118 | return FALSE; | |
1119 | ||
1120 | start_sequence (); | |
1121 | ||
1122 | target = noce_emit_store_flag (if_info, if_info->x, reversep, 0); | |
1123 | if (target) | |
1124 | { | |
1125 | if (target != if_info->x) | |
8b8f1119 | 1126 | noce_emit_move_insn (if_info->x, target); |
0bb604ca | 1127 | |
1a81ce76 | 1128 | seq = end_ifcvt_sequence (if_info); |
1129 | if (! seq) | |
1130 | return FALSE; | |
0bb604ca | 1131 | |
1a81ce76 | 1132 | emit_insn_before_setloc (seq, if_info->jump, |
5169661d | 1133 | INSN_LOCATION (if_info->insn_a)); |
0bb604ca | 1134 | return TRUE; |
1135 | } | |
1136 | else | |
1137 | { | |
1138 | end_sequence (); | |
1139 | return FALSE; | |
1140 | } | |
1141 | } | |
1142 | ||
1143 | /* Convert "if (test) x = a; else x = b", for A and B constant. */ | |
1144 | ||
1145 | static int | |
952f0048 | 1146 | noce_try_store_flag_constants (struct noce_if_info *if_info) |
0bb604ca | 1147 | { |
ca0df1e3 | 1148 | rtx target; |
1149 | rtx_insn *seq; | |
0bb604ca | 1150 | int reversep; |
1151 | HOST_WIDE_INT itrue, ifalse, diff, tmp; | |
1152 | int normalize, can_reverse; | |
3754d046 | 1153 | machine_mode mode; |
0bb604ca | 1154 | |
971ba038 | 1155 | if (CONST_INT_P (if_info->a) |
1156 | && CONST_INT_P (if_info->b)) | |
0bb604ca | 1157 | { |
9dbc42f3 | 1158 | mode = GET_MODE (if_info->x); |
0bb604ca | 1159 | ifalse = INTVAL (if_info->a); |
1160 | itrue = INTVAL (if_info->b); | |
7f9adb18 | 1161 | |
60141df0 | 1162 | diff = (unsigned HOST_WIDE_INT) itrue - ifalse; |
7f9adb18 | 1163 | /* Make sure we can represent the difference between the two values. */ |
60141df0 | 1164 | if ((diff > 0) |
7f9adb18 | 1165 | != ((ifalse < 0) != (itrue < 0) ? ifalse < 0 : ifalse < itrue)) |
1166 | return FALSE; | |
1167 | ||
60141df0 | 1168 | diff = trunc_int_for_mode (diff, mode); |
0bb604ca | 1169 | |
a3dbed00 | 1170 | can_reverse = (reversed_comparison_code (if_info->cond, if_info->jump) |
1171 | != UNKNOWN); | |
0bb604ca | 1172 | |
1173 | reversep = 0; | |
1174 | if (diff == STORE_FLAG_VALUE || diff == -STORE_FLAG_VALUE) | |
1175 | normalize = 0; | |
1176 | else if (ifalse == 0 && exact_log2 (itrue) >= 0 | |
1177 | && (STORE_FLAG_VALUE == 1 | |
4a9d7ef7 | 1178 | || if_info->branch_cost >= 2)) |
0bb604ca | 1179 | normalize = 1; |
1180 | else if (itrue == 0 && exact_log2 (ifalse) >= 0 && can_reverse | |
4a9d7ef7 | 1181 | && (STORE_FLAG_VALUE == 1 || if_info->branch_cost >= 2)) |
0bb604ca | 1182 | normalize = 1, reversep = 1; |
1183 | else if (itrue == -1 | |
1184 | && (STORE_FLAG_VALUE == -1 | |
4a9d7ef7 | 1185 | || if_info->branch_cost >= 2)) |
0bb604ca | 1186 | normalize = -1; |
1187 | else if (ifalse == -1 && can_reverse | |
4a9d7ef7 | 1188 | && (STORE_FLAG_VALUE == -1 || if_info->branch_cost >= 2)) |
0bb604ca | 1189 | normalize = -1, reversep = 1; |
4a9d7ef7 | 1190 | else if ((if_info->branch_cost >= 2 && STORE_FLAG_VALUE == -1) |
1191 | || if_info->branch_cost >= 3) | |
0bb604ca | 1192 | normalize = -1; |
1193 | else | |
1194 | return FALSE; | |
1195 | ||
1196 | if (reversep) | |
952f0048 | 1197 | { |
0bb604ca | 1198 | tmp = itrue; itrue = ifalse; ifalse = tmp; |
60141df0 | 1199 | diff = trunc_int_for_mode (-(unsigned HOST_WIDE_INT) diff, mode); |
0bb604ca | 1200 | } |
1201 | ||
1202 | start_sequence (); | |
1203 | target = noce_emit_store_flag (if_info, if_info->x, reversep, normalize); | |
1204 | if (! target) | |
1205 | { | |
1206 | end_sequence (); | |
1207 | return FALSE; | |
1208 | } | |
1209 | ||
1210 | /* if (test) x = 3; else x = 4; | |
1211 | => x = 3 + (test == 0); */ | |
1212 | if (diff == STORE_FLAG_VALUE || diff == -STORE_FLAG_VALUE) | |
1213 | { | |
ad99e708 | 1214 | target = expand_simple_binop (mode, |
1215 | (diff == STORE_FLAG_VALUE | |
1216 | ? PLUS : MINUS), | |
0359f9f5 | 1217 | gen_int_mode (ifalse, mode), target, |
1218 | if_info->x, 0, OPTAB_WIDEN); | |
0bb604ca | 1219 | } |
1220 | ||
1221 | /* if (test) x = 8; else x = 0; | |
1222 | => x = (test != 0) << 3; */ | |
1223 | else if (ifalse == 0 && (tmp = exact_log2 (itrue)) >= 0) | |
1224 | { | |
ad99e708 | 1225 | target = expand_simple_binop (mode, ASHIFT, |
1226 | target, GEN_INT (tmp), if_info->x, 0, | |
1227 | OPTAB_WIDEN); | |
0bb604ca | 1228 | } |
1229 | ||
1230 | /* if (test) x = -1; else x = b; | |
1231 | => x = -(test != 0) | b; */ | |
1232 | else if (itrue == -1) | |
1233 | { | |
ad99e708 | 1234 | target = expand_simple_binop (mode, IOR, |
0359f9f5 | 1235 | target, gen_int_mode (ifalse, mode), |
1236 | if_info->x, 0, OPTAB_WIDEN); | |
0bb604ca | 1237 | } |
1238 | ||
1239 | /* if (test) x = a; else x = b; | |
1240 | => x = (-(test != 0) & (b - a)) + a; */ | |
1241 | else | |
1242 | { | |
ad99e708 | 1243 | target = expand_simple_binop (mode, AND, |
0359f9f5 | 1244 | target, gen_int_mode (diff, mode), |
1245 | if_info->x, 0, OPTAB_WIDEN); | |
0bb604ca | 1246 | if (target) |
ad99e708 | 1247 | target = expand_simple_binop (mode, PLUS, |
0359f9f5 | 1248 | target, gen_int_mode (ifalse, mode), |
ad99e708 | 1249 | if_info->x, 0, OPTAB_WIDEN); |
0bb604ca | 1250 | } |
1251 | ||
1252 | if (! target) | |
1253 | { | |
1254 | end_sequence (); | |
1255 | return FALSE; | |
1256 | } | |
1257 | ||
1258 | if (target != if_info->x) | |
8b8f1119 | 1259 | noce_emit_move_insn (if_info->x, target); |
0bb604ca | 1260 | |
1a81ce76 | 1261 | seq = end_ifcvt_sequence (if_info); |
1262 | if (!seq) | |
a9a81f26 | 1263 | return FALSE; |
1264 | ||
1a81ce76 | 1265 | emit_insn_before_setloc (seq, if_info->jump, |
5169661d | 1266 | INSN_LOCATION (if_info->insn_a)); |
0bb604ca | 1267 | return TRUE; |
1268 | } | |
1269 | ||
1270 | return FALSE; | |
1271 | } | |
1272 | ||
952f0048 | 1273 | /* Convert "if (test) foo++" into "foo += (test != 0)", and |
0bb604ca | 1274 | similarly for "foo--". */ |
1275 | ||
1276 | static int | |
952f0048 | 1277 | noce_try_addcc (struct noce_if_info *if_info) |
0bb604ca | 1278 | { |
ca0df1e3 | 1279 | rtx target; |
1280 | rtx_insn *seq; | |
0bb604ca | 1281 | int subtract, normalize; |
1282 | ||
03dbd7cc | 1283 | if (GET_CODE (if_info->a) == PLUS |
9b9797f8 | 1284 | && rtx_equal_p (XEXP (if_info->a, 0), if_info->b) |
a3dbed00 | 1285 | && (reversed_comparison_code (if_info->cond, if_info->jump) |
1286 | != UNKNOWN)) | |
0bb604ca | 1287 | { |
d3da2ad8 | 1288 | rtx cond = if_info->cond; |
1289 | enum rtx_code code = reversed_comparison_code (cond, if_info->jump); | |
0bb604ca | 1290 | |
d3da2ad8 | 1291 | /* First try to use addcc pattern. */ |
4b5189c1 | 1292 | if (general_operand (XEXP (cond, 0), VOIDmode) |
1293 | && general_operand (XEXP (cond, 1), VOIDmode)) | |
0bb604ca | 1294 | { |
4b5189c1 | 1295 | start_sequence (); |
1296 | target = emit_conditional_add (if_info->x, code, | |
1cd4cfea | 1297 | XEXP (cond, 0), |
1298 | XEXP (cond, 1), | |
4b5189c1 | 1299 | VOIDmode, |
1cd4cfea | 1300 | if_info->b, |
1301 | XEXP (if_info->a, 1), | |
4b5189c1 | 1302 | GET_MODE (if_info->x), |
1303 | (code == LTU || code == GEU | |
1304 | || code == LEU || code == GTU)); | |
1305 | if (target) | |
1306 | { | |
1307 | if (target != if_info->x) | |
1308 | noce_emit_move_insn (if_info->x, target); | |
1309 | ||
1a81ce76 | 1310 | seq = end_ifcvt_sequence (if_info); |
1311 | if (!seq) | |
1312 | return FALSE; | |
1313 | ||
13751393 | 1314 | emit_insn_before_setloc (seq, if_info->jump, |
5169661d | 1315 | INSN_LOCATION (if_info->insn_a)); |
4b5189c1 | 1316 | return TRUE; |
1317 | } | |
0bb604ca | 1318 | end_sequence (); |
0bb604ca | 1319 | } |
952f0048 | 1320 | |
d3da2ad8 | 1321 | /* If that fails, construct conditional increment or decrement using |
1322 | setcc. */ | |
4a9d7ef7 | 1323 | if (if_info->branch_cost >= 2 |
d3da2ad8 | 1324 | && (XEXP (if_info->a, 1) == const1_rtx |
1325 | || XEXP (if_info->a, 1) == constm1_rtx)) | |
1326 | { | |
1327 | start_sequence (); | |
1328 | if (STORE_FLAG_VALUE == INTVAL (XEXP (if_info->a, 1))) | |
1329 | subtract = 0, normalize = 0; | |
1330 | else if (-STORE_FLAG_VALUE == INTVAL (XEXP (if_info->a, 1))) | |
1331 | subtract = 1, normalize = 0; | |
1332 | else | |
1333 | subtract = 0, normalize = INTVAL (XEXP (if_info->a, 1)); | |
1334 | ||
1335 | ||
1336 | target = noce_emit_store_flag (if_info, | |
1337 | gen_reg_rtx (GET_MODE (if_info->x)), | |
1338 | 1, normalize); | |
1339 | ||
1340 | if (target) | |
1341 | target = expand_simple_binop (GET_MODE (if_info->x), | |
1342 | subtract ? MINUS : PLUS, | |
9b9797f8 | 1343 | if_info->b, target, if_info->x, |
d3da2ad8 | 1344 | 0, OPTAB_WIDEN); |
1345 | if (target) | |
1346 | { | |
1347 | if (target != if_info->x) | |
1348 | noce_emit_move_insn (if_info->x, target); | |
1349 | ||
1a81ce76 | 1350 | seq = end_ifcvt_sequence (if_info); |
1351 | if (!seq) | |
d3da2ad8 | 1352 | return FALSE; |
1353 | ||
13751393 | 1354 | emit_insn_before_setloc (seq, if_info->jump, |
5169661d | 1355 | INSN_LOCATION (if_info->insn_a)); |
d3da2ad8 | 1356 | return TRUE; |
1357 | } | |
1358 | end_sequence (); | |
1359 | } | |
0bb604ca | 1360 | } |
1361 | ||
1362 | return FALSE; | |
1363 | } | |
1364 | ||
1365 | /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */ | |
1366 | ||
1367 | static int | |
952f0048 | 1368 | noce_try_store_flag_mask (struct noce_if_info *if_info) |
0bb604ca | 1369 | { |
ca0df1e3 | 1370 | rtx target; |
1371 | rtx_insn *seq; | |
0bb604ca | 1372 | int reversep; |
1373 | ||
1374 | reversep = 0; | |
4a9d7ef7 | 1375 | if ((if_info->branch_cost >= 2 |
03dbd7cc | 1376 | || STORE_FLAG_VALUE == -1) |
0bb604ca | 1377 | && ((if_info->a == const0_rtx |
1378 | && rtx_equal_p (if_info->b, if_info->x)) | |
a3dbed00 | 1379 | || ((reversep = (reversed_comparison_code (if_info->cond, |
1380 | if_info->jump) | |
1381 | != UNKNOWN)) | |
0bb604ca | 1382 | && if_info->b == const0_rtx |
1383 | && rtx_equal_p (if_info->a, if_info->x)))) | |
1384 | { | |
1385 | start_sequence (); | |
1386 | target = noce_emit_store_flag (if_info, | |
1387 | gen_reg_rtx (GET_MODE (if_info->x)), | |
1388 | reversep, -1); | |
1389 | if (target) | |
ad99e708 | 1390 | target = expand_simple_binop (GET_MODE (if_info->x), AND, |
1cd4cfea | 1391 | if_info->x, |
1392 | target, if_info->x, 0, | |
ad99e708 | 1393 | OPTAB_WIDEN); |
0bb604ca | 1394 | |
1395 | if (target) | |
1396 | { | |
1397 | if (target != if_info->x) | |
8b8f1119 | 1398 | noce_emit_move_insn (if_info->x, target); |
0bb604ca | 1399 | |
1a81ce76 | 1400 | seq = end_ifcvt_sequence (if_info); |
1401 | if (!seq) | |
a9a81f26 | 1402 | return FALSE; |
1403 | ||
13751393 | 1404 | emit_insn_before_setloc (seq, if_info->jump, |
5169661d | 1405 | INSN_LOCATION (if_info->insn_a)); |
0bb604ca | 1406 | return TRUE; |
1407 | } | |
1408 | ||
1409 | end_sequence (); | |
1410 | } | |
1411 | ||
1412 | return FALSE; | |
1413 | } | |
1414 | ||
1415 | /* Helper function for noce_try_cmove and noce_try_cmove_arith. */ | |
1416 | ||
1417 | static rtx | |
952f0048 | 1418 | noce_emit_cmove (struct noce_if_info *if_info, rtx x, enum rtx_code code, |
1419 | rtx cmp_a, rtx cmp_b, rtx vfalse, rtx vtrue) | |
0bb604ca | 1420 | { |
cfc70cec | 1421 | rtx target ATTRIBUTE_UNUSED; |
1422 | int unsignedp ATTRIBUTE_UNUSED; | |
caff53db | 1423 | |
0bb604ca | 1424 | /* If earliest == jump, try to build the cmove insn directly. |
1425 | This is helpful when combine has created some complex condition | |
1426 | (like for alpha's cmovlbs) that we can't hope to regenerate | |
1427 | through the normal interface. */ | |
1428 | ||
1429 | if (if_info->cond_earliest == if_info->jump) | |
1430 | { | |
ed3e6e5d | 1431 | rtx cond = gen_rtx_fmt_ee (code, GET_MODE (if_info->cond), cmp_a, cmp_b); |
1432 | rtx if_then_else = gen_rtx_IF_THEN_ELSE (GET_MODE (x), | |
1433 | cond, vtrue, vfalse); | |
1434 | rtx set = gen_rtx_SET (VOIDmode, x, if_then_else); | |
0bb604ca | 1435 | |
1436 | start_sequence (); | |
ed3e6e5d | 1437 | rtx_insn *insn = emit_insn (set); |
0bb604ca | 1438 | |
ed3e6e5d | 1439 | if (recog_memoized (insn) >= 0) |
0bb604ca | 1440 | { |
ed3e6e5d | 1441 | rtx_insn *seq = get_insns (); |
0bb604ca | 1442 | end_sequence (); |
ed3e6e5d | 1443 | emit_insn (seq); |
0bb604ca | 1444 | |
1445 | return x; | |
1446 | } | |
1447 | ||
1448 | end_sequence (); | |
1449 | } | |
1450 | ||
1451 | /* Don't even try if the comparison operands are weird. */ | |
1452 | if (! general_operand (cmp_a, GET_MODE (cmp_a)) | |
1453 | || ! general_operand (cmp_b, GET_MODE (cmp_b))) | |
1454 | return NULL_RTX; | |
1455 | ||
09b53ef8 | 1456 | #if HAVE_conditional_move |
caff53db | 1457 | unsignedp = (code == LTU || code == GEU |
1458 | || code == LEU || code == GTU); | |
1459 | ||
1460 | target = emit_conditional_move (x, code, cmp_a, cmp_b, VOIDmode, | |
1461 | vtrue, vfalse, GET_MODE (x), | |
1462 | unsignedp); | |
1463 | if (target) | |
1464 | return target; | |
1465 | ||
1466 | /* We might be faced with a situation like: | |
1467 | ||
1468 | x = (reg:M TARGET) | |
1469 | vtrue = (subreg:M (reg:N VTRUE) BYTE) | |
1470 | vfalse = (subreg:M (reg:N VFALSE) BYTE) | |
1471 | ||
1472 | We can't do a conditional move in mode M, but it's possible that we | |
1473 | could do a conditional move in mode N instead and take a subreg of | |
1474 | the result. | |
1475 | ||
1476 | If we can't create new pseudos, though, don't bother. */ | |
1477 | if (reload_completed) | |
1478 | return NULL_RTX; | |
1479 | ||
1480 | if (GET_CODE (vtrue) == SUBREG && GET_CODE (vfalse) == SUBREG) | |
1481 | { | |
1482 | rtx reg_vtrue = SUBREG_REG (vtrue); | |
1483 | rtx reg_vfalse = SUBREG_REG (vfalse); | |
1484 | unsigned int byte_vtrue = SUBREG_BYTE (vtrue); | |
1485 | unsigned int byte_vfalse = SUBREG_BYTE (vfalse); | |
1486 | rtx promoted_target; | |
1487 | ||
1488 | if (GET_MODE (reg_vtrue) != GET_MODE (reg_vfalse) | |
1489 | || byte_vtrue != byte_vfalse | |
1490 | || (SUBREG_PROMOTED_VAR_P (vtrue) | |
1491 | != SUBREG_PROMOTED_VAR_P (vfalse)) | |
e8629f9e | 1492 | || (SUBREG_PROMOTED_GET (vtrue) |
1493 | != SUBREG_PROMOTED_GET (vfalse))) | |
caff53db | 1494 | return NULL_RTX; |
1495 | ||
1496 | promoted_target = gen_reg_rtx (GET_MODE (reg_vtrue)); | |
1497 | ||
1498 | target = emit_conditional_move (promoted_target, code, cmp_a, cmp_b, | |
1499 | VOIDmode, reg_vtrue, reg_vfalse, | |
1500 | GET_MODE (reg_vtrue), unsignedp); | |
1501 | /* Nope, couldn't do it in that mode either. */ | |
1502 | if (!target) | |
1503 | return NULL_RTX; | |
1504 | ||
1505 | target = gen_rtx_SUBREG (GET_MODE (vtrue), promoted_target, byte_vtrue); | |
1506 | SUBREG_PROMOTED_VAR_P (target) = SUBREG_PROMOTED_VAR_P (vtrue); | |
e8629f9e | 1507 | SUBREG_PROMOTED_SET (target, SUBREG_PROMOTED_GET (vtrue)); |
caff53db | 1508 | emit_move_insn (x, target); |
1509 | return x; | |
1510 | } | |
1511 | else | |
1512 | return NULL_RTX; | |
09b53ef8 | 1513 | #else |
1514 | /* We'll never get here, as noce_process_if_block doesn't call the | |
1515 | functions involved. Ifdef code, however, should be discouraged | |
952f0048 | 1516 | because it leads to typos in the code not selected. However, |
09b53ef8 | 1517 | emit_conditional_move won't exist either. */ |
1518 | return NULL_RTX; | |
1519 | #endif | |
0bb604ca | 1520 | } |
1521 | ||
1522 | /* Try only simple constants and registers here. More complex cases | |
1523 | are handled in noce_try_cmove_arith after noce_try_store_flag_arith | |
1524 | has had a go at it. */ | |
1525 | ||
1526 | static int | |
952f0048 | 1527 | noce_try_cmove (struct noce_if_info *if_info) |
0bb604ca | 1528 | { |
1529 | enum rtx_code code; | |
ca0df1e3 | 1530 | rtx target; |
1531 | rtx_insn *seq; | |
0bb604ca | 1532 | |
1533 | if ((CONSTANT_P (if_info->a) || register_operand (if_info->a, VOIDmode)) | |
1534 | && (CONSTANT_P (if_info->b) || register_operand (if_info->b, VOIDmode))) | |
1535 | { | |
1536 | start_sequence (); | |
1537 | ||
1538 | code = GET_CODE (if_info->cond); | |
1539 | target = noce_emit_cmove (if_info, if_info->x, code, | |
1540 | XEXP (if_info->cond, 0), | |
1541 | XEXP (if_info->cond, 1), | |
1542 | if_info->a, if_info->b); | |
1543 | ||
1544 | if (target) | |
1545 | { | |
1546 | if (target != if_info->x) | |
8b8f1119 | 1547 | noce_emit_move_insn (if_info->x, target); |
0bb604ca | 1548 | |
1a81ce76 | 1549 | seq = end_ifcvt_sequence (if_info); |
1550 | if (!seq) | |
1551 | return FALSE; | |
1552 | ||
13751393 | 1553 | emit_insn_before_setloc (seq, if_info->jump, |
5169661d | 1554 | INSN_LOCATION (if_info->insn_a)); |
0bb604ca | 1555 | return TRUE; |
1556 | } | |
1557 | else | |
1558 | { | |
1559 | end_sequence (); | |
1560 | return FALSE; | |
1561 | } | |
1562 | } | |
1563 | ||
1564 | return FALSE; | |
1565 | } | |
1566 | ||
1567 | /* Try more complex cases involving conditional_move. */ | |
1568 | ||
1569 | static int | |
952f0048 | 1570 | noce_try_cmove_arith (struct noce_if_info *if_info) |
0bb604ca | 1571 | { |
1572 | rtx a = if_info->a; | |
1573 | rtx b = if_info->b; | |
1574 | rtx x = if_info->x; | |
e1abb347 | 1575 | rtx orig_a, orig_b; |
ed3e6e5d | 1576 | rtx_insn *insn_a, *insn_b; |
1577 | rtx target; | |
0bb604ca | 1578 | int is_mem = 0; |
57ee590e | 1579 | int insn_cost; |
0bb604ca | 1580 | enum rtx_code code; |
ed3e6e5d | 1581 | rtx_insn *ifcvt_seq; |
0bb604ca | 1582 | |
1583 | /* A conditional move from two memory sources is equivalent to a | |
1584 | conditional on their addresses followed by a load. Don't do this | |
1585 | early because it'll screw alias analysis. Note that we've | |
1586 | already checked for no side effects. */ | |
03dbd7cc | 1587 | /* ??? FIXME: Magic number 5. */ |
1588 | if (cse_not_expected | |
e16ceb8e | 1589 | && MEM_P (a) && MEM_P (b) |
bd1a81f7 | 1590 | && MEM_ADDR_SPACE (a) == MEM_ADDR_SPACE (b) |
4a9d7ef7 | 1591 | && if_info->branch_cost >= 5) |
0bb604ca | 1592 | { |
3754d046 | 1593 | machine_mode address_mode = get_address_mode (a); |
98155838 | 1594 | |
0bb604ca | 1595 | a = XEXP (a, 0); |
1596 | b = XEXP (b, 0); | |
98155838 | 1597 | x = gen_reg_rtx (address_mode); |
0bb604ca | 1598 | is_mem = 1; |
1599 | } | |
1600 | ||
1601 | /* ??? We could handle this if we knew that a load from A or B could | |
1c448b92 | 1602 | not trap or fault. This is also true if we've already loaded |
0bb604ca | 1603 | from the address along the path from ENTRY. */ |
1c448b92 | 1604 | else if (may_trap_or_fault_p (a) || may_trap_or_fault_p (b)) |
0bb604ca | 1605 | return FALSE; |
1606 | ||
1607 | /* if (test) x = a + b; else x = c - d; | |
1608 | => y = a + b; | |
1609 | x = c - d; | |
1610 | if (test) | |
1611 | x = y; | |
1612 | */ | |
952f0048 | 1613 | |
0bb604ca | 1614 | code = GET_CODE (if_info->cond); |
1615 | insn_a = if_info->insn_a; | |
1616 | insn_b = if_info->insn_b; | |
1617 | ||
57ee590e | 1618 | /* Total insn_rtx_cost should be smaller than branch cost. Exit |
1619 | if insn_rtx_cost can't be estimated. */ | |
1620 | if (insn_a) | |
1621 | { | |
76b61550 | 1622 | insn_cost |
1623 | = insn_rtx_cost (PATTERN (insn_a), | |
1624 | optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_a))); | |
4a9d7ef7 | 1625 | if (insn_cost == 0 || insn_cost > COSTS_N_INSNS (if_info->branch_cost)) |
57ee590e | 1626 | return FALSE; |
1627 | } | |
1628 | else | |
7d4c98bc | 1629 | insn_cost = 0; |
1630 | ||
1631 | if (insn_b) | |
57ee590e | 1632 | { |
76b61550 | 1633 | insn_cost |
1634 | += insn_rtx_cost (PATTERN (insn_b), | |
1635 | optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_b))); | |
4a9d7ef7 | 1636 | if (insn_cost == 0 || insn_cost > COSTS_N_INSNS (if_info->branch_cost)) |
7d4c98bc | 1637 | return FALSE; |
57ee590e | 1638 | } |
1639 | ||
0bb604ca | 1640 | /* Possibly rearrange operands to make things come out more natural. */ |
a3dbed00 | 1641 | if (reversed_comparison_code (if_info->cond, if_info->jump) != UNKNOWN) |
0bb604ca | 1642 | { |
1643 | int reversep = 0; | |
1644 | if (rtx_equal_p (b, x)) | |
1645 | reversep = 1; | |
1646 | else if (general_operand (b, GET_MODE (b))) | |
1647 | reversep = 1; | |
1648 | ||
1649 | if (reversep) | |
1650 | { | |
ed3e6e5d | 1651 | rtx tmp; |
1652 | rtx_insn *tmp_insn; | |
a3dbed00 | 1653 | code = reversed_comparison_code (if_info->cond, if_info->jump); |
0bb604ca | 1654 | tmp = a, a = b, b = tmp; |
ed3e6e5d | 1655 | tmp_insn = insn_a, insn_a = insn_b, insn_b = tmp_insn; |
0bb604ca | 1656 | } |
1657 | } | |
1658 | ||
1659 | start_sequence (); | |
1660 | ||
e1abb347 | 1661 | orig_a = a; |
1662 | orig_b = b; | |
1663 | ||
0bb604ca | 1664 | /* If either operand is complex, load it into a register first. |
1665 | The best way to do this is to copy the original insn. In this | |
952f0048 | 1666 | way we preserve any clobbers etc that the insn may have had. |
0bb604ca | 1667 | This is of course not possible in the IS_MEM case. */ |
1668 | if (! general_operand (a, GET_MODE (a))) | |
1669 | { | |
ed3e6e5d | 1670 | rtx_insn *insn; |
0bb604ca | 1671 | |
0bb604ca | 1672 | if (is_mem) |
1673 | { | |
ed3e6e5d | 1674 | rtx reg = gen_reg_rtx (GET_MODE (a)); |
1675 | insn = emit_insn (gen_rtx_SET (VOIDmode, reg, a)); | |
0bb604ca | 1676 | } |
1677 | else if (! insn_a) | |
1678 | goto end_seq_and_fail; | |
1679 | else | |
1680 | { | |
1681 | a = gen_reg_rtx (GET_MODE (a)); | |
ed3e6e5d | 1682 | rtx_insn *copy_of_a = as_a <rtx_insn *> (copy_rtx (insn_a)); |
1683 | rtx set = single_set (copy_of_a); | |
0bb604ca | 1684 | SET_DEST (set) = a; |
ed3e6e5d | 1685 | insn = emit_insn (PATTERN (copy_of_a)); |
0bb604ca | 1686 | } |
ed3e6e5d | 1687 | if (recog_memoized (insn) < 0) |
0bb604ca | 1688 | goto end_seq_and_fail; |
1689 | } | |
1690 | if (! general_operand (b, GET_MODE (b))) | |
1691 | { | |
ed3e6e5d | 1692 | rtx pat; |
1693 | rtx_insn *last; | |
1694 | rtx_insn *new_insn; | |
0bb604ca | 1695 | |
0bb604ca | 1696 | if (is_mem) |
1697 | { | |
ed3e6e5d | 1698 | rtx reg = gen_reg_rtx (GET_MODE (b)); |
1699 | pat = gen_rtx_SET (VOIDmode, reg, b); | |
0bb604ca | 1700 | } |
1701 | else if (! insn_b) | |
1702 | goto end_seq_and_fail; | |
1703 | else | |
1704 | { | |
1705 | b = gen_reg_rtx (GET_MODE (b)); | |
ed3e6e5d | 1706 | rtx_insn *copy_of_insn_b = as_a <rtx_insn *> (copy_rtx (insn_b)); |
1707 | rtx set = single_set (copy_of_insn_b); | |
0bb604ca | 1708 | SET_DEST (set) = b; |
ed3e6e5d | 1709 | pat = PATTERN (copy_of_insn_b); |
e1abb347 | 1710 | } |
1711 | ||
1712 | /* If insn to set up A clobbers any registers B depends on, try to | |
1713 | swap insn that sets up A with the one that sets up B. If even | |
1714 | that doesn't help, punt. */ | |
1715 | last = get_last_insn (); | |
1716 | if (last && modified_in_p (orig_b, last)) | |
1717 | { | |
ed3e6e5d | 1718 | new_insn = emit_insn_before (pat, get_insns ()); |
1719 | if (modified_in_p (orig_a, new_insn)) | |
e1abb347 | 1720 | goto end_seq_and_fail; |
0bb604ca | 1721 | } |
e1abb347 | 1722 | else |
ed3e6e5d | 1723 | new_insn = emit_insn (pat); |
e1abb347 | 1724 | |
ed3e6e5d | 1725 | if (recog_memoized (new_insn) < 0) |
0bb604ca | 1726 | goto end_seq_and_fail; |
1727 | } | |
1728 | ||
1729 | target = noce_emit_cmove (if_info, x, code, XEXP (if_info->cond, 0), | |
1730 | XEXP (if_info->cond, 1), a, b); | |
1731 | ||
1732 | if (! target) | |
1733 | goto end_seq_and_fail; | |
1734 | ||
1735 | /* If we're handling a memory for above, emit the load now. */ | |
1736 | if (is_mem) | |
1737 | { | |
ed3e6e5d | 1738 | rtx mem = gen_rtx_MEM (GET_MODE (if_info->x), target); |
0bb604ca | 1739 | |
1740 | /* Copy over flags as appropriate. */ | |
1741 | if (MEM_VOLATILE_P (if_info->a) || MEM_VOLATILE_P (if_info->b)) | |
ed3e6e5d | 1742 | MEM_VOLATILE_P (mem) = 1; |
0bb604ca | 1743 | if (MEM_ALIAS_SET (if_info->a) == MEM_ALIAS_SET (if_info->b)) |
ed3e6e5d | 1744 | set_mem_alias_set (mem, MEM_ALIAS_SET (if_info->a)); |
1745 | set_mem_align (mem, | |
2a631e19 | 1746 | MIN (MEM_ALIGN (if_info->a), MEM_ALIGN (if_info->b))); |
0bb604ca | 1747 | |
bd1a81f7 | 1748 | gcc_assert (MEM_ADDR_SPACE (if_info->a) == MEM_ADDR_SPACE (if_info->b)); |
ed3e6e5d | 1749 | set_mem_addr_space (mem, MEM_ADDR_SPACE (if_info->a)); |
bd1a81f7 | 1750 | |
ed3e6e5d | 1751 | noce_emit_move_insn (if_info->x, mem); |
0bb604ca | 1752 | } |
1753 | else if (target != x) | |
8b8f1119 | 1754 | noce_emit_move_insn (x, target); |
0bb604ca | 1755 | |
ed3e6e5d | 1756 | ifcvt_seq = end_ifcvt_sequence (if_info); |
1757 | if (!ifcvt_seq) | |
1a81ce76 | 1758 | return FALSE; |
1759 | ||
ed3e6e5d | 1760 | emit_insn_before_setloc (ifcvt_seq, if_info->jump, |
1761 | INSN_LOCATION (if_info->insn_a)); | |
0bb604ca | 1762 | return TRUE; |
1763 | ||
1764 | end_seq_and_fail: | |
1765 | end_sequence (); | |
1766 | return FALSE; | |
1767 | } | |
1768 | ||
4f63c6d1 | 1769 | /* For most cases, the simplified condition we found is the best |
1770 | choice, but this is not the case for the min/max/abs transforms. | |
1771 | For these we wish to know that it is A or B in the condition. */ | |
1772 | ||
1773 | static rtx | |
952f0048 | 1774 | noce_get_alt_condition (struct noce_if_info *if_info, rtx target, |
2d650f54 | 1775 | rtx_insn **earliest) |
4f63c6d1 | 1776 | { |
2d650f54 | 1777 | rtx cond, set; |
1778 | rtx_insn *insn; | |
4f63c6d1 | 1779 | int reverse; |
1780 | ||
1781 | /* If target is already mentioned in the known condition, return it. */ | |
1782 | if (reg_mentioned_p (target, if_info->cond)) | |
1783 | { | |
1784 | *earliest = if_info->cond_earliest; | |
1785 | return if_info->cond; | |
1786 | } | |
1787 | ||
1788 | set = pc_set (if_info->jump); | |
1789 | cond = XEXP (SET_SRC (set), 0); | |
1790 | reverse | |
1791 | = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF | |
b49f2e4b | 1792 | && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (if_info->jump); |
ba45c933 | 1793 | if (if_info->then_else_reversed) |
1794 | reverse = !reverse; | |
4f63c6d1 | 1795 | |
e5198b6c | 1796 | /* If we're looking for a constant, try to make the conditional |
1797 | have that constant in it. There are two reasons why it may | |
1798 | not have the constant we want: | |
1799 | ||
1800 | 1. GCC may have needed to put the constant in a register, because | |
1801 | the target can't compare directly against that constant. For | |
1802 | this case, we look for a SET immediately before the comparison | |
1803 | that puts a constant in that register. | |
1804 | ||
1805 | 2. GCC may have canonicalized the conditional, for example | |
1806 | replacing "if x < 4" with "if x <= 3". We can undo that (or | |
1807 | make equivalent types of changes) to get the constants we need | |
1808 | if they're off by one in the right direction. */ | |
1809 | ||
971ba038 | 1810 | if (CONST_INT_P (target)) |
e5198b6c | 1811 | { |
1812 | enum rtx_code code = GET_CODE (if_info->cond); | |
1813 | rtx op_a = XEXP (if_info->cond, 0); | |
1814 | rtx op_b = XEXP (if_info->cond, 1); | |
1815 | rtx prev_insn; | |
1816 | ||
1817 | /* First, look to see if we put a constant in a register. */ | |
76d4a3e1 | 1818 | prev_insn = prev_nonnote_insn (if_info->cond_earliest); |
e5198b6c | 1819 | if (prev_insn |
90bd219d | 1820 | && BLOCK_FOR_INSN (prev_insn) |
1821 | == BLOCK_FOR_INSN (if_info->cond_earliest) | |
e5198b6c | 1822 | && INSN_P (prev_insn) |
1823 | && GET_CODE (PATTERN (prev_insn)) == SET) | |
1824 | { | |
1825 | rtx src = find_reg_equal_equiv_note (prev_insn); | |
1826 | if (!src) | |
1827 | src = SET_SRC (PATTERN (prev_insn)); | |
971ba038 | 1828 | if (CONST_INT_P (src)) |
e5198b6c | 1829 | { |
1830 | if (rtx_equal_p (op_a, SET_DEST (PATTERN (prev_insn)))) | |
97e1cc10 | 1831 | op_a = src; |
e5198b6c | 1832 | else if (rtx_equal_p (op_b, SET_DEST (PATTERN (prev_insn)))) |
97e1cc10 | 1833 | op_b = src; |
e5198b6c | 1834 | |
971ba038 | 1835 | if (CONST_INT_P (op_a)) |
e5198b6c | 1836 | { |
1837 | rtx tmp = op_a; | |
1838 | op_a = op_b; | |
1839 | op_b = tmp; | |
1840 | code = swap_condition (code); | |
1841 | } | |
1842 | } | |
1843 | } | |
1844 | ||
1845 | /* Now, look to see if we can get the right constant by | |
1846 | adjusting the conditional. */ | |
971ba038 | 1847 | if (CONST_INT_P (op_b)) |
e5198b6c | 1848 | { |
1849 | HOST_WIDE_INT desired_val = INTVAL (target); | |
1850 | HOST_WIDE_INT actual_val = INTVAL (op_b); | |
1851 | ||
1852 | switch (code) | |
1853 | { | |
1854 | case LT: | |
1855 | if (actual_val == desired_val + 1) | |
1856 | { | |
1857 | code = LE; | |
1858 | op_b = GEN_INT (desired_val); | |
1859 | } | |
1860 | break; | |
1861 | case LE: | |
1862 | if (actual_val == desired_val - 1) | |
1863 | { | |
1864 | code = LT; | |
1865 | op_b = GEN_INT (desired_val); | |
1866 | } | |
1867 | break; | |
1868 | case GT: | |
1869 | if (actual_val == desired_val - 1) | |
1870 | { | |
1871 | code = GE; | |
1872 | op_b = GEN_INT (desired_val); | |
1873 | } | |
1874 | break; | |
1875 | case GE: | |
1876 | if (actual_val == desired_val + 1) | |
1877 | { | |
1878 | code = GT; | |
1879 | op_b = GEN_INT (desired_val); | |
1880 | } | |
1881 | break; | |
1882 | default: | |
1883 | break; | |
1884 | } | |
1885 | } | |
1886 | ||
1887 | /* If we made any changes, generate a new conditional that is | |
1888 | equivalent to what we started with, but has the right | |
1889 | constants in it. */ | |
1890 | if (code != GET_CODE (if_info->cond) | |
1891 | || op_a != XEXP (if_info->cond, 0) | |
1892 | || op_b != XEXP (if_info->cond, 1)) | |
1893 | { | |
1894 | cond = gen_rtx_fmt_ee (code, GET_MODE (cond), op_a, op_b); | |
1895 | *earliest = if_info->cond_earliest; | |
1896 | return cond; | |
1897 | } | |
1898 | } | |
1899 | ||
4f63c6d1 | 1900 | cond = canonicalize_condition (if_info->jump, cond, reverse, |
a255f65a | 1901 | earliest, target, false, true); |
4f63c6d1 | 1902 | if (! cond || ! reg_mentioned_p (target, cond)) |
1903 | return NULL; | |
1904 | ||
1905 | /* We almost certainly searched back to a different place. | |
1906 | Need to re-verify correct lifetimes. */ | |
1907 | ||
1908 | /* X may not be mentioned in the range (cond_earliest, jump]. */ | |
1909 | for (insn = if_info->jump; insn != *earliest; insn = PREV_INSN (insn)) | |
95c02608 | 1910 | if (INSN_P (insn) && reg_overlap_mentioned_p (if_info->x, PATTERN (insn))) |
4f63c6d1 | 1911 | return NULL; |
1912 | ||
1913 | /* A and B may not be modified in the range [cond_earliest, jump). */ | |
1914 | for (insn = *earliest; insn != if_info->jump; insn = NEXT_INSN (insn)) | |
1915 | if (INSN_P (insn) | |
1916 | && (modified_in_p (if_info->a, insn) | |
1917 | || modified_in_p (if_info->b, insn))) | |
1918 | return NULL; | |
1919 | ||
1920 | return cond; | |
1921 | } | |
1922 | ||
1923 | /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */ | |
1924 | ||
1925 | static int | |
952f0048 | 1926 | noce_try_minmax (struct noce_if_info *if_info) |
1927 | { | |
2d650f54 | 1928 | rtx cond, target; |
1929 | rtx_insn *earliest, *seq; | |
ad99e708 | 1930 | enum rtx_code code, op; |
4f63c6d1 | 1931 | int unsignedp; |
4f63c6d1 | 1932 | |
920d0fb5 | 1933 | /* ??? Reject modes with NaNs or signed zeros since we don't know how |
1934 | they will be resolved with an SMIN/SMAX. It wouldn't be too hard | |
4f63c6d1 | 1935 | to get the target to tell us... */ |
920d0fb5 | 1936 | if (HONOR_SIGNED_ZEROS (GET_MODE (if_info->x)) |
1937 | || HONOR_NANS (GET_MODE (if_info->x))) | |
4f63c6d1 | 1938 | return FALSE; |
1939 | ||
1940 | cond = noce_get_alt_condition (if_info, if_info->a, &earliest); | |
1941 | if (!cond) | |
1942 | return FALSE; | |
1943 | ||
1944 | /* Verify the condition is of the form we expect, and canonicalize | |
1945 | the comparison code. */ | |
1946 | code = GET_CODE (cond); | |
1947 | if (rtx_equal_p (XEXP (cond, 0), if_info->a)) | |
1948 | { | |
1949 | if (! rtx_equal_p (XEXP (cond, 1), if_info->b)) | |
1950 | return FALSE; | |
1951 | } | |
1952 | else if (rtx_equal_p (XEXP (cond, 1), if_info->a)) | |
1953 | { | |
1954 | if (! rtx_equal_p (XEXP (cond, 0), if_info->b)) | |
1955 | return FALSE; | |
1956 | code = swap_condition (code); | |
1957 | } | |
1958 | else | |
1959 | return FALSE; | |
1960 | ||
1961 | /* Determine what sort of operation this is. Note that the code is for | |
1962 | a taken branch, so the code->operation mapping appears backwards. */ | |
1963 | switch (code) | |
1964 | { | |
1965 | case LT: | |
1966 | case LE: | |
1967 | case UNLT: | |
1968 | case UNLE: | |
ad99e708 | 1969 | op = SMAX; |
4f63c6d1 | 1970 | unsignedp = 0; |
1971 | break; | |
1972 | case GT: | |
1973 | case GE: | |
1974 | case UNGT: | |
1975 | case UNGE: | |
ad99e708 | 1976 | op = SMIN; |
4f63c6d1 | 1977 | unsignedp = 0; |
1978 | break; | |
1979 | case LTU: | |
1980 | case LEU: | |
ad99e708 | 1981 | op = UMAX; |
4f63c6d1 | 1982 | unsignedp = 1; |
1983 | break; | |
1984 | case GTU: | |
1985 | case GEU: | |
ad99e708 | 1986 | op = UMIN; |
4f63c6d1 | 1987 | unsignedp = 1; |
1988 | break; | |
1989 | default: | |
1990 | return FALSE; | |
1991 | } | |
1992 | ||
1993 | start_sequence (); | |
1994 | ||
ad99e708 | 1995 | target = expand_simple_binop (GET_MODE (if_info->x), op, |
1996 | if_info->a, if_info->b, | |
1997 | if_info->x, unsignedp, OPTAB_WIDEN); | |
4f63c6d1 | 1998 | if (! target) |
1999 | { | |
2000 | end_sequence (); | |
2001 | return FALSE; | |
2002 | } | |
2003 | if (target != if_info->x) | |
8b8f1119 | 2004 | noce_emit_move_insn (if_info->x, target); |
4f63c6d1 | 2005 | |
1a81ce76 | 2006 | seq = end_ifcvt_sequence (if_info); |
2007 | if (!seq) | |
4f63c6d1 | 2008 | return FALSE; |
2009 | ||
5169661d | 2010 | emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a)); |
4f63c6d1 | 2011 | if_info->cond = cond; |
2012 | if_info->cond_earliest = earliest; | |
2013 | ||
2014 | return TRUE; | |
2015 | } | |
2016 | ||
94e08e50 | 2017 | /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);", |
2018 | "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);", | |
2019 | etc. */ | |
4f63c6d1 | 2020 | |
2021 | static int | |
952f0048 | 2022 | noce_try_abs (struct noce_if_info *if_info) |
2023 | { | |
2d650f54 | 2024 | rtx cond, target, a, b, c; |
2025 | rtx_insn *earliest, *seq; | |
4f63c6d1 | 2026 | int negate; |
94e08e50 | 2027 | bool one_cmpl = false; |
4f63c6d1 | 2028 | |
01e93ec4 | 2029 | /* Reject modes with signed zeros. */ |
2030 | if (HONOR_SIGNED_ZEROS (GET_MODE (if_info->x))) | |
2031 | return FALSE; | |
2032 | ||
76d4a3e1 | 2033 | /* Recognize A and B as constituting an ABS or NABS. The canonical |
2034 | form is a branch around the negation, taken when the object is the | |
2035 | first operand of a comparison against 0 that evaluates to true. */ | |
4f63c6d1 | 2036 | a = if_info->a; |
2037 | b = if_info->b; | |
2038 | if (GET_CODE (a) == NEG && rtx_equal_p (XEXP (a, 0), b)) | |
2039 | negate = 0; | |
2040 | else if (GET_CODE (b) == NEG && rtx_equal_p (XEXP (b, 0), a)) | |
2041 | { | |
2042 | c = a; a = b; b = c; | |
2043 | negate = 1; | |
2044 | } | |
94e08e50 | 2045 | else if (GET_CODE (a) == NOT && rtx_equal_p (XEXP (a, 0), b)) |
2046 | { | |
2047 | negate = 0; | |
2048 | one_cmpl = true; | |
2049 | } | |
2050 | else if (GET_CODE (b) == NOT && rtx_equal_p (XEXP (b, 0), a)) | |
2051 | { | |
2052 | c = a; a = b; b = c; | |
2053 | negate = 1; | |
2054 | one_cmpl = true; | |
2055 | } | |
4f63c6d1 | 2056 | else |
2057 | return FALSE; | |
952f0048 | 2058 | |
4f63c6d1 | 2059 | cond = noce_get_alt_condition (if_info, b, &earliest); |
2060 | if (!cond) | |
2061 | return FALSE; | |
2062 | ||
2063 | /* Verify the condition is of the form we expect. */ | |
2064 | if (rtx_equal_p (XEXP (cond, 0), b)) | |
2065 | c = XEXP (cond, 1); | |
2066 | else if (rtx_equal_p (XEXP (cond, 1), b)) | |
76d4a3e1 | 2067 | { |
2068 | c = XEXP (cond, 0); | |
2069 | negate = !negate; | |
2070 | } | |
4f63c6d1 | 2071 | else |
2072 | return FALSE; | |
2073 | ||
76d4a3e1 | 2074 | /* Verify that C is zero. Search one step backward for a |
2075 | REG_EQUAL note or a simple source if necessary. */ | |
4f63c6d1 | 2076 | if (REG_P (c)) |
2077 | { | |
50fc2d35 | 2078 | rtx set; |
2079 | rtx_insn *insn = prev_nonnote_insn (earliest); | |
76d4a3e1 | 2080 | if (insn |
90bd219d | 2081 | && BLOCK_FOR_INSN (insn) == BLOCK_FOR_INSN (earliest) |
76d4a3e1 | 2082 | && (set = single_set (insn)) |
2083 | && rtx_equal_p (SET_DEST (set), c)) | |
2084 | { | |
2085 | rtx note = find_reg_equal_equiv_note (insn); | |
2086 | if (note) | |
2087 | c = XEXP (note, 0); | |
2088 | else | |
2089 | c = SET_SRC (set); | |
2090 | } | |
2091 | else | |
4f63c6d1 | 2092 | return FALSE; |
4f63c6d1 | 2093 | } |
e16ceb8e | 2094 | if (MEM_P (c) |
4f63c6d1 | 2095 | && GET_CODE (XEXP (c, 0)) == SYMBOL_REF |
2096 | && CONSTANT_POOL_ADDRESS_P (XEXP (c, 0))) | |
2097 | c = get_pool_constant (XEXP (c, 0)); | |
2098 | ||
2099 | /* Work around funny ideas get_condition has wrt canonicalization. | |
952f0048 | 2100 | Note that these rtx constants are known to be CONST_INT, and |
4f63c6d1 | 2101 | therefore imply integer comparisons. */ |
2102 | if (c == constm1_rtx && GET_CODE (cond) == GT) | |
2103 | ; | |
2104 | else if (c == const1_rtx && GET_CODE (cond) == LT) | |
2105 | ; | |
2106 | else if (c != CONST0_RTX (GET_MODE (b))) | |
2107 | return FALSE; | |
2108 | ||
2109 | /* Determine what sort of operation this is. */ | |
2110 | switch (GET_CODE (cond)) | |
2111 | { | |
2112 | case LT: | |
2113 | case LE: | |
2114 | case UNLT: | |
2115 | case UNLE: | |
2116 | negate = !negate; | |
2117 | break; | |
2118 | case GT: | |
2119 | case GE: | |
2120 | case UNGT: | |
2121 | case UNGE: | |
2122 | break; | |
2123 | default: | |
2124 | return FALSE; | |
2125 | } | |
2126 | ||
2127 | start_sequence (); | |
94e08e50 | 2128 | if (one_cmpl) |
2129 | target = expand_one_cmpl_abs_nojump (GET_MODE (if_info->x), b, | |
2130 | if_info->x); | |
2131 | else | |
2132 | target = expand_abs_nojump (GET_MODE (if_info->x), b, if_info->x, 1); | |
4f63c6d1 | 2133 | |
40e55fbb | 2134 | /* ??? It's a quandary whether cmove would be better here, especially |
4f63c6d1 | 2135 | for integers. Perhaps combine will clean things up. */ |
2136 | if (target && negate) | |
94e08e50 | 2137 | { |
2138 | if (one_cmpl) | |
2139 | target = expand_simple_unop (GET_MODE (target), NOT, target, | |
2140 | if_info->x, 0); | |
2141 | else | |
2142 | target = expand_simple_unop (GET_MODE (target), NEG, target, | |
2143 | if_info->x, 0); | |
2144 | } | |
4f63c6d1 | 2145 | |
2146 | if (! target) | |
2147 | { | |
2148 | end_sequence (); | |
2149 | return FALSE; | |
2150 | } | |
2151 | ||
2152 | if (target != if_info->x) | |
8b8f1119 | 2153 | noce_emit_move_insn (if_info->x, target); |
4f63c6d1 | 2154 | |
1a81ce76 | 2155 | seq = end_ifcvt_sequence (if_info); |
2156 | if (!seq) | |
4f63c6d1 | 2157 | return FALSE; |
2158 | ||
5169661d | 2159 | emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a)); |
4f63c6d1 | 2160 | if_info->cond = cond; |
2161 | if_info->cond_earliest = earliest; | |
2162 | ||
2163 | return TRUE; | |
2164 | } | |
2165 | ||
1c98eaaa | 2166 | /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */ |
2167 | ||
2168 | static int | |
2169 | noce_try_sign_mask (struct noce_if_info *if_info) | |
2170 | { | |
ca0df1e3 | 2171 | rtx cond, t, m, c; |
2172 | rtx_insn *seq; | |
3754d046 | 2173 | machine_mode mode; |
1c98eaaa | 2174 | enum rtx_code code; |
5a14b2b4 | 2175 | bool t_unconditional; |
1c98eaaa | 2176 | |
1c98eaaa | 2177 | cond = if_info->cond; |
2178 | code = GET_CODE (cond); | |
2179 | m = XEXP (cond, 0); | |
2180 | c = XEXP (cond, 1); | |
2181 | ||
2182 | t = NULL_RTX; | |
2183 | if (if_info->a == const0_rtx) | |
2184 | { | |
2185 | if ((code == LT && c == const0_rtx) | |
2186 | || (code == LE && c == constm1_rtx)) | |
2187 | t = if_info->b; | |
2188 | } | |
2189 | else if (if_info->b == const0_rtx) | |
2190 | { | |
2191 | if ((code == GE && c == const0_rtx) | |
2192 | || (code == GT && c == constm1_rtx)) | |
2193 | t = if_info->a; | |
2194 | } | |
2195 | ||
2196 | if (! t || side_effects_p (t)) | |
2197 | return FALSE; | |
2198 | ||
2199 | /* We currently don't handle different modes. */ | |
2200 | mode = GET_MODE (t); | |
2201 | if (GET_MODE (m) != mode) | |
2202 | return FALSE; | |
2203 | ||
5a14b2b4 | 2204 | /* This is only profitable if T is unconditionally executed/evaluated in the |
2205 | original insn sequence or T is cheap. The former happens if B is the | |
2206 | non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no | |
2207 | INSN_B which can happen for e.g. conditional stores to memory. For the | |
2208 | cost computation use the block TEST_BB where the evaluation will end up | |
2209 | after the transformation. */ | |
2210 | t_unconditional = | |
2211 | (t == if_info->b | |
2212 | && (if_info->insn_b == NULL_RTX | |
2213 | || BLOCK_FOR_INSN (if_info->insn_b) == if_info->test_bb)); | |
2214 | if (!(t_unconditional | |
7013e87c | 2215 | || (set_src_cost (t, optimize_bb_for_speed_p (if_info->test_bb)) |
5a14b2b4 | 2216 | < COSTS_N_INSNS (2)))) |
1c98eaaa | 2217 | return FALSE; |
2218 | ||
2219 | start_sequence (); | |
29852f1d | 2220 | /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding |
2221 | "(signed) m >> 31" directly. This benefits targets with specialized | |
2222 | insns to obtain the signmask, but still uses ashr_optab otherwise. */ | |
2223 | m = emit_store_flag (gen_reg_rtx (mode), LT, m, const0_rtx, mode, 0, -1); | |
1c98eaaa | 2224 | t = m ? expand_binop (mode, and_optab, m, t, NULL_RTX, 0, OPTAB_DIRECT) |
2225 | : NULL_RTX; | |
2226 | ||
2227 | if (!t) | |
2228 | { | |
2229 | end_sequence (); | |
2230 | return FALSE; | |
2231 | } | |
2232 | ||
2233 | noce_emit_move_insn (if_info->x, t); | |
1a81ce76 | 2234 | |
2235 | seq = end_ifcvt_sequence (if_info); | |
2236 | if (!seq) | |
2237 | return FALSE; | |
2238 | ||
5169661d | 2239 | emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a)); |
1c98eaaa | 2240 | return TRUE; |
2241 | } | |
2242 | ||
2243 | ||
9d666332 | 2244 | /* Optimize away "if (x & C) x |= C" and similar bit manipulation |
2245 | transformations. */ | |
2246 | ||
2247 | static int | |
2248 | noce_try_bitop (struct noce_if_info *if_info) | |
2249 | { | |
ca0df1e3 | 2250 | rtx cond, x, a, result; |
2251 | rtx_insn *seq; | |
3754d046 | 2252 | machine_mode mode; |
9d666332 | 2253 | enum rtx_code code; |
2254 | int bitnum; | |
2255 | ||
2256 | x = if_info->x; | |
2257 | cond = if_info->cond; | |
2258 | code = GET_CODE (cond); | |
2259 | ||
2260 | /* Check for no else condition. */ | |
2261 | if (! rtx_equal_p (x, if_info->b)) | |
2262 | return FALSE; | |
2263 | ||
2264 | /* Check for a suitable condition. */ | |
2265 | if (code != NE && code != EQ) | |
2266 | return FALSE; | |
2267 | if (XEXP (cond, 1) != const0_rtx) | |
2268 | return FALSE; | |
2269 | cond = XEXP (cond, 0); | |
2270 | ||
2271 | /* ??? We could also handle AND here. */ | |
2272 | if (GET_CODE (cond) == ZERO_EXTRACT) | |
2273 | { | |
2274 | if (XEXP (cond, 1) != const1_rtx | |
971ba038 | 2275 | || !CONST_INT_P (XEXP (cond, 2)) |
9d666332 | 2276 | || ! rtx_equal_p (x, XEXP (cond, 0))) |
2277 | return FALSE; | |
2278 | bitnum = INTVAL (XEXP (cond, 2)); | |
2279 | mode = GET_MODE (x); | |
1d75ed51 | 2280 | if (BITS_BIG_ENDIAN) |
2281 | bitnum = GET_MODE_BITSIZE (mode) - 1 - bitnum; | |
2282 | if (bitnum < 0 || bitnum >= HOST_BITS_PER_WIDE_INT) | |
9d666332 | 2283 | return FALSE; |
2284 | } | |
2285 | else | |
2286 | return FALSE; | |
2287 | ||
2288 | a = if_info->a; | |
2289 | if (GET_CODE (a) == IOR || GET_CODE (a) == XOR) | |
2290 | { | |
2291 | /* Check for "if (X & C) x = x op C". */ | |
2292 | if (! rtx_equal_p (x, XEXP (a, 0)) | |
971ba038 | 2293 | || !CONST_INT_P (XEXP (a, 1)) |
9d666332 | 2294 | || (INTVAL (XEXP (a, 1)) & GET_MODE_MASK (mode)) |
2295 | != (unsigned HOST_WIDE_INT) 1 << bitnum) | |
2296 | return FALSE; | |
2297 | ||
2298 | /* if ((x & C) == 0) x |= C; is transformed to x |= C. */ | |
2299 | /* if ((x & C) != 0) x |= C; is transformed to nothing. */ | |
2300 | if (GET_CODE (a) == IOR) | |
2301 | result = (code == NE) ? a : NULL_RTX; | |
2302 | else if (code == NE) | |
2303 | { | |
2304 | /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */ | |
2305 | result = gen_int_mode ((HOST_WIDE_INT) 1 << bitnum, mode); | |
2306 | result = simplify_gen_binary (IOR, mode, x, result); | |
2307 | } | |
2308 | else | |
2309 | { | |
2310 | /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */ | |
2311 | result = gen_int_mode (~((HOST_WIDE_INT) 1 << bitnum), mode); | |
2312 | result = simplify_gen_binary (AND, mode, x, result); | |
2313 | } | |
2314 | } | |
2315 | else if (GET_CODE (a) == AND) | |
2316 | { | |
2317 | /* Check for "if (X & C) x &= ~C". */ | |
2318 | if (! rtx_equal_p (x, XEXP (a, 0)) | |
971ba038 | 2319 | || !CONST_INT_P (XEXP (a, 1)) |
9d666332 | 2320 | || (INTVAL (XEXP (a, 1)) & GET_MODE_MASK (mode)) |
2321 | != (~((HOST_WIDE_INT) 1 << bitnum) & GET_MODE_MASK (mode))) | |
2322 | return FALSE; | |
2323 | ||
2324 | /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */ | |
2325 | /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */ | |
2326 | result = (code == EQ) ? a : NULL_RTX; | |
2327 | } | |
2328 | else | |
2329 | return FALSE; | |
2330 | ||
2331 | if (result) | |
2332 | { | |
2333 | start_sequence (); | |
2334 | noce_emit_move_insn (x, result); | |
2335 | seq = end_ifcvt_sequence (if_info); | |
2336 | if (!seq) | |
2337 | return FALSE; | |
2338 | ||
2339 | emit_insn_before_setloc (seq, if_info->jump, | |
5169661d | 2340 | INSN_LOCATION (if_info->insn_a)); |
9d666332 | 2341 | } |
2342 | return TRUE; | |
2343 | } | |
2344 | ||
2345 | ||
a95cabb9 | 2346 | /* Similar to get_condition, only the resulting condition must be |
03dbd7cc | 2347 | valid at JUMP, instead of at EARLIEST. |
2348 | ||
ba45c933 | 2349 | If THEN_ELSE_REVERSED is true, the fallthrough does not go to the |
2350 | THEN block of the caller, and we have to reverse the condition. */ | |
0bb604ca | 2351 | |
2352 | static rtx | |
2d650f54 | 2353 | noce_get_condition (rtx_insn *jump, rtx_insn **earliest, bool then_else_reversed) |
0bb604ca | 2354 | { |
a255f65a | 2355 | rtx cond, set, tmp; |
a95cabb9 | 2356 | bool reverse; |
0bb604ca | 2357 | |
b2816317 | 2358 | if (! any_condjump_p (jump)) |
0bb604ca | 2359 | return NULL_RTX; |
2360 | ||
b2816317 | 2361 | set = pc_set (jump); |
2362 | ||
a95cabb9 | 2363 | /* If this branches to JUMP_LABEL when the condition is false, |
2364 | reverse the condition. */ | |
2365 | reverse = (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF | |
b49f2e4b | 2366 | && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (jump)); |
a95cabb9 | 2367 | |
ba45c933 | 2368 | /* We may have to reverse because the caller's if block is not canonical, |
2369 | i.e. the THEN block isn't the fallthrough block for the TEST block | |
2370 | (see find_if_header). */ | |
03dbd7cc | 2371 | if (then_else_reversed) |
2372 | reverse = !reverse; | |
2373 | ||
a95cabb9 | 2374 | /* If the condition variable is a register and is MODE_INT, accept it. */ |
2375 | ||
b2816317 | 2376 | cond = XEXP (SET_SRC (set), 0); |
a95cabb9 | 2377 | tmp = XEXP (cond, 0); |
68b509aa | 2378 | if (REG_P (tmp) && GET_MODE_CLASS (GET_MODE (tmp)) == MODE_INT |
2379 | && (GET_MODE (tmp) != BImode | |
2380 | || !targetm.small_register_classes_for_mode_p (BImode))) | |
0bb604ca | 2381 | { |
2382 | *earliest = jump; | |
2383 | ||
a95cabb9 | 2384 | if (reverse) |
0bb604ca | 2385 | cond = gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond)), |
a95cabb9 | 2386 | GET_MODE (cond), tmp, XEXP (cond, 1)); |
2387 | return cond; | |
0bb604ca | 2388 | } |
0bb604ca | 2389 | |
a95cabb9 | 2390 | /* Otherwise, fall back on canonicalize_condition to do the dirty |
2391 | work of manipulating MODE_CC values and COMPARE rtx codes. */ | |
3fdc20c8 | 2392 | tmp = canonicalize_condition (jump, cond, reverse, earliest, |
2393 | NULL_RTX, false, true); | |
2394 | ||
2395 | /* We don't handle side-effects in the condition, like handling | |
2396 | REG_INC notes and making sure no duplicate conditions are emitted. */ | |
2397 | if (tmp != NULL_RTX && side_effects_p (tmp)) | |
2398 | return NULL_RTX; | |
2399 | ||
2400 | return tmp; | |
0bb604ca | 2401 | } |
2402 | ||
4f63c6d1 | 2403 | /* Return true if OP is ok for if-then-else processing. */ |
2404 | ||
2405 | static int | |
7ecb5bb2 | 2406 | noce_operand_ok (const_rtx op) |
4f63c6d1 | 2407 | { |
4f63c6d1 | 2408 | if (side_effects_p (op)) |
2409 | return FALSE; | |
2410 | ||
4074c133 | 2411 | /* We special-case memories, so handle any of them with |
2412 | no address side effects. */ | |
c616bb5c | 2413 | if (MEM_P (op)) |
2414 | return ! side_effects_p (XEXP (op, 0)); | |
2415 | ||
4f63c6d1 | 2416 | return ! may_trap_p (op); |
2417 | } | |
2418 | ||
c049cb4d | 2419 | /* Return true if a write into MEM may trap or fault. */ |
2420 | ||
2421 | static bool | |
7ecb5bb2 | 2422 | noce_mem_write_may_trap_or_fault_p (const_rtx mem) |
c049cb4d | 2423 | { |
2424 | rtx addr; | |
2425 | ||
2426 | if (MEM_READONLY_P (mem)) | |
2427 | return true; | |
2428 | ||
2429 | if (may_trap_or_fault_p (mem)) | |
2430 | return true; | |
2431 | ||
2432 | addr = XEXP (mem, 0); | |
2433 | ||
2434 | /* Call target hook to avoid the effects of -fpic etc.... */ | |
2435 | addr = targetm.delegitimize_address (addr); | |
2436 | ||
2437 | while (addr) | |
2438 | switch (GET_CODE (addr)) | |
2439 | { | |
2440 | case CONST: | |
2441 | case PRE_DEC: | |
2442 | case PRE_INC: | |
2443 | case POST_DEC: | |
2444 | case POST_INC: | |
2445 | case POST_MODIFY: | |
2446 | addr = XEXP (addr, 0); | |
2447 | break; | |
2448 | case LO_SUM: | |
2449 | case PRE_MODIFY: | |
2450 | addr = XEXP (addr, 1); | |
2451 | break; | |
2452 | case PLUS: | |
971ba038 | 2453 | if (CONST_INT_P (XEXP (addr, 1))) |
c049cb4d | 2454 | addr = XEXP (addr, 0); |
2455 | else | |
2456 | return false; | |
2457 | break; | |
2458 | case LABEL_REF: | |
2459 | return true; | |
2460 | case SYMBOL_REF: | |
2461 | if (SYMBOL_REF_DECL (addr) | |
2462 | && decl_readonly_section (SYMBOL_REF_DECL (addr), 0)) | |
2463 | return true; | |
2464 | return false; | |
2465 | default: | |
2466 | return false; | |
2467 | } | |
2468 | ||
2469 | return false; | |
2470 | } | |
2471 | ||
e92e4c4f | 2472 | /* Return whether we can use store speculation for MEM. TOP_BB is the |
2473 | basic block above the conditional block where we are considering | |
2474 | doing the speculative store. We look for whether MEM is set | |
2475 | unconditionally later in the function. */ | |
2476 | ||
2477 | static bool | |
2478 | noce_can_store_speculate_p (basic_block top_bb, const_rtx mem) | |
2479 | { | |
2480 | basic_block dominator; | |
2481 | ||
2482 | for (dominator = get_immediate_dominator (CDI_POST_DOMINATORS, top_bb); | |
2483 | dominator != NULL; | |
2484 | dominator = get_immediate_dominator (CDI_POST_DOMINATORS, dominator)) | |
2485 | { | |
ca0df1e3 | 2486 | rtx_insn *insn; |
e92e4c4f | 2487 | |
2488 | FOR_BB_INSNS (dominator, insn) | |
2489 | { | |
2490 | /* If we see something that might be a memory barrier, we | |
2491 | have to stop looking. Even if the MEM is set later in | |
2492 | the function, we still don't want to set it | |
2493 | unconditionally before the barrier. */ | |
2494 | if (INSN_P (insn) | |
2495 | && (volatile_insn_p (PATTERN (insn)) | |
9c2a0c05 | 2496 | || (CALL_P (insn) && (!RTL_CONST_CALL_P (insn))))) |
e92e4c4f | 2497 | return false; |
2498 | ||
43b6ba45 | 2499 | if (memory_must_be_modified_in_insn_p (mem, insn)) |
e92e4c4f | 2500 | return true; |
2501 | if (modified_in_p (XEXP (mem, 0), insn)) | |
2502 | return false; | |
2503 | ||
2504 | } | |
2505 | } | |
2506 | ||
2507 | return false; | |
2508 | } | |
2509 | ||
03dbd7cc | 2510 | /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert |
2511 | it without using conditional execution. Return TRUE if we were successful | |
2512 | at converting the block. */ | |
0bb604ca | 2513 | |
2514 | static int | |
03dbd7cc | 2515 | noce_process_if_block (struct noce_if_info *if_info) |
0bb604ca | 2516 | { |
03dbd7cc | 2517 | basic_block test_bb = if_info->test_bb; /* test block */ |
2518 | basic_block then_bb = if_info->then_bb; /* THEN */ | |
2519 | basic_block else_bb = if_info->else_bb; /* ELSE or NULL */ | |
2520 | basic_block join_bb = if_info->join_bb; /* JOIN */ | |
4cd001d5 | 2521 | rtx_insn *jump = if_info->jump; |
03dbd7cc | 2522 | rtx cond = if_info->cond; |
ca0df1e3 | 2523 | rtx_insn *insn_a, *insn_b; |
1d855d4c | 2524 | rtx set_a, set_b; |
2525 | rtx orig_x, x, a, b; | |
1d855d4c | 2526 | |
0bb604ca | 2527 | /* We're looking for patterns of the form |
2528 | ||
2529 | (1) if (...) x = a; else x = b; | |
2530 | (2) x = b; if (...) x = a; | |
2531 | (3) if (...) x = a; // as if with an initial x = x. | |
2532 | ||
2533 | The later patterns require jumps to be more expensive. | |
2534 | ||
2535 | ??? For future expansion, look for multiple X in such patterns. */ | |
2536 | ||
0bb604ca | 2537 | /* Look for one of the potential sets. */ |
2538 | insn_a = first_active_insn (then_bb); | |
2539 | if (! insn_a | |
1d855d4c | 2540 | || insn_a != last_active_insn (then_bb, FALSE) |
0bb604ca | 2541 | || (set_a = single_set (insn_a)) == NULL_RTX) |
2542 | return FALSE; | |
2543 | ||
2544 | x = SET_DEST (set_a); | |
2545 | a = SET_SRC (set_a); | |
2546 | ||
2547 | /* Look for the other potential set. Make sure we've got equivalent | |
2548 | destinations. */ | |
2549 | /* ??? This is overconservative. Storing to two different mems is | |
2550 | as easy as conditionally computing the address. Storing to a | |
2551 | single mem merely requires a scratch memory to use as one of the | |
2552 | destination addresses; often the memory immediately below the | |
2553 | stack pointer is available for this. */ | |
2554 | set_b = NULL_RTX; | |
2555 | if (else_bb) | |
2556 | { | |
2557 | insn_b = first_active_insn (else_bb); | |
2558 | if (! insn_b | |
1d855d4c | 2559 | || insn_b != last_active_insn (else_bb, FALSE) |
0bb604ca | 2560 | || (set_b = single_set (insn_b)) == NULL_RTX |
f07f6526 | 2561 | || ! rtx_interchangeable_p (x, SET_DEST (set_b))) |
0bb604ca | 2562 | return FALSE; |
2563 | } | |
2564 | else | |
2565 | { | |
5b8537a8 | 2566 | insn_b = prev_nonnote_nondebug_insn (if_info->cond_earliest); |
704a64ba | 2567 | /* We're going to be moving the evaluation of B down from above |
2568 | COND_EARLIEST to JUMP. Make sure the relevant data is still | |
2569 | intact. */ | |
0bb604ca | 2570 | if (! insn_b |
90bd219d | 2571 | || BLOCK_FOR_INSN (insn_b) != BLOCK_FOR_INSN (if_info->cond_earliest) |
6d7dc5b9 | 2572 | || !NONJUMP_INSN_P (insn_b) |
0bb604ca | 2573 | || (set_b = single_set (insn_b)) == NULL_RTX |
f07f6526 | 2574 | || ! rtx_interchangeable_p (x, SET_DEST (set_b)) |
ba0b5cfc | 2575 | || ! noce_operand_ok (SET_SRC (set_b)) |
068fc551 | 2576 | || reg_overlap_mentioned_p (x, SET_SRC (set_b)) |
9845d120 | 2577 | || modified_between_p (SET_SRC (set_b), insn_b, jump) |
d2592cd7 | 2578 | /* Avoid extending the lifetime of hard registers on small |
2579 | register class machines. */ | |
2580 | || (REG_P (SET_SRC (set_b)) | |
2581 | && HARD_REGISTER_P (SET_SRC (set_b)) | |
2582 | && targetm.small_register_classes_for_mode_p | |
2583 | (GET_MODE (SET_SRC (set_b)))) | |
704a64ba | 2584 | /* Likewise with X. In particular this can happen when |
2585 | noce_get_condition looks farther back in the instruction | |
2586 | stream than one might expect. */ | |
2587 | || reg_overlap_mentioned_p (x, cond) | |
2588 | || reg_overlap_mentioned_p (x, a) | |
9845d120 | 2589 | || modified_between_p (x, insn_b, jump)) |
ca0df1e3 | 2590 | { |
2591 | insn_b = NULL; | |
2592 | set_b = NULL_RTX; | |
2593 | } | |
0bb604ca | 2594 | } |
1040c303 | 2595 | |
2596 | /* If x has side effects then only the if-then-else form is safe to | |
2597 | convert. But even in that case we would need to restore any notes | |
952f0048 | 2598 | (such as REG_INC) at then end. That can be tricky if |
1040c303 | 2599 | noce_emit_move_insn expands to more than one insn, so disable the |
2600 | optimization entirely for now if there are side effects. */ | |
2601 | if (side_effects_p (x)) | |
2602 | return FALSE; | |
2603 | ||
0bb604ca | 2604 | b = (set_b ? SET_SRC (set_b) : x); |
2605 | ||
2606 | /* Only operate on register destinations, and even then avoid extending | |
2607 | the lifetime of hard registers on small register class machines. */ | |
2608 | orig_x = x; | |
8ad4c111 | 2609 | if (!REG_P (x) |
ed5527ca | 2610 | || (HARD_REGISTER_P (x) |
2611 | && targetm.small_register_classes_for_mode_p (GET_MODE (x)))) | |
0bb604ca | 2612 | { |
03dbd7cc | 2613 | if (GET_MODE (x) == BLKmode) |
0bb604ca | 2614 | return FALSE; |
6746fc82 | 2615 | |
590c3166 | 2616 | if (GET_CODE (x) == ZERO_EXTRACT |
971ba038 | 2617 | && (!CONST_INT_P (XEXP (x, 1)) |
2618 | || !CONST_INT_P (XEXP (x, 2)))) | |
6746fc82 | 2619 | return FALSE; |
e592f6ea | 2620 | |
8b8f1119 | 2621 | x = gen_reg_rtx (GET_MODE (GET_CODE (x) == STRICT_LOW_PART |
2622 | ? XEXP (x, 0) : x)); | |
0bb604ca | 2623 | } |
2624 | ||
2625 | /* Don't operate on sources that may trap or are volatile. */ | |
4f63c6d1 | 2626 | if (! noce_operand_ok (a) || ! noce_operand_ok (b)) |
0bb604ca | 2627 | return FALSE; |
2628 | ||
ba0b5cfc | 2629 | retry: |
0bb604ca | 2630 | /* Set up the info block for our subroutines. */ |
03dbd7cc | 2631 | if_info->insn_a = insn_a; |
2632 | if_info->insn_b = insn_b; | |
2633 | if_info->x = x; | |
2634 | if_info->a = a; | |
2635 | if_info->b = b; | |
0bb604ca | 2636 | |
2637 | /* Try optimizations in some approximation of a useful order. */ | |
2638 | /* ??? Should first look to see if X is live incoming at all. If it | |
2639 | isn't, we don't need anything but an unconditional set. */ | |
2640 | ||
2641 | /* Look and see if A and B are really the same. Avoid creating silly | |
2642 | cmove constructs that no one will fix up later. */ | |
f07f6526 | 2643 | if (rtx_interchangeable_p (a, b)) |
0bb604ca | 2644 | { |
2645 | /* If we have an INSN_B, we don't have to create any new rtl. Just | |
2646 | move the instruction that we already have. If we don't have an | |
2647 | INSN_B, that means that A == X, and we've got a noop move. In | |
2648 | that case don't do anything and let the code below delete INSN_A. */ | |
2649 | if (insn_b && else_bb) | |
2650 | { | |
6a8939cc | 2651 | rtx note; |
2652 | ||
5496dbfc | 2653 | if (else_bb && insn_b == BB_END (else_bb)) |
26bb3cb2 | 2654 | BB_END (else_bb) = PREV_INSN (insn_b); |
068fc551 | 2655 | reorder_insns (insn_b, insn_b, PREV_INSN (jump)); |
6a8939cc | 2656 | |
2657 | /* If there was a REG_EQUAL note, delete it since it may have been | |
2658 | true due to this insn being after a jump. */ | |
2659 | if ((note = find_reg_note (insn_b, REG_EQUAL, NULL_RTX)) != 0) | |
2660 | remove_note (insn_b, note); | |
2661 | ||
ca0df1e3 | 2662 | insn_b = NULL; |
0bb604ca | 2663 | } |
8403001e | 2664 | /* If we have "x = b; if (...) x = a;", and x has side-effects, then |
2665 | x must be executed twice. */ | |
2666 | else if (insn_b && side_effects_p (orig_x)) | |
2667 | return FALSE; | |
952f0048 | 2668 | |
86e44551 | 2669 | x = orig_x; |
0bb604ca | 2670 | goto success; |
2671 | } | |
2672 | ||
e92e4c4f | 2673 | if (!set_b && MEM_P (orig_x)) |
2674 | { | |
2675 | /* Disallow the "if (...) x = a;" form (implicit "else x = x;") | |
2676 | for optimizations if writing to x may trap or fault, | |
2677 | i.e. it's a memory other than a static var or a stack slot, | |
2678 | is misaligned on strict aligned machines or is read-only. If | |
2679 | x is a read-only memory, then the program is valid only if we | |
2680 | avoid the store into it. If there are stores on both the | |
2681 | THEN and ELSE arms, then we can go ahead with the conversion; | |
2682 | either the program is broken, or the condition is always | |
2683 | false such that the other memory is selected. */ | |
2684 | if (noce_mem_write_may_trap_or_fault_p (orig_x)) | |
2685 | return FALSE; | |
2686 | ||
2687 | /* Avoid store speculation: given "if (...) x = a" where x is a | |
2688 | MEM, we only want to do the store if x is always set | |
2689 | somewhere in the function. This avoids cases like | |
2690 | if (pthread_mutex_trylock(mutex)) | |
2691 | ++global_variable; | |
2692 | where we only want global_variable to be changed if the mutex | |
2693 | is held. FIXME: This should ideally be expressed directly in | |
2694 | RTL somehow. */ | |
2695 | if (!noce_can_store_speculate_p (test_bb, orig_x)) | |
2696 | return FALSE; | |
2697 | } | |
5c8ef8c3 | 2698 | |
03dbd7cc | 2699 | if (noce_try_move (if_info)) |
357b5a1f | 2700 | goto success; |
03dbd7cc | 2701 | if (noce_try_store_flag (if_info)) |
0bb604ca | 2702 | goto success; |
03dbd7cc | 2703 | if (noce_try_bitop (if_info)) |
9d666332 | 2704 | goto success; |
03dbd7cc | 2705 | if (noce_try_minmax (if_info)) |
4f63c6d1 | 2706 | goto success; |
03dbd7cc | 2707 | if (noce_try_abs (if_info)) |
4f63c6d1 | 2708 | goto success; |
0bb604ca | 2709 | if (HAVE_conditional_move |
03dbd7cc | 2710 | && noce_try_cmove (if_info)) |
0bb604ca | 2711 | goto success; |
751d3ba7 | 2712 | if (! targetm.have_conditional_execution ()) |
0bb604ca | 2713 | { |
03dbd7cc | 2714 | if (noce_try_store_flag_constants (if_info)) |
0bb604ca | 2715 | goto success; |
03dbd7cc | 2716 | if (noce_try_addcc (if_info)) |
0bb604ca | 2717 | goto success; |
03dbd7cc | 2718 | if (noce_try_store_flag_mask (if_info)) |
0bb604ca | 2719 | goto success; |
2720 | if (HAVE_conditional_move | |
03dbd7cc | 2721 | && noce_try_cmove_arith (if_info)) |
0bb604ca | 2722 | goto success; |
03dbd7cc | 2723 | if (noce_try_sign_mask (if_info)) |
1c98eaaa | 2724 | goto success; |
0bb604ca | 2725 | } |
2726 | ||
ba0b5cfc | 2727 | if (!else_bb && set_b) |
2728 | { | |
ca0df1e3 | 2729 | insn_b = NULL; |
2730 | set_b = NULL_RTX; | |
ba0b5cfc | 2731 | b = orig_x; |
2732 | goto retry; | |
2733 | } | |
2734 | ||
0bb604ca | 2735 | return FALSE; |
2736 | ||
2737 | success: | |
0bb604ca | 2738 | |
2739 | /* If we used a temporary, fix it up now. */ | |
2740 | if (orig_x != x) | |
2741 | { | |
ca0df1e3 | 2742 | rtx_insn *seq; |
5b410d6a | 2743 | |
0bb604ca | 2744 | start_sequence (); |
1cd4cfea | 2745 | noce_emit_move_insn (orig_x, x); |
5b410d6a | 2746 | seq = get_insns (); |
1cd4cfea | 2747 | set_used_flags (orig_x); |
5b410d6a | 2748 | unshare_all_rtl_in_chain (seq); |
0bb604ca | 2749 | end_sequence (); |
2750 | ||
5169661d | 2751 | emit_insn_before_setloc (seq, BB_END (test_bb), INSN_LOCATION (insn_a)); |
0bb604ca | 2752 | } |
2753 | ||
5b410d6a | 2754 | /* The original THEN and ELSE blocks may now be removed. The test block |
2755 | must now jump to the join block. If the test block and the join block | |
2756 | can be merged, do so. */ | |
5b410d6a | 2757 | if (else_bb) |
2758 | { | |
2759 | delete_basic_block (else_bb); | |
2760 | num_true_changes++; | |
2761 | } | |
2762 | else | |
2763 | remove_edge (find_edge (test_bb, join_bb)); | |
0bb604ca | 2764 | |
5b410d6a | 2765 | remove_edge (find_edge (then_bb, join_bb)); |
2766 | redirect_edge_and_branch_force (single_succ_edge (test_bb), join_bb); | |
2767 | delete_basic_block (then_bb); | |
2768 | num_true_changes++; | |
e592f6ea | 2769 | |
5b410d6a | 2770 | if (can_merge_blocks_p (test_bb, join_bb)) |
2771 | { | |
2772 | merge_blocks (test_bb, join_bb); | |
2773 | num_true_changes++; | |
2774 | } | |
2775 | ||
2776 | num_updated_if_blocks++; | |
0bb604ca | 2777 | return TRUE; |
2778 | } | |
268de9b9 | 2779 | |
2780 | /* Check whether a block is suitable for conditional move conversion. | |
2781 | Every insn must be a simple set of a register to a constant or a | |
7d75ffa3 | 2782 | register. For each assignment, store the value in the pointer map |
2783 | VALS, keyed indexed by register pointer, then store the register | |
2784 | pointer in REGS. COND is the condition we will test. */ | |
268de9b9 | 2785 | |
2786 | static int | |
7d75ffa3 | 2787 | check_cond_move_block (basic_block bb, |
5f8841a5 | 2788 | hash_map<rtx, rtx> *vals, |
f1f41a6c | 2789 | vec<rtx> *regs, |
76b61550 | 2790 | rtx cond) |
268de9b9 | 2791 | { |
ca0df1e3 | 2792 | rtx_insn *insn; |
268de9b9 | 2793 | |
e592f6ea | 2794 | /* We can only handle simple jumps at the end of the basic block. |
2795 | It is almost impossible to update the CFG otherwise. */ | |
2796 | insn = BB_END (bb); | |
2797 | if (JUMP_P (insn) && !onlyjump_p (insn)) | |
2798 | return FALSE; | |
2799 | ||
268de9b9 | 2800 | FOR_BB_INSNS (bb, insn) |
2801 | { | |
2802 | rtx set, dest, src; | |
2803 | ||
9845d120 | 2804 | if (!NONDEBUG_INSN_P (insn) || JUMP_P (insn)) |
268de9b9 | 2805 | continue; |
2806 | set = single_set (insn); | |
2807 | if (!set) | |
2808 | return FALSE; | |
2809 | ||
2810 | dest = SET_DEST (set); | |
2811 | src = SET_SRC (set); | |
2812 | if (!REG_P (dest) | |
ed5527ca | 2813 | || (HARD_REGISTER_P (dest) |
2814 | && targetm.small_register_classes_for_mode_p (GET_MODE (dest)))) | |
0264b815 | 2815 | return FALSE; |
268de9b9 | 2816 | |
2817 | if (!CONSTANT_P (src) && !register_operand (src, VOIDmode)) | |
2818 | return FALSE; | |
2819 | ||
2820 | if (side_effects_p (src) || side_effects_p (dest)) | |
2821 | return FALSE; | |
2822 | ||
2823 | if (may_trap_p (src) || may_trap_p (dest)) | |
2824 | return FALSE; | |
2825 | ||
0264b815 | 2826 | /* Don't try to handle this if the source register was |
2827 | modified earlier in the block. */ | |
2828 | if ((REG_P (src) | |
5f8841a5 | 2829 | && vals->get (src)) |
0264b815 | 2830 | || (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src)) |
5f8841a5 | 2831 | && vals->get (SUBREG_REG (src)))) |
0264b815 | 2832 | return FALSE; |
2833 | ||
268de9b9 | 2834 | /* Don't try to handle this if the destination register was |
2835 | modified earlier in the block. */ | |
5f8841a5 | 2836 | if (vals->get (dest)) |
268de9b9 | 2837 | return FALSE; |
2838 | ||
2839 | /* Don't try to handle this if the condition uses the | |
2840 | destination register. */ | |
2841 | if (reg_overlap_mentioned_p (dest, cond)) | |
2842 | return FALSE; | |
2843 | ||
268de9b9 | 2844 | /* Don't try to handle this if the source register is modified |
2845 | later in the block. */ | |
2846 | if (!CONSTANT_P (src) | |
2847 | && modified_between_p (src, insn, NEXT_INSN (BB_END (bb)))) | |
2848 | return FALSE; | |
e592f6ea | 2849 | |
5f8841a5 | 2850 | vals->put (dest, src); |
e592f6ea | 2851 | |
f1f41a6c | 2852 | regs->safe_push (dest); |
268de9b9 | 2853 | } |
2854 | ||
2855 | return TRUE; | |
2856 | } | |
2857 | ||
5b52bd91 | 2858 | /* Given a basic block BB suitable for conditional move conversion, |
7d75ffa3 | 2859 | a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing |
2860 | the register values depending on COND, emit the insns in the block as | |
5b52bd91 | 2861 | conditional moves. If ELSE_BLOCK is true, THEN_BB was already |
2862 | processed. The caller has started a sequence for the conversion. | |
2863 | Return true if successful, false if something goes wrong. */ | |
2864 | ||
2865 | static bool | |
2866 | cond_move_convert_if_block (struct noce_if_info *if_infop, | |
2867 | basic_block bb, rtx cond, | |
5f8841a5 | 2868 | hash_map<rtx, rtx> *then_vals, |
2869 | hash_map<rtx, rtx> *else_vals, | |
5b52bd91 | 2870 | bool else_block_p) |
2871 | { | |
2872 | enum rtx_code code; | |
ca0df1e3 | 2873 | rtx_insn *insn; |
2874 | rtx cond_arg0, cond_arg1; | |
5b52bd91 | 2875 | |
2876 | code = GET_CODE (cond); | |
2877 | cond_arg0 = XEXP (cond, 0); | |
2878 | cond_arg1 = XEXP (cond, 1); | |
2879 | ||
2880 | FOR_BB_INSNS (bb, insn) | |
2881 | { | |
2882 | rtx set, target, dest, t, e; | |
5b52bd91 | 2883 | |
9845d120 | 2884 | /* ??? Maybe emit conditional debug insn? */ |
2885 | if (!NONDEBUG_INSN_P (insn) || JUMP_P (insn)) | |
5b52bd91 | 2886 | continue; |
2887 | set = single_set (insn); | |
2888 | gcc_assert (set && REG_P (SET_DEST (set))); | |
2889 | ||
2890 | dest = SET_DEST (set); | |
5b52bd91 | 2891 | |
5f8841a5 | 2892 | rtx *then_slot = then_vals->get (dest); |
2893 | rtx *else_slot = else_vals->get (dest); | |
2894 | t = then_slot ? *then_slot : NULL_RTX; | |
2895 | e = else_slot ? *else_slot : NULL_RTX; | |
5b52bd91 | 2896 | |
2897 | if (else_block_p) | |
2898 | { | |
2899 | /* If this register was set in the then block, we already | |
2900 | handled this case there. */ | |
2901 | if (t) | |
2902 | continue; | |
2903 | t = dest; | |
2904 | gcc_assert (e); | |
2905 | } | |
2906 | else | |
2907 | { | |
2908 | gcc_assert (t); | |
2909 | if (!e) | |
2910 | e = dest; | |
2911 | } | |
2912 | ||
2913 | target = noce_emit_cmove (if_infop, dest, code, cond_arg0, cond_arg1, | |
2914 | t, e); | |
2915 | if (!target) | |
2916 | return false; | |
2917 | ||
2918 | if (target != dest) | |
2919 | noce_emit_move_insn (dest, target); | |
2920 | } | |
2921 | ||
2922 | return true; | |
2923 | } | |
2924 | ||
03dbd7cc | 2925 | /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert |
2926 | it using only conditional moves. Return TRUE if we were successful at | |
268de9b9 | 2927 | converting the block. */ |
2928 | ||
2929 | static int | |
03dbd7cc | 2930 | cond_move_process_if_block (struct noce_if_info *if_info) |
268de9b9 | 2931 | { |
03dbd7cc | 2932 | basic_block test_bb = if_info->test_bb; |
2933 | basic_block then_bb = if_info->then_bb; | |
2934 | basic_block else_bb = if_info->else_bb; | |
2935 | basic_block join_bb = if_info->join_bb; | |
158a522b | 2936 | rtx_insn *jump = if_info->jump; |
03dbd7cc | 2937 | rtx cond = if_info->cond; |
ca0df1e3 | 2938 | rtx_insn *seq, *loc_insn; |
7d75ffa3 | 2939 | rtx reg; |
2940 | int c; | |
1e094109 | 2941 | vec<rtx> then_regs = vNULL; |
2942 | vec<rtx> else_regs = vNULL; | |
e592f6ea | 2943 | unsigned int i; |
7d75ffa3 | 2944 | int success_p = FALSE; |
268de9b9 | 2945 | |
268de9b9 | 2946 | /* Build a mapping for each block to the value used for each |
2947 | register. */ | |
5f8841a5 | 2948 | hash_map<rtx, rtx> then_vals; |
2949 | hash_map<rtx, rtx> else_vals; | |
268de9b9 | 2950 | |
2951 | /* Make sure the blocks are suitable. */ | |
5f8841a5 | 2952 | if (!check_cond_move_block (then_bb, &then_vals, &then_regs, cond) |
76b61550 | 2953 | || (else_bb |
5f8841a5 | 2954 | && !check_cond_move_block (else_bb, &else_vals, &else_regs, cond))) |
7d75ffa3 | 2955 | goto done; |
268de9b9 | 2956 | |
2957 | /* Make sure the blocks can be used together. If the same register | |
2958 | is set in both blocks, and is not set to a constant in both | |
2959 | cases, then both blocks must set it to the same register. We | |
2960 | have already verified that if it is set to a register, that the | |
2961 | source register does not change after the assignment. Also count | |
2962 | the number of registers set in only one of the blocks. */ | |
2963 | c = 0; | |
f1f41a6c | 2964 | FOR_EACH_VEC_ELT (then_regs, i, reg) |
268de9b9 | 2965 | { |
5f8841a5 | 2966 | rtx *then_slot = then_vals.get (reg); |
2967 | rtx *else_slot = else_vals.get (reg); | |
268de9b9 | 2968 | |
7d75ffa3 | 2969 | gcc_checking_assert (then_slot); |
2970 | if (!else_slot) | |
268de9b9 | 2971 | ++c; |
2972 | else | |
2973 | { | |
5f8841a5 | 2974 | rtx then_val = *then_slot; |
2975 | rtx else_val = *else_slot; | |
7d75ffa3 | 2976 | if (!CONSTANT_P (then_val) && !CONSTANT_P (else_val) |
2977 | && !rtx_equal_p (then_val, else_val)) | |
2978 | goto done; | |
268de9b9 | 2979 | } |
2980 | } | |
2981 | ||
e592f6ea | 2982 | /* Finish off c for MAX_CONDITIONAL_EXECUTE. */ |
f1f41a6c | 2983 | FOR_EACH_VEC_ELT (else_regs, i, reg) |
7d75ffa3 | 2984 | { |
5f8841a5 | 2985 | gcc_checking_assert (else_vals.get (reg)); |
2986 | if (!then_vals.get (reg)) | |
7d75ffa3 | 2987 | ++c; |
2988 | } | |
e592f6ea | 2989 | |
268de9b9 | 2990 | /* Make sure it is reasonable to convert this block. What matters |
2991 | is the number of assignments currently made in only one of the | |
2992 | branches, since if we convert we are going to always execute | |
2993 | them. */ | |
2994 | if (c > MAX_CONDITIONAL_EXECUTE) | |
7d75ffa3 | 2995 | goto done; |
268de9b9 | 2996 | |
5b52bd91 | 2997 | /* Try to emit the conditional moves. First do the then block, |
2998 | then do anything left in the else blocks. */ | |
268de9b9 | 2999 | start_sequence (); |
03dbd7cc | 3000 | if (!cond_move_convert_if_block (if_info, then_bb, cond, |
5f8841a5 | 3001 | &then_vals, &else_vals, false) |
5b52bd91 | 3002 | || (else_bb |
03dbd7cc | 3003 | && !cond_move_convert_if_block (if_info, else_bb, cond, |
5f8841a5 | 3004 | &then_vals, &else_vals, true))) |
268de9b9 | 3005 | { |
5b52bd91 | 3006 | end_sequence (); |
7d75ffa3 | 3007 | goto done; |
268de9b9 | 3008 | } |
03dbd7cc | 3009 | seq = end_ifcvt_sequence (if_info); |
268de9b9 | 3010 | if (!seq) |
7d75ffa3 | 3011 | goto done; |
268de9b9 | 3012 | |
3013 | loc_insn = first_active_insn (then_bb); | |
3014 | if (!loc_insn) | |
3015 | { | |
3016 | loc_insn = first_active_insn (else_bb); | |
3017 | gcc_assert (loc_insn); | |
3018 | } | |
5169661d | 3019 | emit_insn_before_setloc (seq, jump, INSN_LOCATION (loc_insn)); |
268de9b9 | 3020 | |
268de9b9 | 3021 | if (else_bb) |
3022 | { | |
5b410d6a | 3023 | delete_basic_block (else_bb); |
3024 | num_true_changes++; | |
268de9b9 | 3025 | } |
5b410d6a | 3026 | else |
3027 | remove_edge (find_edge (test_bb, join_bb)); | |
268de9b9 | 3028 | |
5b410d6a | 3029 | remove_edge (find_edge (then_bb, join_bb)); |
3030 | redirect_edge_and_branch_force (single_succ_edge (test_bb), join_bb); | |
3031 | delete_basic_block (then_bb); | |
3032 | num_true_changes++; | |
e592f6ea | 3033 | |
5b410d6a | 3034 | if (can_merge_blocks_p (test_bb, join_bb)) |
3035 | { | |
3036 | merge_blocks (test_bb, join_bb); | |
3037 | num_true_changes++; | |
3038 | } | |
268de9b9 | 3039 | |
5b410d6a | 3040 | num_updated_if_blocks++; |
e592f6ea | 3041 | |
7d75ffa3 | 3042 | success_p = TRUE; |
3043 | ||
3044 | done: | |
f1f41a6c | 3045 | then_regs.release (); |
3046 | else_regs.release (); | |
7d75ffa3 | 3047 | return success_p; |
268de9b9 | 3048 | } |
5b410d6a | 3049 | |
0bb604ca | 3050 | \f |
03dbd7cc | 3051 | /* Determine if a given basic block heads a simple IF-THEN-JOIN or an |
3052 | IF-THEN-ELSE-JOIN block. | |
3053 | ||
3054 | If so, we'll try to convert the insns to not require the branch, | |
3055 | using only transformations that do not require conditional execution. | |
3056 | ||
3057 | Return TRUE if we were successful at converting the block. */ | |
0bb604ca | 3058 | |
3059 | static int | |
76b61550 | 3060 | noce_find_if_block (basic_block test_bb, edge then_edge, edge else_edge, |
03dbd7cc | 3061 | int pass) |
0bb604ca | 3062 | { |
03dbd7cc | 3063 | basic_block then_bb, else_bb, join_bb; |
3064 | bool then_else_reversed = false; | |
ca0df1e3 | 3065 | rtx_insn *jump; |
3066 | rtx cond; | |
2d650f54 | 3067 | rtx_insn *cond_earliest; |
03dbd7cc | 3068 | struct noce_if_info if_info; |
0bb604ca | 3069 | |
03dbd7cc | 3070 | /* We only ever should get here before reload. */ |
3071 | gcc_assert (!reload_completed); | |
268de9b9 | 3072 | |
03dbd7cc | 3073 | /* Recognize an IF-THEN-ELSE-JOIN block. */ |
3074 | if (single_pred_p (then_edge->dest) | |
3075 | && single_succ_p (then_edge->dest) | |
3076 | && single_pred_p (else_edge->dest) | |
3077 | && single_succ_p (else_edge->dest) | |
3078 | && single_succ (then_edge->dest) == single_succ (else_edge->dest)) | |
1d855d4c | 3079 | { |
03dbd7cc | 3080 | then_bb = then_edge->dest; |
3081 | else_bb = else_edge->dest; | |
3082 | join_bb = single_succ (then_bb); | |
3083 | } | |
3084 | /* Recognize an IF-THEN-JOIN block. */ | |
3085 | else if (single_pred_p (then_edge->dest) | |
3086 | && single_succ_p (then_edge->dest) | |
3087 | && single_succ (then_edge->dest) == else_edge->dest) | |
3088 | { | |
3089 | then_bb = then_edge->dest; | |
3090 | else_bb = NULL_BLOCK; | |
3091 | join_bb = else_edge->dest; | |
3092 | } | |
3093 | /* Recognize an IF-ELSE-JOIN block. We can have those because the order | |
3094 | of basic blocks in cfglayout mode does not matter, so the fallthrough | |
3095 | edge can go to any basic block (and not just to bb->next_bb, like in | |
ba45c933 | 3096 | cfgrtl mode). */ |
03dbd7cc | 3097 | else if (single_pred_p (else_edge->dest) |
3098 | && single_succ_p (else_edge->dest) | |
3099 | && single_succ (else_edge->dest) == then_edge->dest) | |
3100 | { | |
3101 | /* The noce transformations do not apply to IF-ELSE-JOIN blocks. | |
3102 | To make this work, we have to invert the THEN and ELSE blocks | |
3103 | and reverse the jump condition. */ | |
3104 | then_bb = else_edge->dest; | |
3105 | else_bb = NULL_BLOCK; | |
3106 | join_bb = single_succ (then_bb); | |
3107 | then_else_reversed = true; | |
3108 | } | |
3109 | else | |
3110 | /* Not a form we can handle. */ | |
3111 | return FALSE; | |
ba45c933 | 3112 | |
03dbd7cc | 3113 | /* The edges of the THEN and ELSE blocks cannot have complex edges. */ |
3114 | if (single_succ_edge (then_bb)->flags & EDGE_COMPLEX) | |
3115 | return FALSE; | |
3116 | if (else_bb | |
3117 | && single_succ_edge (else_bb)->flags & EDGE_COMPLEX) | |
3118 | return FALSE; | |
1d855d4c | 3119 | |
03dbd7cc | 3120 | num_possible_if_blocks++; |
1d855d4c | 3121 | |
03dbd7cc | 3122 | if (dump_file) |
3123 | { | |
3124 | fprintf (dump_file, | |
3125 | "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d", | |
3126 | (else_bb) ? "-ELSE" : "", | |
3127 | pass, test_bb->index, then_bb->index); | |
3128 | ||
3129 | if (else_bb) | |
3130 | fprintf (dump_file, ", else %d", else_bb->index); | |
3131 | ||
3132 | fprintf (dump_file, ", join %d\n", join_bb->index); | |
1d855d4c | 3133 | } |
0bb604ca | 3134 | |
03dbd7cc | 3135 | /* If the conditional jump is more than just a conditional |
3136 | jump, then we can not do if-conversion on this block. */ | |
3137 | jump = BB_END (test_bb); | |
3138 | if (! onlyjump_p (jump)) | |
3139 | return FALSE; | |
3140 | ||
3141 | /* If this is not a standard conditional jump, we can't parse it. */ | |
76b61550 | 3142 | cond = noce_get_condition (jump, &cond_earliest, then_else_reversed); |
03dbd7cc | 3143 | if (!cond) |
3144 | return FALSE; | |
3145 | ||
3146 | /* We must be comparing objects whose modes imply the size. */ | |
3147 | if (GET_MODE (XEXP (cond, 0)) == BLKmode) | |
3148 | return FALSE; | |
3149 | ||
3150 | /* Initialize an IF_INFO struct to pass around. */ | |
3151 | memset (&if_info, 0, sizeof if_info); | |
3152 | if_info.test_bb = test_bb; | |
3153 | if_info.then_bb = then_bb; | |
3154 | if_info.else_bb = else_bb; | |
3155 | if_info.join_bb = join_bb; | |
3156 | if_info.cond = cond; | |
30e5822c | 3157 | if_info.cond_earliest = cond_earliest; |
03dbd7cc | 3158 | if_info.jump = jump; |
ba45c933 | 3159 | if_info.then_else_reversed = then_else_reversed; |
4a9d7ef7 | 3160 | if_info.branch_cost = BRANCH_COST (optimize_bb_for_speed_p (test_bb), |
3161 | predictable_edge_p (then_edge)); | |
03dbd7cc | 3162 | |
3163 | /* Do the real work. */ | |
3164 | ||
3165 | if (noce_process_if_block (&if_info)) | |
3166 | return TRUE; | |
3167 | ||
3168 | if (HAVE_conditional_move | |
3169 | && cond_move_process_if_block (&if_info)) | |
3170 | return TRUE; | |
3171 | ||
0bb604ca | 3172 | return FALSE; |
3173 | } | |
03dbd7cc | 3174 | \f |
0bb604ca | 3175 | |
3176 | /* Merge the blocks and mark for local life update. */ | |
3177 | ||
3178 | static void | |
952f0048 | 3179 | merge_if_block (struct ce_if_block * ce_info) |
0bb604ca | 3180 | { |
1d855d4c | 3181 | basic_block test_bb = ce_info->test_bb; /* last test block */ |
3182 | basic_block then_bb = ce_info->then_bb; /* THEN */ | |
3183 | basic_block else_bb = ce_info->else_bb; /* ELSE or NULL */ | |
3184 | basic_block join_bb = ce_info->join_bb; /* join block */ | |
0bb604ca | 3185 | basic_block combo_bb; |
3186 | ||
3187 | /* All block merging is done into the lower block numbers. */ | |
3188 | ||
3189 | combo_bb = test_bb; | |
3072d30e | 3190 | df_set_bb_dirty (test_bb); |
0bb604ca | 3191 | |
1d855d4c | 3192 | /* Merge any basic blocks to handle && and || subtests. Each of |
3193 | the blocks are on the fallthru path from the predecessor block. */ | |
3194 | if (ce_info->num_multiple_test_blocks > 0) | |
3195 | { | |
3196 | basic_block bb = test_bb; | |
3197 | basic_block last_test_bb = ce_info->last_test_bb; | |
3198 | basic_block fallthru = block_fallthru (bb); | |
952f0048 | 3199 | |
1d855d4c | 3200 | do |
3201 | { | |
3202 | bb = fallthru; | |
3203 | fallthru = block_fallthru (bb); | |
c60fa3a7 | 3204 | merge_blocks (combo_bb, bb); |
bdce7739 | 3205 | num_true_changes++; |
1d855d4c | 3206 | } |
3207 | while (bb != last_test_bb); | |
3208 | } | |
3209 | ||
3210 | /* Merge TEST block into THEN block. Normally the THEN block won't have a | |
3211 | label, but it might if there were || tests. That label's count should be | |
3212 | zero, and it normally should be removed. */ | |
3213 | ||
fe70d0e3 | 3214 | if (then_bb) |
3215 | { | |
30eead8d | 3216 | /* If THEN_BB has no successors, then there's a BARRIER after it. |
3217 | If COMBO_BB has more than one successor (THEN_BB), then that BARRIER | |
3218 | is no longer needed, and in fact it is incorrect to leave it in | |
3219 | the insn stream. */ | |
3220 | if (EDGE_COUNT (then_bb->succs) == 0 | |
3221 | && EDGE_COUNT (combo_bb->succs) > 1) | |
3222 | { | |
4cd001d5 | 3223 | rtx_insn *end = NEXT_INSN (BB_END (then_bb)); |
30eead8d | 3224 | while (end && NOTE_P (end) && !NOTE_INSN_BASIC_BLOCK_P (end)) |
3225 | end = NEXT_INSN (end); | |
3226 | ||
3227 | if (end && BARRIER_P (end)) | |
3228 | delete_insn (end); | |
3229 | } | |
c60fa3a7 | 3230 | merge_blocks (combo_bb, then_bb); |
bdce7739 | 3231 | num_true_changes++; |
fe70d0e3 | 3232 | } |
0bb604ca | 3233 | |
3234 | /* The ELSE block, if it existed, had a label. That label count | |
3235 | will almost always be zero, but odd things can happen when labels | |
3236 | get their addresses taken. */ | |
3237 | if (else_bb) | |
3238 | { | |
30eead8d | 3239 | /* If ELSE_BB has no successors, then there's a BARRIER after it. |
3240 | If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER | |
3241 | is no longer needed, and in fact it is incorrect to leave it in | |
3242 | the insn stream. */ | |
3243 | if (EDGE_COUNT (else_bb->succs) == 0 | |
3244 | && EDGE_COUNT (combo_bb->succs) > 1) | |
3245 | { | |
4cd001d5 | 3246 | rtx_insn *end = NEXT_INSN (BB_END (else_bb)); |
30eead8d | 3247 | while (end && NOTE_P (end) && !NOTE_INSN_BASIC_BLOCK_P (end)) |
3248 | end = NEXT_INSN (end); | |
3249 | ||
3250 | if (end && BARRIER_P (end)) | |
3251 | delete_insn (end); | |
3252 | } | |
c60fa3a7 | 3253 | merge_blocks (combo_bb, else_bb); |
bdce7739 | 3254 | num_true_changes++; |
0bb604ca | 3255 | } |
3256 | ||
3257 | /* If there was no join block reported, that means it was not adjacent | |
3258 | to the others, and so we cannot merge them. */ | |
3259 | ||
3260 | if (! join_bb) | |
3261 | { | |
ca0df1e3 | 3262 | rtx_insn *last = BB_END (combo_bb); |
fe70d0e3 | 3263 | |
0bb604ca | 3264 | /* The outgoing edge for the current COMBO block should already |
3265 | be correct. Verify this. */ | |
cd665a06 | 3266 | if (EDGE_COUNT (combo_bb->succs) == 0) |
a53ff4c1 | 3267 | gcc_assert (find_reg_note (last, REG_NORETURN, NULL) |
3268 | || (NONJUMP_INSN_P (last) | |
3269 | && GET_CODE (PATTERN (last)) == TRAP_IF | |
3270 | && (TRAP_CONDITION (PATTERN (last)) | |
3271 | == const_true_rtx))); | |
0bb604ca | 3272 | |
a53ff4c1 | 3273 | else |
fe70d0e3 | 3274 | /* There should still be something at the end of the THEN or ELSE |
0bb604ca | 3275 | blocks taking us to our final destination. */ |
a53ff4c1 | 3276 | gcc_assert (JUMP_P (last) |
34154e27 | 3277 | || (EDGE_SUCC (combo_bb, 0)->dest |
3278 | == EXIT_BLOCK_PTR_FOR_FN (cfun) | |
a53ff4c1 | 3279 | && CALL_P (last) |
3280 | && SIBLING_CALL_P (last)) | |
3281 | || ((EDGE_SUCC (combo_bb, 0)->flags & EDGE_EH) | |
3282 | && can_throw_internal (last))); | |
0bb604ca | 3283 | } |
3284 | ||
74b0991d | 3285 | /* The JOIN block may have had quite a number of other predecessors too. |
3286 | Since we've already merged the TEST, THEN and ELSE blocks, we should | |
3287 | have only one remaining edge from our if-then-else diamond. If there | |
cbd505b2 | 3288 | is more than one remaining edge, it must come from elsewhere. There |
952f0048 | 3289 | may be zero incoming edges if the THEN block didn't actually join |
a53ff4c1 | 3290 | back up (as with a call to a non-return function). */ |
cd665a06 | 3291 | else if (EDGE_COUNT (join_bb->preds) < 2 |
34154e27 | 3292 | && join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun)) |
0bb604ca | 3293 | { |
3072d30e | 3294 | /* We can merge the JOIN cleanly and update the dataflow try |
3295 | again on this pass.*/ | |
c60fa3a7 | 3296 | merge_blocks (combo_bb, join_bb); |
bdce7739 | 3297 | num_true_changes++; |
0bb604ca | 3298 | } |
3299 | else | |
3300 | { | |
3301 | /* We cannot merge the JOIN. */ | |
3302 | ||
3303 | /* The outgoing edge for the current COMBO block should already | |
3304 | be correct. Verify this. */ | |
ea091dfd | 3305 | gcc_assert (single_succ_p (combo_bb) |
3306 | && single_succ (combo_bb) == join_bb); | |
0bb604ca | 3307 | |
3308 | /* Remove the jump and cruft from the end of the COMBO block. */ | |
34154e27 | 3309 | if (join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun)) |
ea091dfd | 3310 | tidy_fallthru_edge (single_succ_edge (combo_bb)); |
0bb604ca | 3311 | } |
3312 | ||
0bb604ca | 3313 | num_updated_if_blocks++; |
3314 | } | |
3315 | \f | |
1d855d4c | 3316 | /* Find a block ending in a simple IF condition and try to transform it |
3317 | in some way. When converting a multi-block condition, put the new code | |
3318 | in the first such block and delete the rest. Return a pointer to this | |
3319 | first block if some transformation was done. Return NULL otherwise. */ | |
0bb604ca | 3320 | |
1d855d4c | 3321 | static basic_block |
952f0048 | 3322 | find_if_header (basic_block test_bb, int pass) |
0bb604ca | 3323 | { |
b3e7c666 | 3324 | ce_if_block ce_info; |
0bb604ca | 3325 | edge then_edge; |
3326 | edge else_edge; | |
3327 | ||
3328 | /* The kind of block we're looking for has exactly two successors. */ | |
cd665a06 | 3329 | if (EDGE_COUNT (test_bb->succs) != 2) |
1d855d4c | 3330 | return NULL; |
0bb604ca | 3331 | |
cd665a06 | 3332 | then_edge = EDGE_SUCC (test_bb, 0); |
3333 | else_edge = EDGE_SUCC (test_bb, 1); | |
3334 | ||
3072d30e | 3335 | if (df_get_bb_dirty (then_edge->dest)) |
3336 | return NULL; | |
3337 | if (df_get_bb_dirty (else_edge->dest)) | |
3338 | return NULL; | |
3339 | ||
0bb604ca | 3340 | /* Neither edge should be abnormal. */ |
3341 | if ((then_edge->flags & EDGE_COMPLEX) | |
3342 | || (else_edge->flags & EDGE_COMPLEX)) | |
1d855d4c | 3343 | return NULL; |
0bb604ca | 3344 | |
7f42fe24 | 3345 | /* Nor exit the loop. */ |
3346 | if ((then_edge->flags & EDGE_LOOP_EXIT) | |
3347 | || (else_edge->flags & EDGE_LOOP_EXIT)) | |
3348 | return NULL; | |
3349 | ||
0bb604ca | 3350 | /* The THEN edge is canonically the one that falls through. */ |
3351 | if (then_edge->flags & EDGE_FALLTHRU) | |
3352 | ; | |
3353 | else if (else_edge->flags & EDGE_FALLTHRU) | |
3354 | { | |
3355 | edge e = else_edge; | |
3356 | else_edge = then_edge; | |
3357 | then_edge = e; | |
3358 | } | |
3359 | else | |
3360 | /* Otherwise this must be a multiway branch of some sort. */ | |
1d855d4c | 3361 | return NULL; |
3362 | ||
76b61550 | 3363 | memset (&ce_info, 0, sizeof (ce_info)); |
1d855d4c | 3364 | ce_info.test_bb = test_bb; |
3365 | ce_info.then_bb = then_edge->dest; | |
3366 | ce_info.else_bb = else_edge->dest; | |
3367 | ce_info.pass = pass; | |
0bb604ca | 3368 | |
e2ca32a4 | 3369 | #ifdef IFCVT_MACHDEP_INIT |
3370 | IFCVT_MACHDEP_INIT (&ce_info); | |
1d855d4c | 3371 | #endif |
3372 | ||
76b61550 | 3373 | if (!reload_completed |
03dbd7cc | 3374 | && noce_find_if_block (test_bb, then_edge, else_edge, pass)) |
3375 | goto success; | |
3376 | ||
76b61550 | 3377 | if (reload_completed |
3378 | && targetm.have_conditional_execution () | |
03dbd7cc | 3379 | && cond_exec_find_if_block (&ce_info)) |
0bb604ca | 3380 | goto success; |
1d855d4c | 3381 | |
74f4459c | 3382 | if (HAVE_trap |
d6bf3b14 | 3383 | && optab_handler (ctrap_optab, word_mode) != CODE_FOR_nothing |
10a2674d | 3384 | && find_cond_trap (test_bb, then_edge, else_edge)) |
3385 | goto success; | |
1d855d4c | 3386 | |
50b08d37 | 3387 | if (dom_info_state (CDI_POST_DOMINATORS) >= DOM_NO_FAST_QUERY |
76b61550 | 3388 | && (reload_completed || !targetm.have_conditional_execution ())) |
0bb604ca | 3389 | { |
3390 | if (find_if_case_1 (test_bb, then_edge, else_edge)) | |
3391 | goto success; | |
3392 | if (find_if_case_2 (test_bb, then_edge, else_edge)) | |
3393 | goto success; | |
3394 | } | |
3395 | ||
1d855d4c | 3396 | return NULL; |
0bb604ca | 3397 | |
3398 | success: | |
450d042a | 3399 | if (dump_file) |
3400 | fprintf (dump_file, "Conversion succeeded on pass %d.\n", pass); | |
3072d30e | 3401 | /* Set this so we continue looking. */ |
3402 | cond_exec_changed_p = TRUE; | |
1d855d4c | 3403 | return ce_info.test_bb; |
3404 | } | |
3405 | ||
3406 | /* Return true if a block has two edges, one of which falls through to the next | |
3407 | block, and the other jumps to a specific block, so that we can tell if the | |
3408 | block is part of an && test or an || test. Returns either -1 or the number | |
3409 | of non-note, non-jump, non-USE/CLOBBER insns in the block. */ | |
3410 | ||
3411 | static int | |
952f0048 | 3412 | block_jumps_and_fallthru_p (basic_block cur_bb, basic_block target_bb) |
1d855d4c | 3413 | { |
3414 | edge cur_edge; | |
3415 | int fallthru_p = FALSE; | |
3416 | int jump_p = FALSE; | |
ca0df1e3 | 3417 | rtx_insn *insn; |
3418 | rtx_insn *end; | |
1d855d4c | 3419 | int n_insns = 0; |
cd665a06 | 3420 | edge_iterator ei; |
1d855d4c | 3421 | |
3422 | if (!cur_bb || !target_bb) | |
3423 | return -1; | |
3424 | ||
3425 | /* If no edges, obviously it doesn't jump or fallthru. */ | |
cd665a06 | 3426 | if (EDGE_COUNT (cur_bb->succs) == 0) |
1d855d4c | 3427 | return FALSE; |
3428 | ||
cd665a06 | 3429 | FOR_EACH_EDGE (cur_edge, ei, cur_bb->succs) |
1d855d4c | 3430 | { |
3431 | if (cur_edge->flags & EDGE_COMPLEX) | |
3432 | /* Anything complex isn't what we want. */ | |
3433 | return -1; | |
3434 | ||
3435 | else if (cur_edge->flags & EDGE_FALLTHRU) | |
3436 | fallthru_p = TRUE; | |
3437 | ||
3438 | else if (cur_edge->dest == target_bb) | |
3439 | jump_p = TRUE; | |
3440 | ||
3441 | else | |
3442 | return -1; | |
3443 | } | |
3444 | ||
3445 | if ((jump_p & fallthru_p) == 0) | |
3446 | return -1; | |
3447 | ||
3448 | /* Don't allow calls in the block, since this is used to group && and || | |
3449 | together for conditional execution support. ??? we should support | |
3450 | conditional execution support across calls for IA-64 some day, but | |
3451 | for now it makes the code simpler. */ | |
5496dbfc | 3452 | end = BB_END (cur_bb); |
3453 | insn = BB_HEAD (cur_bb); | |
1d855d4c | 3454 | |
3455 | while (insn != NULL_RTX) | |
3456 | { | |
6d7dc5b9 | 3457 | if (CALL_P (insn)) |
1d855d4c | 3458 | return -1; |
3459 | ||
3460 | if (INSN_P (insn) | |
6d7dc5b9 | 3461 | && !JUMP_P (insn) |
9845d120 | 3462 | && !DEBUG_INSN_P (insn) |
1d855d4c | 3463 | && GET_CODE (PATTERN (insn)) != USE |
3464 | && GET_CODE (PATTERN (insn)) != CLOBBER) | |
3465 | n_insns++; | |
3466 | ||
3467 | if (insn == end) | |
3468 | break; | |
3469 | ||
3470 | insn = NEXT_INSN (insn); | |
3471 | } | |
3472 | ||
3473 | return n_insns; | |
0bb604ca | 3474 | } |
3475 | ||
3476 | /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE | |
3477 | block. If so, we'll try to convert the insns to not require the branch. | |
d30e015b | 3478 | Return TRUE if we were successful at converting the block. */ |
0bb604ca | 3479 | |
3480 | static int | |
03dbd7cc | 3481 | cond_exec_find_if_block (struct ce_if_block * ce_info) |
0bb604ca | 3482 | { |
1d855d4c | 3483 | basic_block test_bb = ce_info->test_bb; |
3484 | basic_block then_bb = ce_info->then_bb; | |
3485 | basic_block else_bb = ce_info->else_bb; | |
0bb604ca | 3486 | basic_block join_bb = NULL_BLOCK; |
1d855d4c | 3487 | edge cur_edge; |
345ac34a | 3488 | basic_block next; |
cd665a06 | 3489 | edge_iterator ei; |
0bb604ca | 3490 | |
1d855d4c | 3491 | ce_info->last_test_bb = test_bb; |
3492 | ||
03dbd7cc | 3493 | /* We only ever should get here after reload, |
76b61550 | 3494 | and if we have conditional execution. */ |
3495 | gcc_assert (reload_completed && targetm.have_conditional_execution ()); | |
03dbd7cc | 3496 | |
1d855d4c | 3497 | /* Discover if any fall through predecessors of the current test basic block |
3498 | were && tests (which jump to the else block) or || tests (which jump to | |
3499 | the then block). */ | |
03dbd7cc | 3500 | if (single_pred_p (test_bb) |
ea091dfd | 3501 | && single_pred_edge (test_bb)->flags == EDGE_FALLTHRU) |
1d855d4c | 3502 | { |
ea091dfd | 3503 | basic_block bb = single_pred (test_bb); |
1d855d4c | 3504 | basic_block target_bb; |
3505 | int max_insns = MAX_CONDITIONAL_EXECUTE; | |
3506 | int n_insns; | |
3507 | ||
b903337a | 3508 | /* Determine if the preceding block is an && or || block. */ |
1d855d4c | 3509 | if ((n_insns = block_jumps_and_fallthru_p (bb, else_bb)) >= 0) |
3510 | { | |
3511 | ce_info->and_and_p = TRUE; | |
3512 | target_bb = else_bb; | |
3513 | } | |
3514 | else if ((n_insns = block_jumps_and_fallthru_p (bb, then_bb)) >= 0) | |
3515 | { | |
952f0048 | 3516 | ce_info->and_and_p = FALSE; |
1d855d4c | 3517 | target_bb = then_bb; |
3518 | } | |
3519 | else | |
3520 | target_bb = NULL_BLOCK; | |
3521 | ||
3522 | if (target_bb && n_insns <= max_insns) | |
3523 | { | |
3524 | int total_insns = 0; | |
3525 | int blocks = 0; | |
3526 | ||
3527 | ce_info->last_test_bb = test_bb; | |
3528 | ||
3529 | /* Found at least one && or || block, look for more. */ | |
3530 | do | |
3531 | { | |
3532 | ce_info->test_bb = test_bb = bb; | |
3533 | total_insns += n_insns; | |
3534 | blocks++; | |
3535 | ||
ea091dfd | 3536 | if (!single_pred_p (bb)) |
1d855d4c | 3537 | break; |
3538 | ||
ea091dfd | 3539 | bb = single_pred (bb); |
1d855d4c | 3540 | n_insns = block_jumps_and_fallthru_p (bb, target_bb); |
3541 | } | |
3542 | while (n_insns >= 0 && (total_insns + n_insns) <= max_insns); | |
3543 | ||
3544 | ce_info->num_multiple_test_blocks = blocks; | |
3545 | ce_info->num_multiple_test_insns = total_insns; | |
3546 | ||
3547 | if (ce_info->and_and_p) | |
3548 | ce_info->num_and_and_blocks = blocks; | |
3549 | else | |
3550 | ce_info->num_or_or_blocks = blocks; | |
3551 | } | |
3552 | } | |
3553 | ||
6047d32f | 3554 | /* The THEN block of an IF-THEN combo must have exactly one predecessor, |
3555 | other than any || blocks which jump to the THEN block. */ | |
3556 | if ((EDGE_COUNT (then_bb->preds) - ce_info->num_or_or_blocks) != 1) | |
3557 | return FALSE; | |
e592f6ea | 3558 | |
6047d32f | 3559 | /* The edges of the THEN and ELSE blocks cannot have complex edges. */ |
cd665a06 | 3560 | FOR_EACH_EDGE (cur_edge, ei, then_bb->preds) |
1d855d4c | 3561 | { |
1d855d4c | 3562 | if (cur_edge->flags & EDGE_COMPLEX) |
3563 | return FALSE; | |
3564 | } | |
3565 | ||
cd665a06 | 3566 | FOR_EACH_EDGE (cur_edge, ei, else_bb->preds) |
1d855d4c | 3567 | { |
1d855d4c | 3568 | if (cur_edge->flags & EDGE_COMPLEX) |
3569 | return FALSE; | |
3570 | } | |
3571 | ||
cbd505b2 | 3572 | /* The THEN block of an IF-THEN combo must have zero or one successors. */ |
cd665a06 | 3573 | if (EDGE_COUNT (then_bb->succs) > 0 |
ea091dfd | 3574 | && (!single_succ_p (then_bb) |
3575 | || (single_succ_edge (then_bb)->flags & EDGE_COMPLEX) | |
76b61550 | 3576 | || (epilogue_completed |
3577 | && tablejump_p (BB_END (then_bb), NULL, NULL)))) | |
0bb604ca | 3578 | return FALSE; |
3579 | ||
cbd505b2 | 3580 | /* If the THEN block has no successors, conditional execution can still |
3581 | make a conditional call. Don't do this unless the ELSE block has | |
d86c820b | 3582 | only one incoming edge -- the CFG manipulation is too ugly otherwise. |
3583 | Check for the last insn of the THEN block being an indirect jump, which | |
3584 | is listed as not having any successors, but confuses the rest of the CE | |
1d855d4c | 3585 | code processing. ??? we should fix this in the future. */ |
cd665a06 | 3586 | if (EDGE_COUNT (then_bb->succs) == 0) |
cbd505b2 | 3587 | { |
34154e27 | 3588 | if (single_pred_p (else_bb) && else_bb != EXIT_BLOCK_PTR_FOR_FN (cfun)) |
cbd505b2 | 3589 | { |
4cd001d5 | 3590 | rtx_insn *last_insn = BB_END (then_bb); |
d86c820b | 3591 | |
bf159d0b | 3592 | while (last_insn |
6d7dc5b9 | 3593 | && NOTE_P (last_insn) |
5496dbfc | 3594 | && last_insn != BB_HEAD (then_bb)) |
bf159d0b | 3595 | last_insn = PREV_INSN (last_insn); |
d86c820b | 3596 | |
bf159d0b | 3597 | if (last_insn |
6d7dc5b9 | 3598 | && JUMP_P (last_insn) |
d86c820b | 3599 | && ! simplejump_p (last_insn)) |
3600 | return FALSE; | |
3601 | ||
cbd505b2 | 3602 | join_bb = else_bb; |
3603 | else_bb = NULL_BLOCK; | |
3604 | } | |
3605 | else | |
3606 | return FALSE; | |
3607 | } | |
3608 | ||
0bb604ca | 3609 | /* If the THEN block's successor is the other edge out of the TEST block, |
3610 | then we have an IF-THEN combo without an ELSE. */ | |
ea091dfd | 3611 | else if (single_succ (then_bb) == else_bb) |
0bb604ca | 3612 | { |
3613 | join_bb = else_bb; | |
3614 | else_bb = NULL_BLOCK; | |
3615 | } | |
3616 | ||
3617 | /* If the THEN and ELSE block meet in a subsequent block, and the ELSE | |
3618 | has exactly one predecessor and one successor, and the outgoing edge | |
3619 | is not complex, then we have an IF-THEN-ELSE combo. */ | |
ea091dfd | 3620 | else if (single_succ_p (else_bb) |
3621 | && single_succ (then_bb) == single_succ (else_bb) | |
3622 | && single_pred_p (else_bb) | |
76b61550 | 3623 | && !(single_succ_edge (else_bb)->flags & EDGE_COMPLEX) |
3624 | && !(epilogue_completed | |
3625 | && tablejump_p (BB_END (else_bb), NULL, NULL))) | |
ea091dfd | 3626 | join_bb = single_succ (else_bb); |
0bb604ca | 3627 | |
3628 | /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */ | |
3629 | else | |
952f0048 | 3630 | return FALSE; |
0bb604ca | 3631 | |
3632 | num_possible_if_blocks++; | |
3633 | ||
450d042a | 3634 | if (dump_file) |
0bb604ca | 3635 | { |
450d042a | 3636 | fprintf (dump_file, |
3637 | "\nIF-THEN%s block found, pass %d, start block %d " | |
3638 | "[insn %d], then %d [%d]", | |
1d855d4c | 3639 | (else_bb) ? "-ELSE" : "", |
3640 | ce_info->pass, | |
450d042a | 3641 | test_bb->index, |
3642 | BB_HEAD (test_bb) ? (int)INSN_UID (BB_HEAD (test_bb)) : -1, | |
3643 | then_bb->index, | |
3644 | BB_HEAD (then_bb) ? (int)INSN_UID (BB_HEAD (then_bb)) : -1); | |
0bb604ca | 3645 | |
1d855d4c | 3646 | if (else_bb) |
450d042a | 3647 | fprintf (dump_file, ", else %d [%d]", |
3648 | else_bb->index, | |
3649 | BB_HEAD (else_bb) ? (int)INSN_UID (BB_HEAD (else_bb)) : -1); | |
1d855d4c | 3650 | |
450d042a | 3651 | fprintf (dump_file, ", join %d [%d]", |
3652 | join_bb->index, | |
3653 | BB_HEAD (join_bb) ? (int)INSN_UID (BB_HEAD (join_bb)) : -1); | |
1d855d4c | 3654 | |
3655 | if (ce_info->num_multiple_test_blocks > 0) | |
450d042a | 3656 | fprintf (dump_file, ", %d %s block%s last test %d [%d]", |
1d855d4c | 3657 | ce_info->num_multiple_test_blocks, |
3658 | (ce_info->and_and_p) ? "&&" : "||", | |
3659 | (ce_info->num_multiple_test_blocks == 1) ? "" : "s", | |
3660 | ce_info->last_test_bb->index, | |
5496dbfc | 3661 | ((BB_HEAD (ce_info->last_test_bb)) |
3662 | ? (int)INSN_UID (BB_HEAD (ce_info->last_test_bb)) | |
1d855d4c | 3663 | : -1)); |
3664 | ||
450d042a | 3665 | fputc ('\n', dump_file); |
1d855d4c | 3666 | } |
3667 | ||
3668 | /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the | |
3669 | first condition for free, since we've already asserted that there's a | |
3670 | fallthru edge from IF to THEN. Likewise for the && and || blocks, since | |
3671 | we checked the FALLTHRU flag, those are already adjacent to the last IF | |
3672 | block. */ | |
df4b504c | 3673 | /* ??? As an enhancement, move the ELSE block. Have to deal with |
a53ff4c1 | 3674 | BLOCK notes, if by no other means than backing out the merge if they |
0bb604ca | 3675 | exist. Sticky enough I don't want to think about it now. */ |
345ac34a | 3676 | next = then_bb; |
3677 | if (else_bb && (next = next->next_bb) != else_bb) | |
0bb604ca | 3678 | return FALSE; |
34154e27 | 3679 | if ((next = next->next_bb) != join_bb |
3680 | && join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun)) | |
0bb604ca | 3681 | { |
3682 | if (else_bb) | |
3683 | join_bb = NULL; | |
3684 | else | |
3685 | return FALSE; | |
3686 | } | |
3687 | ||
3688 | /* Do the real work. */ | |
03dbd7cc | 3689 | |
1d855d4c | 3690 | ce_info->else_bb = else_bb; |
3691 | ce_info->join_bb = join_bb; | |
3692 | ||
03dbd7cc | 3693 | /* If we have && and || tests, try to first handle combining the && and || |
3694 | tests into the conditional code, and if that fails, go back and handle | |
3695 | it without the && and ||, which at present handles the && case if there | |
3696 | was no ELSE block. */ | |
3697 | if (cond_exec_process_if_block (ce_info, TRUE)) | |
3698 | return TRUE; | |
3699 | ||
3700 | if (ce_info->num_multiple_test_blocks) | |
3701 | { | |
3702 | cancel_changes (0); | |
3703 | ||
3704 | if (cond_exec_process_if_block (ce_info, FALSE)) | |
3705 | return TRUE; | |
3706 | } | |
0fffdebc | 3707 | |
3708 | return FALSE; | |
0bb604ca | 3709 | } |
3710 | ||
1d855d4c | 3711 | /* Convert a branch over a trap, or a branch |
3712 | to a trap, into a conditional trap. */ | |
10a2674d | 3713 | |
3714 | static int | |
952f0048 | 3715 | find_cond_trap (basic_block test_bb, edge then_edge, edge else_edge) |
10a2674d | 3716 | { |
1d855d4c | 3717 | basic_block then_bb = then_edge->dest; |
3718 | basic_block else_bb = else_edge->dest; | |
3719 | basic_block other_bb, trap_bb; | |
ca0df1e3 | 3720 | rtx_insn *trap, *jump; |
2d650f54 | 3721 | rtx cond, seq; |
3722 | rtx_insn *cond_earliest; | |
10a2674d | 3723 | enum rtx_code code; |
3724 | ||
10a2674d | 3725 | /* Locate the block with the trap instruction. */ |
3726 | /* ??? While we look for no successors, we really ought to allow | |
3727 | EH successors. Need to fix merge_if_block for that to work. */ | |
fe70d0e3 | 3728 | if ((trap = block_has_only_trap (then_bb)) != NULL) |
5410141b | 3729 | trap_bb = then_bb, other_bb = else_bb; |
fe70d0e3 | 3730 | else if ((trap = block_has_only_trap (else_bb)) != NULL) |
5410141b | 3731 | trap_bb = else_bb, other_bb = then_bb; |
10a2674d | 3732 | else |
3733 | return FALSE; | |
3734 | ||
450d042a | 3735 | if (dump_file) |
10a2674d | 3736 | { |
450d042a | 3737 | fprintf (dump_file, "\nTRAP-IF block found, start %d, trap %d\n", |
b3d6de89 | 3738 | test_bb->index, trap_bb->index); |
10a2674d | 3739 | } |
3740 | ||
3741 | /* If this is not a standard conditional jump, we can't parse it. */ | |
5496dbfc | 3742 | jump = BB_END (test_bb); |
03dbd7cc | 3743 | cond = noce_get_condition (jump, &cond_earliest, false); |
10a2674d | 3744 | if (! cond) |
3745 | return FALSE; | |
3746 | ||
1d855d4c | 3747 | /* If the conditional jump is more than just a conditional jump, then |
3748 | we can not do if-conversion on this block. */ | |
10a2674d | 3749 | if (! onlyjump_p (jump)) |
3750 | return FALSE; | |
3751 | ||
3752 | /* We must be comparing objects whose modes imply the size. */ | |
3753 | if (GET_MODE (XEXP (cond, 0)) == BLKmode) | |
3754 | return FALSE; | |
3755 | ||
3756 | /* Reverse the comparison code, if necessary. */ | |
3757 | code = GET_CODE (cond); | |
3758 | if (then_bb == trap_bb) | |
3759 | { | |
3760 | code = reversed_comparison_code (cond, jump); | |
3761 | if (code == UNKNOWN) | |
3762 | return FALSE; | |
3763 | } | |
3764 | ||
3765 | /* Attempt to generate the conditional trap. */ | |
990be1d5 | 3766 | seq = gen_cond_trap (code, copy_rtx (XEXP (cond, 0)), |
3767 | copy_rtx (XEXP (cond, 1)), | |
10a2674d | 3768 | TRAP_CODE (PATTERN (trap))); |
3769 | if (seq == NULL) | |
3770 | return FALSE; | |
3771 | ||
5410141b | 3772 | /* Emit the new insns before cond_earliest. */ |
5169661d | 3773 | emit_insn_before_setloc (seq, cond_earliest, INSN_LOCATION (trap)); |
10a2674d | 3774 | |
5410141b | 3775 | /* Delete the trap block if possible. */ |
3776 | remove_edge (trap_bb == then_bb ? then_edge : else_edge); | |
3072d30e | 3777 | df_set_bb_dirty (test_bb); |
3778 | df_set_bb_dirty (then_bb); | |
3779 | df_set_bb_dirty (else_bb); | |
3780 | ||
cd665a06 | 3781 | if (EDGE_COUNT (trap_bb->preds) == 0) |
5410141b | 3782 | { |
5b410d6a | 3783 | delete_basic_block (trap_bb); |
3784 | num_true_changes++; | |
5410141b | 3785 | } |
5b410d6a | 3786 | |
3787 | /* Wire together the blocks again. */ | |
3788 | if (current_ir_type () == IR_RTL_CFGLAYOUT) | |
3789 | single_succ_edge (test_bb)->flags |= EDGE_FALLTHRU; | |
7cc3154d | 3790 | else if (trap_bb == then_bb) |
5410141b | 3791 | { |
ca0df1e3 | 3792 | rtx lab; |
3793 | rtx_insn *newjump; | |
10a2674d | 3794 | |
5410141b | 3795 | lab = JUMP_LABEL (jump); |
3796 | newjump = emit_jump_insn_after (gen_jump (lab), jump); | |
3797 | LABEL_NUSES (lab) += 1; | |
3798 | JUMP_LABEL (newjump) = lab; | |
3799 | emit_barrier_after (newjump); | |
5b410d6a | 3800 | } |
3801 | delete_insn (jump); | |
5410141b | 3802 | |
5b410d6a | 3803 | if (can_merge_blocks_p (test_bb, other_bb)) |
3804 | { | |
3805 | merge_blocks (test_bb, other_bb); | |
3806 | num_true_changes++; | |
5410141b | 3807 | } |
10a2674d | 3808 | |
5b410d6a | 3809 | num_updated_if_blocks++; |
10a2674d | 3810 | return TRUE; |
3811 | } | |
3812 | ||
952f0048 | 3813 | /* Subroutine of find_cond_trap: if BB contains only a trap insn, |
fe70d0e3 | 3814 | return it. */ |
3815 | ||
ca0df1e3 | 3816 | static rtx_insn * |
952f0048 | 3817 | block_has_only_trap (basic_block bb) |
fe70d0e3 | 3818 | { |
ca0df1e3 | 3819 | rtx_insn *trap; |
fe70d0e3 | 3820 | |
3821 | /* We're not the exit block. */ | |
34154e27 | 3822 | if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun)) |
ca0df1e3 | 3823 | return NULL; |
fe70d0e3 | 3824 | |
3825 | /* The block must have no successors. */ | |
cd665a06 | 3826 | if (EDGE_COUNT (bb->succs) > 0) |
ca0df1e3 | 3827 | return NULL; |
fe70d0e3 | 3828 | |
3829 | /* The only instruction in the THEN block must be the trap. */ | |
3830 | trap = first_active_insn (bb); | |
5496dbfc | 3831 | if (! (trap == BB_END (bb) |
fe70d0e3 | 3832 | && GET_CODE (PATTERN (trap)) == TRAP_IF |
3833 | && TRAP_CONDITION (PATTERN (trap)) == const_true_rtx)) | |
ca0df1e3 | 3834 | return NULL; |
fe70d0e3 | 3835 | |
3836 | return trap; | |
3837 | } | |
3838 | ||
0bb604ca | 3839 | /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is |
3840 | transformable, but not necessarily the other. There need be no | |
3841 | JOIN block. | |
3842 | ||
d30e015b | 3843 | Return TRUE if we were successful at converting the block. |
0bb604ca | 3844 | |
3845 | Cases we'd like to look at: | |
3846 | ||
3847 | (1) | |
3848 | if (test) goto over; // x not live | |
3849 | x = a; | |
3850 | goto label; | |
3851 | over: | |
3852 | ||
3853 | becomes | |
3854 | ||
3855 | x = a; | |
3856 | if (! test) goto label; | |
3857 | ||
3858 | (2) | |
3859 | if (test) goto E; // x not live | |
3860 | x = big(); | |
3861 | goto L; | |
3862 | E: | |
3863 | x = b; | |
3864 | goto M; | |
3865 | ||
3866 | becomes | |
3867 | ||
3868 | x = b; | |
3869 | if (test) goto M; | |
3870 | x = big(); | |
3871 | goto L; | |
3872 | ||
3873 | (3) // This one's really only interesting for targets that can do | |
3874 | // multiway branching, e.g. IA-64 BBB bundles. For other targets | |
3875 | // it results in multiple branches on a cache line, which often | |
3876 | // does not sit well with predictors. | |
3877 | ||
3878 | if (test1) goto E; // predicted not taken | |
3879 | x = a; | |
3880 | if (test2) goto F; | |
3881 | ... | |
3882 | E: | |
3883 | x = b; | |
3884 | J: | |
3885 | ||
3886 | becomes | |
3887 | ||
3888 | x = a; | |
3889 | if (test1) goto E; | |
3890 | if (test2) goto F; | |
3891 | ||
3892 | Notes: | |
3893 | ||
3894 | (A) Don't do (2) if the branch is predicted against the block we're | |
3895 | eliminating. Do it anyway if we can eliminate a branch; this requires | |
3896 | that the sole successor of the eliminated block postdominate the other | |
3897 | side of the if. | |
3898 | ||
3899 | (B) With CE, on (3) we can steal from both sides of the if, creating | |
3900 | ||
3901 | if (test1) x = a; | |
3902 | if (!test1) x = b; | |
3903 | if (test1) goto J; | |
3904 | if (test2) goto F; | |
3905 | ... | |
3906 | J: | |
3907 | ||
3908 | Again, this is most useful if J postdominates. | |
3909 | ||
3910 | (C) CE substitutes for helpful life information. | |
3911 | ||
3912 | (D) These heuristics need a lot of work. */ | |
3913 | ||
3914 | /* Tests for case 1 above. */ | |
3915 | ||
3916 | static int | |
952f0048 | 3917 | find_if_case_1 (basic_block test_bb, edge then_edge, edge else_edge) |
0bb604ca | 3918 | { |
3919 | basic_block then_bb = then_edge->dest; | |
3072d30e | 3920 | basic_block else_bb = else_edge->dest; |
3921 | basic_block new_bb; | |
0217cfff | 3922 | int then_bb_index, then_prob; |
9cb2517e | 3923 | rtx else_target = NULL_RTX; |
0bb604ca | 3924 | |
4f18499c | 3925 | /* If we are partitioning hot/cold basic blocks, we don't want to |
3926 | mess up unconditional or indirect jumps that cross between hot | |
1118aef7 | 3927 | and cold sections. |
e592f6ea | 3928 | |
1118aef7 | 3929 | Basic block partitioning may result in some jumps that appear to |
e592f6ea | 3930 | be optimizable (or blocks that appear to be mergeable), but which really |
3931 | must be left untouched (they are required to make it safely across | |
3932 | partition boundaries). See the comments at the top of | |
1118aef7 | 3933 | bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */ |
3934 | ||
e592f6ea | 3935 | if ((BB_END (then_bb) |
8f869004 | 3936 | && JUMP_P (BB_END (then_bb)) |
3937 | && CROSSING_JUMP_P (BB_END (then_bb))) | |
1897b881 | 3938 | || (BB_END (test_bb) |
8f869004 | 3939 | && JUMP_P (BB_END (test_bb)) |
3940 | && CROSSING_JUMP_P (BB_END (test_bb))) | |
1897b881 | 3941 | || (BB_END (else_bb) |
8f869004 | 3942 | && JUMP_P (BB_END (else_bb)) |
3943 | && CROSSING_JUMP_P (BB_END (else_bb)))) | |
4f18499c | 3944 | return FALSE; |
3945 | ||
0bb604ca | 3946 | /* THEN has one successor. */ |
ea091dfd | 3947 | if (!single_succ_p (then_bb)) |
0bb604ca | 3948 | return FALSE; |
3949 | ||
3950 | /* THEN does not fall through, but is not strange either. */ | |
ea091dfd | 3951 | if (single_succ_edge (then_bb)->flags & (EDGE_COMPLEX | EDGE_FALLTHRU)) |
0bb604ca | 3952 | return FALSE; |
3953 | ||
3954 | /* THEN has one predecessor. */ | |
ea091dfd | 3955 | if (!single_pred_p (then_bb)) |
0bb604ca | 3956 | return FALSE; |
3957 | ||
3cd757b1 | 3958 | /* THEN must do something. */ |
3959 | if (forwarder_block_p (then_bb)) | |
0bb604ca | 3960 | return FALSE; |
3961 | ||
3962 | num_possible_if_blocks++; | |
450d042a | 3963 | if (dump_file) |
3964 | fprintf (dump_file, | |
0bb604ca | 3965 | "\nIF-CASE-1 found, start %d, then %d\n", |
b3d6de89 | 3966 | test_bb->index, then_bb->index); |
0bb604ca | 3967 | |
0217cfff | 3968 | if (then_edge->probability) |
3969 | then_prob = REG_BR_PROB_BASE - then_edge->probability; | |
3970 | else | |
3971 | then_prob = REG_BR_PROB_BASE / 2; | |
3972 | ||
3973 | /* We're speculating from the THEN path, we want to make sure the cost | |
3974 | of speculation is within reason. */ | |
3975 | if (! cheap_bb_rtx_cost_p (then_bb, then_prob, | |
4a9d7ef7 | 3976 | COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge->src), |
3977 | predictable_edge_p (then_edge))))) | |
0bb604ca | 3978 | return FALSE; |
3979 | ||
34154e27 | 3980 | if (else_bb == EXIT_BLOCK_PTR_FOR_FN (cfun)) |
9cb2517e | 3981 | { |
ca0df1e3 | 3982 | rtx_insn *jump = BB_END (else_edge->src); |
9cb2517e | 3983 | gcc_assert (JUMP_P (jump)); |
3984 | else_target = JUMP_LABEL (jump); | |
3985 | } | |
3986 | ||
0bb604ca | 3987 | /* Registers set are dead, or are predicable. */ |
952f0048 | 3988 | if (! dead_or_predicable (test_bb, then_bb, else_bb, |
4115ac36 | 3989 | single_succ_edge (then_bb), 1)) |
0bb604ca | 3990 | return FALSE; |
3991 | ||
3992 | /* Conversion went ok, including moving the insns and fixing up the | |
3993 | jump. Adjust the CFG to match. */ | |
3994 | ||
1ebefdcd | 3995 | /* We can avoid creating a new basic block if then_bb is immediately |
3996 | followed by else_bb, i.e. deleting then_bb allows test_bb to fall | |
9d75589a | 3997 | through to else_bb. */ |
1ebefdcd | 3998 | |
3999 | if (then_bb->next_bb == else_bb | |
4000 | && then_bb->prev_bb == test_bb | |
34154e27 | 4001 | && else_bb != EXIT_BLOCK_PTR_FOR_FN (cfun)) |
1ebefdcd | 4002 | { |
4003 | redirect_edge_succ (FALLTHRU_EDGE (test_bb), else_bb); | |
4004 | new_bb = 0; | |
4005 | } | |
34154e27 | 4006 | else if (else_bb == EXIT_BLOCK_PTR_FOR_FN (cfun)) |
9cb2517e | 4007 | new_bb = force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb), |
4008 | else_bb, else_target); | |
1ebefdcd | 4009 | else |
4010 | new_bb = redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb), | |
3072d30e | 4011 | else_bb); |
4012 | ||
4013 | df_set_bb_dirty (test_bb); | |
4014 | df_set_bb_dirty (else_bb); | |
1ebefdcd | 4015 | |
3c0a32c9 | 4016 | then_bb_index = then_bb->index; |
5f5d4cd1 | 4017 | delete_basic_block (then_bb); |
1d855d4c | 4018 | |
3cd757b1 | 4019 | /* Make rest of code believe that the newly created block is the THEN_BB |
3c0a32c9 | 4020 | block we removed. */ |
b3d6de89 | 4021 | if (new_bb) |
3c0a32c9 | 4022 | { |
3072d30e | 4023 | df_bb_replace (then_bb_index, new_bb); |
aa78dca5 | 4024 | /* This should have been done above via force_nonfallthru_and_redirect |
4025 | (possibly called from redirect_edge_and_branch_force). */ | |
4026 | gcc_checking_assert (BB_PARTITION (new_bb) == BB_PARTITION (test_bb)); | |
3c0a32c9 | 4027 | } |
0bb604ca | 4028 | |
bdce7739 | 4029 | num_true_changes++; |
0bb604ca | 4030 | num_updated_if_blocks++; |
4031 | ||
4032 | return TRUE; | |
4033 | } | |
4034 | ||
4035 | /* Test for case 2 above. */ | |
4036 | ||
4037 | static int | |
952f0048 | 4038 | find_if_case_2 (basic_block test_bb, edge then_edge, edge else_edge) |
0bb604ca | 4039 | { |
4040 | basic_block then_bb = then_edge->dest; | |
4041 | basic_block else_bb = else_edge->dest; | |
cd665a06 | 4042 | edge else_succ; |
0217cfff | 4043 | int then_prob, else_prob; |
0bb604ca | 4044 | |
980af7e0 | 4045 | /* We do not want to speculate (empty) loop latches. */ |
4046 | if (current_loops | |
4047 | && else_bb->loop_father->latch == else_bb) | |
4048 | return FALSE; | |
4049 | ||
4f18499c | 4050 | /* If we are partitioning hot/cold basic blocks, we don't want to |
4051 | mess up unconditional or indirect jumps that cross between hot | |
1118aef7 | 4052 | and cold sections. |
e592f6ea | 4053 | |
1118aef7 | 4054 | Basic block partitioning may result in some jumps that appear to |
e592f6ea | 4055 | be optimizable (or blocks that appear to be mergeable), but which really |
4056 | must be left untouched (they are required to make it safely across | |
4057 | partition boundaries). See the comments at the top of | |
1118aef7 | 4058 | bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */ |
4059 | ||
1897b881 | 4060 | if ((BB_END (then_bb) |
8f869004 | 4061 | && JUMP_P (BB_END (then_bb)) |
4062 | && CROSSING_JUMP_P (BB_END (then_bb))) | |
1897b881 | 4063 | || (BB_END (test_bb) |
8f869004 | 4064 | && JUMP_P (BB_END (test_bb)) |
4065 | && CROSSING_JUMP_P (BB_END (test_bb))) | |
e592f6ea | 4066 | || (BB_END (else_bb) |
8f869004 | 4067 | && JUMP_P (BB_END (else_bb)) |
4068 | && CROSSING_JUMP_P (BB_END (else_bb)))) | |
4f18499c | 4069 | return FALSE; |
4070 | ||
0bb604ca | 4071 | /* ELSE has one successor. */ |
ea091dfd | 4072 | if (!single_succ_p (else_bb)) |
0bb604ca | 4073 | return FALSE; |
cd665a06 | 4074 | else |
ea091dfd | 4075 | else_succ = single_succ_edge (else_bb); |
0bb604ca | 4076 | |
4077 | /* ELSE outgoing edge is not complex. */ | |
4078 | if (else_succ->flags & EDGE_COMPLEX) | |
4079 | return FALSE; | |
4080 | ||
4081 | /* ELSE has one predecessor. */ | |
ea091dfd | 4082 | if (!single_pred_p (else_bb)) |
0bb604ca | 4083 | return FALSE; |
4084 | ||
447095c0 | 4085 | /* THEN is not EXIT. */ |
4d2e5d52 | 4086 | if (then_bb->index < NUM_FIXED_BLOCKS) |
447095c0 | 4087 | return FALSE; |
4088 | ||
0217cfff | 4089 | if (else_edge->probability) |
4090 | { | |
4091 | else_prob = else_edge->probability; | |
4092 | then_prob = REG_BR_PROB_BASE - else_prob; | |
4093 | } | |
4094 | else | |
4095 | { | |
4096 | else_prob = REG_BR_PROB_BASE / 2; | |
4097 | then_prob = REG_BR_PROB_BASE / 2; | |
4098 | } | |
4099 | ||
0bb604ca | 4100 | /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */ |
0217cfff | 4101 | if (else_prob > then_prob) |
0bb604ca | 4102 | ; |
4d2e5d52 | 4103 | else if (else_succ->dest->index < NUM_FIXED_BLOCKS |
0051c76a | 4104 | || dominated_by_p (CDI_POST_DOMINATORS, then_bb, |
89d75d78 | 4105 | else_succ->dest)) |
0bb604ca | 4106 | ; |
4107 | else | |
4108 | return FALSE; | |
4109 | ||
4110 | num_possible_if_blocks++; | |
450d042a | 4111 | if (dump_file) |
4112 | fprintf (dump_file, | |
0bb604ca | 4113 | "\nIF-CASE-2 found, start %d, else %d\n", |
b3d6de89 | 4114 | test_bb->index, else_bb->index); |
0bb604ca | 4115 | |
0217cfff | 4116 | /* We're speculating from the ELSE path, we want to make sure the cost |
4117 | of speculation is within reason. */ | |
4118 | if (! cheap_bb_rtx_cost_p (else_bb, else_prob, | |
4a9d7ef7 | 4119 | COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge->src), |
4120 | predictable_edge_p (else_edge))))) | |
0bb604ca | 4121 | return FALSE; |
4122 | ||
0bb604ca | 4123 | /* Registers set are dead, or are predicable. */ |
4115ac36 | 4124 | if (! dead_or_predicable (test_bb, else_bb, then_bb, else_succ, 0)) |
0bb604ca | 4125 | return FALSE; |
4126 | ||
4127 | /* Conversion went ok, including moving the insns and fixing up the | |
4128 | jump. Adjust the CFG to match. */ | |
4129 | ||
3072d30e | 4130 | df_set_bb_dirty (test_bb); |
4131 | df_set_bb_dirty (then_bb); | |
5f5d4cd1 | 4132 | delete_basic_block (else_bb); |
0bb604ca | 4133 | |
bdce7739 | 4134 | num_true_changes++; |
0bb604ca | 4135 | num_updated_if_blocks++; |
4136 | ||
4137 | /* ??? We may now fallthru from one of THEN's successors into a join | |
4138 | block. Rerun cleanup_cfg? Examine things manually? Wait? */ | |
4139 | ||
4140 | return TRUE; | |
4141 | } | |
4142 | ||
0bb604ca | 4143 | /* Used by the code above to perform the actual rtl transformations. |
4144 | Return TRUE if successful. | |
4145 | ||
4146 | TEST_BB is the block containing the conditional branch. MERGE_BB | |
4115ac36 | 4147 | is the block containing the code to manipulate. DEST_EDGE is an |
4148 | edge representing a jump to the join block; after the conversion, | |
4149 | TEST_BB should be branching to its destination. | |
0bb604ca | 4150 | REVERSEP is true if the sense of the branch should be reversed. */ |
4151 | ||
4152 | static int | |
952f0048 | 4153 | dead_or_predicable (basic_block test_bb, basic_block merge_bb, |
4115ac36 | 4154 | basic_block other_bb, edge dest_edge, int reversep) |
0bb604ca | 4155 | { |
4115ac36 | 4156 | basic_block new_dest = dest_edge->dest; |
ca0df1e3 | 4157 | rtx_insn *head, *end, *jump; |
2d650f54 | 4158 | rtx_insn *earliest = NULL; |
4159 | rtx old_dest; | |
bc6adae4 | 4160 | bitmap merge_set = NULL; |
a27f5985 | 4161 | /* Number of pending changes. */ |
4162 | int n_validated_changes = 0; | |
4115ac36 | 4163 | rtx new_dest_label = NULL_RTX; |
0bb604ca | 4164 | |
5496dbfc | 4165 | jump = BB_END (test_bb); |
0bb604ca | 4166 | |
4167 | /* Find the extent of the real code in the merge block. */ | |
5496dbfc | 4168 | head = BB_HEAD (merge_bb); |
4169 | end = BB_END (merge_bb); | |
0bb604ca | 4170 | |
9845d120 | 4171 | while (DEBUG_INSN_P (end) && end != head) |
4172 | end = PREV_INSN (end); | |
4173 | ||
fa4578c6 | 4174 | /* If merge_bb ends with a tablejump, predicating/moving insn's |
4175 | into test_bb and then deleting merge_bb will result in the jumptable | |
4176 | that follows merge_bb being removed along with merge_bb and then we | |
4177 | get an unresolved reference to the jumptable. */ | |
4178 | if (tablejump_p (end, NULL, NULL)) | |
4179 | return FALSE; | |
4180 | ||
6d7dc5b9 | 4181 | if (LABEL_P (head)) |
0bb604ca | 4182 | head = NEXT_INSN (head); |
9845d120 | 4183 | while (DEBUG_INSN_P (head) && head != end) |
4184 | head = NEXT_INSN (head); | |
6d7dc5b9 | 4185 | if (NOTE_P (head)) |
0bb604ca | 4186 | { |
4187 | if (head == end) | |
4188 | { | |
ca0df1e3 | 4189 | head = end = NULL; |
0bb604ca | 4190 | goto no_body; |
4191 | } | |
4192 | head = NEXT_INSN (head); | |
9845d120 | 4193 | while (DEBUG_INSN_P (head) && head != end) |
4194 | head = NEXT_INSN (head); | |
0bb604ca | 4195 | } |
4196 | ||
6d7dc5b9 | 4197 | if (JUMP_P (end)) |
0bb604ca | 4198 | { |
68960717 | 4199 | if (!onlyjump_p (end)) |
4200 | return FALSE; | |
0bb604ca | 4201 | if (head == end) |
4202 | { | |
ca0df1e3 | 4203 | head = end = NULL; |
0bb604ca | 4204 | goto no_body; |
4205 | } | |
4206 | end = PREV_INSN (end); | |
9845d120 | 4207 | while (DEBUG_INSN_P (end) && end != head) |
4208 | end = PREV_INSN (end); | |
0bb604ca | 4209 | } |
4210 | ||
4f997567 | 4211 | /* Don't move frame-related insn across the conditional branch. This |
4212 | can lead to one of the paths of the branch having wrong unwind info. */ | |
4213 | if (epilogue_completed) | |
4214 | { | |
ca0df1e3 | 4215 | rtx_insn *insn = head; |
4f997567 | 4216 | while (1) |
4217 | { | |
4218 | if (INSN_P (insn) && RTX_FRAME_RELATED_P (insn)) | |
4219 | return FALSE; | |
4220 | if (insn == end) | |
4221 | break; | |
4222 | insn = NEXT_INSN (insn); | |
4223 | } | |
4224 | } | |
4225 | ||
c71dadd2 | 4226 | /* Disable handling dead code by conditional execution if the machine needs |
4227 | to do anything funny with the tests, etc. */ | |
4228 | #ifndef IFCVT_MODIFY_TESTS | |
751d3ba7 | 4229 | if (targetm.have_conditional_execution ()) |
0bb604ca | 4230 | { |
4231 | /* In the conditional execution case, we have things easy. We know | |
c7bf1374 | 4232 | the condition is reversible. We don't have to check life info |
4233 | because we're going to conditionally execute the code anyway. | |
0bb604ca | 4234 | All that's left is making sure the insns involved can actually |
4235 | be predicated. */ | |
4236 | ||
9eb946de | 4237 | rtx cond; |
0bb604ca | 4238 | |
4239 | cond = cond_exec_get_condition (jump); | |
4bf64bbb | 4240 | if (! cond) |
4241 | return FALSE; | |
f7785736 | 4242 | |
9eb946de | 4243 | rtx note = find_reg_note (jump, REG_BR_PROB, NULL_RTX); |
4244 | int prob_val = (note ? XINT (note, 0) : -1); | |
f7785736 | 4245 | |
0bb604ca | 4246 | if (reversep) |
f7785736 | 4247 | { |
4bf64bbb | 4248 | enum rtx_code rev = reversed_comparison_code (cond, jump); |
4249 | if (rev == UNKNOWN) | |
050fd340 | 4250 | return FALSE; |
4bf64bbb | 4251 | cond = gen_rtx_fmt_ee (rev, GET_MODE (cond), XEXP (cond, 0), |
f7785736 | 4252 | XEXP (cond, 1)); |
9eb946de | 4253 | if (prob_val >= 0) |
4254 | prob_val = REG_BR_PROB_BASE - prob_val; | |
f7785736 | 4255 | } |
0bb604ca | 4256 | |
a27f5985 | 4257 | if (cond_exec_process_insns (NULL, head, end, cond, prob_val, 0) |
4258 | && verify_changes (0)) | |
4259 | n_validated_changes = num_validated_changes (); | |
4260 | else | |
4261 | cancel_changes (0); | |
0bb604ca | 4262 | |
4263 | earliest = jump; | |
4264 | } | |
c71dadd2 | 4265 | #endif |
09669349 | 4266 | |
bc6adae4 | 4267 | /* If we allocated new pseudos (e.g. in the conditional move |
4268 | expander called from noce_emit_cmove), we must resize the | |
4269 | array first. */ | |
4270 | if (max_regno < max_reg_num ()) | |
4271 | max_regno = max_reg_num (); | |
4272 | ||
a27f5985 | 4273 | /* Try the NCE path if the CE path did not result in any changes. */ |
4274 | if (n_validated_changes == 0) | |
0bb604ca | 4275 | { |
ca0df1e3 | 4276 | rtx cond; |
4277 | rtx_insn *insn; | |
bc6adae4 | 4278 | regset live; |
4279 | bool success; | |
4280 | ||
0bb604ca | 4281 | /* In the non-conditional execution case, we have to verify that there |
4282 | are no trapping operations, no calls, no references to memory, and | |
4283 | that any registers modified are dead at the branch site. */ | |
4284 | ||
bc6adae4 | 4285 | if (!any_condjump_p (jump)) |
0bb604ca | 4286 | return FALSE; |
4287 | ||
4288 | /* Find the extent of the conditional. */ | |
03dbd7cc | 4289 | cond = noce_get_condition (jump, &earliest, false); |
bc6adae4 | 4290 | if (!cond) |
0bb604ca | 4291 | return FALSE; |
4292 | ||
bc6adae4 | 4293 | live = BITMAP_ALLOC (®_obstack); |
4294 | simulate_backwards_to_point (merge_bb, live, end); | |
4295 | success = can_move_insns_across (head, end, earliest, jump, | |
4296 | merge_bb, live, | |
4297 | df_get_live_in (other_bb), NULL); | |
4298 | BITMAP_FREE (live); | |
4299 | if (!success) | |
4300 | return FALSE; | |
a81d7200 | 4301 | |
bc6adae4 | 4302 | /* Collect the set of registers set in MERGE_BB. */ |
a81d7200 | 4303 | merge_set = BITMAP_ALLOC (®_obstack); |
a81d7200 | 4304 | |
4305 | FOR_BB_INSNS (merge_bb, insn) | |
bc6adae4 | 4306 | if (NONDEBUG_INSN_P (insn)) |
4307 | df_simulate_find_defs (insn, merge_set); | |
97ad7dab | 4308 | |
4309 | /* If shrink-wrapping, disable this optimization when test_bb is | |
4310 | the first basic block and merge_bb exits. The idea is to not | |
4311 | move code setting up a return register as that may clobber a | |
4312 | register used to pass function parameters, which then must be | |
4313 | saved in caller-saved regs. A caller-saved reg requires the | |
4314 | prologue, killing a shrink-wrap opportunity. */ | |
ee828140 | 4315 | if ((SHRINK_WRAPPING_ENABLED && !epilogue_completed) |
34154e27 | 4316 | && ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb == test_bb |
97ad7dab | 4317 | && single_succ_p (new_dest) |
34154e27 | 4318 | && single_succ (new_dest) == EXIT_BLOCK_PTR_FOR_FN (cfun) |
97ad7dab | 4319 | && bitmap_intersect_p (df_get_live_in (new_dest), merge_set)) |
4320 | { | |
4321 | regset return_regs; | |
4322 | unsigned int i; | |
4323 | ||
4324 | return_regs = BITMAP_ALLOC (®_obstack); | |
4325 | ||
4326 | /* Start off with the intersection of regs used to pass | |
4327 | params and regs used to return values. */ | |
4328 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
4329 | if (FUNCTION_ARG_REGNO_P (i) | |
4330 | && targetm.calls.function_value_regno_p (i)) | |
4331 | bitmap_set_bit (return_regs, INCOMING_REGNO (i)); | |
4332 | ||
34154e27 | 4333 | bitmap_and_into (return_regs, |
4334 | df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun))); | |
4335 | bitmap_and_into (return_regs, | |
4336 | df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun))); | |
97ad7dab | 4337 | if (!bitmap_empty_p (return_regs)) |
4338 | { | |
4339 | FOR_BB_INSNS_REVERSE (new_dest, insn) | |
4340 | if (NONDEBUG_INSN_P (insn)) | |
4341 | { | |
be10bb5a | 4342 | df_ref def; |
4343 | ||
4344 | /* If this insn sets any reg in return_regs, add all | |
4345 | reg uses to the set of regs we're interested in. */ | |
4346 | FOR_EACH_INSN_DEF (def, insn) | |
4347 | if (bitmap_bit_p (return_regs, DF_REF_REGNO (def))) | |
4348 | { | |
4349 | df_simulate_uses (insn, return_regs); | |
97ad7dab | 4350 | break; |
be10bb5a | 4351 | } |
97ad7dab | 4352 | } |
4353 | if (bitmap_intersect_p (merge_set, return_regs)) | |
4354 | { | |
4355 | BITMAP_FREE (return_regs); | |
4356 | BITMAP_FREE (merge_set); | |
4357 | return FALSE; | |
4358 | } | |
4359 | } | |
4360 | BITMAP_FREE (return_regs); | |
4361 | } | |
0bb604ca | 4362 | } |
4363 | ||
4364 | no_body: | |
4365 | /* We don't want to use normal invert_jump or redirect_jump because | |
4366 | we don't want to delete_insn called. Also, we want to do our own | |
4367 | change group management. */ | |
4368 | ||
4369 | old_dest = JUMP_LABEL (jump); | |
13b07dab | 4370 | if (other_bb != new_dest) |
4371 | { | |
725fe172 | 4372 | if (!any_condjump_p (jump)) |
4373 | goto cancel; | |
4374 | ||
4115ac36 | 4375 | if (JUMP_P (BB_END (dest_edge->src))) |
4376 | new_dest_label = JUMP_LABEL (BB_END (dest_edge->src)); | |
34154e27 | 4377 | else if (new_dest == EXIT_BLOCK_PTR_FOR_FN (cfun)) |
4115ac36 | 4378 | new_dest_label = ret_rtx; |
4379 | else | |
4380 | new_dest_label = block_label (new_dest); | |
4381 | ||
13b07dab | 4382 | if (reversep |
4115ac36 | 4383 | ? ! invert_jump_1 (jump, new_dest_label) |
4384 | : ! redirect_jump_1 (jump, new_dest_label)) | |
13b07dab | 4385 | goto cancel; |
4386 | } | |
0bb604ca | 4387 | |
a27f5985 | 4388 | if (verify_changes (n_validated_changes)) |
4389 | confirm_change_group (); | |
4390 | else | |
4391 | goto cancel; | |
0bb604ca | 4392 | |
13b07dab | 4393 | if (other_bb != new_dest) |
3cd757b1 | 4394 | { |
4115ac36 | 4395 | redirect_jump_2 (jump, old_dest, new_dest_label, 0, reversep); |
13b07dab | 4396 | |
4397 | redirect_edge_succ (BRANCH_EDGE (test_bb), new_dest); | |
4398 | if (reversep) | |
4399 | { | |
4400 | gcov_type count, probability; | |
4401 | count = BRANCH_EDGE (test_bb)->count; | |
4402 | BRANCH_EDGE (test_bb)->count = FALLTHRU_EDGE (test_bb)->count; | |
4403 | FALLTHRU_EDGE (test_bb)->count = count; | |
4404 | probability = BRANCH_EDGE (test_bb)->probability; | |
4405 | BRANCH_EDGE (test_bb)->probability | |
4406 | = FALLTHRU_EDGE (test_bb)->probability; | |
4407 | FALLTHRU_EDGE (test_bb)->probability = probability; | |
4408 | update_br_prob_note (test_bb); | |
4409 | } | |
3cd757b1 | 4410 | } |
4411 | ||
0bb604ca | 4412 | /* Move the insns out of MERGE_BB to before the branch. */ |
0bb604ca | 4413 | if (head != NULL) |
4414 | { | |
ca0df1e3 | 4415 | rtx_insn *insn; |
dfc4de0a | 4416 | |
5496dbfc | 4417 | if (end == BB_END (merge_bb)) |
26bb3cb2 | 4418 | BB_END (merge_bb) = PREV_INSN (head); |
a6171d02 | 4419 | |
09669349 | 4420 | /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL |
4421 | notes being moved might become invalid. */ | |
dfc4de0a | 4422 | insn = head; |
4423 | do | |
4424 | { | |
935c9adb | 4425 | rtx note; |
dfc4de0a | 4426 | |
4427 | if (! INSN_P (insn)) | |
4428 | continue; | |
4429 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
4430 | if (! note) | |
4431 | continue; | |
935c9adb | 4432 | remove_note (insn, note); |
dfc4de0a | 4433 | } while (insn != end && (insn = NEXT_INSN (insn))); |
4434 | ||
09669349 | 4435 | /* PR46315: when moving insns above a conditional branch, the REG_EQUAL |
4436 | notes referring to the registers being set might become invalid. */ | |
4437 | if (merge_set) | |
4438 | { | |
4439 | unsigned i; | |
4440 | bitmap_iterator bi; | |
4441 | ||
ff3672d9 | 4442 | EXECUTE_IF_SET_IN_BITMAP (merge_set, 0, i, bi) |
09669349 | 4443 | remove_reg_equal_equiv_notes_for_regno (i); |
4444 | ||
4445 | BITMAP_FREE (merge_set); | |
09669349 | 4446 | } |
4447 | ||
0bb604ca | 4448 | reorder_insns (head, end, PREV_INSN (earliest)); |
4449 | } | |
13b07dab | 4450 | |
4451 | /* Remove the jump and edge if we can. */ | |
4452 | if (other_bb == new_dest) | |
4453 | { | |
4454 | delete_insn (jump); | |
4455 | remove_edge (BRANCH_EDGE (test_bb)); | |
4456 | /* ??? Can't merge blocks here, as then_bb is still in use. | |
4457 | At minimum, the merge will get done just before bb-reorder. */ | |
4458 | } | |
4459 | ||
0bb604ca | 4460 | return TRUE; |
4461 | ||
4462 | cancel: | |
4463 | cancel_changes (0); | |
bc6adae4 | 4464 | |
09669349 | 4465 | if (merge_set) |
bc6adae4 | 4466 | BITMAP_FREE (merge_set); |
4467 | ||
0bb604ca | 4468 | return FALSE; |
4469 | } | |
4470 | \f | |
abd03efe | 4471 | /* Main entry point for all if-conversion. AFTER_COMBINE is true if |
4472 | we are after combine pass. */ | |
0bb604ca | 4473 | |
cd5220af | 4474 | static void |
abd03efe | 4475 | if_convert (bool after_combine) |
0bb604ca | 4476 | { |
4c26117a | 4477 | basic_block bb; |
1d855d4c | 4478 | int pass; |
0bb604ca | 4479 | |
deb2741b | 4480 | if (optimize == 1) |
4481 | { | |
4482 | df_live_add_problem (); | |
4483 | df_live_set_all_dirty (); | |
4484 | } | |
4485 | ||
abd03efe | 4486 | /* Record whether we are after combine pass. */ |
4487 | ifcvt_after_combine = after_combine; | |
0bb604ca | 4488 | num_possible_if_blocks = 0; |
4489 | num_updated_if_blocks = 0; | |
bdce7739 | 4490 | num_true_changes = 0; |
0bb604ca | 4491 | |
4a6f9e19 | 4492 | loop_optimizer_init (AVOID_CFG_MODIFICATIONS); |
7a3bf727 | 4493 | mark_loop_exit_edges (); |
4494 | loop_optimizer_finalize (); | |
4a6f9e19 | 4495 | free_dominance_info (CDI_DOMINATORS); |
7f42fe24 | 4496 | |
e92e4c4f | 4497 | /* Compute postdominators. */ |
4498 | calculate_dominance_info (CDI_POST_DOMINATORS); | |
0051c76a | 4499 | |
3072d30e | 4500 | df_set_flags (DF_LR_RUN_DCE); |
0bb604ca | 4501 | |
1d855d4c | 4502 | /* Go through each of the basic blocks looking for things to convert. If we |
4503 | have conditional execution, we make multiple passes to allow us to handle | |
4504 | IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */ | |
4505 | pass = 0; | |
4506 | do | |
4507 | { | |
3072d30e | 4508 | df_analyze (); |
4509 | /* Only need to do dce on the first pass. */ | |
4510 | df_clear_flags (DF_LR_RUN_DCE); | |
1d855d4c | 4511 | cond_exec_changed_p = FALSE; |
4512 | pass++; | |
4513 | ||
4514 | #ifdef IFCVT_MULTIPLE_DUMPS | |
450d042a | 4515 | if (dump_file && pass > 1) |
4516 | fprintf (dump_file, "\n\n========== Pass %d ==========\n", pass); | |
1d855d4c | 4517 | #endif |
4518 | ||
fc00614f | 4519 | FOR_EACH_BB_FN (bb, cfun) |
1d855d4c | 4520 | { |
3072d30e | 4521 | basic_block new_bb; |
48e1416a | 4522 | while (!df_get_bb_dirty (bb) |
3072d30e | 4523 | && (new_bb = find_if_header (bb, pass)) != NULL) |
4524 | bb = new_bb; | |
1d855d4c | 4525 | } |
4526 | ||
4527 | #ifdef IFCVT_MULTIPLE_DUMPS | |
450d042a | 4528 | if (dump_file && cond_exec_changed_p) |
5147ec07 | 4529 | print_rtl_with_bb (dump_file, get_insns (), dump_flags); |
1d855d4c | 4530 | #endif |
4531 | } | |
4532 | while (cond_exec_changed_p); | |
4533 | ||
4534 | #ifdef IFCVT_MULTIPLE_DUMPS | |
450d042a | 4535 | if (dump_file) |
4536 | fprintf (dump_file, "\n\n========== no more changes\n"); | |
1d855d4c | 4537 | #endif |
0bb604ca | 4538 | |
0051c76a | 4539 | free_dominance_info (CDI_POST_DOMINATORS); |
0bb604ca | 4540 | |
450d042a | 4541 | if (dump_file) |
4542 | fflush (dump_file); | |
0bb604ca | 4543 | |
099a9fb1 | 4544 | clear_aux_for_blocks (); |
4545 | ||
3072d30e | 4546 | /* If we allocated new pseudos, we must resize the array for sched1. */ |
4547 | if (max_regno < max_reg_num ()) | |
4548 | max_regno = max_reg_num (); | |
0bb604ca | 4549 | |
4550 | /* Write the final stats. */ | |
450d042a | 4551 | if (dump_file && num_possible_if_blocks > 0) |
0bb604ca | 4552 | { |
450d042a | 4553 | fprintf (dump_file, |
0bb604ca | 4554 | "\n%d possible IF blocks searched.\n", |
4555 | num_possible_if_blocks); | |
450d042a | 4556 | fprintf (dump_file, |
0bb604ca | 4557 | "%d IF blocks converted.\n", |
4558 | num_updated_if_blocks); | |
450d042a | 4559 | fprintf (dump_file, |
bdce7739 | 4560 | "%d true changes made.\n\n\n", |
4561 | num_true_changes); | |
0bb604ca | 4562 | } |
4563 | ||
deb2741b | 4564 | if (optimize == 1) |
4565 | df_remove_problem (df_live); | |
4566 | ||
922b8fd9 | 4567 | #ifdef ENABLE_CHECKING |
21724bde | 4568 | verify_flow_info (); |
922b8fd9 | 4569 | #endif |
0bb604ca | 4570 | } |
77fce4cd | 4571 | \f |
77fce4cd | 4572 | /* If-conversion and CFG cleanup. */ |
2a1990e9 | 4573 | static unsigned int |
77fce4cd | 4574 | rest_of_handle_if_conversion (void) |
4575 | { | |
4576 | if (flag_if_conversion) | |
4577 | { | |
4578 | if (dump_file) | |
4a020a8c | 4579 | { |
4580 | dump_reg_info (dump_file); | |
4581 | dump_flow_info (dump_file, dump_flags); | |
4582 | } | |
77fce4cd | 4583 | cleanup_cfg (CLEANUP_EXPENSIVE); |
abd03efe | 4584 | if_convert (false); |
77fce4cd | 4585 | } |
4586 | ||
3072d30e | 4587 | cleanup_cfg (0); |
2a1990e9 | 4588 | return 0; |
77fce4cd | 4589 | } |
4590 | ||
cbe8bda8 | 4591 | namespace { |
4592 | ||
4593 | const pass_data pass_data_rtl_ifcvt = | |
77fce4cd | 4594 | { |
cbe8bda8 | 4595 | RTL_PASS, /* type */ |
4596 | "ce1", /* name */ | |
4597 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 4598 | TV_IFCVT, /* tv_id */ |
4599 | 0, /* properties_required */ | |
4600 | 0, /* properties_provided */ | |
4601 | 0, /* properties_destroyed */ | |
4602 | 0, /* todo_flags_start */ | |
8b88439e | 4603 | TODO_df_finish, /* todo_flags_finish */ |
77fce4cd | 4604 | }; |
4605 | ||
cbe8bda8 | 4606 | class pass_rtl_ifcvt : public rtl_opt_pass |
4607 | { | |
4608 | public: | |
9af5ce0c | 4609 | pass_rtl_ifcvt (gcc::context *ctxt) |
4610 | : rtl_opt_pass (pass_data_rtl_ifcvt, ctxt) | |
cbe8bda8 | 4611 | {} |
4612 | ||
4613 | /* opt_pass methods: */ | |
31315c24 | 4614 | virtual bool gate (function *) |
4615 | { | |
4616 | return (optimize > 0) && dbg_cnt (if_conversion); | |
4617 | } | |
4618 | ||
65b0537f | 4619 | virtual unsigned int execute (function *) |
4620 | { | |
4621 | return rest_of_handle_if_conversion (); | |
4622 | } | |
cbe8bda8 | 4623 | |
4624 | }; // class pass_rtl_ifcvt | |
4625 | ||
4626 | } // anon namespace | |
4627 | ||
4628 | rtl_opt_pass * | |
4629 | make_pass_rtl_ifcvt (gcc::context *ctxt) | |
4630 | { | |
4631 | return new pass_rtl_ifcvt (ctxt); | |
4632 | } | |
4633 | ||
77fce4cd | 4634 | |
4635 | /* Rerun if-conversion, as combine may have simplified things enough | |
4636 | to now meet sequence length restrictions. */ | |
77fce4cd | 4637 | |
cbe8bda8 | 4638 | namespace { |
4639 | ||
4640 | const pass_data pass_data_if_after_combine = | |
77fce4cd | 4641 | { |
cbe8bda8 | 4642 | RTL_PASS, /* type */ |
4643 | "ce2", /* name */ | |
4644 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 4645 | TV_IFCVT, /* tv_id */ |
4646 | 0, /* properties_required */ | |
4647 | 0, /* properties_provided */ | |
4648 | 0, /* properties_destroyed */ | |
4649 | 0, /* todo_flags_start */ | |
8b88439e | 4650 | TODO_df_finish, /* todo_flags_finish */ |
77fce4cd | 4651 | }; |
4652 | ||
cbe8bda8 | 4653 | class pass_if_after_combine : public rtl_opt_pass |
4654 | { | |
4655 | public: | |
9af5ce0c | 4656 | pass_if_after_combine (gcc::context *ctxt) |
4657 | : rtl_opt_pass (pass_data_if_after_combine, ctxt) | |
cbe8bda8 | 4658 | {} |
4659 | ||
4660 | /* opt_pass methods: */ | |
31315c24 | 4661 | virtual bool gate (function *) |
4662 | { | |
4663 | return optimize > 0 && flag_if_conversion | |
4664 | && dbg_cnt (if_after_combine); | |
4665 | } | |
4666 | ||
65b0537f | 4667 | virtual unsigned int execute (function *) |
4668 | { | |
4669 | if_convert (true); | |
4670 | return 0; | |
4671 | } | |
cbe8bda8 | 4672 | |
4673 | }; // class pass_if_after_combine | |
4674 | ||
4675 | } // anon namespace | |
4676 | ||
4677 | rtl_opt_pass * | |
4678 | make_pass_if_after_combine (gcc::context *ctxt) | |
4679 | { | |
4680 | return new pass_if_after_combine (ctxt); | |
4681 | } | |
4682 | ||
77fce4cd | 4683 | |
cbe8bda8 | 4684 | namespace { |
4685 | ||
4686 | const pass_data pass_data_if_after_reload = | |
77fce4cd | 4687 | { |
cbe8bda8 | 4688 | RTL_PASS, /* type */ |
4689 | "ce3", /* name */ | |
4690 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 4691 | TV_IFCVT2, /* tv_id */ |
4692 | 0, /* properties_required */ | |
4693 | 0, /* properties_provided */ | |
4694 | 0, /* properties_destroyed */ | |
4695 | 0, /* todo_flags_start */ | |
8b88439e | 4696 | TODO_df_finish, /* todo_flags_finish */ |
77fce4cd | 4697 | }; |
cbe8bda8 | 4698 | |
4699 | class pass_if_after_reload : public rtl_opt_pass | |
4700 | { | |
4701 | public: | |
9af5ce0c | 4702 | pass_if_after_reload (gcc::context *ctxt) |
4703 | : rtl_opt_pass (pass_data_if_after_reload, ctxt) | |
cbe8bda8 | 4704 | {} |
4705 | ||
4706 | /* opt_pass methods: */ | |
31315c24 | 4707 | virtual bool gate (function *) |
4708 | { | |
4709 | return optimize > 0 && flag_if_conversion2 | |
4710 | && dbg_cnt (if_after_reload); | |
4711 | } | |
4712 | ||
65b0537f | 4713 | virtual unsigned int execute (function *) |
4714 | { | |
4715 | if_convert (true); | |
4716 | return 0; | |
4717 | } | |
cbe8bda8 | 4718 | |
4719 | }; // class pass_if_after_reload | |
4720 | ||
4721 | } // anon namespace | |
4722 | ||
4723 | rtl_opt_pass * | |
4724 | make_pass_if_after_reload (gcc::context *ctxt) | |
4725 | { | |
4726 | return new pass_if_after_reload (ctxt); | |
4727 | } |