]>
Commit | Line | Data |
---|---|---|
48227150 | 1 | /* Register to Stack convert for GNU compiler. |
af841dbd | 2 | Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
90a74703 | 3 | 1999, 2000, 2001 Free Software Foundation, Inc. |
48227150 | 4 | |
a05924f9 | 5 | This file is part of GNU CC. |
48227150 | 6 | |
a05924f9 JH |
7 | GNU CC is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
48227150 | 11 | |
a05924f9 JH |
12 | GNU CC is distributed in the hope that it will be useful, |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
48227150 | 16 | |
a05924f9 JH |
17 | You should have received a copy of the GNU General Public License |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
48227150 JVA |
21 | |
22 | /* This pass converts stack-like registers from the "flat register | |
23 | file" model that gcc uses, to a stack convention that the 387 uses. | |
24 | ||
25 | * The form of the input: | |
26 | ||
27 | On input, the function consists of insn that have had their | |
28 | registers fully allocated to a set of "virtual" registers. Note that | |
29 | the word "virtual" is used differently here than elsewhere in gcc: for | |
30 | each virtual stack reg, there is a hard reg, but the mapping between | |
31 | them is not known until this pass is run. On output, hard register | |
32 | numbers have been substituted, and various pop and exchange insns have | |
33 | been emitted. The hard register numbers and the virtual register | |
34 | numbers completely overlap - before this pass, all stack register | |
114cbee6 | 35 | numbers are virtual, and afterward they are all hard. |
48227150 JVA |
36 | |
37 | The virtual registers can be manipulated normally by gcc, and their | |
38 | semantics are the same as for normal registers. After the hard | |
39 | register numbers are substituted, the semantics of an insn containing | |
40 | stack-like regs are not the same as for an insn with normal regs: for | |
41 | instance, it is not safe to delete an insn that appears to be a no-op | |
42 | move. In general, no insn containing hard regs should be changed | |
43 | after this pass is done. | |
44 | ||
45 | * The form of the output: | |
46 | ||
47 | After this pass, hard register numbers represent the distance from | |
48 | the current top of stack to the desired register. A reference to | |
49 | FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, | |
50 | represents the register just below that, and so forth. Also, REG_DEAD | |
51 | notes indicate whether or not a stack register should be popped. | |
52 | ||
53 | A "swap" insn looks like a parallel of two patterns, where each | |
54 | pattern is a SET: one sets A to B, the other B to A. | |
55 | ||
56 | A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG | |
57 | and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, | |
58 | will replace the existing stack top, not push a new value. | |
59 | ||
60 | A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose | |
61 | SET_SRC is REG or MEM. | |
62 | ||
3f5cfed6 | 63 | The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG |
48227150 JVA |
64 | appears ambiguous. As a special case, the presence of a REG_DEAD note |
65 | for FIRST_STACK_REG differentiates between a load insn and a pop. | |
66 | ||
67 | If a REG_DEAD is present, the insn represents a "pop" that discards | |
68 | the top of the register stack. If there is no REG_DEAD note, then the | |
69 | insn represents a "dup" or a push of the current top of stack onto the | |
70 | stack. | |
71 | ||
72 | * Methodology: | |
73 | ||
74 | Existing REG_DEAD and REG_UNUSED notes for stack registers are | |
75 | deleted and recreated from scratch. REG_DEAD is never created for a | |
76 | SET_DEST, only REG_UNUSED. | |
77 | ||
114cbee6 | 78 | * asm_operands: |
48227150 | 79 | |
114cbee6 RS |
80 | There are several rules on the usage of stack-like regs in |
81 | asm_operands insns. These rules apply only to the operands that are | |
82 | stack-like regs: | |
83 | ||
84 | 1. Given a set of input regs that die in an asm_operands, it is | |
85 | necessary to know which are implicitly popped by the asm, and | |
86 | which must be explicitly popped by gcc. | |
87 | ||
88 | An input reg that is implicitly popped by the asm must be | |
89 | explicitly clobbered, unless it is constrained to match an | |
90 | output operand. | |
91 | ||
92 | 2. For any input reg that is implicitly popped by an asm, it is | |
93 | necessary to know how to adjust the stack to compensate for the pop. | |
94 | If any non-popped input is closer to the top of the reg-stack than | |
95 | the implicitly popped reg, it would not be possible to know what the | |
96 | stack looked like - it's not clear how the rest of the stack "slides | |
97 | up". | |
98 | ||
99 | All implicitly popped input regs must be closer to the top of | |
100 | the reg-stack than any input that is not implicitly popped. | |
101 | ||
102 | 3. It is possible that if an input dies in an insn, reload might | |
103 | use the input reg for an output reload. Consider this example: | |
104 | ||
105 | asm ("foo" : "=t" (a) : "f" (b)); | |
106 | ||
107 | This asm says that input B is not popped by the asm, and that | |
108 | the asm pushes a result onto the reg-stack, ie, the stack is one | |
109 | deeper after the asm than it was before. But, it is possible that | |
110 | reload will think that it can use the same reg for both the input and | |
111 | the output, if input B dies in this insn. | |
112 | ||
113 | If any input operand uses the "f" constraint, all output reg | |
114 | constraints must use the "&" earlyclobber. | |
115 | ||
116 | The asm above would be written as | |
117 | ||
118 | asm ("foo" : "=&t" (a) : "f" (b)); | |
119 | ||
120 | 4. Some operands need to be in particular places on the stack. All | |
121 | output operands fall in this category - there is no other way to | |
122 | know which regs the outputs appear in unless the user indicates | |
123 | this in the constraints. | |
124 | ||
125 | Output operands must specifically indicate which reg an output | |
126 | appears in after an asm. "=f" is not allowed: the operand | |
127 | constraints must select a class with a single reg. | |
128 | ||
129 | 5. Output operands may not be "inserted" between existing stack regs. | |
130 | Since no 387 opcode uses a read/write operand, all output operands | |
131 | are dead before the asm_operands, and are pushed by the asm_operands. | |
132 | It makes no sense to push anywhere but the top of the reg-stack. | |
133 | ||
134 | Output operands must start at the top of the reg-stack: output | |
135 | operands may not "skip" a reg. | |
136 | ||
137 | 6. Some asm statements may need extra stack space for internal | |
138 | calculations. This can be guaranteed by clobbering stack registers | |
139 | unrelated to the inputs and outputs. | |
140 | ||
141 | Here are a couple of reasonable asms to want to write. This asm | |
142 | takes one input, which is internally popped, and produces two outputs. | |
143 | ||
144 | asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); | |
145 | ||
146 | This asm takes two inputs, which are popped by the fyl2xp1 opcode, | |
147 | and replaces them with one output. The user must code the "st(1)" | |
148 | clobber for reg-stack.c to know that fyl2xp1 pops both inputs. | |
149 | ||
150 | asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); | |
151 | ||
a05924f9 | 152 | */ |
48227150 | 153 | \f |
48227150 | 154 | #include "config.h" |
670ee920 | 155 | #include "system.h" |
48227150 JVA |
156 | #include "tree.h" |
157 | #include "rtl.h" | |
6baf1cc8 | 158 | #include "tm_p.h" |
49ad7cfa | 159 | #include "function.h" |
114cbee6 | 160 | #include "insn-config.h" |
48227150 JVA |
161 | #include "regs.h" |
162 | #include "hard-reg-set.h" | |
163 | #include "flags.h" | |
10f0ad3d | 164 | #include "toplev.h" |
e075ae69 | 165 | #include "recog.h" |
a05924f9 JH |
166 | #include "output.h" |
167 | #include "basic-block.h" | |
21b2cd73 | 168 | #include "varray.h" |
2840aebf | 169 | #include "reload.h" |
48227150 JVA |
170 | |
171 | #ifdef STACK_REGS | |
172 | ||
173 | #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) | |
174 | ||
48227150 JVA |
175 | /* This is the basic stack record. TOP is an index into REG[] such |
176 | that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. | |
177 | ||
eca31501 JVA |
178 | If TOP is -2, REG[] is not yet initialized. Stack initialization |
179 | consists of placing each live reg in array `reg' and setting `top' | |
180 | appropriately. | |
181 | ||
182 | REG_SET indicates which registers are live. */ | |
48227150 JVA |
183 | |
184 | typedef struct stack_def | |
185 | { | |
186 | int top; /* index to top stack element */ | |
187 | HARD_REG_SET reg_set; /* set of live registers */ | |
b00b2cc2 | 188 | unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ |
48227150 JVA |
189 | } *stack; |
190 | ||
a05924f9 JH |
191 | /* This is used to carry information about basic blocks. It is |
192 | attached to the AUX field of the standard CFG block. */ | |
48227150 | 193 | |
a05924f9 JH |
194 | typedef struct block_info_def |
195 | { | |
196 | struct stack_def stack_in; /* Input stack configuration. */ | |
0ecf09f9 | 197 | struct stack_def stack_out; /* Output stack configuration. */ |
a05924f9 JH |
198 | HARD_REG_SET out_reg_set; /* Stack regs live on output. */ |
199 | int done; /* True if block already converted. */ | |
0ecf09f9 JH |
200 | int predecesors; /* Number of predecesors that needs |
201 | to be visited. */ | |
a05924f9 | 202 | } *block_info; |
48227150 | 203 | |
a05924f9 | 204 | #define BLOCK_INFO(B) ((block_info) (B)->aux) |
48227150 | 205 | |
a05924f9 JH |
206 | /* Passed to change_stack to indicate where to emit insns. */ |
207 | enum emit_where | |
208 | { | |
209 | EMIT_AFTER, | |
210 | EMIT_BEFORE | |
211 | }; | |
48227150 | 212 | |
21b2cd73 JH |
213 | /* We use this array to cache info about insns, because otherwise we |
214 | spend too much time in stack_regs_mentioned_p. | |
215 | ||
216 | Indexed by insn UIDs. A value of zero is uninitialized, one indicates | |
217 | the insn uses stack registers, two indicates the insn does not use | |
218 | stack registers. */ | |
219 | static varray_type stack_regs_mentioned_data; | |
220 | ||
a05924f9 JH |
221 | /* The block we're currently working on. */ |
222 | static basic_block current_block; | |
223 | ||
48227150 | 224 | /* This is the register file for all register after conversion */ |
99a59310 RK |
225 | static rtx |
226 | FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; | |
227 | ||
228 | #define FP_MODE_REG(regno,mode) \ | |
229 | (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)]) | |
48227150 | 230 | |
a05924f9 JH |
231 | /* Used to initialize uninitialized registers. */ |
232 | static rtx nan; | |
48227150 | 233 | |
48227150 JVA |
234 | /* Forward declarations */ |
235 | ||
957e4763 KG |
236 | static int stack_regs_mentioned_p PARAMS ((rtx pat)); |
237 | static void straighten_stack PARAMS ((rtx, stack)); | |
238 | static void pop_stack PARAMS ((stack, int)); | |
239 | static rtx *get_true_reg PARAMS ((rtx *)); | |
240 | ||
241 | static int check_asm_stack_operands PARAMS ((rtx)); | |
242 | static int get_asm_operand_n_inputs PARAMS ((rtx)); | |
243 | static rtx stack_result PARAMS ((tree)); | |
244 | static void replace_reg PARAMS ((rtx *, int)); | |
b00b2cc2 JH |
245 | static void remove_regno_note PARAMS ((rtx, enum reg_note, |
246 | unsigned int)); | |
957e4763 KG |
247 | static int get_hard_regnum PARAMS ((stack, rtx)); |
248 | static void delete_insn_for_stacker PARAMS ((rtx)); | |
249 | static rtx emit_pop_insn PARAMS ((rtx, stack, rtx, | |
a05924f9 | 250 | enum emit_where)); |
957e4763 KG |
251 | static void emit_swap_insn PARAMS ((rtx, stack, rtx)); |
252 | static void move_for_stack_reg PARAMS ((rtx, stack, rtx)); | |
253 | static int swap_rtx_condition_1 PARAMS ((rtx)); | |
254 | static int swap_rtx_condition PARAMS ((rtx)); | |
255 | static void compare_for_stack_reg PARAMS ((rtx, stack, rtx)); | |
256 | static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx)); | |
257 | static void subst_asm_stack_regs PARAMS ((rtx, stack)); | |
258 | static void subst_stack_regs PARAMS ((rtx, stack)); | |
259 | static void change_stack PARAMS ((rtx, stack, stack, | |
a05924f9 | 260 | enum emit_where)); |
957e4763 KG |
261 | static int convert_regs_entry PARAMS ((void)); |
262 | static void convert_regs_exit PARAMS ((void)); | |
263 | static int convert_regs_1 PARAMS ((FILE *, basic_block)); | |
264 | static int convert_regs_2 PARAMS ((FILE *, basic_block)); | |
265 | static int convert_regs PARAMS ((FILE *)); | |
266 | static void print_stack PARAMS ((FILE *, stack)); | |
c6991660 KG |
267 | static rtx next_flags_user PARAMS ((rtx)); |
268 | static void record_label_references PARAMS ((rtx, rtx)); | |
0ecf09f9 | 269 | static bool compensate_edge PARAMS ((edge, FILE *)); |
21b2cd73 | 270 | \f |
e075ae69 | 271 | /* Return non-zero if any stack register is mentioned somewhere within PAT. */ |
21b2cd73 JH |
272 | |
273 | static int | |
e075ae69 RH |
274 | stack_regs_mentioned_p (pat) |
275 | rtx pat; | |
21b2cd73 | 276 | { |
e075ae69 RH |
277 | register const char *fmt; |
278 | register int i; | |
279 | ||
280 | if (STACK_REG_P (pat)) | |
281 | return 1; | |
282 | ||
283 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
284 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
21b2cd73 | 285 | { |
e075ae69 RH |
286 | if (fmt[i] == 'E') |
287 | { | |
288 | register int j; | |
289 | ||
290 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) | |
291 | if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) | |
292 | return 1; | |
293 | } | |
294 | else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) | |
295 | return 1; | |
21b2cd73 | 296 | } |
e075ae69 | 297 | |
21b2cd73 JH |
298 | return 0; |
299 | } | |
300 | ||
e075ae69 | 301 | /* Return nonzero if INSN mentions stacked registers, else return zero. */ |
21b2cd73 JH |
302 | |
303 | int | |
304 | stack_regs_mentioned (insn) | |
305 | rtx insn; | |
306 | { | |
e075ae69 RH |
307 | unsigned int uid, max; |
308 | int test; | |
309 | ||
4793dca1 | 310 | if (! INSN_P (insn) || !stack_regs_mentioned_data) |
21b2cd73 | 311 | return 0; |
e075ae69 | 312 | |
21b2cd73 | 313 | uid = INSN_UID (insn); |
e075ae69 RH |
314 | max = VARRAY_SIZE (stack_regs_mentioned_data); |
315 | if (uid >= max) | |
316 | { | |
317 | /* Allocate some extra size to avoid too many reallocs, but | |
318 | do not grow too quickly. */ | |
319 | max = uid + uid / 20; | |
320 | VARRAY_GROW (stack_regs_mentioned_data, max); | |
321 | } | |
322 | ||
323 | test = VARRAY_CHAR (stack_regs_mentioned_data, uid); | |
324 | if (test == 0) | |
325 | { | |
326 | /* This insn has yet to be examined. Do so now. */ | |
327 | test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; | |
328 | VARRAY_CHAR (stack_regs_mentioned_data, uid) = test; | |
329 | } | |
330 | ||
331 | return test == 1; | |
21b2cd73 | 332 | } |
e075ae69 RH |
333 | \f |
334 | static rtx ix86_flags_rtx; | |
21b2cd73 | 335 | |
e075ae69 RH |
336 | static rtx |
337 | next_flags_user (insn) | |
338 | rtx insn; | |
339 | { | |
340 | /* Search forward looking for the first use of this value. | |
341 | Stop at block boundaries. */ | |
e075ae69 | 342 | |
0eac0e81 | 343 | while (insn != current_block->end) |
e075ae69 RH |
344 | { |
345 | insn = NEXT_INSN (insn); | |
e075ae69 | 346 | |
2c3c49de | 347 | if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) |
e075ae69 RH |
348 | return insn; |
349 | ||
0eac0e81 | 350 | if (GET_CODE (insn) == CALL_INSN) |
e075ae69 RH |
351 | return NULL_RTX; |
352 | } | |
0eac0e81 | 353 | return NULL_RTX; |
e075ae69 | 354 | } |
48227150 | 355 | \f |
99a59310 RK |
356 | /* Reorganise the stack into ascending numbers, |
357 | after this insn. */ | |
358 | ||
359 | static void | |
360 | straighten_stack (insn, regstack) | |
361 | rtx insn; | |
362 | stack regstack; | |
363 | { | |
364 | struct stack_def temp_stack; | |
365 | int top; | |
366 | ||
8feb7351 JL |
367 | /* If there is only a single register on the stack, then the stack is |
368 | already in increasing order and no reorganization is needed. | |
369 | ||
370 | Similarly if the stack is empty. */ | |
371 | if (regstack->top <= 0) | |
372 | return; | |
373 | ||
d25cf633 | 374 | COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); |
99a59310 RK |
375 | |
376 | for (top = temp_stack.top = regstack->top; top >= 0; top--) | |
e075ae69 | 377 | temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; |
99a59310 | 378 | |
a05924f9 | 379 | change_stack (insn, regstack, &temp_stack, EMIT_AFTER); |
99a59310 | 380 | } |
7aa74e4c SC |
381 | |
382 | /* Pop a register from the stack */ | |
383 | ||
384 | static void | |
385 | pop_stack (regstack, regno) | |
386 | stack regstack; | |
387 | int regno; | |
388 | { | |
389 | int top = regstack->top; | |
390 | ||
391 | CLEAR_HARD_REG_BIT (regstack->reg_set, regno); | |
392 | regstack->top--; | |
393 | /* If regno was not at the top of stack then adjust stack */ | |
394 | if (regstack->reg [top] != regno) | |
395 | { | |
396 | int i; | |
397 | for (i = regstack->top; i >= 0; i--) | |
398 | if (regstack->reg [i] == regno) | |
399 | { | |
400 | int j; | |
401 | for (j = i; j < top; j++) | |
402 | regstack->reg [j] = regstack->reg [j + 1]; | |
403 | break; | |
404 | } | |
405 | } | |
406 | } | |
99a59310 | 407 | \f |
48227150 JVA |
408 | /* Convert register usage from "flat" register file usage to a "stack |
409 | register file. FIRST is the first insn in the function, FILE is the | |
410 | dump file, if used. | |
411 | ||
e218fc41 | 412 | Construct a CFG and run life analysis. Then convert each insn one |
0045d504 | 413 | by one. Run a last cleanup_cfg pass, if optimizing, to eliminate |
a05924f9 JH |
414 | code duplication created when the converter inserts pop insns on |
415 | the edges. */ | |
48227150 JVA |
416 | |
417 | void | |
418 | reg_to_stack (first, file) | |
419 | rtx first; | |
420 | FILE *file; | |
421 | { | |
a05924f9 JH |
422 | int i; |
423 | int max_uid; | |
a05924f9 JH |
424 | block_info bi; |
425 | ||
4793dca1 JH |
426 | /* Clean up previous run. */ |
427 | if (stack_regs_mentioned_data) | |
428 | { | |
429 | VARRAY_FREE (stack_regs_mentioned_data); | |
430 | stack_regs_mentioned_data = 0; | |
431 | } | |
432 | ||
1e5fd094 JH |
433 | if (!optimize) |
434 | split_all_insns (0); | |
435 | ||
a05924f9 JH |
436 | /* See if there is something to do. Flow analysis is quite |
437 | expensive so we might save some compilation time. */ | |
438 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
439 | if (regs_ever_live[i]) | |
440 | break; | |
441 | if (i > LAST_STACK_REG) | |
442 | return; | |
99a59310 | 443 | |
e218fc41 RH |
444 | /* Ok, floating point instructions exist. If not optimizing, |
445 | build the CFG and run life analysis. */ | |
1e5fd094 JH |
446 | if (!optimize) |
447 | find_basic_blocks (first, max_reg_num (), file); | |
dcc6c741 | 448 | count_or_remove_death_notes (NULL, 1); |
7f8a79ba | 449 | life_analysis (first, file, PROP_DEATH_NOTES); |
0ecf09f9 | 450 | mark_dfs_back_edges (); |
48227150 | 451 | |
a05924f9 | 452 | /* Set up block info for each basic block. */ |
ff154f78 | 453 | bi = (block_info) xcalloc ((n_basic_blocks + 1), sizeof (*bi)); |
a05924f9 | 454 | for (i = n_basic_blocks - 1; i >= 0; --i) |
0ecf09f9 JH |
455 | { |
456 | edge e; | |
457 | basic_block bb = BASIC_BLOCK (i); | |
458 | bb->aux = bi + i; | |
459 | for (e = bb->pred; e; e=e->pred_next) | |
460 | if (!(e->flags & EDGE_DFS_BACK) | |
461 | && e->src != ENTRY_BLOCK_PTR) | |
462 | BLOCK_INFO (bb)->predecesors++; | |
463 | } | |
a05924f9 | 464 | EXIT_BLOCK_PTR->aux = bi + n_basic_blocks; |
48227150 | 465 | |
a05924f9 JH |
466 | /* Create the replacement registers up front. */ |
467 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
21b2cd73 | 468 | { |
a05924f9 JH |
469 | enum machine_mode mode; |
470 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); | |
471 | mode != VOIDmode; | |
472 | mode = GET_MODE_WIDER_MODE (mode)) | |
473 | FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); | |
474 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); | |
475 | mode != VOIDmode; | |
476 | mode = GET_MODE_WIDER_MODE (mode)) | |
477 | FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); | |
21b2cd73 | 478 | } |
48227150 | 479 | |
a05924f9 | 480 | ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); |
48227150 | 481 | |
a05924f9 | 482 | /* A QNaN for initializing uninitialized variables. |
48227150 | 483 | |
a05924f9 JH |
484 | ??? We can't load from constant memory in PIC mode, because |
485 | we're insertting these instructions before the prologue and | |
486 | the PIC register hasn't been set up. In that case, fall back | |
487 | on zero, which we can get from `ldz'. */ | |
48227150 | 488 | |
a05924f9 JH |
489 | if (flag_pic) |
490 | nan = CONST0_RTX (SFmode); | |
491 | else | |
492 | { | |
493 | nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000)); | |
494 | nan = force_const_mem (SFmode, nan); | |
495 | } | |
48227150 | 496 | |
a05924f9 JH |
497 | /* Allocate a cache for stack_regs_mentioned. */ |
498 | max_uid = get_max_uid (); | |
499 | VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1, | |
500 | "stack_regs_mentioned cache"); | |
48227150 | 501 | |
4793dca1 | 502 | convert_regs (file); |
21b2cd73 | 503 | |
ff154f78 | 504 | free (bi); |
48227150 JVA |
505 | } |
506 | \f | |
507 | /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the | |
508 | label's chain of references, and note which insn contains each | |
0f41302f | 509 | reference. */ |
48227150 JVA |
510 | |
511 | static void | |
512 | record_label_references (insn, pat) | |
513 | rtx insn, pat; | |
514 | { | |
515 | register enum rtx_code code = GET_CODE (pat); | |
516 | register int i; | |
6f7d635c | 517 | register const char *fmt; |
48227150 JVA |
518 | |
519 | if (code == LABEL_REF) | |
520 | { | |
521 | register rtx label = XEXP (pat, 0); | |
522 | register rtx ref; | |
523 | ||
524 | if (GET_CODE (label) != CODE_LABEL) | |
525 | abort (); | |
526 | ||
0f41302f MS |
527 | /* If this is an undefined label, LABEL_REFS (label) contains |
528 | garbage. */ | |
13684373 RK |
529 | if (INSN_UID (label) == 0) |
530 | return; | |
531 | ||
0f41302f | 532 | /* Don't make a duplicate in the code_label's chain. */ |
48227150 | 533 | |
9f5cad05 JVA |
534 | for (ref = LABEL_REFS (label); |
535 | ref && ref != label; | |
536 | ref = LABEL_NEXTREF (ref)) | |
48227150 JVA |
537 | if (CONTAINING_INSN (ref) == insn) |
538 | return; | |
539 | ||
540 | CONTAINING_INSN (pat) = insn; | |
541 | LABEL_NEXTREF (pat) = LABEL_REFS (label); | |
542 | LABEL_REFS (label) = pat; | |
543 | ||
544 | return; | |
545 | } | |
546 | ||
547 | fmt = GET_RTX_FORMAT (code); | |
548 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
549 | { | |
550 | if (fmt[i] == 'e') | |
551 | record_label_references (insn, XEXP (pat, i)); | |
552 | if (fmt[i] == 'E') | |
553 | { | |
554 | register int j; | |
555 | for (j = 0; j < XVECLEN (pat, i); j++) | |
556 | record_label_references (insn, XVECEXP (pat, i, j)); | |
557 | } | |
558 | } | |
559 | } | |
560 | \f | |
561 | /* Return a pointer to the REG expression within PAT. If PAT is not a | |
562 | REG, possible enclosed by a conversion rtx, return the inner part of | |
0f41302f | 563 | PAT that stopped the search. */ |
48227150 JVA |
564 | |
565 | static rtx * | |
566 | get_true_reg (pat) | |
567 | rtx *pat; | |
568 | { | |
99a59310 | 569 | for (;;) |
e075ae69 | 570 | switch (GET_CODE (*pat)) |
99a59310 | 571 | { |
e075ae69 RH |
572 | case SUBREG: |
573 | /* Eliminate FP subregister accesses in favour of the | |
574 | actual FP register in use. */ | |
575 | { | |
576 | rtx subreg; | |
577 | if (FP_REG_P (subreg = SUBREG_REG (*pat))) | |
99a59310 | 578 | { |
ddef6bc7 JJ |
579 | int regno_off = subreg_regno_offset (REGNO (subreg), |
580 | GET_MODE (subreg), | |
581 | SUBREG_BYTE (*pat), | |
582 | GET_MODE (*pat)); | |
583 | *pat = FP_MODE_REG (REGNO (subreg) + regno_off, | |
99a59310 | 584 | GET_MODE (subreg)); |
e075ae69 | 585 | default: |
99a59310 RK |
586 | return pat; |
587 | } | |
e075ae69 RH |
588 | } |
589 | case FLOAT: | |
590 | case FIX: | |
591 | case FLOAT_EXTEND: | |
592 | pat = & XEXP (*pat, 0); | |
99a59310 | 593 | } |
48227150 | 594 | } |
48227150 | 595 | \f |
a05924f9 | 596 | /* There are many rules that an asm statement for stack-like regs must |
114cbee6 | 597 | follow. Those rules are explained at the top of this file: the rule |
0f41302f | 598 | numbers below refer to that explanation. */ |
114cbee6 | 599 | |
a05924f9 JH |
600 | static int |
601 | check_asm_stack_operands (insn) | |
114cbee6 | 602 | rtx insn; |
114cbee6 RS |
603 | { |
604 | int i; | |
114cbee6 RS |
605 | int n_clobbers; |
606 | int malformed_asm = 0; | |
607 | rtx body = PATTERN (insn); | |
608 | ||
a05924f9 JH |
609 | char reg_used_as_output[FIRST_PSEUDO_REGISTER]; |
610 | char implicitly_dies[FIRST_PSEUDO_REGISTER]; | |
f62a15e3 | 611 | int alt; |
114cbee6 | 612 | |
a544cfd2 | 613 | rtx *clobber_reg = 0; |
f62a15e3 | 614 | int n_inputs, n_outputs; |
114cbee6 | 615 | |
0e7d0eb9 | 616 | /* Find out what the constraints require. If no constraint |
854dfdff | 617 | alternative matches, this asm is malformed. */ |
f62a15e3 BS |
618 | extract_insn (insn); |
619 | constrain_operands (1); | |
620 | alt = which_alternative; | |
621 | ||
622 | preprocess_constraints (); | |
623 | ||
624 | n_inputs = get_asm_operand_n_inputs (body); | |
1ccbefce | 625 | n_outputs = recog_data.n_operands - n_inputs; |
f62a15e3 BS |
626 | |
627 | if (alt < 0) | |
628 | { | |
629 | malformed_asm = 1; | |
630 | /* Avoid further trouble with this insn. */ | |
631 | PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); | |
a05924f9 | 632 | return 0; |
f62a15e3 | 633 | } |
114cbee6 | 634 | |
0f41302f | 635 | /* Strip SUBREGs here to make the following code simpler. */ |
1ccbefce RH |
636 | for (i = 0; i < recog_data.n_operands; i++) |
637 | if (GET_CODE (recog_data.operand[i]) == SUBREG | |
638 | && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) | |
639 | recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); | |
114cbee6 RS |
640 | |
641 | /* Set up CLOBBER_REG. */ | |
642 | ||
643 | n_clobbers = 0; | |
114cbee6 RS |
644 | |
645 | if (GET_CODE (body) == PARALLEL) | |
3f5cfed6 | 646 | { |
2a92c071 | 647 | clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx)); |
114cbee6 | 648 | |
3f5cfed6 JVA |
649 | for (i = 0; i < XVECLEN (body, 0); i++) |
650 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
651 | { | |
652 | rtx clobber = XVECEXP (body, 0, i); | |
653 | rtx reg = XEXP (clobber, 0); | |
114cbee6 | 654 | |
3f5cfed6 JVA |
655 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) |
656 | reg = SUBREG_REG (reg); | |
657 | ||
658 | if (STACK_REG_P (reg)) | |
659 | { | |
660 | clobber_reg[n_clobbers] = reg; | |
661 | n_clobbers++; | |
662 | } | |
663 | } | |
664 | } | |
114cbee6 RS |
665 | |
666 | /* Enforce rule #4: Output operands must specifically indicate which | |
667 | reg an output appears in after an asm. "=f" is not allowed: the | |
668 | operand constraints must select a class with a single reg. | |
669 | ||
670 | Also enforce rule #5: Output operands must start at the top of | |
0f41302f | 671 | the reg-stack: output operands may not "skip" a reg. */ |
114cbee6 | 672 | |
a05924f9 | 673 | memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); |
114cbee6 | 674 | for (i = 0; i < n_outputs; i++) |
1ccbefce | 675 | if (STACK_REG_P (recog_data.operand[i])) |
9c318306 | 676 | { |
f62a15e3 | 677 | if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1) |
9c318306 MH |
678 | { |
679 | error_for_asm (insn, "Output constraint %d must specify a single register", i); | |
680 | malformed_asm = 1; | |
681 | } | |
682 | else | |
d40cd80a JJ |
683 | { |
684 | int j; | |
685 | ||
686 | for (j = 0; j < n_clobbers; j++) | |
687 | if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) | |
688 | { | |
689 | error_for_asm (insn, "Output constraint %d cannot be specified together with \"%s\" clobber", | |
690 | i, reg_names [REGNO (clobber_reg[j])]); | |
691 | malformed_asm = 1; | |
692 | break; | |
693 | } | |
694 | if (j == n_clobbers) | |
695 | reg_used_as_output[REGNO (recog_data.operand[i])] = 1; | |
696 | } | |
9c318306 | 697 | } |
114cbee6 RS |
698 | |
699 | ||
700 | /* Search for first non-popped reg. */ | |
701 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
702 | if (! reg_used_as_output[i]) | |
703 | break; | |
704 | ||
705 | /* If there are any other popped regs, that's an error. */ | |
706 | for (; i < LAST_STACK_REG + 1; i++) | |
707 | if (reg_used_as_output[i]) | |
708 | break; | |
709 | ||
710 | if (i != LAST_STACK_REG + 1) | |
711 | { | |
712 | error_for_asm (insn, "Output regs must be grouped at top of stack"); | |
713 | malformed_asm = 1; | |
714 | } | |
715 | ||
716 | /* Enforce rule #2: All implicitly popped input regs must be closer | |
717 | to the top of the reg-stack than any input that is not implicitly | |
0f41302f | 718 | popped. */ |
114cbee6 | 719 | |
a05924f9 | 720 | memset (implicitly_dies, 0, sizeof (implicitly_dies)); |
f62a15e3 | 721 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 722 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 RS |
723 | { |
724 | /* An input reg is implicitly popped if it is tied to an | |
0f41302f | 725 | output, or if there is a CLOBBER for it. */ |
114cbee6 RS |
726 | int j; |
727 | ||
728 | for (j = 0; j < n_clobbers; j++) | |
1ccbefce | 729 | if (operands_match_p (clobber_reg[j], recog_data.operand[i])) |
114cbee6 RS |
730 | break; |
731 | ||
f62a15e3 | 732 | if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) |
1ccbefce | 733 | implicitly_dies[REGNO (recog_data.operand[i])] = 1; |
114cbee6 RS |
734 | } |
735 | ||
736 | /* Search for first non-popped reg. */ | |
737 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
738 | if (! implicitly_dies[i]) | |
739 | break; | |
740 | ||
741 | /* If there are any other popped regs, that's an error. */ | |
742 | for (; i < LAST_STACK_REG + 1; i++) | |
743 | if (implicitly_dies[i]) | |
744 | break; | |
745 | ||
746 | if (i != LAST_STACK_REG + 1) | |
747 | { | |
748 | error_for_asm (insn, | |
749 | "Implicitly popped regs must be grouped at top of stack"); | |
750 | malformed_asm = 1; | |
751 | } | |
752 | ||
753 | /* Enfore rule #3: If any input operand uses the "f" constraint, all | |
754 | output constraints must use the "&" earlyclobber. | |
755 | ||
a05924f9 | 756 | ??? Detect this more deterministically by having constrain_asm_operands |
0f41302f | 757 | record any earlyclobber. */ |
114cbee6 | 758 | |
f62a15e3 BS |
759 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
760 | if (recog_op_alt[i][alt].matches == -1) | |
114cbee6 RS |
761 | { |
762 | int j; | |
763 | ||
764 | for (j = 0; j < n_outputs; j++) | |
1ccbefce | 765 | if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) |
114cbee6 RS |
766 | { |
767 | error_for_asm (insn, | |
768 | "Output operand %d must use `&' constraint", j); | |
769 | malformed_asm = 1; | |
770 | } | |
771 | } | |
772 | ||
773 | if (malformed_asm) | |
774 | { | |
775 | /* Avoid further trouble with this insn. */ | |
38a448ca | 776 | PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); |
a05924f9 | 777 | return 0; |
0e7d0eb9 | 778 | } |
48227150 | 779 | |
a05924f9 | 780 | return 1; |
48227150 JVA |
781 | } |
782 | \f | |
114cbee6 RS |
783 | /* Calculate the number of inputs and outputs in BODY, an |
784 | asm_operands. N_OPERANDS is the total number of operands, and | |
785 | N_INPUTS and N_OUTPUTS are pointers to ints into which the results are | |
0f41302f | 786 | placed. */ |
114cbee6 | 787 | |
f62a15e3 BS |
788 | static int |
789 | get_asm_operand_n_inputs (body) | |
114cbee6 | 790 | rtx body; |
114cbee6 RS |
791 | { |
792 | if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS) | |
f62a15e3 | 793 | return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); |
114cbee6 RS |
794 | |
795 | else if (GET_CODE (body) == ASM_OPERANDS) | |
f62a15e3 | 796 | return ASM_OPERANDS_INPUT_LENGTH (body); |
114cbee6 RS |
797 | |
798 | else if (GET_CODE (body) == PARALLEL | |
799 | && GET_CODE (XVECEXP (body, 0, 0)) == SET) | |
f62a15e3 | 800 | return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0))); |
114cbee6 RS |
801 | |
802 | else if (GET_CODE (body) == PARALLEL | |
803 | && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS) | |
f62a15e3 | 804 | return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0)); |
114cbee6 | 805 | |
f62a15e3 | 806 | abort (); |
114cbee6 | 807 | } |
0ab759e4 | 808 | |
96237362 | 809 | /* If current function returns its result in an fp stack register, |
9f9ed50a | 810 | return the REG. Otherwise, return 0. */ |
96237362 | 811 | |
99a59310 RK |
812 | static rtx |
813 | stack_result (decl) | |
96237362 RS |
814 | tree decl; |
815 | { | |
f099b1c9 | 816 | rtx result; |
96237362 | 817 | |
f099b1c9 JL |
818 | /* If the value is supposed to be returned in memory, then clearly |
819 | it is not returned in a stack register. */ | |
820 | if (aggregate_value_p (DECL_RESULT (decl))) | |
821 | return 0; | |
822 | ||
19e7881c | 823 | result = DECL_RTL_IF_SET (DECL_RESULT (decl)); |
9cf218a3 | 824 | if (result != 0) |
96237362 RS |
825 | { |
826 | #ifdef FUNCTION_OUTGOING_VALUE | |
827 | result | |
828 | = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); | |
829 | #else | |
830 | result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); | |
831 | #endif | |
832 | } | |
833 | ||
9f9ed50a | 834 | return result != 0 && STACK_REG_P (result) ? result : 0; |
96237362 | 835 | } |
48227150 | 836 | \f |
48227150 | 837 | |
e075ae69 RH |
838 | /* |
839 | * This section deals with stack register substitution, and forms the second | |
840 | * pass over the RTL. | |
841 | */ | |
48227150 JVA |
842 | |
843 | /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for | |
0f41302f | 844 | the desired hard REGNO. */ |
48227150 JVA |
845 | |
846 | static void | |
847 | replace_reg (reg, regno) | |
848 | rtx *reg; | |
849 | int regno; | |
850 | { | |
851 | if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG | |
852 | || ! STACK_REG_P (*reg)) | |
853 | abort (); | |
854 | ||
99a59310 | 855 | switch (GET_MODE_CLASS (GET_MODE (*reg))) |
e075ae69 RH |
856 | { |
857 | default: abort (); | |
858 | case MODE_FLOAT: | |
859 | case MODE_COMPLEX_FLOAT:; | |
860 | } | |
7d0e3dd4 | 861 | |
99a59310 | 862 | *reg = FP_MODE_REG (regno, GET_MODE (*reg)); |
48227150 JVA |
863 | } |
864 | ||
865 | /* Remove a note of type NOTE, which must be found, for register | |
0f41302f | 866 | number REGNO from INSN. Remove only one such note. */ |
48227150 JVA |
867 | |
868 | static void | |
869 | remove_regno_note (insn, note, regno) | |
870 | rtx insn; | |
871 | enum reg_note note; | |
b00b2cc2 | 872 | unsigned int regno; |
48227150 JVA |
873 | { |
874 | register rtx *note_link, this; | |
875 | ||
876 | note_link = ®_NOTES(insn); | |
877 | for (this = *note_link; this; this = XEXP (this, 1)) | |
878 | if (REG_NOTE_KIND (this) == note | |
879 | && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) | |
880 | { | |
881 | *note_link = XEXP (this, 1); | |
882 | return; | |
883 | } | |
884 | else | |
885 | note_link = &XEXP (this, 1); | |
886 | ||
887 | abort (); | |
888 | } | |
889 | ||
890 | /* Find the hard register number of virtual register REG in REGSTACK. | |
891 | The hard register number is relative to the top of the stack. -1 is | |
0f41302f | 892 | returned if the register is not found. */ |
48227150 JVA |
893 | |
894 | static int | |
895 | get_hard_regnum (regstack, reg) | |
896 | stack regstack; | |
897 | rtx reg; | |
898 | { | |
899 | int i; | |
900 | ||
901 | if (! STACK_REG_P (reg)) | |
902 | abort (); | |
903 | ||
904 | for (i = regstack->top; i >= 0; i--) | |
905 | if (regstack->reg[i] == REGNO (reg)) | |
906 | break; | |
907 | ||
908 | return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; | |
909 | } | |
910 | ||
911 | /* Delete INSN from the RTL. Mark the insn, but don't remove it from | |
912 | the chain of insns. Doing so could confuse block_begin and block_end | |
0f41302f | 913 | if this were the only insn in the block. */ |
48227150 JVA |
914 | |
915 | static void | |
916 | delete_insn_for_stacker (insn) | |
917 | rtx insn; | |
918 | { | |
919 | PUT_CODE (insn, NOTE); | |
920 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
921 | NOTE_SOURCE_FILE (insn) = 0; | |
48227150 JVA |
922 | } |
923 | \f | |
924 | /* Emit an insn to pop virtual register REG before or after INSN. | |
925 | REGSTACK is the stack state after INSN and is updated to reflect this | |
e075ae69 RH |
926 | pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn |
927 | is represented as a SET whose destination is the register to be popped | |
928 | and source is the top of stack. A death note for the top of stack | |
0f41302f | 929 | cases the movdf pattern to pop. */ |
48227150 JVA |
930 | |
931 | static rtx | |
a05924f9 | 932 | emit_pop_insn (insn, regstack, reg, where) |
48227150 JVA |
933 | rtx insn; |
934 | stack regstack; | |
935 | rtx reg; | |
a05924f9 | 936 | enum emit_where where; |
48227150 JVA |
937 | { |
938 | rtx pop_insn, pop_rtx; | |
939 | int hard_regno; | |
940 | ||
037f20f1 JH |
941 | /* For complex types take care to pop both halves. These may survive in |
942 | CLOBBER and USE expressions. */ | |
943 | if (COMPLEX_MODE_P (GET_MODE (reg))) | |
944 | { | |
945 | rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); | |
946 | rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); | |
947 | ||
948 | pop_insn = NULL_RTX; | |
949 | if (get_hard_regnum (regstack, reg1) >= 0) | |
950 | pop_insn = emit_pop_insn (insn, regstack, reg1, where); | |
951 | if (get_hard_regnum (regstack, reg2) >= 0) | |
952 | pop_insn = emit_pop_insn (insn, regstack, reg2, where); | |
953 | if (!pop_insn) | |
954 | abort (); | |
955 | return pop_insn; | |
956 | } | |
957 | ||
48227150 JVA |
958 | hard_regno = get_hard_regnum (regstack, reg); |
959 | ||
960 | if (hard_regno < FIRST_STACK_REG) | |
961 | abort (); | |
962 | ||
e075ae69 RH |
963 | pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), |
964 | FP_MODE_REG (FIRST_STACK_REG, DFmode)); | |
48227150 | 965 | |
a05924f9 JH |
966 | if (where == EMIT_AFTER) |
967 | pop_insn = emit_block_insn_after (pop_rtx, insn, current_block); | |
968 | else | |
969 | pop_insn = emit_block_insn_before (pop_rtx, insn, current_block); | |
48227150 | 970 | |
c5c76735 JL |
971 | REG_NOTES (pop_insn) |
972 | = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode), | |
973 | REG_NOTES (pop_insn)); | |
48227150 JVA |
974 | |
975 | regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] | |
976 | = regstack->reg[regstack->top]; | |
977 | regstack->top -= 1; | |
978 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); | |
979 | ||
980 | return pop_insn; | |
981 | } | |
982 | \f | |
a05924f9 JH |
983 | /* Emit an insn before or after INSN to swap virtual register REG with |
984 | the top of stack. REGSTACK is the stack state before the swap, and | |
985 | is updated to reflect the swap. A swap insn is represented as a | |
986 | PARALLEL of two patterns: each pattern moves one reg to the other. | |
48227150 | 987 | |
0f41302f | 988 | If REG is already at the top of the stack, no insn is emitted. */ |
48227150 JVA |
989 | |
990 | static void | |
eca31501 | 991 | emit_swap_insn (insn, regstack, reg) |
48227150 JVA |
992 | rtx insn; |
993 | stack regstack; | |
eca31501 | 994 | rtx reg; |
48227150 | 995 | { |
eca31501 | 996 | int hard_regno; |
a05924f9 | 997 | rtx swap_rtx; |
eca31501 JVA |
998 | int tmp, other_reg; /* swap regno temps */ |
999 | rtx i1; /* the stack-reg insn prior to INSN */ | |
1000 | rtx i1set = NULL_RTX; /* the SET rtx within I1 */ | |
48227150 | 1001 | |
eca31501 JVA |
1002 | hard_regno = get_hard_regnum (regstack, reg); |
1003 | ||
1004 | if (hard_regno < FIRST_STACK_REG) | |
1005 | abort (); | |
48227150 JVA |
1006 | if (hard_regno == FIRST_STACK_REG) |
1007 | return; | |
1008 | ||
eca31501 | 1009 | other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); |
48227150 | 1010 | |
eca31501 JVA |
1011 | tmp = regstack->reg[other_reg]; |
1012 | regstack->reg[other_reg] = regstack->reg[regstack->top]; | |
48227150 | 1013 | regstack->reg[regstack->top] = tmp; |
48227150 | 1014 | |
a05924f9 JH |
1015 | /* Find the previous insn involving stack regs, but don't pass a |
1016 | block boundary. */ | |
1017 | i1 = NULL; | |
1018 | if (current_block && insn != current_block->head) | |
eca31501 | 1019 | { |
a05924f9 | 1020 | rtx tmp = PREV_INSN (insn); |
3a6cc978 ZW |
1021 | rtx limit = PREV_INSN (current_block->head); |
1022 | while (tmp != limit) | |
a05924f9 JH |
1023 | { |
1024 | if (GET_CODE (tmp) == CODE_LABEL | |
35433587 | 1025 | || GET_CODE (tmp) == CALL_INSN |
589ca5cb | 1026 | || NOTE_INSN_BASIC_BLOCK_P (tmp) |
a05924f9 JH |
1027 | || (GET_CODE (tmp) == INSN |
1028 | && stack_regs_mentioned (tmp))) | |
1029 | { | |
1030 | i1 = tmp; | |
1031 | break; | |
1032 | } | |
1033 | tmp = PREV_INSN (tmp); | |
1034 | } | |
1035 | } | |
1036 | ||
1037 | if (i1 != NULL_RTX | |
1038 | && (i1set = single_set (i1)) != NULL_RTX) | |
1039 | { | |
1040 | rtx i1src = *get_true_reg (&SET_SRC (i1set)); | |
eca31501 | 1041 | rtx i1dest = *get_true_reg (&SET_DEST (i1set)); |
48227150 | 1042 | |
eca31501 | 1043 | /* If the previous register stack push was from the reg we are to |
0f41302f | 1044 | swap with, omit the swap. */ |
eca31501 JVA |
1045 | |
1046 | if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG | |
ae0ed63a JM |
1047 | && GET_CODE (i1src) == REG |
1048 | && REGNO (i1src) == (unsigned) hard_regno - 1 | |
eca31501 JVA |
1049 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) |
1050 | return; | |
1051 | ||
1052 | /* If the previous insn wrote to the reg we are to swap with, | |
1053 | omit the swap. */ | |
1054 | ||
ae0ed63a | 1055 | if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno |
eca31501 JVA |
1056 | && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG |
1057 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) | |
1058 | return; | |
1059 | } | |
1060 | ||
e075ae69 RH |
1061 | swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), |
1062 | FP_MODE_REG (FIRST_STACK_REG, XFmode)); | |
a05924f9 JH |
1063 | |
1064 | if (i1) | |
1065 | emit_block_insn_after (swap_rtx, i1, current_block); | |
1066 | else if (current_block) | |
3a6cc978 | 1067 | emit_block_insn_before (swap_rtx, current_block->head, current_block); |
a05924f9 JH |
1068 | else |
1069 | emit_insn_before (swap_rtx, insn); | |
48227150 JVA |
1070 | } |
1071 | \f | |
1072 | /* Handle a move to or from a stack register in PAT, which is in INSN. | |
0f41302f | 1073 | REGSTACK is the current stack. */ |
48227150 JVA |
1074 | |
1075 | static void | |
1076 | move_for_stack_reg (insn, regstack, pat) | |
1077 | rtx insn; | |
1078 | stack regstack; | |
1079 | rtx pat; | |
1080 | { | |
99a59310 RK |
1081 | rtx *psrc = get_true_reg (&SET_SRC (pat)); |
1082 | rtx *pdest = get_true_reg (&SET_DEST (pat)); | |
1083 | rtx src, dest; | |
48227150 JVA |
1084 | rtx note; |
1085 | ||
99a59310 RK |
1086 | src = *psrc; dest = *pdest; |
1087 | ||
1088 | if (STACK_REG_P (src) && STACK_REG_P (dest)) | |
48227150 JVA |
1089 | { |
1090 | /* Write from one stack reg to another. If SRC dies here, then | |
0f41302f | 1091 | just change the register mapping and delete the insn. */ |
48227150 | 1092 | |
99a59310 | 1093 | note = find_regno_note (insn, REG_DEAD, REGNO (src)); |
48227150 JVA |
1094 | if (note) |
1095 | { | |
1096 | int i; | |
1097 | ||
0f41302f | 1098 | /* If this is a no-op move, there must not be a REG_DEAD note. */ |
99a59310 | 1099 | if (REGNO (src) == REGNO (dest)) |
48227150 JVA |
1100 | abort (); |
1101 | ||
1102 | for (i = regstack->top; i >= 0; i--) | |
99a59310 | 1103 | if (regstack->reg[i] == REGNO (src)) |
48227150 JVA |
1104 | break; |
1105 | ||
0f41302f | 1106 | /* The source must be live, and the dest must be dead. */ |
99a59310 | 1107 | if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
48227150 JVA |
1108 | abort (); |
1109 | ||
1110 | /* It is possible that the dest is unused after this insn. | |
0f41302f | 1111 | If so, just pop the src. */ |
48227150 | 1112 | |
99a59310 | 1113 | if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) |
48227150 | 1114 | { |
a05924f9 | 1115 | emit_pop_insn (insn, regstack, src, EMIT_AFTER); |
48227150 JVA |
1116 | |
1117 | delete_insn_for_stacker (insn); | |
1118 | return; | |
1119 | } | |
1120 | ||
99a59310 | 1121 | regstack->reg[i] = REGNO (dest); |
48227150 | 1122 | |
99a59310 RK |
1123 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); |
1124 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); | |
48227150 JVA |
1125 | |
1126 | delete_insn_for_stacker (insn); | |
1127 | ||
1128 | return; | |
1129 | } | |
1130 | ||
0f41302f | 1131 | /* The source reg does not die. */ |
48227150 JVA |
1132 | |
1133 | /* If this appears to be a no-op move, delete it, or else it | |
1134 | will confuse the machine description output patterns. But if | |
1135 | it is REG_UNUSED, we must pop the reg now, as per-insn processing | |
0f41302f | 1136 | for REG_UNUSED will not work for deleted insns. */ |
48227150 | 1137 | |
99a59310 | 1138 | if (REGNO (src) == REGNO (dest)) |
48227150 | 1139 | { |
99a59310 | 1140 | if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) |
a05924f9 | 1141 | emit_pop_insn (insn, regstack, dest, EMIT_AFTER); |
48227150 JVA |
1142 | |
1143 | delete_insn_for_stacker (insn); | |
1144 | return; | |
1145 | } | |
1146 | ||
1147 | /* The destination ought to be dead */ | |
99a59310 | 1148 | if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
48227150 JVA |
1149 | abort (); |
1150 | ||
99a59310 | 1151 | replace_reg (psrc, get_hard_regnum (regstack, src)); |
48227150 | 1152 | |
99a59310 RK |
1153 | regstack->reg[++regstack->top] = REGNO (dest); |
1154 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
1155 | replace_reg (pdest, FIRST_STACK_REG); | |
48227150 | 1156 | } |
99a59310 | 1157 | else if (STACK_REG_P (src)) |
48227150 JVA |
1158 | { |
1159 | /* Save from a stack reg to MEM, or possibly integer reg. Since | |
1160 | only top of stack may be saved, emit an exchange first if | |
0f41302f | 1161 | needs be. */ |
48227150 | 1162 | |
99a59310 | 1163 | emit_swap_insn (insn, regstack, src); |
48227150 | 1164 | |
99a59310 | 1165 | note = find_regno_note (insn, REG_DEAD, REGNO (src)); |
48227150 JVA |
1166 | if (note) |
1167 | { | |
1168 | replace_reg (&XEXP (note, 0), FIRST_STACK_REG); | |
1169 | regstack->top--; | |
99a59310 | 1170 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); |
48227150 | 1171 | } |
cadcffb3 JH |
1172 | else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode) |
1173 | && regstack->top < REG_STACK_SIZE - 1) | |
b40b8b06 JVA |
1174 | { |
1175 | /* A 387 cannot write an XFmode value to a MEM without | |
1176 | clobbering the source reg. The output code can handle | |
1177 | this by reading back the value from the MEM. | |
1178 | But it is more efficient to use a temp register if one is | |
1179 | available. Push the source value here if the register | |
1180 | stack is not full, and then write the value to memory via | |
1181 | a pop. */ | |
1182 | rtx push_rtx, push_insn; | |
037f20f1 | 1183 | rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); |
b40b8b06 | 1184 | |
037f20f1 JH |
1185 | if (GET_MODE (src) == TFmode) |
1186 | push_rtx = gen_movtf (top_stack_reg, top_stack_reg); | |
1187 | else | |
1188 | push_rtx = gen_movxf (top_stack_reg, top_stack_reg); | |
b40b8b06 | 1189 | push_insn = emit_insn_before (push_rtx, insn); |
38a448ca RH |
1190 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg, |
1191 | REG_NOTES (insn)); | |
b40b8b06 | 1192 | } |
48227150 | 1193 | |
99a59310 | 1194 | replace_reg (psrc, FIRST_STACK_REG); |
48227150 | 1195 | } |
99a59310 | 1196 | else if (STACK_REG_P (dest)) |
48227150 JVA |
1197 | { |
1198 | /* Load from MEM, or possibly integer REG or constant, into the | |
1199 | stack regs. The actual target is always the top of the | |
1200 | stack. The stack mapping is changed to reflect that DEST is | |
1201 | now at top of stack. */ | |
1202 | ||
1203 | /* The destination ought to be dead */ | |
99a59310 | 1204 | if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
48227150 JVA |
1205 | abort (); |
1206 | ||
1207 | if (regstack->top >= REG_STACK_SIZE) | |
1208 | abort (); | |
1209 | ||
99a59310 RK |
1210 | regstack->reg[++regstack->top] = REGNO (dest); |
1211 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
1212 | replace_reg (pdest, FIRST_STACK_REG); | |
48227150 JVA |
1213 | } |
1214 | else | |
1215 | abort (); | |
1216 | } | |
1217 | \f | |
e075ae69 RH |
1218 | /* Swap the condition on a branch, if there is one. Return true if we |
1219 | found a condition to swap. False if the condition was not used as | |
dc297297 | 1220 | such. */ |
e075ae69 RH |
1221 | |
1222 | static int | |
1223 | swap_rtx_condition_1 (pat) | |
eca31501 JVA |
1224 | rtx pat; |
1225 | { | |
6f7d635c | 1226 | register const char *fmt; |
e075ae69 | 1227 | register int i, r = 0; |
eca31501 JVA |
1228 | |
1229 | if (GET_RTX_CLASS (GET_CODE (pat)) == '<') | |
1230 | { | |
1231 | PUT_CODE (pat, swap_condition (GET_CODE (pat))); | |
e075ae69 | 1232 | r = 1; |
eca31501 | 1233 | } |
e075ae69 | 1234 | else |
eca31501 | 1235 | { |
e075ae69 RH |
1236 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); |
1237 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
eca31501 | 1238 | { |
e075ae69 RH |
1239 | if (fmt[i] == 'E') |
1240 | { | |
1241 | register int j; | |
eca31501 | 1242 | |
e075ae69 RH |
1243 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) |
1244 | r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); | |
1245 | } | |
1246 | else if (fmt[i] == 'e') | |
1247 | r |= swap_rtx_condition_1 (XEXP (pat, i)); | |
eca31501 | 1248 | } |
eca31501 | 1249 | } |
e075ae69 RH |
1250 | |
1251 | return r; | |
1252 | } | |
1253 | ||
1254 | static int | |
1255 | swap_rtx_condition (insn) | |
1256 | rtx insn; | |
1257 | { | |
1258 | rtx pat = PATTERN (insn); | |
1259 | ||
1260 | /* We're looking for a single set to cc0 or an HImode temporary. */ | |
1261 | ||
1262 | if (GET_CODE (pat) == SET | |
1263 | && GET_CODE (SET_DEST (pat)) == REG | |
1264 | && REGNO (SET_DEST (pat)) == FLAGS_REG) | |
1265 | { | |
1266 | insn = next_flags_user (insn); | |
1267 | if (insn == NULL_RTX) | |
1268 | return 0; | |
1269 | pat = PATTERN (insn); | |
1270 | } | |
1271 | ||
1272 | /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're | |
1273 | not doing anything with the cc value right now. We may be able to | |
1274 | search for one though. */ | |
1275 | ||
1276 | if (GET_CODE (pat) == SET | |
1277 | && GET_CODE (SET_SRC (pat)) == UNSPEC | |
1278 | && XINT (SET_SRC (pat), 1) == 9) | |
1279 | { | |
1280 | rtx dest = SET_DEST (pat); | |
1281 | ||
1282 | /* Search forward looking for the first use of this value. | |
1283 | Stop at block boundaries. */ | |
0eac0e81 | 1284 | while (insn != current_block->end) |
e075ae69 RH |
1285 | { |
1286 | insn = NEXT_INSN (insn); | |
2c3c49de | 1287 | if (INSN_P (insn) && reg_mentioned_p (dest, insn)) |
e075ae69 | 1288 | break; |
0eac0e81 | 1289 | if (GET_CODE (insn) == CALL_INSN) |
e075ae69 RH |
1290 | return 0; |
1291 | } | |
1292 | ||
1293 | /* So we've found the insn using this value. If it is anything | |
1294 | other than sahf, aka unspec 10, or the value does not die | |
1295 | (meaning we'd have to search further), then we must give up. */ | |
1296 | pat = PATTERN (insn); | |
1297 | if (GET_CODE (pat) != SET | |
1298 | || GET_CODE (SET_SRC (pat)) != UNSPEC | |
1299 | || XINT (SET_SRC (pat), 1) != 10 | |
1300 | || ! dead_or_set_p (insn, dest)) | |
1301 | return 0; | |
1302 | ||
1303 | /* Now we are prepared to handle this as a normal cc0 setter. */ | |
1304 | insn = next_flags_user (insn); | |
1305 | if (insn == NULL_RTX) | |
1306 | return 0; | |
1307 | pat = PATTERN (insn); | |
1308 | } | |
1309 | ||
90a74703 JH |
1310 | if (swap_rtx_condition_1 (pat)) |
1311 | { | |
0eac0e81 | 1312 | int fail = 0; |
90a74703 JH |
1313 | INSN_CODE (insn) = -1; |
1314 | if (recog_memoized (insn) == -1) | |
0eac0e81 JH |
1315 | fail = 1; |
1316 | /* In case the flags don't die here, recurse to try fix | |
1317 | following user too. */ | |
1318 | else if (! dead_or_set_p (insn, ix86_flags_rtx)) | |
1319 | { | |
1320 | insn = next_flags_user (insn); | |
1321 | if (!insn || !swap_rtx_condition (insn)) | |
1322 | fail = 1; | |
1323 | } | |
1324 | if (fail) | |
90a74703 JH |
1325 | { |
1326 | swap_rtx_condition_1 (pat); | |
1327 | return 0; | |
1328 | } | |
1329 | return 1; | |
1330 | } | |
1331 | return 0; | |
eca31501 JVA |
1332 | } |
1333 | ||
48227150 JVA |
1334 | /* Handle a comparison. Special care needs to be taken to avoid |
1335 | causing comparisons that a 387 cannot do correctly, such as EQ. | |
1336 | ||
e075ae69 | 1337 | Also, a pop insn may need to be emitted. The 387 does have an |
48227150 JVA |
1338 | `fcompp' insn that can pop two regs, but it is sometimes too expensive |
1339 | to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to | |
e075ae69 | 1340 | set up. */ |
48227150 JVA |
1341 | |
1342 | static void | |
e075ae69 | 1343 | compare_for_stack_reg (insn, regstack, pat_src) |
48227150 JVA |
1344 | rtx insn; |
1345 | stack regstack; | |
e075ae69 | 1346 | rtx pat_src; |
48227150 JVA |
1347 | { |
1348 | rtx *src1, *src2; | |
1349 | rtx src1_note, src2_note; | |
e075ae69 | 1350 | rtx flags_user; |
914ec131 | 1351 | |
e075ae69 RH |
1352 | src1 = get_true_reg (&XEXP (pat_src, 0)); |
1353 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
1354 | flags_user = next_flags_user (insn); | |
48227150 | 1355 | |
eca31501 | 1356 | /* ??? If fxch turns out to be cheaper than fstp, give priority to |
0f41302f | 1357 | registers that die in this insn - move those to stack top first. */ |
e075ae69 RH |
1358 | if ((! STACK_REG_P (*src1) |
1359 | || (STACK_REG_P (*src2) | |
1360 | && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) | |
1361 | && swap_rtx_condition (insn)) | |
eca31501 | 1362 | { |
e075ae69 RH |
1363 | rtx temp; |
1364 | temp = XEXP (pat_src, 0); | |
1365 | XEXP (pat_src, 0) = XEXP (pat_src, 1); | |
1366 | XEXP (pat_src, 1) = temp; | |
48227150 | 1367 | |
e075ae69 RH |
1368 | src1 = get_true_reg (&XEXP (pat_src, 0)); |
1369 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
dc78213e | 1370 | |
b9342cdf | 1371 | INSN_CODE (insn) = -1; |
eca31501 | 1372 | } |
48227150 | 1373 | |
0f41302f | 1374 | /* We will fix any death note later. */ |
48227150 JVA |
1375 | |
1376 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1377 | ||
1378 | if (STACK_REG_P (*src2)) | |
1379 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1380 | else | |
eca31501 | 1381 | src2_note = NULL_RTX; |
48227150 | 1382 | |
e075ae69 | 1383 | emit_swap_insn (insn, regstack, *src1); |
48227150 JVA |
1384 | |
1385 | replace_reg (src1, FIRST_STACK_REG); | |
1386 | ||
1387 | if (STACK_REG_P (*src2)) | |
e075ae69 | 1388 | replace_reg (src2, get_hard_regnum (regstack, *src2)); |
48227150 JVA |
1389 | |
1390 | if (src1_note) | |
1391 | { | |
7aa74e4c | 1392 | pop_stack (regstack, REGNO (XEXP (src1_note, 0))); |
48227150 | 1393 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); |
48227150 JVA |
1394 | } |
1395 | ||
1396 | /* If the second operand dies, handle that. But if the operands are | |
1397 | the same stack register, don't bother, because only one death is | |
0f41302f | 1398 | needed, and it was just handled. */ |
48227150 JVA |
1399 | |
1400 | if (src2_note | |
eca31501 | 1401 | && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) |
48227150 JVA |
1402 | && REGNO (*src1) == REGNO (*src2))) |
1403 | { | |
1404 | /* As a special case, two regs may die in this insn if src2 is | |
1405 | next to top of stack and the top of stack also dies. Since | |
1406 | we have already popped src1, "next to top of stack" is really | |
0f41302f | 1407 | at top (FIRST_STACK_REG) now. */ |
48227150 JVA |
1408 | |
1409 | if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG | |
1410 | && src1_note) | |
1411 | { | |
7aa74e4c | 1412 | pop_stack (regstack, REGNO (XEXP (src2_note, 0))); |
48227150 | 1413 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); |
48227150 JVA |
1414 | } |
1415 | else | |
1416 | { | |
e075ae69 RH |
1417 | /* The 386 can only represent death of the first operand in |
1418 | the case handled above. In all other cases, emit a separate | |
1419 | pop and remove the death note from here. */ | |
1420 | ||
1421 | /* link_cc0_insns (insn); */ | |
1422 | ||
1423 | remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); | |
48227150 | 1424 | |
e075ae69 | 1425 | emit_pop_insn (insn, regstack, XEXP (src2_note, 0), |
a05924f9 | 1426 | EMIT_AFTER); |
48227150 JVA |
1427 | } |
1428 | } | |
1429 | } | |
1430 | \f | |
1431 | /* Substitute new registers in PAT, which is part of INSN. REGSTACK | |
0f41302f | 1432 | is the current register layout. */ |
48227150 JVA |
1433 | |
1434 | static void | |
1435 | subst_stack_regs_pat (insn, regstack, pat) | |
1436 | rtx insn; | |
1437 | stack regstack; | |
1438 | rtx pat; | |
1439 | { | |
1440 | rtx *dest, *src; | |
48227150 | 1441 | |
a05924f9 JH |
1442 | switch (GET_CODE (pat)) |
1443 | { | |
1444 | case USE: | |
1445 | /* Deaths in USE insns can happen in non optimizing compilation. | |
1446 | Handle them by popping the dying register. */ | |
1447 | src = get_true_reg (&XEXP (pat, 0)); | |
1448 | if (STACK_REG_P (*src) | |
1449 | && find_regno_note (insn, REG_DEAD, REGNO (*src))) | |
1450 | { | |
eedf2f55 | 1451 | emit_pop_insn (insn, regstack, *src, EMIT_AFTER); |
a05924f9 JH |
1452 | return; |
1453 | } | |
eedf2f55 | 1454 | /* ??? Uninitialized USE should not happen. */ |
a05924f9 | 1455 | else if (get_hard_regnum (regstack, *src) == -1) |
eedf2f55 | 1456 | abort(); |
a05924f9 | 1457 | break; |
48227150 | 1458 | |
a05924f9 JH |
1459 | case CLOBBER: |
1460 | { | |
1461 | rtx note; | |
48227150 | 1462 | |
a05924f9 JH |
1463 | dest = get_true_reg (&XEXP (pat, 0)); |
1464 | if (STACK_REG_P (*dest)) | |
1465 | { | |
1466 | note = find_reg_note (insn, REG_DEAD, *dest); | |
bd695e1e RH |
1467 | |
1468 | if (pat != PATTERN (insn)) | |
1469 | { | |
1470 | /* The fix_truncdi_1 pattern wants to be able to allocate | |
1471 | it's own scratch register. It does this by clobbering | |
1472 | an fp reg so that it is assured of an empty reg-stack | |
1473 | register. If the register is live, kill it now. | |
1474 | Remove the DEAD/UNUSED note so we don't try to kill it | |
1475 | later too. */ | |
1476 | ||
1477 | if (note) | |
1478 | emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); | |
1479 | else | |
1480 | { | |
1481 | note = find_reg_note (insn, REG_UNUSED, *dest); | |
1482 | if (!note) | |
1483 | abort (); | |
1484 | } | |
1485 | remove_note (insn, note); | |
1486 | replace_reg (dest, LAST_STACK_REG); | |
1487 | } | |
a05924f9 JH |
1488 | else |
1489 | { | |
bd695e1e RH |
1490 | /* A top-level clobber with no REG_DEAD, and no hard-regnum |
1491 | indicates an uninitialized value. Because reload removed | |
1492 | all other clobbers, this must be due to a function | |
1493 | returning without a value. Load up a NaN. */ | |
1494 | ||
1495 | if (! note | |
1496 | && get_hard_regnum (regstack, *dest) == -1) | |
1497 | { | |
1498 | pat = gen_rtx_SET (VOIDmode, | |
1499 | FP_MODE_REG (REGNO (*dest), SFmode), | |
1500 | nan); | |
1501 | PATTERN (insn) = pat; | |
1502 | move_for_stack_reg (insn, regstack, pat); | |
1503 | } | |
037f20f1 JH |
1504 | if (! note && COMPLEX_MODE_P (GET_MODE (*dest)) |
1505 | && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1) | |
1506 | { | |
1507 | pat = gen_rtx_SET (VOIDmode, | |
1508 | FP_MODE_REG (REGNO (*dest) + 1, SFmode), | |
1509 | nan); | |
1510 | PATTERN (insn) = pat; | |
1511 | move_for_stack_reg (insn, regstack, pat); | |
1512 | } | |
a05924f9 | 1513 | } |
a05924f9 | 1514 | } |
48227150 | 1515 | break; |
a05924f9 | 1516 | } |
48227150 | 1517 | |
a05924f9 JH |
1518 | case SET: |
1519 | { | |
6496a589 | 1520 | rtx *src1 = (rtx *) 0, *src2; |
a05924f9 JH |
1521 | rtx src1_note, src2_note; |
1522 | rtx pat_src; | |
1523 | ||
1524 | dest = get_true_reg (&SET_DEST (pat)); | |
1525 | src = get_true_reg (&SET_SRC (pat)); | |
1526 | pat_src = SET_SRC (pat); | |
1527 | ||
1528 | /* See if this is a `movM' pattern, and handle elsewhere if so. */ | |
1529 | if (STACK_REG_P (*src) | |
1530 | || (STACK_REG_P (*dest) | |
1531 | && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM | |
1532 | || GET_CODE (*src) == CONST_DOUBLE))) | |
1533 | { | |
1534 | move_for_stack_reg (insn, regstack, pat); | |
1535 | break; | |
1536 | } | |
48227150 | 1537 | |
a05924f9 JH |
1538 | switch (GET_CODE (pat_src)) |
1539 | { | |
1540 | case COMPARE: | |
1541 | compare_for_stack_reg (insn, regstack, pat_src); | |
1542 | break; | |
48227150 | 1543 | |
a05924f9 JH |
1544 | case CALL: |
1545 | { | |
1546 | int count; | |
1547 | for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest)); | |
1548 | --count >= 0;) | |
1549 | { | |
1550 | regstack->reg[++regstack->top] = REGNO (*dest) + count; | |
1551 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); | |
1552 | } | |
1553 | } | |
1554 | replace_reg (dest, FIRST_STACK_REG); | |
1555 | break; | |
48227150 | 1556 | |
a05924f9 JH |
1557 | case REG: |
1558 | /* This is a `tstM2' case. */ | |
1559 | if (*dest != cc0_rtx) | |
1560 | abort (); | |
1561 | src1 = src; | |
48227150 | 1562 | |
a05924f9 | 1563 | /* Fall through. */ |
48227150 | 1564 | |
a05924f9 JH |
1565 | case FLOAT_TRUNCATE: |
1566 | case SQRT: | |
1567 | case ABS: | |
1568 | case NEG: | |
1569 | /* These insns only operate on the top of the stack. DEST might | |
1570 | be cc0_rtx if we're processing a tstM pattern. Also, it's | |
1571 | possible that the tstM case results in a REG_DEAD note on the | |
1572 | source. */ | |
48227150 | 1573 | |
a05924f9 JH |
1574 | if (src1 == 0) |
1575 | src1 = get_true_reg (&XEXP (pat_src, 0)); | |
48227150 | 1576 | |
a05924f9 | 1577 | emit_swap_insn (insn, regstack, *src1); |
48227150 | 1578 | |
a05924f9 | 1579 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
48227150 | 1580 | |
a05924f9 JH |
1581 | if (STACK_REG_P (*dest)) |
1582 | replace_reg (dest, FIRST_STACK_REG); | |
48227150 | 1583 | |
a05924f9 JH |
1584 | if (src1_note) |
1585 | { | |
1586 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1587 | regstack->top--; | |
1588 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
1589 | } | |
48227150 | 1590 | |
a05924f9 JH |
1591 | replace_reg (src1, FIRST_STACK_REG); |
1592 | break; | |
48227150 | 1593 | |
a05924f9 JH |
1594 | case MINUS: |
1595 | case DIV: | |
1596 | /* On i386, reversed forms of subM3 and divM3 exist for | |
1597 | MODE_FLOAT, so the same code that works for addM3 and mulM3 | |
1598 | can be used. */ | |
1599 | case MULT: | |
1600 | case PLUS: | |
1601 | /* These insns can accept the top of stack as a destination | |
1602 | from a stack reg or mem, or can use the top of stack as a | |
1603 | source and some other stack register (possibly top of stack) | |
1604 | as a destination. */ | |
1605 | ||
1606 | src1 = get_true_reg (&XEXP (pat_src, 0)); | |
1607 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
1608 | ||
1609 | /* We will fix any death note later. */ | |
1610 | ||
1611 | if (STACK_REG_P (*src1)) | |
1612 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1613 | else | |
1614 | src1_note = NULL_RTX; | |
1615 | if (STACK_REG_P (*src2)) | |
1616 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1617 | else | |
1618 | src2_note = NULL_RTX; | |
48227150 | 1619 | |
a05924f9 JH |
1620 | /* If either operand is not a stack register, then the dest |
1621 | must be top of stack. */ | |
48227150 | 1622 | |
a05924f9 | 1623 | if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) |
eca31501 | 1624 | emit_swap_insn (insn, regstack, *dest); |
a05924f9 JH |
1625 | else |
1626 | { | |
1627 | /* Both operands are REG. If neither operand is already | |
1628 | at the top of stack, choose to make the one that is the dest | |
1629 | the new top of stack. */ | |
48227150 | 1630 | |
a05924f9 | 1631 | int src1_hard_regnum, src2_hard_regnum; |
48227150 | 1632 | |
a05924f9 JH |
1633 | src1_hard_regnum = get_hard_regnum (regstack, *src1); |
1634 | src2_hard_regnum = get_hard_regnum (regstack, *src2); | |
1635 | if (src1_hard_regnum == -1 || src2_hard_regnum == -1) | |
1636 | abort (); | |
48227150 | 1637 | |
a05924f9 JH |
1638 | if (src1_hard_regnum != FIRST_STACK_REG |
1639 | && src2_hard_regnum != FIRST_STACK_REG) | |
1640 | emit_swap_insn (insn, regstack, *dest); | |
48227150 | 1641 | } |
a05924f9 JH |
1642 | |
1643 | if (STACK_REG_P (*src1)) | |
1644 | replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
1645 | if (STACK_REG_P (*src2)) | |
1646 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
1647 | ||
1648 | if (src1_note) | |
48227150 | 1649 | { |
a05924f9 | 1650 | rtx src1_reg = XEXP (src1_note, 0); |
48227150 | 1651 | |
a05924f9 JH |
1652 | /* If the register that dies is at the top of stack, then |
1653 | the destination is somewhere else - merely substitute it. | |
1654 | But if the reg that dies is not at top of stack, then | |
1655 | move the top of stack to the dead reg, as though we had | |
1656 | done the insn and then a store-with-pop. */ | |
48227150 | 1657 | |
a05924f9 JH |
1658 | if (REGNO (src1_reg) == regstack->reg[regstack->top]) |
1659 | { | |
1660 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1661 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
1662 | } | |
1663 | else | |
1664 | { | |
1665 | int regno = get_hard_regnum (regstack, src1_reg); | |
48227150 | 1666 | |
a05924f9 JH |
1667 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
1668 | replace_reg (dest, regno); | |
1669 | ||
1670 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
1671 | = regstack->reg[regstack->top]; | |
1672 | } | |
1673 | ||
1674 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1675 | REGNO (XEXP (src1_note, 0))); | |
1676 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1677 | regstack->top--; | |
1678 | } | |
1679 | else if (src2_note) | |
48227150 | 1680 | { |
a05924f9 JH |
1681 | rtx src2_reg = XEXP (src2_note, 0); |
1682 | if (REGNO (src2_reg) == regstack->reg[regstack->top]) | |
1683 | { | |
1684 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1685 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
1686 | } | |
1687 | else | |
1688 | { | |
1689 | int regno = get_hard_regnum (regstack, src2_reg); | |
1690 | ||
1691 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1692 | replace_reg (dest, regno); | |
1693 | ||
1694 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
1695 | = regstack->reg[regstack->top]; | |
1696 | } | |
1697 | ||
1698 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1699 | REGNO (XEXP (src2_note, 0))); | |
1700 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); | |
1701 | regstack->top--; | |
48227150 JVA |
1702 | } |
1703 | else | |
1704 | { | |
48227150 | 1705 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
a05924f9 | 1706 | replace_reg (dest, get_hard_regnum (regstack, *dest)); |
48227150 | 1707 | } |
caa6ec8d JH |
1708 | |
1709 | /* Keep operand 1 maching with destination. */ | |
1710 | if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c' | |
1711 | && REG_P (*src1) && REG_P (*src2) | |
1712 | && REGNO (*src1) != REGNO (*dest)) | |
1713 | { | |
0b9aaeee JH |
1714 | int tmp = REGNO (*src1); |
1715 | replace_reg (src1, REGNO (*src2)); | |
1716 | replace_reg (src2, tmp); | |
caa6ec8d | 1717 | } |
a05924f9 | 1718 | break; |
48227150 | 1719 | |
a05924f9 JH |
1720 | case UNSPEC: |
1721 | switch (XINT (pat_src, 1)) | |
1722 | { | |
1723 | case 1: /* sin */ | |
1724 | case 2: /* cos */ | |
1725 | /* These insns only operate on the top of the stack. */ | |
0e7d0eb9 | 1726 | |
a05924f9 | 1727 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); |
0e7d0eb9 | 1728 | |
a05924f9 | 1729 | emit_swap_insn (insn, regstack, *src1); |
0e7d0eb9 | 1730 | |
a05924f9 | 1731 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
0e7d0eb9 | 1732 | |
a05924f9 JH |
1733 | if (STACK_REG_P (*dest)) |
1734 | replace_reg (dest, FIRST_STACK_REG); | |
0e7d0eb9 | 1735 | |
a05924f9 JH |
1736 | if (src1_note) |
1737 | { | |
1738 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1739 | regstack->top--; | |
1740 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
1741 | } | |
0e7d0eb9 | 1742 | |
a05924f9 JH |
1743 | replace_reg (src1, FIRST_STACK_REG); |
1744 | break; | |
0e7d0eb9 | 1745 | |
a05924f9 JH |
1746 | case 10: |
1747 | /* (unspec [(unspec [(compare ..)] 9)] 10) | |
1748 | Unspec 9 is fnstsw; unspec 10 is sahf. The combination | |
1749 | matches the PPRO fcomi instruction. */ | |
0e7d0eb9 | 1750 | |
a05924f9 JH |
1751 | pat_src = XVECEXP (pat_src, 0, 0); |
1752 | if (GET_CODE (pat_src) != UNSPEC | |
1753 | || XINT (pat_src, 1) != 9) | |
1754 | abort (); | |
1755 | /* FALLTHRU */ | |
e075ae69 | 1756 | |
a05924f9 JH |
1757 | case 9: |
1758 | /* (unspec [(compare ..)] 9) */ | |
1759 | /* Combined fcomp+fnstsw generated for doing well with | |
1760 | CSE. When optimizing this would have been broken | |
1761 | up before now. */ | |
e075ae69 | 1762 | |
a05924f9 JH |
1763 | pat_src = XVECEXP (pat_src, 0, 0); |
1764 | if (GET_CODE (pat_src) != COMPARE) | |
1765 | abort (); | |
e075ae69 | 1766 | |
a05924f9 JH |
1767 | compare_for_stack_reg (insn, regstack, pat_src); |
1768 | break; | |
e075ae69 | 1769 | |
a05924f9 JH |
1770 | default: |
1771 | abort (); | |
1772 | } | |
e075ae69 RH |
1773 | break; |
1774 | ||
a05924f9 | 1775 | case IF_THEN_ELSE: |
dc297297 | 1776 | /* This insn requires the top of stack to be the destination. */ |
0e7d0eb9 | 1777 | |
a05924f9 JH |
1778 | /* If the comparison operator is an FP comparison operator, |
1779 | it is handled correctly by compare_for_stack_reg () who | |
1780 | will move the destination to the top of stack. But if the | |
1781 | comparison operator is not an FP comparison operator, we | |
dc297297 | 1782 | have to handle it here. */ |
a05924f9 JH |
1783 | if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG |
1784 | && REGNO (*dest) != regstack->reg[regstack->top]) | |
1785 | emit_swap_insn (insn, regstack, *dest); | |
4e97601f | 1786 | |
a05924f9 JH |
1787 | src1 = get_true_reg (&XEXP (pat_src, 1)); |
1788 | src2 = get_true_reg (&XEXP (pat_src, 2)); | |
49fa02d9 | 1789 | |
a05924f9 JH |
1790 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
1791 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
4e97601f | 1792 | |
a05924f9 JH |
1793 | { |
1794 | rtx src_note [3]; | |
1795 | int i; | |
4e97601f | 1796 | |
a05924f9 JH |
1797 | src_note[0] = 0; |
1798 | src_note[1] = src1_note; | |
1799 | src_note[2] = src2_note; | |
54552651 | 1800 | |
a05924f9 JH |
1801 | if (STACK_REG_P (*src1)) |
1802 | replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
1803 | if (STACK_REG_P (*src2)) | |
1804 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
4e97601f | 1805 | |
a05924f9 JH |
1806 | for (i = 1; i <= 2; i++) |
1807 | if (src_note [i]) | |
4e97601f | 1808 | { |
a05924f9 JH |
1809 | int regno = REGNO (XEXP (src_note[i], 0)); |
1810 | ||
1811 | /* If the register that dies is not at the top of | |
1812 | stack, then move the top of stack to the dead reg */ | |
1813 | if (regno != regstack->reg[regstack->top]) | |
1814 | { | |
1815 | remove_regno_note (insn, REG_DEAD, regno); | |
1816 | emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), | |
1817 | EMIT_AFTER); | |
1818 | } | |
1819 | else | |
1820 | { | |
1821 | CLEAR_HARD_REG_BIT (regstack->reg_set, regno); | |
1822 | replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG); | |
1823 | regstack->top--; | |
1824 | } | |
4e97601f | 1825 | } |
a05924f9 | 1826 | } |
4e97601f | 1827 | |
a05924f9 | 1828 | /* Make dest the top of stack. Add dest to regstack if |
dc297297 | 1829 | not present. */ |
a05924f9 JH |
1830 | if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) |
1831 | regstack->reg[++regstack->top] = REGNO (*dest); | |
1832 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1833 | replace_reg (dest, FIRST_STACK_REG); | |
1834 | break; | |
914ec131 | 1835 | |
a05924f9 JH |
1836 | default: |
1837 | abort (); | |
1838 | } | |
4e97601f | 1839 | break; |
48227150 | 1840 | } |
a05924f9 JH |
1841 | |
1842 | default: | |
1843 | break; | |
1844 | } | |
48227150 JVA |
1845 | } |
1846 | \f | |
114cbee6 RS |
1847 | /* Substitute hard regnums for any stack regs in INSN, which has |
1848 | N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info | |
f62a15e3 | 1849 | before the insn, and is updated with changes made here. |
114cbee6 RS |
1850 | |
1851 | There are several requirements and assumptions about the use of | |
1852 | stack-like regs in asm statements. These rules are enforced by | |
1853 | record_asm_stack_regs; see comments there for details. Any | |
1854 | asm_operands left in the RTL at this point may be assume to meet the | |
561cf7b1 | 1855 | requirements, since record_asm_stack_regs removes any problem asm. */ |
114cbee6 | 1856 | |
561cf7b1 | 1857 | static void |
f62a15e3 | 1858 | subst_asm_stack_regs (insn, regstack) |
114cbee6 RS |
1859 | rtx insn; |
1860 | stack regstack; | |
114cbee6 | 1861 | { |
114cbee6 | 1862 | rtx body = PATTERN (insn); |
f62a15e3 | 1863 | int alt; |
114cbee6 RS |
1864 | |
1865 | rtx *note_reg; /* Array of note contents */ | |
1866 | rtx **note_loc; /* Address of REG field of each note */ | |
1867 | enum reg_note *note_kind; /* The type of each note */ | |
1868 | ||
a544cfd2 KG |
1869 | rtx *clobber_reg = 0; |
1870 | rtx **clobber_loc = 0; | |
114cbee6 RS |
1871 | |
1872 | struct stack_def temp_stack; | |
1873 | int n_notes; | |
1874 | int n_clobbers; | |
1875 | rtx note; | |
1876 | int i; | |
f62a15e3 | 1877 | int n_inputs, n_outputs; |
114cbee6 | 1878 | |
a05924f9 JH |
1879 | if (! check_asm_stack_operands (insn)) |
1880 | return; | |
1881 | ||
114cbee6 RS |
1882 | /* Find out what the constraints required. If no constraint |
1883 | alternative matches, that is a compiler bug: we should have caught | |
a05924f9 | 1884 | such an insn in check_asm_stack_operands. */ |
f62a15e3 BS |
1885 | extract_insn (insn); |
1886 | constrain_operands (1); | |
1887 | alt = which_alternative; | |
1888 | ||
1889 | preprocess_constraints (); | |
114cbee6 | 1890 | |
f62a15e3 | 1891 | n_inputs = get_asm_operand_n_inputs (body); |
1ccbefce | 1892 | n_outputs = recog_data.n_operands - n_inputs; |
f62a15e3 BS |
1893 | |
1894 | if (alt < 0) | |
114cbee6 RS |
1895 | abort (); |
1896 | ||
0f41302f | 1897 | /* Strip SUBREGs here to make the following code simpler. */ |
1ccbefce RH |
1898 | for (i = 0; i < recog_data.n_operands; i++) |
1899 | if (GET_CODE (recog_data.operand[i]) == SUBREG | |
1900 | && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) | |
114cbee6 | 1901 | { |
1ccbefce RH |
1902 | recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); |
1903 | recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); | |
114cbee6 RS |
1904 | } |
1905 | ||
1906 | /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ | |
1907 | ||
1908 | for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
1909 | i++; | |
1910 | ||
1911 | note_reg = (rtx *) alloca (i * sizeof (rtx)); | |
1912 | note_loc = (rtx **) alloca (i * sizeof (rtx *)); | |
1913 | note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note)); | |
1914 | ||
1915 | n_notes = 0; | |
1916 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
1917 | { | |
1918 | rtx reg = XEXP (note, 0); | |
1919 | rtx *loc = & XEXP (note, 0); | |
1920 | ||
1921 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) | |
1922 | { | |
1923 | loc = & SUBREG_REG (reg); | |
1924 | reg = SUBREG_REG (reg); | |
1925 | } | |
1926 | ||
1927 | if (STACK_REG_P (reg) | |
1928 | && (REG_NOTE_KIND (note) == REG_DEAD | |
1929 | || REG_NOTE_KIND (note) == REG_UNUSED)) | |
1930 | { | |
1931 | note_reg[n_notes] = reg; | |
1932 | note_loc[n_notes] = loc; | |
1933 | note_kind[n_notes] = REG_NOTE_KIND (note); | |
1934 | n_notes++; | |
1935 | } | |
1936 | } | |
1937 | ||
1938 | /* Set up CLOBBER_REG and CLOBBER_LOC. */ | |
1939 | ||
1940 | n_clobbers = 0; | |
114cbee6 RS |
1941 | |
1942 | if (GET_CODE (body) == PARALLEL) | |
3f5cfed6 | 1943 | { |
2a92c071 GS |
1944 | clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx)); |
1945 | clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *)); | |
114cbee6 | 1946 | |
3f5cfed6 JVA |
1947 | for (i = 0; i < XVECLEN (body, 0); i++) |
1948 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
1949 | { | |
1950 | rtx clobber = XVECEXP (body, 0, i); | |
1951 | rtx reg = XEXP (clobber, 0); | |
1952 | rtx *loc = & XEXP (clobber, 0); | |
114cbee6 | 1953 | |
3f5cfed6 JVA |
1954 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) |
1955 | { | |
1956 | loc = & SUBREG_REG (reg); | |
1957 | reg = SUBREG_REG (reg); | |
1958 | } | |
1959 | ||
1960 | if (STACK_REG_P (reg)) | |
1961 | { | |
1962 | clobber_reg[n_clobbers] = reg; | |
1963 | clobber_loc[n_clobbers] = loc; | |
1964 | n_clobbers++; | |
1965 | } | |
1966 | } | |
1967 | } | |
114cbee6 | 1968 | |
a05924f9 | 1969 | temp_stack = *regstack; |
114cbee6 RS |
1970 | |
1971 | /* Put the input regs into the desired place in TEMP_STACK. */ | |
1972 | ||
f62a15e3 | 1973 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 1974 | if (STACK_REG_P (recog_data.operand[i]) |
f62a15e3 BS |
1975 | && reg_class_subset_p (recog_op_alt[i][alt].class, |
1976 | FLOAT_REGS) | |
1977 | && recog_op_alt[i][alt].class != FLOAT_REGS) | |
114cbee6 RS |
1978 | { |
1979 | /* If an operand needs to be in a particular reg in | |
1980 | FLOAT_REGS, the constraint was either 't' or 'u'. Since | |
1ccbefce RH |
1981 | these constraints are for single register classes, and |
1982 | reload guaranteed that operand[i] is already in that class, | |
1983 | we can just use REGNO (recog_data.operand[i]) to know which | |
1984 | actual reg this operand needs to be in. */ | |
114cbee6 | 1985 | |
1ccbefce | 1986 | int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); |
114cbee6 RS |
1987 | |
1988 | if (regno < 0) | |
1989 | abort (); | |
1990 | ||
ae0ed63a | 1991 | if ((unsigned int) regno != REGNO (recog_data.operand[i])) |
114cbee6 | 1992 | { |
1ccbefce RH |
1993 | /* recog_data.operand[i] is not in the right place. Find |
1994 | it and swap it with whatever is already in I's place. | |
1995 | K is where recog_data.operand[i] is now. J is where it | |
1996 | should be. */ | |
114cbee6 RS |
1997 | int j, k, temp; |
1998 | ||
1999 | k = temp_stack.top - (regno - FIRST_STACK_REG); | |
2000 | j = (temp_stack.top | |
1ccbefce | 2001 | - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); |
114cbee6 RS |
2002 | |
2003 | temp = temp_stack.reg[k]; | |
2004 | temp_stack.reg[k] = temp_stack.reg[j]; | |
2005 | temp_stack.reg[j] = temp; | |
2006 | } | |
2007 | } | |
2008 | ||
a05924f9 | 2009 | /* Emit insns before INSN to make sure the reg-stack is in the right |
114cbee6 RS |
2010 | order. */ |
2011 | ||
a05924f9 | 2012 | change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); |
114cbee6 RS |
2013 | |
2014 | /* Make the needed input register substitutions. Do death notes and | |
0f41302f | 2015 | clobbers too, because these are for inputs, not outputs. */ |
114cbee6 | 2016 | |
f62a15e3 | 2017 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 2018 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 | 2019 | { |
1ccbefce | 2020 | int regnum = get_hard_regnum (regstack, recog_data.operand[i]); |
114cbee6 RS |
2021 | |
2022 | if (regnum < 0) | |
2023 | abort (); | |
2024 | ||
1ccbefce | 2025 | replace_reg (recog_data.operand_loc[i], regnum); |
114cbee6 RS |
2026 | } |
2027 | ||
2028 | for (i = 0; i < n_notes; i++) | |
2029 | if (note_kind[i] == REG_DEAD) | |
2030 | { | |
2031 | int regnum = get_hard_regnum (regstack, note_reg[i]); | |
2032 | ||
2033 | if (regnum < 0) | |
2034 | abort (); | |
2035 | ||
2036 | replace_reg (note_loc[i], regnum); | |
2037 | } | |
2038 | ||
2039 | for (i = 0; i < n_clobbers; i++) | |
2040 | { | |
2041 | /* It's OK for a CLOBBER to reference a reg that is not live. | |
2042 | Don't try to replace it in that case. */ | |
2043 | int regnum = get_hard_regnum (regstack, clobber_reg[i]); | |
2044 | ||
2045 | if (regnum >= 0) | |
2046 | { | |
2047 | /* Sigh - clobbers always have QImode. But replace_reg knows | |
2048 | that these regs can't be MODE_INT and will abort. Just put | |
2049 | the right reg there without calling replace_reg. */ | |
2050 | ||
99a59310 | 2051 | *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); |
114cbee6 RS |
2052 | } |
2053 | } | |
2054 | ||
0f41302f | 2055 | /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ |
114cbee6 | 2056 | |
f62a15e3 | 2057 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 2058 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 RS |
2059 | { |
2060 | /* An input reg is implicitly popped if it is tied to an | |
0f41302f | 2061 | output, or if there is a CLOBBER for it. */ |
114cbee6 RS |
2062 | int j; |
2063 | ||
2064 | for (j = 0; j < n_clobbers; j++) | |
1ccbefce | 2065 | if (operands_match_p (clobber_reg[j], recog_data.operand[i])) |
114cbee6 RS |
2066 | break; |
2067 | ||
f62a15e3 | 2068 | if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) |
114cbee6 | 2069 | { |
1ccbefce RH |
2070 | /* recog_data.operand[i] might not be at the top of stack. |
2071 | But that's OK, because all we need to do is pop the | |
2072 | right number of regs off of the top of the reg-stack. | |
2073 | record_asm_stack_regs guaranteed that all implicitly | |
2074 | popped regs were grouped at the top of the reg-stack. */ | |
114cbee6 RS |
2075 | |
2076 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
2077 | regstack->reg[regstack->top]); | |
2078 | regstack->top--; | |
2079 | } | |
2080 | } | |
2081 | ||
2082 | /* Now add to REGSTACK any outputs that the asm implicitly pushed. | |
2083 | Note that there isn't any need to substitute register numbers. | |
0f41302f | 2084 | ??? Explain why this is true. */ |
114cbee6 RS |
2085 | |
2086 | for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) | |
2087 | { | |
2088 | /* See if there is an output for this hard reg. */ | |
2089 | int j; | |
2090 | ||
2091 | for (j = 0; j < n_outputs; j++) | |
1ccbefce | 2092 | if (STACK_REG_P (recog_data.operand[j]) |
ae0ed63a | 2093 | && REGNO (recog_data.operand[j]) == (unsigned) i) |
114cbee6 RS |
2094 | { |
2095 | regstack->reg[++regstack->top] = i; | |
2096 | SET_HARD_REG_BIT (regstack->reg_set, i); | |
2097 | break; | |
2098 | } | |
2099 | } | |
2100 | ||
2101 | /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD | |
2102 | input that the asm didn't implicitly pop. If the asm didn't | |
3f5cfed6 | 2103 | implicitly pop an input reg, that reg will still be live. |
114cbee6 RS |
2104 | |
2105 | Note that we can't use find_regno_note here: the register numbers | |
2106 | in the death notes have already been substituted. */ | |
2107 | ||
3f5cfed6 | 2108 | for (i = 0; i < n_outputs; i++) |
1ccbefce | 2109 | if (STACK_REG_P (recog_data.operand[i])) |
3f5cfed6 JVA |
2110 | { |
2111 | int j; | |
2112 | ||
2113 | for (j = 0; j < n_notes; j++) | |
1ccbefce | 2114 | if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) |
3f5cfed6 JVA |
2115 | && note_kind[j] == REG_UNUSED) |
2116 | { | |
1ccbefce | 2117 | insn = emit_pop_insn (insn, regstack, recog_data.operand[i], |
a05924f9 | 2118 | EMIT_AFTER); |
3f5cfed6 JVA |
2119 | break; |
2120 | } | |
2121 | } | |
2122 | ||
f62a15e3 | 2123 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 2124 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 RS |
2125 | { |
2126 | int j; | |
2127 | ||
2128 | for (j = 0; j < n_notes; j++) | |
1ccbefce | 2129 | if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) |
3f5cfed6 | 2130 | && note_kind[j] == REG_DEAD |
f62a15e3 | 2131 | && TEST_HARD_REG_BIT (regstack->reg_set, |
1ccbefce | 2132 | REGNO (recog_data.operand[i]))) |
114cbee6 | 2133 | { |
1ccbefce | 2134 | insn = emit_pop_insn (insn, regstack, recog_data.operand[i], |
a05924f9 | 2135 | EMIT_AFTER); |
114cbee6 RS |
2136 | break; |
2137 | } | |
2138 | } | |
2139 | } | |
2140 | \f | |
48227150 JVA |
2141 | /* Substitute stack hard reg numbers for stack virtual registers in |
2142 | INSN. Non-stack register numbers are not changed. REGSTACK is the | |
2143 | current stack content. Insns may be emitted as needed to arrange the | |
561cf7b1 | 2144 | stack for the 387 based on the contents of the insn. */ |
f37eb5cb | 2145 | |
561cf7b1 | 2146 | static void |
48227150 JVA |
2147 | subst_stack_regs (insn, regstack) |
2148 | rtx insn; | |
2149 | stack regstack; | |
2150 | { | |
2151 | register rtx *note_link, note; | |
2152 | register int i; | |
2153 | ||
99a59310 | 2154 | if (GET_CODE (insn) == CALL_INSN) |
e075ae69 RH |
2155 | { |
2156 | int top = regstack->top; | |
48227150 | 2157 | |
e075ae69 RH |
2158 | /* If there are any floating point parameters to be passed in |
2159 | registers for this call, make sure they are in the right | |
2160 | order. */ | |
48227150 | 2161 | |
e075ae69 RH |
2162 | if (top >= 0) |
2163 | { | |
2164 | straighten_stack (PREV_INSN (insn), regstack); | |
99a59310 | 2165 | |
e075ae69 | 2166 | /* Now mark the arguments as dead after the call. */ |
99a59310 | 2167 | |
e075ae69 RH |
2168 | while (regstack->top >= 0) |
2169 | { | |
2170 | CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); | |
2171 | regstack->top--; | |
2172 | } | |
2173 | } | |
2174 | } | |
48227150 JVA |
2175 | |
2176 | /* Do the actual substitution if any stack regs are mentioned. | |
2177 | Since we only record whether entire insn mentions stack regs, and | |
2178 | subst_stack_regs_pat only works for patterns that contain stack regs, | |
2179 | we must check each pattern in a parallel here. A call_value_pop could | |
0f41302f | 2180 | fail otherwise. */ |
48227150 | 2181 | |
21b2cd73 | 2182 | if (stack_regs_mentioned (insn)) |
48227150 | 2183 | { |
f62a15e3 | 2184 | int n_operands = asm_noperands (PATTERN (insn)); |
114cbee6 RS |
2185 | if (n_operands >= 0) |
2186 | { | |
2187 | /* This insn is an `asm' with operands. Decode the operands, | |
2188 | decide how many are inputs, and do register substitution. | |
0f41302f | 2189 | Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ |
114cbee6 | 2190 | |
f62a15e3 | 2191 | subst_asm_stack_regs (insn, regstack); |
561cf7b1 | 2192 | return; |
114cbee6 RS |
2193 | } |
2194 | ||
48227150 | 2195 | if (GET_CODE (PATTERN (insn)) == PARALLEL) |
c166a311 | 2196 | for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) |
48227150 JVA |
2197 | { |
2198 | if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) | |
e075ae69 RH |
2199 | subst_stack_regs_pat (insn, regstack, |
2200 | XVECEXP (PATTERN (insn), 0, i)); | |
48227150 JVA |
2201 | } |
2202 | else | |
2203 | subst_stack_regs_pat (insn, regstack, PATTERN (insn)); | |
2204 | } | |
2205 | ||
2206 | /* subst_stack_regs_pat may have deleted a no-op insn. If so, any | |
0f41302f | 2207 | REG_UNUSED will already have been dealt with, so just return. */ |
48227150 | 2208 | |
2289ec9d | 2209 | if (GET_CODE (insn) == NOTE) |
561cf7b1 | 2210 | return; |
48227150 JVA |
2211 | |
2212 | /* If there is a REG_UNUSED note on a stack register on this insn, | |
2213 | the indicated reg must be popped. The REG_UNUSED note is removed, | |
2214 | since the form of the newly emitted pop insn references the reg, | |
0f41302f | 2215 | making it no longer `unset'. */ |
48227150 JVA |
2216 | |
2217 | note_link = ®_NOTES(insn); | |
2218 | for (note = *note_link; note; note = XEXP (note, 1)) | |
2219 | if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) | |
2220 | { | |
2221 | *note_link = XEXP (note, 1); | |
a05924f9 | 2222 | insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); |
48227150 JVA |
2223 | } |
2224 | else | |
2225 | note_link = &XEXP (note, 1); | |
2226 | } | |
2227 | \f | |
2228 | /* Change the organization of the stack so that it fits a new basic | |
2229 | block. Some registers might have to be popped, but there can never be | |
2230 | a register live in the new block that is not now live. | |
2231 | ||
a05924f9 JH |
2232 | Insert any needed insns before or after INSN, as indicated by |
2233 | WHERE. OLD is the original stack layout, and NEW is the desired | |
2234 | form. OLD is updated to reflect the code emitted, ie, it will be | |
2235 | the same as NEW upon return. | |
48227150 JVA |
2236 | |
2237 | This function will not preserve block_end[]. But that information | |
0f41302f | 2238 | is no longer needed once this has executed. */ |
48227150 JVA |
2239 | |
2240 | static void | |
a05924f9 | 2241 | change_stack (insn, old, new, where) |
48227150 JVA |
2242 | rtx insn; |
2243 | stack old; | |
2244 | stack new; | |
a05924f9 | 2245 | enum emit_where where; |
48227150 JVA |
2246 | { |
2247 | int reg; | |
a05924f9 | 2248 | int update_end = 0; |
48227150 | 2249 | |
a05924f9 JH |
2250 | /* We will be inserting new insns "backwards". If we are to insert |
2251 | after INSN, find the next insn, and insert before it. */ | |
48227150 | 2252 | |
a05924f9 JH |
2253 | if (where == EMIT_AFTER) |
2254 | { | |
2255 | if (current_block && current_block->end == insn) | |
2256 | update_end = 1; | |
2257 | insn = NEXT_INSN (insn); | |
2258 | } | |
48227150 | 2259 | |
0f41302f | 2260 | /* Pop any registers that are not needed in the new block. */ |
48227150 JVA |
2261 | |
2262 | for (reg = old->top; reg >= 0; reg--) | |
2263 | if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) | |
99a59310 | 2264 | emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode), |
a05924f9 | 2265 | EMIT_BEFORE); |
48227150 JVA |
2266 | |
2267 | if (new->top == -2) | |
2268 | { | |
2269 | /* If the new block has never been processed, then it can inherit | |
0f41302f | 2270 | the old stack order. */ |
48227150 JVA |
2271 | |
2272 | new->top = old->top; | |
a05924f9 | 2273 | memcpy (new->reg, old->reg, sizeof (new->reg)); |
48227150 JVA |
2274 | } |
2275 | else | |
2276 | { | |
2277 | /* This block has been entered before, and we must match the | |
0f41302f | 2278 | previously selected stack order. */ |
48227150 JVA |
2279 | |
2280 | /* By now, the only difference should be the order of the stack, | |
0f41302f | 2281 | not their depth or liveliness. */ |
48227150 JVA |
2282 | |
2283 | GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); | |
48227150 | 2284 | abort (); |
48227150 | 2285 | win: |
48227150 JVA |
2286 | if (old->top != new->top) |
2287 | abort (); | |
2288 | ||
80832cf2 HB |
2289 | /* If the stack is not empty (new->top != -1), loop here emitting |
2290 | swaps until the stack is correct. | |
2291 | ||
2292 | The worst case number of swaps emitted is N + 2, where N is the | |
48227150 JVA |
2293 | depth of the stack. In some cases, the reg at the top of |
2294 | stack may be correct, but swapped anyway in order to fix | |
2295 | other regs. But since we never swap any other reg away from | |
0f41302f | 2296 | its correct slot, this algorithm will converge. */ |
48227150 | 2297 | |
80832cf2 HB |
2298 | if (new->top != -1) |
2299 | do | |
2300 | { | |
2301 | /* Swap the reg at top of stack into the position it is | |
2302 | supposed to be in, until the correct top of stack appears. */ | |
48227150 | 2303 | |
80832cf2 HB |
2304 | while (old->reg[old->top] != new->reg[new->top]) |
2305 | { | |
2306 | for (reg = new->top; reg >= 0; reg--) | |
2307 | if (new->reg[reg] == old->reg[old->top]) | |
2308 | break; | |
48227150 | 2309 | |
80832cf2 HB |
2310 | if (reg == -1) |
2311 | abort (); | |
48227150 | 2312 | |
80832cf2 HB |
2313 | emit_swap_insn (insn, old, |
2314 | FP_MODE_REG (old->reg[reg], DFmode)); | |
2315 | } | |
48227150 | 2316 | |
80832cf2 | 2317 | /* See if any regs remain incorrect. If so, bring an |
48227150 | 2318 | incorrect reg to the top of stack, and let the while loop |
0f41302f | 2319 | above fix it. */ |
48227150 | 2320 | |
80832cf2 HB |
2321 | for (reg = new->top; reg >= 0; reg--) |
2322 | if (new->reg[reg] != old->reg[reg]) | |
2323 | { | |
2324 | emit_swap_insn (insn, old, | |
2325 | FP_MODE_REG (old->reg[reg], DFmode)); | |
2326 | break; | |
2327 | } | |
2328 | } while (reg >= 0); | |
48227150 | 2329 | |
0f41302f | 2330 | /* At this point there must be no differences. */ |
48227150 JVA |
2331 | |
2332 | for (reg = old->top; reg >= 0; reg--) | |
2333 | if (old->reg[reg] != new->reg[reg]) | |
2334 | abort (); | |
2335 | } | |
a05924f9 JH |
2336 | |
2337 | if (update_end) | |
2338 | current_block->end = PREV_INSN (insn); | |
48227150 JVA |
2339 | } |
2340 | \f | |
a05924f9 | 2341 | /* Print stack configuration. */ |
48227150 JVA |
2342 | |
2343 | static void | |
a05924f9 JH |
2344 | print_stack (file, s) |
2345 | FILE *file; | |
2346 | stack s; | |
48227150 | 2347 | { |
a05924f9 JH |
2348 | if (! file) |
2349 | return; | |
48227150 | 2350 | |
a05924f9 JH |
2351 | if (s->top == -2) |
2352 | fprintf (file, "uninitialized\n"); | |
2353 | else if (s->top == -1) | |
2354 | fprintf (file, "empty\n"); | |
2355 | else | |
e075ae69 | 2356 | { |
a05924f9 JH |
2357 | int i; |
2358 | fputs ("[ ", file); | |
2359 | for (i = 0; i <= s->top; ++i) | |
2360 | fprintf (file, "%d ", s->reg[i]); | |
2361 | fputs ("]\n", file); | |
e075ae69 | 2362 | } |
a05924f9 JH |
2363 | } |
2364 | \f | |
2365 | /* This function was doing life analysis. We now let the regular live | |
2366 | code do it's job, so we only need to check some extra invariants | |
2367 | that reg-stack expects. Primary among these being that all registers | |
2368 | are initialized before use. | |
48227150 | 2369 | |
a05924f9 JH |
2370 | The function returns true when code was emitted to CFG edges and |
2371 | commit_edge_insertions needs to be called. */ | |
48227150 | 2372 | |
a05924f9 JH |
2373 | static int |
2374 | convert_regs_entry () | |
2375 | { | |
2376 | int inserted = 0, i; | |
2377 | edge e; | |
48227150 | 2378 | |
a05924f9 | 2379 | for (i = n_basic_blocks - 1; i >= 0; --i) |
48227150 | 2380 | { |
a05924f9 JH |
2381 | basic_block block = BASIC_BLOCK (i); |
2382 | block_info bi = BLOCK_INFO (block); | |
2383 | int reg; | |
2384 | ||
2385 | /* Set current register status at last instruction `uninitialized'. */ | |
2386 | bi->stack_in.top = -2; | |
2387 | ||
2388 | /* Copy live_at_end and live_at_start into temporaries. */ | |
2389 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) | |
48227150 | 2390 | { |
a05924f9 JH |
2391 | if (REGNO_REG_SET_P (block->global_live_at_end, reg)) |
2392 | SET_HARD_REG_BIT (bi->out_reg_set, reg); | |
2393 | if (REGNO_REG_SET_P (block->global_live_at_start, reg)) | |
2394 | SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); | |
48227150 JVA |
2395 | } |
2396 | } | |
48227150 | 2397 | |
a05924f9 JH |
2398 | /* Load something into each stack register live at function entry. |
2399 | Such live registers can be caused by uninitialized variables or | |
2400 | functions not returning values on all paths. In order to keep | |
2401 | the push/pop code happy, and to not scrog the register stack, we | |
2402 | must put something in these registers. Use a QNaN. | |
48227150 | 2403 | |
a05924f9 JH |
2404 | Note that we are insertting converted code here. This code is |
2405 | never seen by the convert_regs pass. */ | |
48227150 | 2406 | |
a05924f9 JH |
2407 | for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) |
2408 | { | |
2409 | basic_block block = e->dest; | |
2410 | block_info bi = BLOCK_INFO (block); | |
2411 | int reg, top = -1; | |
48227150 | 2412 | |
a05924f9 JH |
2413 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) |
2414 | if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) | |
2415 | { | |
2416 | rtx init; | |
48227150 | 2417 | |
a05924f9 | 2418 | bi->stack_in.reg[++top] = reg; |
48227150 | 2419 | |
a05924f9 JH |
2420 | init = gen_rtx_SET (VOIDmode, |
2421 | FP_MODE_REG (FIRST_STACK_REG, SFmode), | |
2422 | nan); | |
2423 | insert_insn_on_edge (init, e); | |
2424 | inserted = 1; | |
2425 | } | |
48227150 | 2426 | |
a05924f9 JH |
2427 | bi->stack_in.top = top; |
2428 | } | |
48227150 | 2429 | |
a05924f9 JH |
2430 | return inserted; |
2431 | } | |
48227150 | 2432 | |
a05924f9 JH |
2433 | /* Construct the desired stack for function exit. This will either |
2434 | be `empty', or the function return value at top-of-stack. */ | |
48227150 | 2435 | |
a05924f9 JH |
2436 | static void |
2437 | convert_regs_exit () | |
2438 | { | |
2439 | int value_reg_low, value_reg_high; | |
2440 | stack output_stack; | |
2441 | rtx retvalue; | |
48227150 | 2442 | |
a05924f9 JH |
2443 | retvalue = stack_result (current_function_decl); |
2444 | value_reg_low = value_reg_high = -1; | |
2445 | if (retvalue) | |
2446 | { | |
2447 | value_reg_low = REGNO (retvalue); | |
2448 | value_reg_high = value_reg_low | |
2449 | + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1; | |
2450 | } | |
48227150 | 2451 | |
a05924f9 JH |
2452 | output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; |
2453 | if (value_reg_low == -1) | |
2454 | output_stack->top = -1; | |
2455 | else | |
2456 | { | |
2457 | int reg; | |
48227150 | 2458 | |
a05924f9 JH |
2459 | output_stack->top = value_reg_high - value_reg_low; |
2460 | for (reg = value_reg_low; reg <= value_reg_high; ++reg) | |
2461 | { | |
2462 | output_stack->reg[reg - value_reg_low] = reg; | |
2463 | SET_HARD_REG_BIT (output_stack->reg_set, reg); | |
2464 | } | |
2465 | } | |
48227150 | 2466 | } |
48227150 | 2467 | |
0ecf09f9 JH |
2468 | /* Adjust the stack of this block on exit to match the stack of the |
2469 | target block, or copy stack info into the stack of the successor | |
2470 | of the successor hasn't been processed yet. */ | |
2471 | static bool | |
2472 | compensate_edge (e, file) | |
2473 | edge e; | |
2474 | FILE *file; | |
2475 | { | |
2476 | basic_block block = e->src, target = e->dest; | |
2477 | block_info bi = BLOCK_INFO (block); | |
2478 | struct stack_def regstack, tmpstack; | |
2479 | stack target_stack = &BLOCK_INFO (target)->stack_in; | |
2480 | int reg; | |
2481 | ||
2482 | current_block = block; | |
2483 | regstack = bi->stack_out; | |
2484 | if (file) | |
2485 | fprintf (file, "Edge %d->%d: ", block->index, target->index); | |
2486 | ||
2487 | if (target_stack->top == -2) | |
2488 | { | |
2489 | /* The target block hasn't had a stack order selected. | |
2490 | We need merely ensure that no pops are needed. */ | |
2491 | for (reg = regstack.top; reg >= 0; --reg) | |
2492 | if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg])) | |
2493 | break; | |
2494 | ||
2495 | if (reg == -1) | |
2496 | { | |
2497 | if (file) | |
2498 | fprintf (file, "new block; copying stack position\n"); | |
2499 | ||
2500 | /* change_stack kills values in regstack. */ | |
2501 | tmpstack = regstack; | |
2502 | ||
2503 | change_stack (block->end, &tmpstack, target_stack, EMIT_AFTER); | |
2504 | return false; | |
2505 | } | |
2506 | ||
2507 | if (file) | |
2508 | fprintf (file, "new block; pops needed\n"); | |
2509 | } | |
2510 | else | |
2511 | { | |
2512 | if (target_stack->top == regstack.top) | |
2513 | { | |
2514 | for (reg = target_stack->top; reg >= 0; --reg) | |
2515 | if (target_stack->reg[reg] != regstack.reg[reg]) | |
2516 | break; | |
2517 | ||
2518 | if (reg == -1) | |
2519 | { | |
2520 | if (file) | |
2521 | fprintf (file, "no changes needed\n"); | |
2522 | return false; | |
2523 | } | |
2524 | } | |
2525 | ||
2526 | if (file) | |
2527 | { | |
2528 | fprintf (file, "correcting stack to "); | |
2529 | print_stack (file, target_stack); | |
2530 | } | |
2531 | } | |
2532 | ||
2533 | /* Care for non-call EH edges specially. The normal return path have | |
2534 | values in registers. These will be popped en masse by the unwind | |
2535 | library. */ | |
2536 | if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH) | |
2537 | target_stack->top = -1; | |
2538 | ||
2539 | /* Other calls may appear to have values live in st(0), but the | |
2540 | abnormal return path will not have actually loaded the values. */ | |
2541 | else if (e->flags & EDGE_ABNORMAL_CALL) | |
2542 | { | |
2543 | /* Assert that the lifetimes are as we expect -- one value | |
2544 | live at st(0) on the end of the source block, and no | |
2545 | values live at the beginning of the destination block. */ | |
2546 | HARD_REG_SET tmp; | |
2547 | ||
2548 | CLEAR_HARD_REG_SET (tmp); | |
2549 | GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1); | |
2550 | abort (); | |
2551 | eh1: | |
2552 | ||
2553 | SET_HARD_REG_BIT (tmp, FIRST_STACK_REG); | |
2554 | GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2); | |
2555 | abort (); | |
2556 | eh2: | |
2557 | ||
2558 | target_stack->top = -1; | |
2559 | } | |
2560 | ||
2561 | /* It is better to output directly to the end of the block | |
2562 | instead of to the edge, because emit_swap can do minimal | |
2563 | insn scheduling. We can do this when there is only one | |
2564 | edge out, and it is not abnormal. */ | |
2565 | else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL)) | |
2566 | { | |
2567 | /* change_stack kills values in regstack. */ | |
2568 | tmpstack = regstack; | |
2569 | ||
2570 | change_stack (block->end, &tmpstack, target_stack, | |
2571 | (GET_CODE (block->end) == JUMP_INSN | |
2572 | ? EMIT_BEFORE : EMIT_AFTER)); | |
2573 | } | |
2574 | else | |
2575 | { | |
2576 | rtx seq, after; | |
2577 | ||
2578 | /* We don't support abnormal edges. Global takes care to | |
2579 | avoid any live register across them, so we should never | |
2580 | have to insert instructions on such edges. */ | |
2581 | if (e->flags & EDGE_ABNORMAL) | |
2582 | abort (); | |
2583 | ||
2584 | current_block = NULL; | |
2585 | start_sequence (); | |
2586 | ||
2587 | /* ??? change_stack needs some point to emit insns after. | |
2588 | Also needed to keep gen_sequence from returning a | |
2589 | pattern as opposed to a sequence, which would lose | |
2590 | REG_DEAD notes. */ | |
2591 | after = emit_note (NULL, NOTE_INSN_DELETED); | |
2592 | ||
2593 | tmpstack = regstack; | |
2594 | change_stack (after, &tmpstack, target_stack, EMIT_BEFORE); | |
2595 | ||
2596 | seq = gen_sequence (); | |
2597 | end_sequence (); | |
2598 | ||
2599 | insert_insn_on_edge (seq, e); | |
2600 | return true; | |
2601 | } | |
2602 | return false; | |
2603 | } | |
2604 | ||
a05924f9 JH |
2605 | /* Convert stack register references in one block. */ |
2606 | ||
2607 | static int | |
2608 | convert_regs_1 (file, block) | |
2609 | FILE *file; | |
2610 | basic_block block; | |
48227150 | 2611 | { |
0ecf09f9 | 2612 | struct stack_def regstack; |
a05924f9 JH |
2613 | block_info bi = BLOCK_INFO (block); |
2614 | int inserted, reg; | |
2615 | rtx insn, next; | |
0ecf09f9 | 2616 | edge e, beste = NULL; |
48227150 | 2617 | |
0ecf09f9 JH |
2618 | inserted = 0; |
2619 | ||
2620 | /* Find the edge we will copy stack from. It should be the most frequent | |
2621 | one as it will get cheapest after compensation code is generated, | |
2622 | if multiple such exists, take one with largest count, preffer critical | |
2623 | one (as splitting critical edges is more expensive), or one with lowest | |
2624 | index, to avoid random changes with different orders of the edges. */ | |
2625 | for (e = block->pred; e ; e = e->pred_next) | |
2626 | { | |
2627 | if (e->flags & EDGE_DFS_BACK) | |
2628 | ; | |
2629 | else if (! beste) | |
2630 | beste = e; | |
2631 | else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e)) | |
2632 | beste = e; | |
3e42ccd2 JH |
2633 | else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e)) |
2634 | ; | |
0ecf09f9 JH |
2635 | else if (beste->count < e->count) |
2636 | beste = e; | |
2637 | else if (beste->count > e->count) | |
2638 | ; | |
2639 | else if ((e->flags & EDGE_CRITICAL) != (beste->flags & EDGE_CRITICAL)) | |
2640 | { | |
2641 | if (e->flags & EDGE_CRITICAL) | |
2642 | beste = e; | |
2643 | } | |
2644 | else if (e->src->index < beste->src->index) | |
2645 | beste = e; | |
2646 | } | |
2647 | ||
2648 | /* Entry block does have stack already initialized. */ | |
2649 | if (bi->stack_in.top == -2) | |
2650 | inserted |= compensate_edge (beste, file); | |
2651 | else | |
2652 | beste = NULL; | |
a05924f9 | 2653 | |
0ecf09f9 JH |
2654 | current_block = block; |
2655 | ||
a05924f9 | 2656 | if (file) |
48227150 | 2657 | { |
a05924f9 JH |
2658 | fprintf (file, "\nBasic block %d\nInput stack: ", block->index); |
2659 | print_stack (file, &bi->stack_in); | |
2660 | } | |
48227150 | 2661 | |
a05924f9 JH |
2662 | /* Process all insns in this block. Keep track of NEXT so that we |
2663 | don't process insns emitted while substituting in INSN. */ | |
2664 | next = block->head; | |
2665 | regstack = bi->stack_in; | |
2666 | do | |
2667 | { | |
2668 | insn = next; | |
2669 | next = NEXT_INSN (insn); | |
48227150 | 2670 | |
a05924f9 JH |
2671 | /* Ensure we have not missed a block boundary. */ |
2672 | if (next == NULL) | |
2673 | abort (); | |
2674 | if (insn == block->end) | |
2675 | next = NULL; | |
2676 | ||
2677 | /* Don't bother processing unless there is a stack reg | |
2678 | mentioned or if it's a CALL_INSN. */ | |
2679 | if (stack_regs_mentioned (insn) | |
2680 | || GET_CODE (insn) == CALL_INSN) | |
2681 | { | |
2682 | if (file) | |
2683 | { | |
2684 | fprintf (file, " insn %d input stack: ", | |
2685 | INSN_UID (insn)); | |
2686 | print_stack (file, ®stack); | |
2687 | } | |
2688 | subst_stack_regs (insn, ®stack); | |
48227150 | 2689 | } |
a05924f9 JH |
2690 | } |
2691 | while (next); | |
48227150 | 2692 | |
a05924f9 JH |
2693 | if (file) |
2694 | { | |
2695 | fprintf (file, "Expected live registers ["); | |
2696 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) | |
2697 | if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) | |
2698 | fprintf (file, " %d", reg); | |
2699 | fprintf (file, " ]\nOutput stack: "); | |
2700 | print_stack (file, ®stack); | |
2701 | } | |
48227150 | 2702 | |
a05924f9 JH |
2703 | insn = block->end; |
2704 | if (GET_CODE (insn) == JUMP_INSN) | |
2705 | insn = PREV_INSN (insn); | |
2706 | ||
2707 | /* If the function is declared to return a value, but it returns one | |
2708 | in only some cases, some registers might come live here. Emit | |
2709 | necessary moves for them. */ | |
2710 | ||
2711 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) | |
2712 | { | |
2713 | if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) | |
2714 | && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) | |
48227150 | 2715 | { |
a05924f9 | 2716 | rtx set; |
48227150 | 2717 | |
a05924f9 JH |
2718 | if (file) |
2719 | { | |
2720 | fprintf (file, "Emitting insn initializing reg %d\n", | |
2721 | reg); | |
2722 | } | |
48227150 | 2723 | |
a05924f9 JH |
2724 | set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), |
2725 | nan); | |
2726 | insn = emit_block_insn_after (set, insn, block); | |
2727 | subst_stack_regs (insn, ®stack); | |
2728 | } | |
2729 | } | |
48227150 | 2730 | |
a05924f9 JH |
2731 | /* Something failed if the stack lives don't match. */ |
2732 | GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win); | |
2733 | abort (); | |
2734 | win: | |
0ecf09f9 | 2735 | bi->stack_out = regstack; |
48227150 | 2736 | |
0ecf09f9 | 2737 | /* Compensate the back edges, as those wasn't visited yet. */ |
a05924f9 JH |
2738 | for (e = block->succ; e ; e = e->succ_next) |
2739 | { | |
0ecf09f9 JH |
2740 | if (e->flags & EDGE_DFS_BACK |
2741 | || (e->dest == EXIT_BLOCK_PTR)) | |
a05924f9 | 2742 | { |
0ecf09f9 JH |
2743 | if (!BLOCK_INFO (e->dest)->done |
2744 | && e->dest != block) | |
2745 | abort (); | |
2746 | inserted |= compensate_edge (e, file); | |
e075ae69 | 2747 | } |
0ecf09f9 JH |
2748 | } |
2749 | for (e = block->pred; e ; e = e->pred_next) | |
2750 | { | |
2751 | if (e != beste && !(e->flags & EDGE_DFS_BACK) | |
2752 | && e->src != ENTRY_BLOCK_PTR) | |
a05924f9 | 2753 | { |
0ecf09f9 | 2754 | if (!BLOCK_INFO (e->src)->done) |
a05924f9 | 2755 | abort (); |
0ecf09f9 | 2756 | inserted |= compensate_edge (e, file); |
a05924f9 | 2757 | } |
e075ae69 | 2758 | } |
a05924f9 JH |
2759 | |
2760 | return inserted; | |
48227150 | 2761 | } |
48227150 | 2762 | |
a05924f9 JH |
2763 | /* Convert registers in all blocks reachable from BLOCK. */ |
2764 | ||
2765 | static int | |
2766 | convert_regs_2 (file, block) | |
48227150 | 2767 | FILE *file; |
a05924f9 | 2768 | basic_block block; |
48227150 | 2769 | { |
a05924f9 JH |
2770 | basic_block *stack, *sp; |
2771 | int inserted; | |
48227150 | 2772 | |
ff154f78 | 2773 | stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks); |
a05924f9 | 2774 | sp = stack; |
48227150 | 2775 | |
a05924f9 | 2776 | *sp++ = block; |
48227150 | 2777 | |
a05924f9 JH |
2778 | inserted = 0; |
2779 | do | |
2780 | { | |
2781 | edge e; | |
48227150 | 2782 | |
a05924f9 JH |
2783 | block = *--sp; |
2784 | inserted |= convert_regs_1 (file, block); | |
0ecf09f9 | 2785 | BLOCK_INFO (block)->done = 1; |
48227150 | 2786 | |
a05924f9 | 2787 | for (e = block->succ; e ; e = e->succ_next) |
0ecf09f9 | 2788 | if (! (e->flags & EDGE_DFS_BACK)) |
a05924f9 | 2789 | { |
0ecf09f9 JH |
2790 | BLOCK_INFO (e->dest)->predecesors--; |
2791 | if (!BLOCK_INFO (e->dest)->predecesors) | |
2792 | *sp++ = e->dest; | |
a05924f9 | 2793 | } |
48227150 | 2794 | } |
a05924f9 JH |
2795 | while (sp != stack); |
2796 | ||
2797 | return inserted; | |
48227150 | 2798 | } |
841fc5a1 | 2799 | |
a05924f9 JH |
2800 | /* Traverse all basic blocks in a function, converting the register |
2801 | references in each insn from the "flat" register file that gcc uses, | |
2802 | to the stack-like registers the 387 uses. */ | |
2803 | ||
2804 | static int | |
2805 | convert_regs (file) | |
48227150 JVA |
2806 | FILE *file; |
2807 | { | |
a05924f9 JH |
2808 | int inserted, i; |
2809 | edge e; | |
48227150 | 2810 | |
a05924f9 JH |
2811 | /* Initialize uninitialized registers on function entry. */ |
2812 | inserted = convert_regs_entry (); | |
48227150 | 2813 | |
a05924f9 JH |
2814 | /* Construct the desired stack for function exit. */ |
2815 | convert_regs_exit (); | |
2816 | BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; | |
48227150 | 2817 | |
a05924f9 JH |
2818 | /* ??? Future: process inner loops first, and give them arbitrary |
2819 | initial stacks which emit_swap_insn can modify. This ought to | |
2820 | prevent double fxch that aften appears at the head of a loop. */ | |
48227150 | 2821 | |
a05924f9 JH |
2822 | /* Process all blocks reachable from all entry points. */ |
2823 | for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) | |
2824 | inserted |= convert_regs_2 (file, e->dest); | |
2825 | ||
2826 | /* ??? Process all unreachable blocks. Though there's no excuse | |
2827 | for keeping these even when not optimizing. */ | |
2828 | for (i = 0; i < n_basic_blocks; ++i) | |
2829 | { | |
2830 | basic_block b = BASIC_BLOCK (i); | |
2831 | block_info bi = BLOCK_INFO (b); | |
48227150 | 2832 | |
a05924f9 | 2833 | if (! bi->done) |
48227150 | 2834 | { |
a05924f9 | 2835 | int reg; |
48227150 | 2836 | |
a05924f9 JH |
2837 | /* Create an arbitrary input stack. */ |
2838 | bi->stack_in.top = -1; | |
2839 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) | |
2840 | if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) | |
2841 | bi->stack_in.reg[++bi->stack_in.top] = reg; | |
48227150 | 2842 | |
a05924f9 JH |
2843 | inserted |= convert_regs_2 (file, b); |
2844 | } | |
2845 | } | |
48227150 | 2846 | |
a05924f9 JH |
2847 | if (inserted) |
2848 | commit_edge_insertions (); | |
48227150 | 2849 | |
a05924f9 JH |
2850 | if (file) |
2851 | fputc ('\n', file); | |
48227150 | 2852 | |
a05924f9 | 2853 | return inserted; |
48227150 | 2854 | } |
48227150 | 2855 | #endif /* STACK_REGS */ |