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c++: namespace-scoped friend in local class [PR69410]
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fac41238 1/* Copy propagation on hard registers for the GNU compiler.
aeee4812 2 Copyright (C) 2000-2023 Free Software Foundation, Inc.
fac41238
PB
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20#include "config.h"
21#include "system.h"
22#include "coretypes.h"
c7131fb2 23#include "backend.h"
fac41238 24#include "rtl.h"
c7131fb2 25#include "df.h"
4d0cdd0c 26#include "memmodel.h"
fac41238
PB
27#include "tm_p.h"
28#include "insn-config.h"
29#include "regs.h"
957060b5
AM
30#include "emit-rtl.h"
31#include "recog.h"
32#include "diagnostic-core.h"
fac41238 33#include "addresses.h"
fac41238 34#include "tree-pass.h"
4ca738b3 35#include "rtl-iter.h"
c049b107 36#include "cfgrtl.h"
80ec73f4 37#include "target.h"
5a5a3bc5 38#include "function-abi.h"
fac41238
PB
39
40/* The following code does forward propagation of hard register copies.
41 The object is to eliminate as many dependencies as possible, so that
42 we have the most scheduling freedom. As a side effect, we also clean
43 up some silly register allocation decisions made by reload. This
44 code may be obsoleted by a new register allocator. */
45
e7140c8d
JJ
46/* DEBUG_INSNs aren't changed right away, as doing so might extend the
47 lifetime of a register and get the DEBUG_INSN subsequently reset.
48 So they are queued instead, and updated only when the register is
49 used in some subsequent real insn before it is set. */
50struct queued_debug_insn_change
51{
52 struct queued_debug_insn_change *next;
ea8175a4 53 rtx_insn *insn;
e7140c8d
JJ
54 rtx *loc;
55 rtx new_rtx;
56};
57
fac41238
PB
58/* For each register, we have a list of registers that contain the same
59 value. The OLDEST_REGNO field points to the head of the list, and
60 the NEXT_REGNO field runs through the list. The MODE field indicates
61 what mode the data is known to be in; this field is VOIDmode when the
62 register is not known to contain valid data. */
63
64struct value_data_entry
65{
ef4bddc2 66 machine_mode mode;
fac41238
PB
67 unsigned int oldest_regno;
68 unsigned int next_regno;
e7140c8d 69 struct queued_debug_insn_change *debug_insn_changes;
fac41238
PB
70};
71
72struct value_data
73{
74 struct value_data_entry e[FIRST_PSEUDO_REGISTER];
75 unsigned int max_value_regs;
e7140c8d 76 unsigned int n_debug_insn_changes;
fac41238
PB
77};
78
fb0b2914 79static object_allocator<queued_debug_insn_change> queued_debug_insn_change_pool
fcb87c50 80 ("debug insn changes pool");
5c7337c5 81
a2e6c10c 82static bool skip_debug_insn_p;
e7140c8d 83
fac41238
PB
84static void kill_value_one_regno (unsigned, struct value_data *);
85static void kill_value_regno (unsigned, unsigned, struct value_data *);
4ca738b3 86static void kill_value (const_rtx, struct value_data *);
ef4bddc2 87static void set_value_regno (unsigned, machine_mode, struct value_data *);
fac41238
PB
88static void init_value_data (struct value_data *);
89static void kill_clobbered_value (rtx, const_rtx, void *);
90static void kill_set_value (rtx, const_rtx, void *);
fac41238 91static void copy_value (rtx, rtx, struct value_data *);
ef4bddc2 92static bool mode_change_ok (machine_mode, machine_mode,
fac41238 93 unsigned int);
ef4bddc2
RS
94static rtx maybe_mode_change (machine_mode, machine_mode,
95 machine_mode, unsigned int, unsigned int);
fac41238 96static rtx find_oldest_value_reg (enum reg_class, rtx, struct value_data *);
ea8175a4 97static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx_insn *,
fac41238
PB
98 struct value_data *);
99static bool replace_oldest_value_addr (rtx *, enum reg_class,
ef4bddc2 100 machine_mode, addr_space_t,
ea8175a4
DM
101 rtx_insn *, struct value_data *);
102static bool replace_oldest_value_mem (rtx, rtx_insn *, struct value_data *);
fac41238
PB
103static bool copyprop_hardreg_forward_1 (basic_block, struct value_data *);
104extern void debug_value_data (struct value_data *);
fac41238 105static void validate_value_data (struct value_data *);
fac41238 106
e7140c8d
JJ
107/* Free all queued updates for DEBUG_INSNs that change some reg to
108 register REGNO. */
109
110static void
111free_debug_insn_changes (struct value_data *vd, unsigned int regno)
112{
113 struct queued_debug_insn_change *cur, *next;
114 for (cur = vd->e[regno].debug_insn_changes; cur; cur = next)
115 {
116 next = cur->next;
117 --vd->n_debug_insn_changes;
fb0b2914 118 queued_debug_insn_change_pool.remove (cur);
e7140c8d
JJ
119 }
120 vd->e[regno].debug_insn_changes = NULL;
121}
122
fac41238
PB
123/* Kill register REGNO. This involves removing it from any value
124 lists, and resetting the value mode to VOIDmode. This is only a
125 helper function; it does not handle any hard registers overlapping
126 with REGNO. */
127
128static void
129kill_value_one_regno (unsigned int regno, struct value_data *vd)
130{
131 unsigned int i, next;
132
133 if (vd->e[regno].oldest_regno != regno)
134 {
135 for (i = vd->e[regno].oldest_regno;
136 vd->e[i].next_regno != regno;
137 i = vd->e[i].next_regno)
138 continue;
139 vd->e[i].next_regno = vd->e[regno].next_regno;
140 }
141 else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM)
142 {
143 for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno)
144 vd->e[i].oldest_regno = next;
145 }
146
147 vd->e[regno].mode = VOIDmode;
148 vd->e[regno].oldest_regno = regno;
149 vd->e[regno].next_regno = INVALID_REGNUM;
e7140c8d
JJ
150 if (vd->e[regno].debug_insn_changes)
151 free_debug_insn_changes (vd, regno);
fac41238 152
b2b29377
MM
153 if (flag_checking)
154 validate_value_data (vd);
fac41238
PB
155}
156
157/* Kill the value in register REGNO for NREGS, and any other registers
158 whose values overlap. */
159
160static void
161kill_value_regno (unsigned int regno, unsigned int nregs,
162 struct value_data *vd)
163{
164 unsigned int j;
165
166 /* Kill the value we're told to kill. */
167 for (j = 0; j < nregs; ++j)
168 kill_value_one_regno (regno + j, vd);
169
170 /* Kill everything that overlapped what we're told to kill. */
171 if (regno < vd->max_value_regs)
172 j = 0;
173 else
174 j = regno - vd->max_value_regs;
175 for (; j < regno; ++j)
176 {
177 unsigned int i, n;
178 if (vd->e[j].mode == VOIDmode)
179 continue;
ad474626 180 n = hard_regno_nregs (j, vd->e[j].mode);
fac41238
PB
181 if (j + n > regno)
182 for (i = 0; i < n; ++i)
183 kill_value_one_regno (j + i, vd);
184 }
185}
186
187/* Kill X. This is a convenience function wrapping kill_value_regno
188 so that we mind the mode the register is in. */
189
190static void
4ca738b3 191kill_value (const_rtx x, struct value_data *vd)
fac41238 192{
fac41238
PB
193 if (GET_CODE (x) == SUBREG)
194 {
4ca738b3
RS
195 rtx tmp = simplify_subreg (GET_MODE (x), SUBREG_REG (x),
196 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
197 x = tmp ? tmp : SUBREG_REG (x);
fac41238
PB
198 }
199 if (REG_P (x))
dc8afb70 200 kill_value_regno (REGNO (x), REG_NREGS (x), vd);
fac41238
PB
201}
202
203/* Remember that REGNO is valid in MODE. */
204
205static void
ef4bddc2 206set_value_regno (unsigned int regno, machine_mode mode,
fac41238
PB
207 struct value_data *vd)
208{
209 unsigned int nregs;
210
211 vd->e[regno].mode = mode;
212
ad474626 213 nregs = hard_regno_nregs (regno, mode);
fac41238
PB
214 if (nregs > vd->max_value_regs)
215 vd->max_value_regs = nregs;
216}
217
218/* Initialize VD such that there are no known relationships between regs. */
219
220static void
221init_value_data (struct value_data *vd)
222{
223 int i;
224 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
225 {
226 vd->e[i].mode = VOIDmode;
227 vd->e[i].oldest_regno = i;
228 vd->e[i].next_regno = INVALID_REGNUM;
e7140c8d 229 vd->e[i].debug_insn_changes = NULL;
fac41238
PB
230 }
231 vd->max_value_regs = 0;
e7140c8d 232 vd->n_debug_insn_changes = 0;
fac41238
PB
233}
234
235/* Called through note_stores. If X is clobbered, kill its value. */
236
237static void
238kill_clobbered_value (rtx x, const_rtx set, void *data)
239{
240 struct value_data *const vd = (struct value_data *) data;
8df47bdf 241
17d184e5 242 if (GET_CODE (set) == CLOBBER)
fac41238
PB
243 kill_value (x, vd);
244}
245
e384e6b5
BS
246/* A structure passed as data to kill_set_value through note_stores. */
247struct kill_set_value_data
248{
249 struct value_data *vd;
250 rtx ignore_set_reg;
251};
252
fac41238
PB
253/* Called through note_stores. If X is set, not clobbered, kill its
254 current value and install it as the root of its own value list. */
255
256static void
257kill_set_value (rtx x, const_rtx set, void *data)
258{
e384e6b5
BS
259 struct kill_set_value_data *ksvd = (struct kill_set_value_data *) data;
260 if (rtx_equal_p (x, ksvd->ignore_set_reg))
261 return;
8df47bdf 262
17d184e5 263 if (GET_CODE (set) != CLOBBER)
fac41238 264 {
e384e6b5 265 kill_value (x, ksvd->vd);
fac41238 266 if (REG_P (x))
e384e6b5 267 set_value_regno (REGNO (x), GET_MODE (x), ksvd->vd);
fac41238
PB
268 }
269}
270
4ca738b3
RS
271/* Kill any register used in X as the base of an auto-increment expression,
272 and install that register as the root of its own value list. */
fac41238 273
4ca738b3 274static void
15cd50fb 275kill_autoinc_value (rtx_insn *insn, struct value_data *vd)
fac41238 276{
4ca738b3
RS
277 subrtx_iterator::array_type array;
278 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), NONCONST)
fac41238 279 {
4ca738b3
RS
280 const_rtx x = *iter;
281 if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
282 {
283 x = XEXP (x, 0);
284 kill_value (x, vd);
285 set_value_regno (REGNO (x), GET_MODE (x), vd);
286 iter.skip_subrtxes ();
287 }
fac41238 288 }
fac41238
PB
289}
290
291/* Assert that SRC has been copied to DEST. Adjust the data structures
292 to reflect that SRC contains an older copy of the shared value. */
293
294static void
295copy_value (rtx dest, rtx src, struct value_data *vd)
296{
297 unsigned int dr = REGNO (dest);
298 unsigned int sr = REGNO (src);
299 unsigned int dn, sn;
300 unsigned int i;
301
302 /* ??? At present, it's possible to see noop sets. It'd be nice if
303 this were cleaned up beforehand... */
304 if (sr == dr)
305 return;
306
307 /* Do not propagate copies to the stack pointer, as that can leave
308 memory accesses with no scheduling dependency on the stack update. */
309 if (dr == STACK_POINTER_REGNUM)
310 return;
311
312 /* Likewise with the frame pointer, if we're using one. */
313 if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM)
314 return;
315
316 /* Do not propagate copies to fixed or global registers, patterns
317 can be relying to see particular fixed register or users can
318 expect the chosen global register in asm. */
319 if (fixed_regs[dr] || global_regs[dr])
320 return;
321
322 /* If SRC and DEST overlap, don't record anything. */
dc8afb70
RS
323 dn = REG_NREGS (dest);
324 sn = REG_NREGS (src);
fac41238
PB
325 if ((dr > sr && dr < sr + sn)
326 || (sr > dr && sr < dr + dn))
327 return;
328
329 /* If SRC had no assigned mode (i.e. we didn't know it was live)
330 assign it now and assume the value came from an input argument
331 or somesuch. */
332 if (vd->e[sr].mode == VOIDmode)
333 set_value_regno (sr, vd->e[dr].mode, vd);
334
335 /* If we are narrowing the input to a smaller number of hard regs,
336 and it is in big endian, we are really extracting a high part.
337 Since we generally associate a low part of a value with the value itself,
338 we must not do the same for the high part.
339 Note we can still get low parts for the same mode combination through
340 a two-step copy involving differently sized hard regs.
026c3cfd 341 Assume hard regs fr* are 32 bits each, while r* are 64 bits each:
fac41238
PB
342 (set (reg:DI r0) (reg:DI fr0))
343 (set (reg:SI fr2) (reg:SI r0))
344 loads the low part of (reg:DI fr0) - i.e. fr1 - into fr2, while:
345 (set (reg:SI fr2) (reg:SI fr0))
346 loads the high part of (reg:DI fr0) into fr2.
347
348 We can't properly represent the latter case in our tables, so don't
349 record anything then. */
ad474626 350 else if (sn < hard_regno_nregs (sr, vd->e[sr].mode)
91914e56
RS
351 && maybe_ne (subreg_lowpart_offset (GET_MODE (dest),
352 vd->e[sr].mode), 0U))
fac41238
PB
353 return;
354
355 /* If SRC had been assigned a mode narrower than the copy, we can't
356 link DEST into the chain, because not all of the pieces of the
357 copy came from oldest_regno. */
ad474626 358 else if (sn > hard_regno_nregs (sr, vd->e[sr].mode))
fac41238
PB
359 return;
360
425ad87d
JJ
361 /* If a narrower value is copied using wider mode, the upper bits
362 are undefined (could be e.g. a former paradoxical subreg). Signal
363 in that case we've only copied value using the narrower mode.
364 Consider:
365 (set (reg:DI r14) (mem:DI ...))
366 (set (reg:QI si) (reg:QI r14))
367 (set (reg:DI bp) (reg:DI r14))
368 (set (reg:DI r14) (const_int ...))
369 (set (reg:DI dx) (reg:DI si))
370 (set (reg:DI si) (const_int ...))
371 (set (reg:DI dx) (reg:DI bp))
372 The last set is not redundant, while the low 8 bits of dx are already
373 equal to low 8 bits of bp, the other bits are undefined. */
374 else if (partial_subreg_p (vd->e[sr].mode, GET_MODE (src)))
375 {
376 if (!REG_CAN_CHANGE_MODE_P (sr, GET_MODE (src), vd->e[sr].mode)
377 || !REG_CAN_CHANGE_MODE_P (dr, vd->e[sr].mode, GET_MODE (dest)))
378 return;
379 set_value_regno (dr, vd->e[sr].mode, vd);
380 }
e711b67a 381
fac41238
PB
382 /* Link DR at the end of the value chain used by SR. */
383
384 vd->e[dr].oldest_regno = vd->e[sr].oldest_regno;
385
386 for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno)
387 continue;
388 vd->e[i].next_regno = dr;
389
b2b29377
MM
390 if (flag_checking)
391 validate_value_data (vd);
fac41238
PB
392}
393
394/* Return true if a mode change from ORIG to NEW is allowed for REGNO. */
395
396static bool
ef4bddc2 397mode_change_ok (machine_mode orig_mode, machine_mode new_mode,
fac41238
PB
398 unsigned int regno ATTRIBUTE_UNUSED)
399{
bd4288c0 400 if (partial_subreg_p (orig_mode, new_mode))
fac41238
PB
401 return false;
402
0d803030 403 return REG_CAN_CHANGE_MODE_P (regno, orig_mode, new_mode);
fac41238
PB
404}
405
406/* Register REGNO was originally set in ORIG_MODE. It - or a copy of it -
407 was copied in COPY_MODE to COPY_REGNO, and then COPY_REGNO was accessed
408 in NEW_MODE.
409 Return a NEW_MODE rtx for REGNO if that's OK, otherwise return NULL_RTX. */
410
411static rtx
ef4bddc2
RS
412maybe_mode_change (machine_mode orig_mode, machine_mode copy_mode,
413 machine_mode new_mode, unsigned int regno,
fac41238
PB
414 unsigned int copy_regno ATTRIBUTE_UNUSED)
415{
bd4288c0
RS
416 if (partial_subreg_p (copy_mode, orig_mode)
417 && partial_subreg_p (copy_mode, new_mode))
fac41238
PB
418 return NULL_RTX;
419
d1446456
JL
420 /* Avoid creating multiple copies of the stack pointer. Some ports
421 assume there is one and only one stack pointer.
422
423 It's unclear if we need to do the same for other special registers. */
424 if (regno == STACK_POINTER_REGNUM)
425 return NULL_RTX;
426
fac41238 427 if (orig_mode == new_mode)
9fccb335 428 return gen_raw_REG (new_mode, regno);
b9ebf6c3
AK
429 else if (mode_change_ok (orig_mode, new_mode, regno)
430 && mode_change_ok (copy_mode, new_mode, copy_regno))
fac41238 431 {
ad474626
RS
432 int copy_nregs = hard_regno_nregs (copy_regno, copy_mode);
433 int use_nregs = hard_regno_nregs (copy_regno, new_mode);
cf098191
RS
434 poly_uint64 bytes_per_reg;
435 if (!can_div_trunc_p (GET_MODE_SIZE (copy_mode),
436 copy_nregs, &bytes_per_reg))
437 return NULL_RTX;
438 poly_uint64 copy_offset = bytes_per_reg * (copy_nregs - use_nregs);
91914e56 439 poly_uint64 offset
e10326ff
RS
440 = subreg_size_lowpart_offset (GET_MODE_SIZE (new_mode) + copy_offset,
441 GET_MODE_SIZE (orig_mode));
d6f23738 442 regno += subreg_regno_offset (regno, orig_mode, offset, new_mode);
f939c3e6 443 if (targetm.hard_regno_mode_ok (regno, new_mode))
9fccb335 444 return gen_raw_REG (new_mode, regno);
fac41238
PB
445 }
446 return NULL_RTX;
447}
448
449/* Find the oldest copy of the value contained in REGNO that is in
450 register class CL and has mode MODE. If found, return an rtx
451 of that oldest register, otherwise return NULL. */
452
453static rtx
454find_oldest_value_reg (enum reg_class cl, rtx reg, struct value_data *vd)
455{
456 unsigned int regno = REGNO (reg);
ef4bddc2 457 machine_mode mode = GET_MODE (reg);
fac41238
PB
458 unsigned int i;
459
65f4b875
AO
460 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
461
fac41238
PB
462 /* If we are accessing REG in some mode other that what we set it in,
463 make sure that the replacement is valid. In particular, consider
464 (set (reg:DI r11) (...))
465 (set (reg:SI r9) (reg:SI r11))
466 (set (reg:SI r10) (...))
467 (set (...) (reg:DI r9))
468 Replacing r9 with r11 is invalid. */
462a99aa 469 if (mode != vd->e[regno].mode
a28cc94a
SSF
470 && (REG_NREGS (reg) > hard_regno_nregs (regno, vd->e[regno].mode)
471 || !REG_CAN_CHANGE_MODE_P (regno, mode, vd->e[regno].mode)))
462a99aa 472 return NULL_RTX;
fac41238
PB
473
474 for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno)
475 {
ef4bddc2 476 machine_mode oldmode = vd->e[i].mode;
fac41238
PB
477 rtx new_rtx;
478
479 if (!in_hard_reg_set_p (reg_class_contents[cl], mode, i))
f90333eb 480 continue;
fac41238
PB
481
482 new_rtx = maybe_mode_change (oldmode, vd->e[regno].mode, mode, i, regno);
483 if (new_rtx)
484 {
485 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (reg);
486 REG_ATTRS (new_rtx) = REG_ATTRS (reg);
487 REG_POINTER (new_rtx) = REG_POINTER (reg);
488 return new_rtx;
489 }
490 }
491
492 return NULL_RTX;
493}
494
495/* If possible, replace the register at *LOC with the oldest register
496 in register class CL. Return true if successfully replaced. */
497
498static bool
ea8175a4 499replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx_insn *insn,
fac41238
PB
500 struct value_data *vd)
501{
502 rtx new_rtx = find_oldest_value_reg (cl, *loc, vd);
a2e6c10c 503 if (new_rtx && (!DEBUG_INSN_P (insn) || !skip_debug_insn_p))
fac41238 504 {
e7140c8d
JJ
505 if (DEBUG_INSN_P (insn))
506 {
507 struct queued_debug_insn_change *change;
508
509 if (dump_file)
510 fprintf (dump_file, "debug_insn %u: queued replacing reg %u with %u\n",
511 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
512
fb0b2914 513 change = queued_debug_insn_change_pool.allocate ();
e7140c8d
JJ
514 change->next = vd->e[REGNO (new_rtx)].debug_insn_changes;
515 change->insn = insn;
516 change->loc = loc;
517 change->new_rtx = new_rtx;
518 vd->e[REGNO (new_rtx)].debug_insn_changes = change;
519 ++vd->n_debug_insn_changes;
520 return true;
521 }
fac41238
PB
522 if (dump_file)
523 fprintf (dump_file, "insn %u: replaced reg %u with %u\n",
524 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
525
526 validate_change (insn, loc, new_rtx, 1);
527 return true;
528 }
529 return false;
530}
531
532/* Similar to replace_oldest_value_reg, but *LOC contains an address.
533 Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or
534 BASE_REG_CLASS depending on how the register is being considered. */
535
536static bool
537replace_oldest_value_addr (rtx *loc, enum reg_class cl,
ef4bddc2 538 machine_mode mode, addr_space_t as,
ea8175a4 539 rtx_insn *insn, struct value_data *vd)
fac41238
PB
540{
541 rtx x = *loc;
542 RTX_CODE code = GET_CODE (x);
543 const char *fmt;
544 int i, j;
545 bool changed = false;
546
547 switch (code)
548 {
549 case PLUS:
b5b8b0ac
AO
550 if (DEBUG_INSN_P (insn))
551 break;
552
fac41238
PB
553 {
554 rtx orig_op0 = XEXP (x, 0);
555 rtx orig_op1 = XEXP (x, 1);
556 RTX_CODE code0 = GET_CODE (orig_op0);
557 RTX_CODE code1 = GET_CODE (orig_op1);
558 rtx op0 = orig_op0;
559 rtx op1 = orig_op1;
560 rtx *locI = NULL;
561 rtx *locB = NULL;
562 enum rtx_code index_code = SCRATCH;
563
564 if (GET_CODE (op0) == SUBREG)
565 {
566 op0 = SUBREG_REG (op0);
567 code0 = GET_CODE (op0);
568 }
569
570 if (GET_CODE (op1) == SUBREG)
571 {
572 op1 = SUBREG_REG (op1);
573 code1 = GET_CODE (op1);
574 }
575
576 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
577 || code0 == ZERO_EXTEND || code1 == MEM)
578 {
579 locI = &XEXP (x, 0);
580 locB = &XEXP (x, 1);
581 index_code = GET_CODE (*locI);
582 }
583 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
584 || code1 == ZERO_EXTEND || code0 == MEM)
585 {
586 locI = &XEXP (x, 1);
587 locB = &XEXP (x, 0);
588 index_code = GET_CODE (*locI);
589 }
590 else if (code0 == CONST_INT || code0 == CONST
591 || code0 == SYMBOL_REF || code0 == LABEL_REF)
592 {
593 locB = &XEXP (x, 1);
594 index_code = GET_CODE (XEXP (x, 0));
595 }
596 else if (code1 == CONST_INT || code1 == CONST
597 || code1 == SYMBOL_REF || code1 == LABEL_REF)
598 {
599 locB = &XEXP (x, 0);
600 index_code = GET_CODE (XEXP (x, 1));
601 }
602 else if (code0 == REG && code1 == REG)
603 {
604 int index_op;
605 unsigned regno0 = REGNO (op0), regno1 = REGNO (op1);
606
607 if (REGNO_OK_FOR_INDEX_P (regno1)
86fc3d06 608 && regno_ok_for_base_p (regno0, mode, as, PLUS, REG))
fac41238
PB
609 index_op = 1;
610 else if (REGNO_OK_FOR_INDEX_P (regno0)
86fc3d06 611 && regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
fac41238 612 index_op = 0;
86fc3d06 613 else if (regno_ok_for_base_p (regno0, mode, as, PLUS, REG)
fac41238
PB
614 || REGNO_OK_FOR_INDEX_P (regno1))
615 index_op = 1;
86fc3d06 616 else if (regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
fac41238
PB
617 index_op = 0;
618 else
619 index_op = 1;
620
621 locI = &XEXP (x, index_op);
622 locB = &XEXP (x, !index_op);
623 index_code = GET_CODE (*locI);
624 }
625 else if (code0 == REG)
626 {
627 locI = &XEXP (x, 0);
628 locB = &XEXP (x, 1);
629 index_code = GET_CODE (*locI);
630 }
631 else if (code1 == REG)
632 {
633 locI = &XEXP (x, 1);
634 locB = &XEXP (x, 0);
635 index_code = GET_CODE (*locI);
636 }
637
638 if (locI)
86fc3d06
UW
639 changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS,
640 mode, as, insn, vd);
fac41238
PB
641 if (locB)
642 changed |= replace_oldest_value_addr (locB,
86fc3d06 643 base_reg_class (mode, as, PLUS,
fac41238 644 index_code),
86fc3d06 645 mode, as, insn, vd);
fac41238
PB
646 return changed;
647 }
648
649 case POST_INC:
650 case POST_DEC:
651 case POST_MODIFY:
652 case PRE_INC:
653 case PRE_DEC:
654 case PRE_MODIFY:
655 return false;
656
657 case MEM:
658 return replace_oldest_value_mem (x, insn, vd);
659
660 case REG:
661 return replace_oldest_value_reg (loc, cl, insn, vd);
662
663 default:
664 break;
665 }
666
667 fmt = GET_RTX_FORMAT (code);
668 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
669 {
670 if (fmt[i] == 'e')
86fc3d06 671 changed |= replace_oldest_value_addr (&XEXP (x, i), cl, mode, as,
fac41238
PB
672 insn, vd);
673 else if (fmt[i] == 'E')
674 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
675 changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), cl,
86fc3d06 676 mode, as, insn, vd);
fac41238
PB
677 }
678
679 return changed;
680}
681
682/* Similar to replace_oldest_value_reg, but X contains a memory. */
683
684static bool
ea8175a4 685replace_oldest_value_mem (rtx x, rtx_insn *insn, struct value_data *vd)
fac41238 686{
b5b8b0ac
AO
687 enum reg_class cl;
688
689 if (DEBUG_INSN_P (insn))
690 cl = ALL_REGS;
691 else
86fc3d06 692 cl = base_reg_class (GET_MODE (x), MEM_ADDR_SPACE (x), MEM, SCRATCH);
b5b8b0ac
AO
693
694 return replace_oldest_value_addr (&XEXP (x, 0), cl,
86fc3d06
UW
695 GET_MODE (x), MEM_ADDR_SPACE (x),
696 insn, vd);
fac41238
PB
697}
698
e7140c8d
JJ
699/* Apply all queued updates for DEBUG_INSNs that change some reg to
700 register REGNO. */
701
702static void
703apply_debug_insn_changes (struct value_data *vd, unsigned int regno)
704{
705 struct queued_debug_insn_change *change;
ea8175a4 706 rtx_insn *last_insn = vd->e[regno].debug_insn_changes->insn;
e7140c8d
JJ
707
708 for (change = vd->e[regno].debug_insn_changes;
709 change;
710 change = change->next)
711 {
712 if (last_insn != change->insn)
713 {
714 apply_change_group ();
715 last_insn = change->insn;
716 }
717 validate_change (change->insn, change->loc, change->new_rtx, 1);
718 }
719 apply_change_group ();
720}
721
e7140c8d
JJ
722/* Called via note_uses, for all used registers in a real insn
723 apply DEBUG_INSN changes that change registers to the used
724 registers. */
725
726static void
0d2e76b8 727cprop_find_used_regs (rtx *loc, void *data)
e7140c8d 728{
0d2e76b8
RS
729 struct value_data *const vd = (struct value_data *) data;
730 subrtx_iterator::array_type array;
731 FOR_EACH_SUBRTX (iter, array, *loc, NONCONST)
732 {
733 const_rtx x = *iter;
734 if (REG_P (x))
735 {
736 unsigned int regno = REGNO (x);
737 if (vd->e[regno].debug_insn_changes)
738 {
739 apply_debug_insn_changes (vd, regno);
740 free_debug_insn_changes (vd, regno);
741 }
742 }
743 }
e7140c8d
JJ
744}
745
486b97f2
TV
746/* Apply clobbers of INSN in PATTERN and C_I_F_U to value_data VD. */
747
748static void
749kill_clobbered_values (rtx_insn *insn, struct value_data *vd)
750{
e8448ba5 751 note_stores (insn, kill_clobbered_value, vd);
486b97f2
TV
752}
753
fac41238
PB
754/* Perform the forward copy propagation on basic block BB. */
755
756static bool
757copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd)
758{
b5b8b0ac 759 bool anything_changed = false;
c049b107 760 rtx_insn *insn, *next;
fac41238 761
c049b107 762 for (insn = BB_HEAD (bb); ; insn = next)
fac41238 763 {
29d70a0f 764 int n_ops, i, predicated;
fac41238
PB
765 bool is_asm, any_replacements;
766 rtx set;
c34fb198 767 rtx link;
b5b8b0ac 768 bool changed = false;
e384e6b5 769 struct kill_set_value_data ksvd;
fac41238 770
c049b107 771 next = NEXT_INSN (insn);
b5b8b0ac 772 if (!NONDEBUG_INSN_P (insn))
fac41238 773 {
36f52e8f 774 if (DEBUG_BIND_INSN_P (insn))
b5b8b0ac
AO
775 {
776 rtx loc = INSN_VAR_LOCATION_LOC (insn);
e7140c8d
JJ
777 if (!VAR_LOC_UNKNOWN_P (loc))
778 replace_oldest_value_addr (&INSN_VAR_LOCATION_LOC (insn),
779 ALL_REGS, GET_MODE (loc),
86fc3d06 780 ADDR_SPACE_GENERIC, insn, vd);
b5b8b0ac
AO
781 }
782
fac41238
PB
783 if (insn == BB_END (bb))
784 break;
785 else
786 continue;
787 }
788
789 set = single_set (insn);
d6da226a
JH
790
791 /* Detect noop sets and remove them before processing side effects. */
792 if (set && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set)))
793 {
794 unsigned int regno = REGNO (SET_SRC (set));
795 rtx r1 = find_oldest_value_reg (REGNO_REG_CLASS (regno),
796 SET_DEST (set), vd);
797 rtx r2 = find_oldest_value_reg (REGNO_REG_CLASS (regno),
798 SET_SRC (set), vd);
799 if (rtx_equal_p (r1 ? r1 : SET_DEST (set), r2 ? r2 : SET_SRC (set)))
800 {
801 bool last = insn == BB_END (bb);
d6da226a
JH
802 delete_insn (insn);
803 if (last)
804 break;
805 continue;
806 }
807 }
808
f73675e3
JL
809 /* Detect obviously dead sets (via REG_UNUSED notes) and remove them. */
810 if (set
4dd11305 811 && !RTX_FRAME_RELATED_P (insn)
c81704b3 812 && NONJUMP_INSN_P (insn)
52295c2d 813 && !may_trap_p (set)
f73675e3
JL
814 && find_reg_note (insn, REG_UNUSED, SET_DEST (set))
815 && !side_effects_p (SET_SRC (set))
816 && !side_effects_p (SET_DEST (set)))
817 {
818 bool last = insn == BB_END (bb);
819 delete_insn (insn);
820 if (last)
821 break;
822 continue;
823 }
824
825
75d25a02 826 extract_constrain_insn (insn);
1145837d 827 preprocess_constraints (insn);
5efe5dec 828 const operand_alternative *op_alt = which_op_alt ();
fac41238
PB
829 n_ops = recog_data.n_operands;
830 is_asm = asm_noperands (PATTERN (insn)) >= 0;
831
5efe5dec 832 /* Simplify the code below by promoting OP_OUT to OP_INOUT
fac41238
PB
833 in predicated instructions. */
834
835 predicated = GET_CODE (PATTERN (insn)) == COND_EXEC;
836 for (i = 0; i < n_ops; ++i)
837 {
29d70a0f 838 int matches = op_alt[i].matches;
29d70a0f 839 if (matches >= 0 || op_alt[i].matched >= 0
fac41238
PB
840 || (predicated && recog_data.operand_type[i] == OP_OUT))
841 recog_data.operand_type[i] = OP_INOUT;
842 }
843
e7140c8d
JJ
844 /* Apply changes to earlier DEBUG_INSNs if possible. */
845 if (vd->n_debug_insn_changes)
846 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
847
fac41238
PB
848 /* For each earlyclobber operand, zap the value data. */
849 for (i = 0; i < n_ops; i++)
29d70a0f 850 if (op_alt[i].earlyclobber)
fac41238
PB
851 kill_value (recog_data.operand[i], vd);
852
853 /* Within asms, a clobber cannot overlap inputs or outputs.
854 I wouldn't think this were true for regular insns, but
855 scan_rtx treats them like that... */
486b97f2 856 kill_clobbered_values (insn, vd);
fac41238
PB
857
858 /* Kill all auto-incremented values. */
859 /* ??? REG_INC is useless, since stack pushes aren't done that way. */
4ca738b3 860 kill_autoinc_value (insn, vd);
fac41238
PB
861
862 /* Kill all early-clobbered operands. */
863 for (i = 0; i < n_ops; i++)
29d70a0f 864 if (op_alt[i].earlyclobber)
fac41238
PB
865 kill_value (recog_data.operand[i], vd);
866
c34fb198
RE
867 /* If we have dead sets in the insn, then we need to note these as we
868 would clobbers. */
869 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
870 {
871 if (REG_NOTE_KIND (link) == REG_UNUSED)
872 {
873 kill_value (XEXP (link, 0), vd);
874 /* Furthermore, if the insn looked like a single-set,
875 but the dead store kills the source value of that
876 set, then we can no-longer use the plain move
877 special case below. */
878 if (set
879 && reg_overlap_mentioned_p (XEXP (link, 0), SET_SRC (set)))
880 set = NULL;
881 }
c35533d7
SB
882
883 /* We need to keep CFI info correct, and the same on all paths,
884 so we cannot normally replace the registers REG_CFA_REGISTER
885 refers to. Bail. */
886 if (REG_NOTE_KIND (link) == REG_CFA_REGISTER)
887 goto did_replacement;
c34fb198
RE
888 }
889
fac41238
PB
890 /* Special-case plain move instructions, since we may well
891 be able to do the move from a different register class. */
892 if (set && REG_P (SET_SRC (set)))
893 {
894 rtx src = SET_SRC (set);
0103c2e4 895 rtx dest = SET_DEST (set);
fac41238 896 unsigned int regno = REGNO (src);
ef4bddc2 897 machine_mode mode = GET_MODE (src);
fac41238
PB
898 unsigned int i;
899 rtx new_rtx;
900
901 /* If we are accessing SRC in some mode other that what we
902 set it in, make sure that the replacement is valid. */
903 if (mode != vd->e[regno].mode)
904 {
462a99aa 905 if (REG_NREGS (src)
ad474626 906 > hard_regno_nregs (regno, vd->e[regno].mode))
fac41238 907 goto no_move_special_case;
26689420
DM
908
909 /* And likewise, if we are narrowing on big endian the transformation
910 is also invalid. */
ad474626 911 if (REG_NREGS (src) < hard_regno_nregs (regno, vd->e[regno].mode)
91914e56
RS
912 && maybe_ne (subreg_lowpart_offset (mode,
913 vd->e[regno].mode), 0U))
26689420 914 goto no_move_special_case;
fac41238
PB
915 }
916
917 /* If the destination is also a register, try to find a source
918 register in the same class. */
0103c2e4 919 if (REG_P (dest))
fac41238 920 {
d6da226a
JH
921 new_rtx = find_oldest_value_reg (REGNO_REG_CLASS (regno),
922 src, vd);
923
fac41238
PB
924 if (new_rtx && validate_change (insn, &SET_SRC (set), new_rtx, 0))
925 {
926 if (dump_file)
927 fprintf (dump_file,
928 "insn %u: replaced reg %u with %u\n",
929 INSN_UID (insn), regno, REGNO (new_rtx));
930 changed = true;
931 goto did_replacement;
932 }
3147591f
MS
933 /* We need to re-extract as validate_change clobbers
934 recog_data. */
75d25a02 935 extract_constrain_insn (insn);
1145837d 936 preprocess_constraints (insn);
fac41238
PB
937 }
938
939 /* Otherwise, try all valid registers and see if its valid. */
940 for (i = vd->e[regno].oldest_regno; i != regno;
941 i = vd->e[i].next_regno)
942 {
943 new_rtx = maybe_mode_change (vd->e[i].mode, vd->e[regno].mode,
944 mode, i, regno);
945 if (new_rtx != NULL_RTX)
946 {
0103c2e4 947 /* Don't propagate for a more expensive reg-reg move. */
948 if (REG_P (dest))
949 {
950 enum reg_class from = REGNO_REG_CLASS (regno);
951 enum reg_class to = REGNO_REG_CLASS (REGNO (dest));
952 enum reg_class new_from = REGNO_REG_CLASS (i);
953 unsigned int original_cost
954 = targetm.register_move_cost (mode, from, to);
955 unsigned int after_cost
956 = targetm.register_move_cost (mode, new_from, to);
957 if (after_cost > original_cost)
958 continue;
959 }
960
fac41238
PB
961 if (validate_change (insn, &SET_SRC (set), new_rtx, 0))
962 {
963 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (src);
964 REG_ATTRS (new_rtx) = REG_ATTRS (src);
965 REG_POINTER (new_rtx) = REG_POINTER (src);
966 if (dump_file)
967 fprintf (dump_file,
968 "insn %u: replaced reg %u with %u\n",
969 INSN_UID (insn), regno, REGNO (new_rtx));
970 changed = true;
971 goto did_replacement;
972 }
3147591f
MS
973 /* We need to re-extract as validate_change clobbers
974 recog_data. */
75d25a02 975 extract_constrain_insn (insn);
1145837d 976 preprocess_constraints (insn);
fac41238
PB
977 }
978 }
979 }
980 no_move_special_case:
981
982 any_replacements = false;
983
984 /* For each input operand, replace a hard register with the
985 eldest live copy that's in an appropriate register class. */
986 for (i = 0; i < n_ops; i++)
987 {
868865f4 988 bool replaced = false;
fac41238
PB
989
990 /* Don't scan match_operand here, since we've no reg class
991 information to pass down. Any operands that we could
992 substitute in will be represented elsewhere. */
993 if (recog_data.constraints[i][0] == '\0')
994 continue;
995
996 /* Don't replace in asms intentionally referencing hard regs. */
997 if (is_asm && REG_P (recog_data.operand[i])
998 && (REGNO (recog_data.operand[i])
999 == ORIGINAL_REGNO (recog_data.operand[i])))
1000 continue;
1001
1002 if (recog_data.operand_type[i] == OP_IN)
1003 {
29d70a0f 1004 if (op_alt[i].is_address)
868865f4 1005 replaced
fac41238 1006 = replace_oldest_value_addr (recog_data.operand_loc[i],
5efe5dec
RS
1007 alternative_class (op_alt, i),
1008 VOIDmode, ADDR_SPACE_GENERIC,
1009 insn, vd);
fac41238 1010 else if (REG_P (recog_data.operand[i]))
868865f4 1011 replaced
fac41238 1012 = replace_oldest_value_reg (recog_data.operand_loc[i],
5efe5dec
RS
1013 alternative_class (op_alt, i),
1014 insn, vd);
fac41238 1015 else if (MEM_P (recog_data.operand[i]))
868865f4
JJ
1016 replaced = replace_oldest_value_mem (recog_data.operand[i],
1017 insn, vd);
fac41238
PB
1018 }
1019 else if (MEM_P (recog_data.operand[i]))
868865f4
JJ
1020 replaced = replace_oldest_value_mem (recog_data.operand[i],
1021 insn, vd);
fac41238
PB
1022
1023 /* If we performed any replacement, update match_dups. */
868865f4 1024 if (replaced)
fac41238
PB
1025 {
1026 int j;
1027 rtx new_rtx;
1028
1029 new_rtx = *recog_data.operand_loc[i];
1030 recog_data.operand[i] = new_rtx;
1031 for (j = 0; j < recog_data.n_dups; j++)
1032 if (recog_data.dup_num[j] == i)
1033 validate_unshare_change (insn, recog_data.dup_loc[j], new_rtx, 1);
1034
1035 any_replacements = true;
1036 }
1037 }
1038
1039 if (any_replacements)
1040 {
1041 if (! apply_change_group ())
1042 {
fac41238
PB
1043 if (dump_file)
1044 fprintf (dump_file,
1045 "insn %u: reg replacements not verified\n",
1046 INSN_UID (insn));
1047 }
1048 else
1049 changed = true;
1050 }
1051
1052 did_replacement:
b5b8b0ac 1053 if (changed)
828f2c8b
JJ
1054 {
1055 anything_changed = true;
1056
1057 /* If something changed, perhaps further changes to earlier
1058 DEBUG_INSNs can be applied. */
1059 if (vd->n_debug_insn_changes)
1060 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
4dd11305 1061 df_insn_rescan (insn);
828f2c8b 1062 }
b5b8b0ac 1063
e384e6b5
BS
1064 ksvd.vd = vd;
1065 ksvd.ignore_set_reg = NULL_RTX;
1066
fac41238
PB
1067 /* Clobber call-clobbered registers. */
1068 if (CALL_P (insn))
e384e6b5 1069 {
c7fb4c7a
SB
1070 unsigned int set_regno = INVALID_REGNUM;
1071 unsigned int set_nregs = 0;
1072 unsigned int regno;
e384e6b5 1073 rtx exp;
c7fb4c7a 1074
e384e6b5
BS
1075 for (exp = CALL_INSN_FUNCTION_USAGE (insn); exp; exp = XEXP (exp, 1))
1076 {
1077 rtx x = XEXP (exp, 0);
1078 if (GET_CODE (x) == SET)
1079 {
1080 rtx dest = SET_DEST (x);
1081 kill_value (dest, vd);
1082 set_value_regno (REGNO (dest), GET_MODE (dest), vd);
1083 copy_value (dest, SET_SRC (x), vd);
1084 ksvd.ignore_set_reg = dest;
1085 set_regno = REGNO (dest);
dc8afb70 1086 set_nregs = REG_NREGS (dest);
e384e6b5
BS
1087 break;
1088 }
1089 }
c7fb4c7a 1090
5a5a3bc5 1091 function_abi callee_abi = insn_callee_abi (insn);
9ccac701 1092 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
30503f4e
RS
1093 if (vd->e[regno].mode != VOIDmode
1094 && callee_abi.clobbers_reg_p (vd->e[regno].mode, regno)
9ccac701 1095 && (regno < set_regno || regno >= set_regno + set_nregs))
c7fb4c7a 1096 kill_value_regno (regno, 1, vd);
c5a44004
JJ
1097
1098 /* If SET was seen in CALL_INSN_FUNCTION_USAGE, and SET_SRC
30503f4e
RS
1099 of the SET isn't clobbered by CALLEE_ABI, but instead among
1100 CLOBBERs on the CALL_INSN, we could wrongly assume the
1101 value in it is still live. */
c5a44004 1102 if (ksvd.ignore_set_reg)
486b97f2 1103 kill_clobbered_values (insn, vd);
e384e6b5 1104 }
fac41238 1105
8c8fe663
TV
1106 bool copy_p = (set
1107 && REG_P (SET_DEST (set))
1108 && REG_P (SET_SRC (set)));
1109 bool noop_p = (copy_p
1110 && rtx_equal_p (SET_DEST (set), SET_SRC (set)));
fac41238 1111
c049b107
JJ
1112 /* If a noop move is using narrower mode than we have recorded,
1113 we need to either remove the noop move, or kill_set_value. */
1114 if (noop_p
bd4288c0
RS
1115 && partial_subreg_p (GET_MODE (SET_DEST (set)),
1116 vd->e[REGNO (SET_DEST (set))].mode))
c049b107
JJ
1117 {
1118 if (noop_move_p (insn))
1119 {
1120 bool last = insn == BB_END (bb);
1121 delete_insn (insn);
1122 if (last)
1123 break;
1124 }
1125 else
1126 noop_p = false;
1127 }
1128
8c8fe663
TV
1129 if (!noop_p)
1130 {
1131 /* Notice stores. */
e8448ba5 1132 note_stores (insn, kill_set_value, &ksvd);
8c8fe663
TV
1133
1134 /* Notice copies. */
1135 if (copy_p)
4dd11305
JL
1136 {
1137 df_insn_rescan (insn);
1138 copy_value (SET_DEST (set), SET_SRC (set), vd);
1139 }
8c8fe663 1140 }
fac41238
PB
1141
1142 if (insn == BB_END (bb))
1143 break;
1144 }
1145
b5b8b0ac 1146 return anything_changed;
fac41238
PB
1147}
1148
fac41238
PB
1149/* Dump the value chain data to stderr. */
1150
24e47c76 1151DEBUG_FUNCTION void
fac41238
PB
1152debug_value_data (struct value_data *vd)
1153{
1154 HARD_REG_SET set;
1155 unsigned int i, j;
1156
1157 CLEAR_HARD_REG_SET (set);
1158
1159 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1160 if (vd->e[i].oldest_regno == i)
1161 {
1162 if (vd->e[i].mode == VOIDmode)
1163 {
1164 if (vd->e[i].next_regno != INVALID_REGNUM)
1165 fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n",
1166 i, vd->e[i].next_regno);
1167 continue;
1168 }
1169
1170 SET_HARD_REG_BIT (set, i);
1171 fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode));
1172
1173 for (j = vd->e[i].next_regno;
1174 j != INVALID_REGNUM;
1175 j = vd->e[j].next_regno)
1176 {
1177 if (TEST_HARD_REG_BIT (set, j))
1178 {
1179 fprintf (stderr, "[%u] Loop in regno chain\n", j);
1180 return;
1181 }
1182
1183 if (vd->e[j].oldest_regno != i)
1184 {
1185 fprintf (stderr, "[%u] Bad oldest_regno (%u)\n",
1186 j, vd->e[j].oldest_regno);
1187 return;
1188 }
1189 SET_HARD_REG_BIT (set, j);
1190 fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode));
1191 }
1192 fputc ('\n', stderr);
1193 }
1194
1195 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1196 if (! TEST_HARD_REG_BIT (set, i)
1197 && (vd->e[i].mode != VOIDmode
1198 || vd->e[i].oldest_regno != i
1199 || vd->e[i].next_regno != INVALID_REGNUM))
1200 fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n",
1201 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1202 vd->e[i].next_regno);
1203}
1204
a2e6c10c
ZC
1205/* Do copyprop_hardreg_forward_1 for a single basic block BB.
1206 DEBUG_INSN is skipped since we do not want to involve DF related
1207 staff as how it is handled in function pass_cprop_hardreg::execute.
1208
1209 NOTE: Currently it is only used for shrink-wrap. Maybe extend it
1210 to handle DEBUG_INSN for other uses. */
1211
1212void
1213copyprop_hardreg_forward_bb_without_debug_insn (basic_block bb)
1214{
1215 struct value_data *vd;
1216 vd = XNEWVEC (struct value_data, 1);
1217 init_value_data (vd);
1218
1219 skip_debug_insn_p = true;
1220 copyprop_hardreg_forward_1 (bb, vd);
1221 free (vd);
1222 skip_debug_insn_p = false;
1223}
1224
fac41238
PB
1225static void
1226validate_value_data (struct value_data *vd)
1227{
1228 HARD_REG_SET set;
1229 unsigned int i, j;
1230
1231 CLEAR_HARD_REG_SET (set);
1232
1233 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1234 if (vd->e[i].oldest_regno == i)
1235 {
1236 if (vd->e[i].mode == VOIDmode)
1237 {
1238 if (vd->e[i].next_regno != INVALID_REGNUM)
a9c697b8
MS
1239 internal_error ("%qs: [%u] bad %<next_regno%> for empty chain (%u)",
1240 __func__, i, vd->e[i].next_regno);
fac41238
PB
1241 continue;
1242 }
1243
1244 SET_HARD_REG_BIT (set, i);
1245
1246 for (j = vd->e[i].next_regno;
1247 j != INVALID_REGNUM;
1248 j = vd->e[j].next_regno)
1249 {
1250 if (TEST_HARD_REG_BIT (set, j))
a9c697b8
MS
1251 internal_error ("%qs: loop in %<next_regno%> chain (%u)",
1252 __func__, j);
fac41238 1253 if (vd->e[j].oldest_regno != i)
a9c697b8
MS
1254 internal_error ("%qs: [%u] bad %<oldest_regno%> (%u)",
1255 __func__, j, vd->e[j].oldest_regno);
fac41238
PB
1256
1257 SET_HARD_REG_BIT (set, j);
1258 }
1259 }
1260
1261 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1262 if (! TEST_HARD_REG_BIT (set, i)
1263 && (vd->e[i].mode != VOIDmode
1264 || vd->e[i].oldest_regno != i
1265 || vd->e[i].next_regno != INVALID_REGNUM))
a9c697b8
MS
1266 internal_error ("%qs: [%u] non-empty register in chain (%s %u %i)",
1267 __func__, i,
1268 GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
fac41238
PB
1269 vd->e[i].next_regno);
1270}
b2b29377 1271
fac41238 1272\f
27a4cd48
DM
1273namespace {
1274
1275const pass_data pass_data_cprop_hardreg =
fac41238 1276{
27a4cd48
DM
1277 RTL_PASS, /* type */
1278 "cprop_hardreg", /* name */
1279 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
1280 TV_CPROP_REGISTERS, /* tv_id */
1281 0, /* properties_required */
1282 0, /* properties_provided */
1283 0, /* properties_destroyed */
1284 0, /* todo_flags_start */
3bea341f 1285 TODO_df_finish, /* todo_flags_finish */
fac41238 1286};
27a4cd48
DM
1287
1288class pass_cprop_hardreg : public rtl_opt_pass
1289{
1290public:
c3284718
RS
1291 pass_cprop_hardreg (gcc::context *ctxt)
1292 : rtl_opt_pass (pass_data_cprop_hardreg, ctxt)
27a4cd48
DM
1293 {}
1294
1295 /* opt_pass methods: */
725793af 1296 bool gate (function *) final override
1a3d085c
TS
1297 {
1298 return (optimize > 0 && (flag_cprop_registers));
1299 }
1300
725793af 1301 unsigned int execute (function *) final override;
27a4cd48
DM
1302
1303}; // class pass_cprop_hardreg
1304
cdd82c1e
JJ
1305static bool
1306cprop_hardreg_bb (basic_block bb, struct value_data *all_vd, sbitmap visited)
1307{
1308 bitmap_set_bit (visited, bb->index);
1309
1310 /* If a block has a single predecessor, that we've already
1311 processed, begin with the value data that was live at
1312 the end of the predecessor block. */
1313 /* ??? Ought to use more intelligent queuing of blocks. */
1314 if (single_pred_p (bb)
1315 && bitmap_bit_p (visited, single_pred (bb)->index)
1316 && ! (single_pred_edge (bb)->flags & (EDGE_ABNORMAL_CALL | EDGE_EH)))
1317 {
1318 all_vd[bb->index] = all_vd[single_pred (bb)->index];
1319 if (all_vd[bb->index].n_debug_insn_changes)
1320 {
1321 unsigned int regno;
1322
1323 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1324 {
1325 if (all_vd[bb->index].e[regno].debug_insn_changes)
1326 {
1327 struct queued_debug_insn_change *cur;
1328 for (cur = all_vd[bb->index].e[regno].debug_insn_changes;
1329 cur; cur = cur->next)
1330 --all_vd[bb->index].n_debug_insn_changes;
1331 all_vd[bb->index].e[regno].debug_insn_changes = NULL;
1332 if (all_vd[bb->index].n_debug_insn_changes == 0)
1333 break;
1334 }
1335 }
1336 }
1337 }
1338 else
1339 init_value_data (all_vd + bb->index);
1340
1341 return copyprop_hardreg_forward_1 (bb, all_vd + bb->index);
1342}
1343
1344static void
1345cprop_hardreg_debug (function *fun, struct value_data *all_vd)
1346{
1347 basic_block bb;
1348
1349 FOR_EACH_BB_FN (bb, fun)
1350 if (all_vd[bb->index].n_debug_insn_changes)
1351 {
1352 unsigned int regno;
1353 bitmap live;
1354
1355 live = df_get_live_out (bb);
1356 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1357 if (all_vd[bb->index].e[regno].debug_insn_changes)
1358 {
1359 if (REGNO_REG_SET_P (live, regno))
1360 apply_debug_insn_changes (all_vd + bb->index, regno);
1361
1362 struct queued_debug_insn_change *cur;
1363 for (cur = all_vd[bb->index].e[regno].debug_insn_changes;
1364 cur; cur = cur->next)
1365 --all_vd[bb->index].n_debug_insn_changes;
1366 all_vd[bb->index].e[regno].debug_insn_changes = NULL;
1367 if (all_vd[bb->index].n_debug_insn_changes == 0)
1368 break;
1369 }
1370 }
1371
1372 queued_debug_insn_change_pool.release ();
1373}
1374
be55bfe6
TS
1375unsigned int
1376pass_cprop_hardreg::execute (function *fun)
1377{
1378 struct value_data *all_vd;
1379 basic_block bb;
be55bfe6
TS
1380
1381 all_vd = XNEWVEC (struct value_data, last_basic_block_for_fn (fun));
1382
7ba9e72d 1383 auto_sbitmap visited (last_basic_block_for_fn (fun));
be55bfe6
TS
1384 bitmap_clear (visited);
1385
defa8537
RS
1386 auto_vec<int> worklist1, worklist2;
1387 auto_vec<int> *curr = &worklist1;
1388 auto_vec<int> *next = &worklist2;
cdd82c1e
JJ
1389 bool any_debug_changes = false;
1390
52295c2d
JL
1391 /* We need accurate notes. Earlier passes such as if-conversion may
1392 leave notes in an inconsistent state. */
4dd11305 1393 df_note_add_problem ();
52295c2d 1394 df_analyze ();
4dd11305
JL
1395
1396 /* It is tempting to set DF_LR_RUN_DCE, but DCE may choose to delete
1397 an insn and this pass would not have visibility into the removal.
1398 This pass would then potentially use the source of that
1399 INSN for propagation purposes, generating invalid code.
1400
1401 So we just ask for updated notes and handle trivial deletions
1402 within this pass where we can update this passes internal
1403 data structures appropriately. */
1404 df_set_flags (DF_DEFER_INSN_RESCAN);
1405
be55bfe6
TS
1406 FOR_EACH_BB_FN (bb, fun)
1407 {
cdd82c1e 1408 if (cprop_hardreg_bb (bb, all_vd, visited))
defa8537 1409 curr->safe_push (bb->index);
cdd82c1e
JJ
1410 if (all_vd[bb->index].n_debug_insn_changes)
1411 any_debug_changes = true;
be55bfe6
TS
1412 }
1413
4dd11305
JL
1414 /* We must call df_analyze here unconditionally to ensure that the
1415 REG_UNUSED and REG_DEAD notes are consistent with and without -g. */
1416 df_analyze ();
1417
cdd82c1e
JJ
1418 if (MAY_HAVE_DEBUG_BIND_INSNS && any_debug_changes)
1419 cprop_hardreg_debug (fun, all_vd);
1420
defa8537
RS
1421 /* Repeat pass up to PASSES times, but only processing basic blocks
1422 that have changed on the previous iteration. CURR points to the
1423 current worklist, and each iteration populates the NEXT worklist,
1424 swapping pointers after each cycle. */
1425
1426 unsigned int passes = optimize > 1 ? 3 : 2;
1427 for (unsigned int pass = 2; pass <= passes && !curr->is_empty (); pass++)
be55bfe6 1428 {
cdd82c1e
JJ
1429 any_debug_changes = false;
1430 bitmap_clear (visited);
defa8537
RS
1431 next->truncate (0);
1432 for (int index : *curr)
cdd82c1e
JJ
1433 {
1434 bb = BASIC_BLOCK_FOR_FN (fun, index);
defa8537
RS
1435 if (cprop_hardreg_bb (bb, all_vd, visited))
1436 next->safe_push (bb->index);
cdd82c1e
JJ
1437 if (all_vd[bb->index].n_debug_insn_changes)
1438 any_debug_changes = true;
1439 }
be55bfe6 1440
cdd82c1e
JJ
1441 df_analyze ();
1442 if (MAY_HAVE_DEBUG_BIND_INSNS && any_debug_changes)
1443 cprop_hardreg_debug (fun, all_vd);
defa8537 1444 std::swap (curr, next);
be55bfe6
TS
1445 }
1446
be55bfe6
TS
1447 free (all_vd);
1448 return 0;
1449}
1450
27a4cd48
DM
1451} // anon namespace
1452
1453rtl_opt_pass *
1454make_pass_cprop_hardreg (gcc::context *ctxt)
1455{
1456 return new pass_cprop_hardreg (ctxt);
1457}