[thirdparty/binutils-gdb.git] / gdb / ppcnbsd-tdep.c

/* Target-dependent code for PowerPC systems running NetBSD.

   Copyright 2002, 2003, 2004 Free Software Foundation, Inc.

   Contributed by Wasabi Systems, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330,
   Boston, MA 02111-1307, USA.  */

#include "defs.h"
#include "gdbcore.h"
#include "regcache.h"
#include "target.h"
#include "breakpoint.h"
#include "value.h"
#include "osabi.h"

#include "ppc-tdep.h"
#include "ppcnbsd-tdep.h"
#include "nbsd-tdep.h"
#include "tramp-frame.h"
#include "trad-frame.h"
#include "gdb_assert.h"
#include "solib-svr4.h"

#define REG_FIXREG_OFFSET(x)	((x) * 4)
#define REG_LR_OFFSET		(32 * 4)
#define REG_CR_OFFSET		(33 * 4)
#define REG_XER_OFFSET		(34 * 4)
#define REG_CTR_OFFSET		(35 * 4)
#define REG_PC_OFFSET		(36 * 4)
#define SIZEOF_STRUCT_REG	(37 * 4)

#define FPREG_FPR_OFFSET(x)	((x) * 8)
#define FPREG_FPSCR_OFFSET	(32 * 8)
#define SIZEOF_STRUCT_FPREG	(33 * 8)

void
ppcnbsd_supply_reg (char *regs, int regno)
{
  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
  int i;

  for (i = 0; i < ppc_num_gprs; i++)
    {
      if (regno == tdep->ppc_gp0_regnum + i || regno == -1)
	regcache_raw_supply (current_regcache, tdep->ppc_gp0_regnum + i,
			     regs + REG_FIXREG_OFFSET (i));
    }

  if (regno == tdep->ppc_lr_regnum || regno == -1)
    regcache_raw_supply (current_regcache, tdep->ppc_lr_regnum,
			 regs + REG_LR_OFFSET);

  if (regno == tdep->ppc_cr_regnum || regno == -1)
    regcache_raw_supply (current_regcache, tdep->ppc_cr_regnum,
			 regs + REG_CR_OFFSET);

  if (regno == tdep->ppc_xer_regnum || regno == -1)
    regcache_raw_supply (current_regcache, tdep->ppc_xer_regnum,
			 regs + REG_XER_OFFSET);

  if (regno == tdep->ppc_ctr_regnum || regno == -1)
    regcache_raw_supply (current_regcache, tdep->ppc_ctr_regnum,
			 regs + REG_CTR_OFFSET);

  if (regno == PC_REGNUM || regno == -1)
    regcache_raw_supply (current_regcache, PC_REGNUM,
			 regs + REG_PC_OFFSET);
}

void
ppcnbsd_fill_reg (char *regs, int regno)
{
  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
  int i;

  for (i = 0; i < ppc_num_gprs; i++)
    {
      if (regno == tdep->ppc_gp0_regnum + i || regno == -1)
	regcache_collect (tdep->ppc_gp0_regnum + i,
                          regs + REG_FIXREG_OFFSET (i));
    }

  if (regno == tdep->ppc_lr_regnum || regno == -1)
    regcache_collect (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);

  if (regno == tdep->ppc_cr_regnum || regno == -1)
    regcache_collect (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);

  if (regno == tdep->ppc_xer_regnum || regno == -1)
    regcache_collect (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);

  if (regno == tdep->ppc_ctr_regnum || regno == -1)
    regcache_collect (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);

  if (regno == PC_REGNUM || regno == -1)
    regcache_collect (PC_REGNUM, regs + REG_PC_OFFSET);
}

void
ppcnbsd_supply_fpreg (char *fpregs, int regno)
{
  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
  int i;

  /* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
     point registers.  Traditionally, GDB's register set has still
     listed the floating point registers for such machines, so this
     code is harmless.  However, the new E500 port actually omits the
     floating point registers entirely from the register set --- they
     don't even have register numbers assigned to them.

     It's not clear to me how best to update this code, so this assert
     will alert the first person to encounter the NetBSD/E500
     combination to the problem.  */
  gdb_assert (ppc_floating_point_unit_p (current_gdbarch));

  for (i = 0; i < ppc_num_fprs; i++)
    {
      if (regno == tdep->ppc_fp0_regnum + i || regno == -1)
	regcache_raw_supply (current_regcache, tdep->ppc_fp0_regnum + i,
			     fpregs + FPREG_FPR_OFFSET (i));
    }

  if (regno == tdep->ppc_fpscr_regnum || regno == -1)
    regcache_raw_supply (current_regcache, tdep->ppc_fpscr_regnum,
			 fpregs + FPREG_FPSCR_OFFSET);
}

void
ppcnbsd_fill_fpreg (char *fpregs, int regno)
{
  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
  int i;

  /* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
     point registers.  Traditionally, GDB's register set has still
     listed the floating point registers for such machines, so this
     code is harmless.  However, the new E500 port actually omits the
     floating point registers entirely from the register set --- they
     don't even have register numbers assigned to them.

     It's not clear to me how best to update this code, so this assert
     will alert the first person to encounter the NetBSD/E500
     combination to the problem.  */
  gdb_assert (ppc_floating_point_unit_p (current_gdbarch));

  for (i = 0; i < ppc_num_fprs; i++)
    {
      if (regno == tdep->ppc_fp0_regnum + i || regno == -1)
	regcache_collect (tdep->ppc_fp0_regnum + i,
                          fpregs + FPREG_FPR_OFFSET (i));
    }

  if (regno == tdep->ppc_fpscr_regnum || regno == -1)
    regcache_collect (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
}

static void
fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
                      CORE_ADDR ignore)
{
  char *regs, *fpregs;

  /* We get everything from one section.  */
  if (which != 0)
    return;

  regs = core_reg_sect;
  fpregs = core_reg_sect + SIZEOF_STRUCT_REG;

  /* Integer registers.  */
  ppcnbsd_supply_reg (regs, -1);

  /* Floating point registers.  */
  ppcnbsd_supply_fpreg (fpregs, -1);
}

static void
fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size, int which,
                         CORE_ADDR ignore)
{
  switch (which)
    {
    case 0:  /* Integer registers.  */
      if (core_reg_size != SIZEOF_STRUCT_REG)
	warning ("Wrong size register set in core file.");
      else
	ppcnbsd_supply_reg (core_reg_sect, -1);
      break;

    case 2:  /* Floating point registers.  */
      if (core_reg_size != SIZEOF_STRUCT_FPREG)
	warning ("Wrong size FP register set in core file.");
      else
	ppcnbsd_supply_fpreg (core_reg_sect, -1);
      break;

    default:
      /* Don't know what kind of register request this is; just ignore it.  */
      break;
    }
}

static struct core_fns ppcnbsd_core_fns =
{
  bfd_target_unknown_flavour,		/* core_flavour */
  default_check_format,			/* check_format */
  default_core_sniffer,			/* core_sniffer */
  fetch_core_registers,			/* core_read_registers */
  NULL					/* next */
};

static struct core_fns ppcnbsd_elfcore_fns =
{
  bfd_target_elf_flavour,		/* core_flavour */
  default_check_format,			/* check_format */
  default_core_sniffer,			/* core_sniffer */
  fetch_elfcore_registers,		/* core_read_registers */
  NULL					/* next */
};

/* NetBSD is confused.  It appears that 1.5 was using the correct SVr4
   convention but, 1.6 switched to the below broken convention.  For
   the moment use the broken convention.  Ulgh!.  */

static enum return_value_convention
ppcnbsd_return_value (struct gdbarch *gdbarch, struct type *valtype,
		      struct regcache *regcache, void *readbuf,
		      const void *writebuf)
{
  if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
       || TYPE_CODE (valtype) == TYPE_CODE_UNION)
      && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
	    && TYPE_VECTOR (valtype))
      && !(TYPE_LENGTH (valtype) == 1
	   || TYPE_LENGTH (valtype) == 2
	   || TYPE_LENGTH (valtype) == 4
	   || TYPE_LENGTH (valtype) == 8))
    return RETURN_VALUE_STRUCT_CONVENTION;
  else
    return ppc_sysv_abi_broken_return_value (gdbarch, valtype, regcache,
					     readbuf, writebuf);
}

static void
ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self,
			     struct frame_info *next_frame,
			     struct trad_frame_cache *this_cache,
			     CORE_ADDR func)
{
  CORE_ADDR base;
  CORE_ADDR offset;
  int i;
  struct gdbarch *gdbarch = get_frame_arch (next_frame);
  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);

  base = frame_unwind_register_unsigned (next_frame, SP_REGNUM);
  offset = base + 0x18 + 2 * tdep->wordsize;
  for (i = 0; i < ppc_num_gprs; i++)
    {
      int regnum = i + tdep->ppc_gp0_regnum;
      trad_frame_set_reg_addr (this_cache, regnum, offset);
      offset += tdep->wordsize;
    }
  trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, offset);
  offset += tdep->wordsize;
  trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, offset);
  offset += tdep->wordsize;
  trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, offset);
  offset += tdep->wordsize;
  trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, offset);
  offset += tdep->wordsize;
  trad_frame_set_reg_addr (this_cache, PC_REGNUM, offset); /* SRR0? */
  offset += tdep->wordsize;

  /* Construct the frame ID using the function start.  */
  trad_frame_set_id (this_cache, frame_id_build (base, func));
}

/* Given the NEXT frame, examine the instructions at and around this
   frame's resume address (aka PC) to see of they look like a signal
   trampoline.  Return the address of the trampolines first
   instruction, or zero if it isn't a signal trampoline.  */

static const struct tramp_frame ppcnbsd_sigtramp = {
  SIGTRAMP_FRAME,
  4, /* insn size */
  { /* insn */
    { 0x38610018, -1 }, /* addi r3,r1,24 */
    { 0x38000127, -1 }, /* li r0,295 */
    { 0x44000002, -1 }, /* sc */
    { 0x38000001, -1 }, /* li r0,1 */
    { 0x44000002, -1 }, /* sc */
    { TRAMP_SENTINEL_INSN, -1 }
  },
  ppcnbsd_sigtramp_cache_init
};

static void
ppcnbsd_init_abi (struct gdbarch_info info,
                  struct gdbarch *gdbarch)
{
  /* For NetBSD, this is an on again, off again thing.  Some systems
     do use the broken struct convention, and some don't.  */
  set_gdbarch_return_value (gdbarch, ppcnbsd_return_value);
  set_solib_svr4_fetch_link_map_offsets (gdbarch,
                                nbsd_ilp32_solib_svr4_fetch_link_map_offsets);
  tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd_sigtramp);
}

void
_initialize_ppcnbsd_tdep (void)
{
  gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_NETBSD_ELF,
			  ppcnbsd_init_abi);

  deprecated_add_core_fns (&ppcnbsd_core_fns);
  deprecated_add_core_fns (&ppcnbsd_elfcore_fns);
}
Commit	Line	Data
485721b1	1	/* Target-dependent code for PowerPC systems running NetBSD.
476be15e AC	2
	3	Copyright 2002, 2003, 2004 Free Software Foundation, Inc.
	4
485721b1 JT	5	Contributed by Wasabi Systems, Inc.
	6
	7	This file is part of GDB.
	8
	9	This program is free software; you can redistribute it and/or modify
	10	it under the terms of the GNU General Public License as published by
	11	the Free Software Foundation; either version 2 of the License, or
	12	(at your option) any later version.
	13
	14	This program is distributed in the hope that it will be useful,
	15	but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	GNU General Public License for more details.
	18
	19	You should have received a copy of the GNU General Public License
	20	along with this program; if not, write to the Free Software
	21	Foundation, Inc., 59 Temple Place - Suite 330,
	22	Boston, MA 02111-1307, USA. */
	23
	24	#include "defs.h"
	25	#include "gdbcore.h"
	26	#include "regcache.h"
	27	#include "target.h"
	28	#include "breakpoint.h"
	29	#include "value.h"
4be87837	30	#include "osabi.h"
485721b1 JT	31
	32	#include "ppc-tdep.h"
	33	#include "ppcnbsd-tdep.h"
	34	#include "nbsd-tdep.h"
476be15e AC	35	#include "tramp-frame.h"
476be15e AC	36	#include "trad-frame.h"
d28b44a7	37	#include "gdb_assert.h"
485721b1 JT	38	#include "solib-svr4.h"
	39
	40	#define REG_FIXREG_OFFSET(x) ((x) * 4)
	41	#define REG_LR_OFFSET (32 * 4)
	42	#define REG_CR_OFFSET (33 * 4)
	43	#define REG_XER_OFFSET (34 * 4)
	44	#define REG_CTR_OFFSET (35 * 4)
	45	#define REG_PC_OFFSET (36 * 4)
	46	#define SIZEOF_STRUCT_REG (37 * 4)
	47
	48	#define FPREG_FPR_OFFSET(x) ((x) * 8)
	49	#define FPREG_FPSCR_OFFSET (32 * 8)
	50	#define SIZEOF_STRUCT_FPREG (33 * 8)
	51
	52	void
	53	ppcnbsd_supply_reg (char *regs, int regno)
	54	{
	55	struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
	56	int i;
	57
063715bf	58	for (i = 0; i < ppc_num_gprs; i++)
485721b1	59	{
cdf2c5f5	60	if (regno == tdep->ppc_gp0_regnum + i \|\| regno == -1)
23a6d369 AC	61	regcache_raw_supply (current_regcache, tdep->ppc_gp0_regnum + i,
23a6d369 AC	62	regs + REG_FIXREG_OFFSET (i));
485721b1 JT	63	}
	64
	65	if (regno == tdep->ppc_lr_regnum \|\| regno == -1)
23a6d369 AC	66	regcache_raw_supply (current_regcache, tdep->ppc_lr_regnum,
23a6d369 AC	67	regs + REG_LR_OFFSET);
485721b1 JT	68
485721b1 JT	69	if (regno == tdep->ppc_cr_regnum \|\| regno == -1)
23a6d369 AC	70	regcache_raw_supply (current_regcache, tdep->ppc_cr_regnum,
23a6d369 AC	71	regs + REG_CR_OFFSET);
485721b1 JT	72
485721b1 JT	73	if (regno == tdep->ppc_xer_regnum \|\| regno == -1)
23a6d369 AC	74	regcache_raw_supply (current_regcache, tdep->ppc_xer_regnum,
23a6d369 AC	75	regs + REG_XER_OFFSET);
485721b1 JT	76
485721b1 JT	77	if (regno == tdep->ppc_ctr_regnum \|\| regno == -1)
23a6d369 AC	78	regcache_raw_supply (current_regcache, tdep->ppc_ctr_regnum,
23a6d369 AC	79	regs + REG_CTR_OFFSET);
485721b1 JT	80
485721b1 JT	81	if (regno == PC_REGNUM \|\| regno == -1)
23a6d369 AC	82	regcache_raw_supply (current_regcache, PC_REGNUM,
23a6d369 AC	83	regs + REG_PC_OFFSET);
485721b1 JT	84	}
	85
	86	void
	87	ppcnbsd_fill_reg (char *regs, int regno)
	88	{
	89	struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
	90	int i;
	91
063715bf	92	for (i = 0; i < ppc_num_gprs; i++)
485721b1	93	{
cdf2c5f5 JB	94	if (regno == tdep->ppc_gp0_regnum + i \|\| regno == -1)
	95	regcache_collect (tdep->ppc_gp0_regnum + i,
	96	regs + REG_FIXREG_OFFSET (i));
485721b1 JT	97	}
	98
	99	if (regno == tdep->ppc_lr_regnum \|\| regno == -1)
	100	regcache_collect (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);
	101
	102	if (regno == tdep->ppc_cr_regnum \|\| regno == -1)
	103	regcache_collect (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);
	104
	105	if (regno == tdep->ppc_xer_regnum \|\| regno == -1)
	106	regcache_collect (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);
	107
	108	if (regno == tdep->ppc_ctr_regnum \|\| regno == -1)
	109	regcache_collect (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);
	110
	111	if (regno == PC_REGNUM \|\| regno == -1)
	112	regcache_collect (PC_REGNUM, regs + REG_PC_OFFSET);
	113	}
	114
	115	void
	116	ppcnbsd_supply_fpreg (char *fpregs, int regno)
	117	{
	118	struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
	119	int i;
	120
383f0f5b JB	121	/* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
	122	point registers. Traditionally, GDB's register set has still
	123	listed the floating point registers for such machines, so this
	124	code is harmless. However, the new E500 port actually omits the
	125	floating point registers entirely from the register set --- they
	126	don't even have register numbers assigned to them.
	127
	128	It's not clear to me how best to update this code, so this assert
	129	will alert the first person to encounter the NetBSD/E500
	130	combination to the problem. */
	131	gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
	132
366f009f	133	for (i = 0; i < ppc_num_fprs; i++)
485721b1	134	{
366f009f	135	if (regno == tdep->ppc_fp0_regnum + i \|\| regno == -1)
23a6d369 AC	136	regcache_raw_supply (current_regcache, tdep->ppc_fp0_regnum + i,
23a6d369 AC	137	fpregs + FPREG_FPR_OFFSET (i));
485721b1 JT	138	}
	139
	140	if (regno == tdep->ppc_fpscr_regnum \|\| regno == -1)
23a6d369 AC	141	regcache_raw_supply (current_regcache, tdep->ppc_fpscr_regnum,
23a6d369 AC	142	fpregs + FPREG_FPSCR_OFFSET);
485721b1 JT	143	}
	144
	145	void
	146	ppcnbsd_fill_fpreg (char *fpregs, int regno)
	147	{
	148	struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
	149	int i;
	150
383f0f5b JB	151	/* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
	152	point registers. Traditionally, GDB's register set has still
	153	listed the floating point registers for such machines, so this
	154	code is harmless. However, the new E500 port actually omits the
	155	floating point registers entirely from the register set --- they
	156	don't even have register numbers assigned to them.
	157
	158	It's not clear to me how best to update this code, so this assert
	159	will alert the first person to encounter the NetBSD/E500
	160	combination to the problem. */
	161	gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
	162
366f009f	163	for (i = 0; i < ppc_num_fprs; i++)
485721b1	164	{
366f009f JB	165	if (regno == tdep->ppc_fp0_regnum + i \|\| regno == -1)
	166	regcache_collect (tdep->ppc_fp0_regnum + i,
	167	fpregs + FPREG_FPR_OFFSET (i));
485721b1 JT	168	}
	169
	170	if (regno == tdep->ppc_fpscr_regnum \|\| regno == -1)
	171	regcache_collect (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
	172	}
	173
	174	static void
	175	fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
	176	CORE_ADDR ignore)
	177	{
	178	char regs, fpregs;
	179
	180	/* We get everything from one section. */
	181	if (which != 0)
	182	return;
	183
	184	regs = core_reg_sect;
	185	fpregs = core_reg_sect + SIZEOF_STRUCT_REG;
	186
	187	/* Integer registers. */
	188	ppcnbsd_supply_reg (regs, -1);
	189
	190	/* Floating point registers. */
	191	ppcnbsd_supply_fpreg (fpregs, -1);
	192	}
	193
	194	static void
	195	fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size, int which,
	196	CORE_ADDR ignore)
	197	{
	198	switch (which)
	199	{
	200	case 0: /* Integer registers. */
	201	if (core_reg_size != SIZEOF_STRUCT_REG)
	202	warning ("Wrong size register set in core file.");
	203	else
	204	ppcnbsd_supply_reg (core_reg_sect, -1);
	205	break;
	206
	207	case 2: /* Floating point registers. */
	208	if (core_reg_size != SIZEOF_STRUCT_FPREG)
	209	warning ("Wrong size FP register set in core file.");
	210	else
	211	ppcnbsd_supply_fpreg (core_reg_sect, -1);
	212	break;
	213
	214	default:
	215	/* Don't know what kind of register request this is; just ignore it. */
	216	break;
	217	}
	218	}
	219
	220	static struct core_fns ppcnbsd_core_fns =
	221	{
	222	bfd_target_unknown_flavour, /* core_flavour */
	223	default_check_format, /* check_format */
	224	default_core_sniffer, /* core_sniffer */
	225	fetch_core_registers, /* core_read_registers */
	226	NULL /* next */
	227	};
	228
	229	static struct core_fns ppcnbsd_elfcore_fns =
	230	{
	231	bfd_target_elf_flavour, /* core_flavour */
232	default_check_format, /* check_format */
233	default_core_sniffer, /* core_sniffer */
234	fetch_elfcore_registers, /* core_read_registers */
235	NULL /* next */
236	};
237
957e27ac AC	238	/* NetBSD is confused. It appears that 1.5 was using the correct SVr4
	239	convention but, 1.6 switched to the below broken convention. For
	240	the moment use the broken convention. Ulgh!. */
	241
05580c65 AC	242	static enum return_value_convention
05580c65 AC	243	ppcnbsd_return_value (struct gdbarch gdbarch, struct type valtype,
963e2bb7 AC	244	struct regcache regcache, void readbuf,
963e2bb7 AC	245	const void *writebuf)
05580c65 AC	246	{
	247	if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
	248	\|\| TYPE_CODE (valtype) == TYPE_CODE_UNION)
	249	&& !((TYPE_LENGTH (valtype) == 16 \|\| TYPE_LENGTH (valtype) == 8)
	250	&& TYPE_VECTOR (valtype))
	251	&& !(TYPE_LENGTH (valtype) == 1
	252	\|\| TYPE_LENGTH (valtype) == 2
	253	\|\| TYPE_LENGTH (valtype) == 4
	254	\|\| TYPE_LENGTH (valtype) == 8))
	255	return RETURN_VALUE_STRUCT_CONVENTION;
	256	else
	257	return ppc_sysv_abi_broken_return_value (gdbarch, valtype, regcache,
963e2bb7	258	readbuf, writebuf);
957e27ac AC	259	}
957e27ac AC	260
476be15e AC	261	static void
	262	ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self,
	263	struct frame_info *next_frame,
	264	struct trad_frame_cache *this_cache,
	265	CORE_ADDR func)
	266	{
	267	CORE_ADDR base;
	268	CORE_ADDR offset;
	269	int i;
	270	struct gdbarch *gdbarch = get_frame_arch (next_frame);
	271	struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
	272
	273	base = frame_unwind_register_unsigned (next_frame, SP_REGNUM);
	274	offset = base + 0x18 + 2 * tdep->wordsize;
063715bf	275	for (i = 0; i < ppc_num_gprs; i++)
476be15e AC	276	{
	277	int regnum = i + tdep->ppc_gp0_regnum;
	278	trad_frame_set_reg_addr (this_cache, regnum, offset);
	279	offset += tdep->wordsize;
	280	}
	281	trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, offset);
	282	offset += tdep->wordsize;
	283	trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, offset);
	284	offset += tdep->wordsize;
	285	trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, offset);
	286	offset += tdep->wordsize;
	287	trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, offset);
	288	offset += tdep->wordsize;
	289	trad_frame_set_reg_addr (this_cache, PC_REGNUM, offset); /* SRR0? */
	290	offset += tdep->wordsize;
	291
	292	/* Construct the frame ID using the function start. */
	293	trad_frame_set_id (this_cache, frame_id_build (base, func));
	294	}
	295
	296	/* Given the NEXT frame, examine the instructions at and around this
	297	frame's resume address (aka PC) to see of they look like a signal
	298	trampoline. Return the address of the trampolines first
	299	instruction, or zero if it isn't a signal trampoline. */
	300
	301	static const struct tramp_frame ppcnbsd_sigtramp = {
2cd8546d	302	SIGTRAMP_FRAME,
476be15e AC	303	4, /* insn size */
476be15e AC	304	{ /* insn */
2cd8546d AC	305	{ 0x38610018, -1 }, /* addi r3,r1,24 */
	306	{ 0x38000127, -1 }, /* li r0,295 */
	307	{ 0x44000002, -1 }, /* sc */
	308	{ 0x38000001, -1 }, /* li r0,1 */
	309	{ 0x44000002, -1 }, /* sc */
	310	{ TRAMP_SENTINEL_INSN, -1 }
476be15e AC	311	},
	312	ppcnbsd_sigtramp_cache_init
	313	};
	314
485721b1 JT	315	static void
	316	ppcnbsd_init_abi (struct gdbarch_info info,
	317	struct gdbarch *gdbarch)
	318	{
e754ae69 AC	319	/* For NetBSD, this is an on again, off again thing. Some systems
e754ae69 AC	320	do use the broken struct convention, and some don't. */
05580c65	321	set_gdbarch_return_value (gdbarch, ppcnbsd_return_value);
485721b1 JT	322	set_solib_svr4_fetch_link_map_offsets (gdbarch,
485721b1 JT	323	nbsd_ilp32_solib_svr4_fetch_link_map_offsets);
476be15e	324	tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd_sigtramp);
485721b1 JT	325	}
	326
	327	void
	328	_initialize_ppcnbsd_tdep (void)
	329	{
05816f70	330	gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_NETBSD_ELF,
485721b1 JT	331	ppcnbsd_init_abi);
485721b1 JT	332
00e32a35 AC	333	deprecated_add_core_fns (&ppcnbsd_core_fns);
00e32a35 AC	334	deprecated_add_core_fns (&ppcnbsd_elfcore_fns);
485721b1	335	}