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Implement Sparc64 CPU timers using ptimers
[thirdparty/qemu.git] / gdbstub.c
CommitLineData
b4608c04
FB
1/*
2 * gdb server stub
3 *
3475187d 4 * Copyright (c) 2003-2005 Fabrice Bellard
b4608c04
FB
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
978efd6a 20#include "config.h"
1fddef4b
FB
21#ifdef CONFIG_USER_ONLY
22#include <stdlib.h>
23#include <stdio.h>
24#include <stdarg.h>
25#include <string.h>
26#include <errno.h>
27#include <unistd.h>
978efd6a 28#include <fcntl.h>
1fddef4b
FB
29
30#include "qemu.h"
31#else
67b915a5 32#include "vl.h"
1fddef4b 33#endif
67b915a5 34
8f447cc7
FB
35#include "qemu_socket.h"
36#ifdef _WIN32
37/* XXX: these constants may be independent of the host ones even for Unix */
38#ifndef SIGTRAP
39#define SIGTRAP 5
40#endif
41#ifndef SIGINT
42#define SIGINT 2
43#endif
44#else
b4608c04 45#include <signal.h>
8f447cc7 46#endif
b4608c04 47
4abe615b 48//#define DEBUG_GDB
b4608c04 49
858693c6
FB
50enum RSState {
51 RS_IDLE,
52 RS_GETLINE,
53 RS_CHKSUM1,
54 RS_CHKSUM2,
a2d1ebaf 55 RS_SYSCALL,
858693c6 56};
858693c6 57typedef struct GDBState {
6a00d601 58 CPUState *env; /* current CPU */
41625033 59 enum RSState state; /* parsing state */
858693c6
FB
60 char line_buf[4096];
61 int line_buf_index;
62 int line_csum;
4046d913
PB
63 char last_packet[4100];
64 int last_packet_len;
41625033 65#ifdef CONFIG_USER_ONLY
4046d913 66 int fd;
41625033 67 int running_state;
4046d913
PB
68#else
69 CharDriverState *chr;
41625033 70#endif
858693c6 71} GDBState;
b4608c04 72
1fddef4b 73#ifdef CONFIG_USER_ONLY
4046d913
PB
74/* XXX: This is not thread safe. Do we care? */
75static int gdbserver_fd = -1;
76
1fddef4b
FB
77/* XXX: remove this hack. */
78static GDBState gdbserver_state;
1fddef4b 79
858693c6 80static int get_char(GDBState *s)
b4608c04
FB
81{
82 uint8_t ch;
83 int ret;
84
85 for(;;) {
8f447cc7 86 ret = recv(s->fd, &ch, 1, 0);
b4608c04
FB
87 if (ret < 0) {
88 if (errno != EINTR && errno != EAGAIN)
89 return -1;
90 } else if (ret == 0) {
91 return -1;
92 } else {
93 break;
94 }
95 }
96 return ch;
97}
4046d913 98#endif
b4608c04 99
a2d1ebaf
PB
100/* GDB stub state for use by semihosting syscalls. */
101static GDBState *gdb_syscall_state;
102static gdb_syscall_complete_cb gdb_current_syscall_cb;
103
104enum {
105 GDB_SYS_UNKNOWN,
106 GDB_SYS_ENABLED,
107 GDB_SYS_DISABLED,
108} gdb_syscall_mode;
109
110/* If gdb is connected when the first semihosting syscall occurs then use
111 remote gdb syscalls. Otherwise use native file IO. */
112int use_gdb_syscalls(void)
113{
114 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
115 gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
116 : GDB_SYS_DISABLED);
117 }
118 return gdb_syscall_mode == GDB_SYS_ENABLED;
119}
120
858693c6 121static void put_buffer(GDBState *s, const uint8_t *buf, int len)
b4608c04 122{
4046d913 123#ifdef CONFIG_USER_ONLY
b4608c04
FB
124 int ret;
125
126 while (len > 0) {
8f447cc7 127 ret = send(s->fd, buf, len, 0);
b4608c04
FB
128 if (ret < 0) {
129 if (errno != EINTR && errno != EAGAIN)
130 return;
131 } else {
132 buf += ret;
133 len -= ret;
134 }
135 }
4046d913
PB
136#else
137 qemu_chr_write(s->chr, buf, len);
138#endif
b4608c04
FB
139}
140
141static inline int fromhex(int v)
142{
143 if (v >= '0' && v <= '9')
144 return v - '0';
145 else if (v >= 'A' && v <= 'F')
146 return v - 'A' + 10;
147 else if (v >= 'a' && v <= 'f')
148 return v - 'a' + 10;
149 else
150 return 0;
151}
152
153static inline int tohex(int v)
154{
155 if (v < 10)
156 return v + '0';
157 else
158 return v - 10 + 'a';
159}
160
161static void memtohex(char *buf, const uint8_t *mem, int len)
162{
163 int i, c;
164 char *q;
165 q = buf;
166 for(i = 0; i < len; i++) {
167 c = mem[i];
168 *q++ = tohex(c >> 4);
169 *q++ = tohex(c & 0xf);
170 }
171 *q = '\0';
172}
173
174static void hextomem(uint8_t *mem, const char *buf, int len)
175{
176 int i;
177
178 for(i = 0; i < len; i++) {
179 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
180 buf += 2;
181 }
182}
183
b4608c04 184/* return -1 if error, 0 if OK */
858693c6 185static int put_packet(GDBState *s, char *buf)
b4608c04 186{
4046d913
PB
187 int len, csum, i;
188 char *p;
b4608c04
FB
189
190#ifdef DEBUG_GDB
191 printf("reply='%s'\n", buf);
192#endif
193
194 for(;;) {
4046d913
PB
195 p = s->last_packet;
196 *(p++) = '$';
b4608c04 197 len = strlen(buf);
4046d913
PB
198 memcpy(p, buf, len);
199 p += len;
b4608c04
FB
200 csum = 0;
201 for(i = 0; i < len; i++) {
202 csum += buf[i];
203 }
4046d913
PB
204 *(p++) = '#';
205 *(p++) = tohex((csum >> 4) & 0xf);
206 *(p++) = tohex((csum) & 0xf);
b4608c04 207
4046d913
PB
208 s->last_packet_len = p - s->last_packet;
209 put_buffer(s, s->last_packet, s->last_packet_len);
b4608c04 210
4046d913
PB
211#ifdef CONFIG_USER_ONLY
212 i = get_char(s);
213 if (i < 0)
b4608c04 214 return -1;
4046d913 215 if (i == '+')
b4608c04 216 break;
4046d913
PB
217#else
218 break;
219#endif
b4608c04
FB
220 }
221 return 0;
222}
223
6da41eaf
FB
224#if defined(TARGET_I386)
225
6da41eaf
FB
226static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
227{
e95c8d51 228 uint32_t *registers = (uint32_t *)mem_buf;
6da41eaf
FB
229 int i, fpus;
230
231 for(i = 0; i < 8; i++) {
e95c8d51 232 registers[i] = env->regs[i];
6da41eaf 233 }
e95c8d51
FB
234 registers[8] = env->eip;
235 registers[9] = env->eflags;
236 registers[10] = env->segs[R_CS].selector;
237 registers[11] = env->segs[R_SS].selector;
238 registers[12] = env->segs[R_DS].selector;
239 registers[13] = env->segs[R_ES].selector;
240 registers[14] = env->segs[R_FS].selector;
241 registers[15] = env->segs[R_GS].selector;
6da41eaf
FB
242 /* XXX: convert floats */
243 for(i = 0; i < 8; i++) {
244 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
245 }
e95c8d51 246 registers[36] = env->fpuc;
6da41eaf 247 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
e95c8d51
FB
248 registers[37] = fpus;
249 registers[38] = 0; /* XXX: convert tags */
250 registers[39] = 0; /* fiseg */
251 registers[40] = 0; /* fioff */
252 registers[41] = 0; /* foseg */
253 registers[42] = 0; /* fooff */
254 registers[43] = 0; /* fop */
255
256 for(i = 0; i < 16; i++)
257 tswapls(&registers[i]);
258 for(i = 36; i < 44; i++)
259 tswapls(&registers[i]);
6da41eaf
FB
260 return 44 * 4;
261}
262
263static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
264{
265 uint32_t *registers = (uint32_t *)mem_buf;
266 int i;
267
268 for(i = 0; i < 8; i++) {
269 env->regs[i] = tswapl(registers[i]);
270 }
e95c8d51
FB
271 env->eip = tswapl(registers[8]);
272 env->eflags = tswapl(registers[9]);
6da41eaf
FB
273#if defined(CONFIG_USER_ONLY)
274#define LOAD_SEG(index, sreg)\
275 if (tswapl(registers[index]) != env->segs[sreg].selector)\
276 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
277 LOAD_SEG(10, R_CS);
278 LOAD_SEG(11, R_SS);
279 LOAD_SEG(12, R_DS);
280 LOAD_SEG(13, R_ES);
281 LOAD_SEG(14, R_FS);
282 LOAD_SEG(15, R_GS);
283#endif
284}
285
9e62fd7f 286#elif defined (TARGET_PPC)
9e62fd7f
FB
287static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
288{
a541f297 289 uint32_t *registers = (uint32_t *)mem_buf, tmp;
9e62fd7f
FB
290 int i;
291
292 /* fill in gprs */
a541f297 293 for(i = 0; i < 32; i++) {
e95c8d51 294 registers[i] = tswapl(env->gpr[i]);
9e62fd7f
FB
295 }
296 /* fill in fprs */
297 for (i = 0; i < 32; i++) {
e95c8d51
FB
298 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
299 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
9e62fd7f
FB
300 }
301 /* nip, msr, ccr, lnk, ctr, xer, mq */
e95c8d51 302 registers[96] = tswapl(env->nip);
3fc6c082 303 registers[97] = tswapl(do_load_msr(env));
9e62fd7f
FB
304 tmp = 0;
305 for (i = 0; i < 8; i++)
a541f297 306 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
e95c8d51
FB
307 registers[98] = tswapl(tmp);
308 registers[99] = tswapl(env->lr);
309 registers[100] = tswapl(env->ctr);
76a66253 310 registers[101] = tswapl(ppc_load_xer(env));
e95c8d51 311 registers[102] = 0;
a541f297
FB
312
313 return 103 * 4;
9e62fd7f
FB
314}
315
316static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
317{
318 uint32_t *registers = (uint32_t *)mem_buf;
319 int i;
320
321 /* fill in gprs */
322 for (i = 0; i < 32; i++) {
e95c8d51 323 env->gpr[i] = tswapl(registers[i]);
9e62fd7f
FB
324 }
325 /* fill in fprs */
326 for (i = 0; i < 32; i++) {
e95c8d51
FB
327 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
328 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
9e62fd7f
FB
329 }
330 /* nip, msr, ccr, lnk, ctr, xer, mq */
e95c8d51 331 env->nip = tswapl(registers[96]);
3fc6c082 332 do_store_msr(env, tswapl(registers[97]));
e95c8d51 333 registers[98] = tswapl(registers[98]);
9e62fd7f 334 for (i = 0; i < 8; i++)
a541f297 335 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
e95c8d51
FB
336 env->lr = tswapl(registers[99]);
337 env->ctr = tswapl(registers[100]);
76a66253 338 ppc_store_xer(env, tswapl(registers[101]));
e95c8d51
FB
339}
340#elif defined (TARGET_SPARC)
341static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
342{
3475187d 343 target_ulong *registers = (target_ulong *)mem_buf;
e95c8d51
FB
344 int i;
345
346 /* fill in g0..g7 */
48b2c193 347 for(i = 0; i < 8; i++) {
e95c8d51
FB
348 registers[i] = tswapl(env->gregs[i]);
349 }
350 /* fill in register window */
351 for(i = 0; i < 24; i++) {
352 registers[i + 8] = tswapl(env->regwptr[i]);
353 }
9d9754a3 354#ifndef TARGET_SPARC64
e95c8d51
FB
355 /* fill in fprs */
356 for (i = 0; i < 32; i++) {
357 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
358 }
359 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
360 registers[64] = tswapl(env->y);
3475187d
FB
361 {
362 target_ulong tmp;
363
364 tmp = GET_PSR(env);
365 registers[65] = tswapl(tmp);
366 }
e95c8d51
FB
367 registers[66] = tswapl(env->wim);
368 registers[67] = tswapl(env->tbr);
369 registers[68] = tswapl(env->pc);
370 registers[69] = tswapl(env->npc);
371 registers[70] = tswapl(env->fsr);
372 registers[71] = 0; /* csr */
373 registers[72] = 0;
3475187d
FB
374 return 73 * sizeof(target_ulong);
375#else
9d9754a3
FB
376 /* fill in fprs */
377 for (i = 0; i < 64; i += 2) {
378 uint64_t tmp;
379
8979596d
BS
380 tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
381 tmp |= *(uint32_t *)&env->fpr[i + 1];
382 registers[i / 2 + 32] = tswap64(tmp);
3475187d 383 }
9d9754a3
FB
384 registers[64] = tswapl(env->pc);
385 registers[65] = tswapl(env->npc);
386 registers[66] = tswapl(env->tstate[env->tl]);
387 registers[67] = tswapl(env->fsr);
388 registers[68] = tswapl(env->fprs);
389 registers[69] = tswapl(env->y);
390 return 70 * sizeof(target_ulong);
3475187d 391#endif
e95c8d51
FB
392}
393
394static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
395{
3475187d 396 target_ulong *registers = (target_ulong *)mem_buf;
e95c8d51
FB
397 int i;
398
399 /* fill in g0..g7 */
400 for(i = 0; i < 7; i++) {
401 env->gregs[i] = tswapl(registers[i]);
402 }
403 /* fill in register window */
404 for(i = 0; i < 24; i++) {
3475187d 405 env->regwptr[i] = tswapl(registers[i + 8]);
e95c8d51 406 }
9d9754a3 407#ifndef TARGET_SPARC64
e95c8d51
FB
408 /* fill in fprs */
409 for (i = 0; i < 32; i++) {
410 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
411 }
412 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
413 env->y = tswapl(registers[64]);
e80cfcfc 414 PUT_PSR(env, tswapl(registers[65]));
e95c8d51
FB
415 env->wim = tswapl(registers[66]);
416 env->tbr = tswapl(registers[67]);
417 env->pc = tswapl(registers[68]);
418 env->npc = tswapl(registers[69]);
419 env->fsr = tswapl(registers[70]);
3475187d 420#else
9d9754a3 421 for (i = 0; i < 64; i += 2) {
8979596d
BS
422 uint64_t tmp;
423
424 tmp = tswap64(registers[i / 2 + 32]);
425 *((uint32_t *)&env->fpr[i]) = tmp >> 32;
426 *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
3475187d 427 }
9d9754a3
FB
428 env->pc = tswapl(registers[64]);
429 env->npc = tswapl(registers[65]);
430 env->tstate[env->tl] = tswapl(registers[66]);
431 env->fsr = tswapl(registers[67]);
432 env->fprs = tswapl(registers[68]);
433 env->y = tswapl(registers[69]);
3475187d 434#endif
9e62fd7f 435}
1fddef4b
FB
436#elif defined (TARGET_ARM)
437static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
438{
439 int i;
440 uint8_t *ptr;
441
442 ptr = mem_buf;
443 /* 16 core integer registers (4 bytes each). */
444 for (i = 0; i < 16; i++)
445 {
446 *(uint32_t *)ptr = tswapl(env->regs[i]);
447 ptr += 4;
448 }
449 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
450 Not yet implemented. */
451 memset (ptr, 0, 8 * 12 + 4);
452 ptr += 8 * 12 + 4;
453 /* CPSR (4 bytes). */
b5ff1b31 454 *(uint32_t *)ptr = tswapl (cpsr_read(env));
1fddef4b
FB
455 ptr += 4;
456
457 return ptr - mem_buf;
458}
6da41eaf 459
1fddef4b
FB
460static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
461{
462 int i;
463 uint8_t *ptr;
464
465 ptr = mem_buf;
466 /* Core integer registers. */
467 for (i = 0; i < 16; i++)
468 {
469 env->regs[i] = tswapl(*(uint32_t *)ptr);
470 ptr += 4;
471 }
472 /* Ignore FPA regs and scr. */
473 ptr += 8 * 12 + 4;
b5ff1b31 474 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
1fddef4b 475}
e6e5906b
PB
476#elif defined (TARGET_M68K)
477static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
478{
479 int i;
480 uint8_t *ptr;
481 CPU_DoubleU u;
482
483 ptr = mem_buf;
484 /* D0-D7 */
485 for (i = 0; i < 8; i++) {
486 *(uint32_t *)ptr = tswapl(env->dregs[i]);
487 ptr += 4;
488 }
489 /* A0-A7 */
490 for (i = 0; i < 8; i++) {
491 *(uint32_t *)ptr = tswapl(env->aregs[i]);
492 ptr += 4;
493 }
494 *(uint32_t *)ptr = tswapl(env->sr);
495 ptr += 4;
496 *(uint32_t *)ptr = tswapl(env->pc);
497 ptr += 4;
498 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
499 ColdFire has 8-bit double precision registers. */
500 for (i = 0; i < 8; i++) {
501 u.d = env->fregs[i];
502 *(uint32_t *)ptr = tswap32(u.l.upper);
503 *(uint32_t *)ptr = tswap32(u.l.lower);
504 }
505 /* FP control regs (not implemented). */
506 memset (ptr, 0, 3 * 4);
507 ptr += 3 * 4;
508
509 return ptr - mem_buf;
510}
511
512static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
513{
514 int i;
515 uint8_t *ptr;
516 CPU_DoubleU u;
517
518 ptr = mem_buf;
519 /* D0-D7 */
520 for (i = 0; i < 8; i++) {
521 env->dregs[i] = tswapl(*(uint32_t *)ptr);
522 ptr += 4;
523 }
524 /* A0-A7 */
525 for (i = 0; i < 8; i++) {
526 env->aregs[i] = tswapl(*(uint32_t *)ptr);
527 ptr += 4;
528 }
529 env->sr = tswapl(*(uint32_t *)ptr);
530 ptr += 4;
531 env->pc = tswapl(*(uint32_t *)ptr);
532 ptr += 4;
533 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
534 ColdFire has 8-bit double precision registers. */
535 for (i = 0; i < 8; i++) {
536 u.l.upper = tswap32(*(uint32_t *)ptr);
537 u.l.lower = tswap32(*(uint32_t *)ptr);
538 env->fregs[i] = u.d;
539 }
540 /* FP control regs (not implemented). */
541 ptr += 3 * 4;
542}
6f970bd9
FB
543#elif defined (TARGET_MIPS)
544static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
545{
546 int i;
547 uint8_t *ptr;
548
549 ptr = mem_buf;
550 for (i = 0; i < 32; i++)
551 {
552 *(uint32_t *)ptr = tswapl(env->gpr[i]);
553 ptr += 4;
554 }
555
556 *(uint32_t *)ptr = tswapl(env->CP0_Status);
557 ptr += 4;
558
559 *(uint32_t *)ptr = tswapl(env->LO);
560 ptr += 4;
561
562 *(uint32_t *)ptr = tswapl(env->HI);
563 ptr += 4;
564
565 *(uint32_t *)ptr = tswapl(env->CP0_BadVAddr);
566 ptr += 4;
567
568 *(uint32_t *)ptr = tswapl(env->CP0_Cause);
569 ptr += 4;
570
571 *(uint32_t *)ptr = tswapl(env->PC);
572 ptr += 4;
573
36d23958 574 if (env->CP0_Config1 & (1 << CP0C1_FP))
8e33c08c 575 {
36d23958
TS
576 for (i = 0; i < 32; i++)
577 {
5a5012ec 578 *(uint32_t *)ptr = tswapl(env->fpr[i].fs[FP_ENDIAN_IDX]);
36d23958
TS
579 ptr += 4;
580 }
8e33c08c 581
36d23958
TS
582 *(uint32_t *)ptr = tswapl(env->fcr31);
583 ptr += 4;
8e33c08c 584
36d23958
TS
585 *(uint32_t *)ptr = tswapl(env->fcr0);
586 ptr += 4;
587 }
8e33c08c 588
6f970bd9 589 /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
8e33c08c 590 /* what's 'fp' mean here? */
6f970bd9
FB
591
592 return ptr - mem_buf;
593}
594
8e33c08c
TS
595/* convert MIPS rounding mode in FCR31 to IEEE library */
596static unsigned int ieee_rm[] =
597 {
598 float_round_nearest_even,
599 float_round_to_zero,
600 float_round_up,
601 float_round_down
602 };
603#define RESTORE_ROUNDING_MODE \
604 set_float_rounding_mode(ieee_rm[env->fcr31 & 3], &env->fp_status)
605
6f970bd9
FB
606static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
607{
608 int i;
609 uint8_t *ptr;
610
611 ptr = mem_buf;
612 for (i = 0; i < 32; i++)
613 {
614 env->gpr[i] = tswapl(*(uint32_t *)ptr);
615 ptr += 4;
616 }
617
618 env->CP0_Status = tswapl(*(uint32_t *)ptr);
619 ptr += 4;
620
621 env->LO = tswapl(*(uint32_t *)ptr);
622 ptr += 4;
623
624 env->HI = tswapl(*(uint32_t *)ptr);
625 ptr += 4;
626
627 env->CP0_BadVAddr = tswapl(*(uint32_t *)ptr);
628 ptr += 4;
629
630 env->CP0_Cause = tswapl(*(uint32_t *)ptr);
631 ptr += 4;
632
633 env->PC = tswapl(*(uint32_t *)ptr);
634 ptr += 4;
8e33c08c 635
36d23958 636 if (env->CP0_Config1 & (1 << CP0C1_FP))
8e33c08c 637 {
36d23958
TS
638 for (i = 0; i < 32; i++)
639 {
5a5012ec 640 env->fpr[i].fs[FP_ENDIAN_IDX] = tswapl(*(uint32_t *)ptr);
36d23958
TS
641 ptr += 4;
642 }
8e33c08c 643
36d23958
TS
644 env->fcr31 = tswapl(*(uint32_t *)ptr) & 0x0183FFFF;
645 ptr += 4;
8e33c08c 646
36d23958
TS
647 env->fcr0 = tswapl(*(uint32_t *)ptr);
648 ptr += 4;
8e33c08c 649
36d23958
TS
650 /* set rounding mode */
651 RESTORE_ROUNDING_MODE;
8e33c08c
TS
652
653#ifndef CONFIG_SOFTFLOAT
36d23958
TS
654 /* no floating point exception for native float */
655 SET_FP_ENABLE(env->fcr31, 0);
8e33c08c 656#endif
36d23958 657 }
6f970bd9 658}
fdf9b3e8 659#elif defined (TARGET_SH4)
6ef99fc5
TS
660
661/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
662
fdf9b3e8
FB
663static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
664{
665 uint32_t *ptr = (uint32_t *)mem_buf;
666 int i;
667
668#define SAVE(x) *ptr++=tswapl(x)
9c2a9ea1
PB
669 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
670 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
671 } else {
672 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
673 }
674 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
fdf9b3e8
FB
675 SAVE (env->pc);
676 SAVE (env->pr);
677 SAVE (env->gbr);
678 SAVE (env->vbr);
679 SAVE (env->mach);
680 SAVE (env->macl);
681 SAVE (env->sr);
6ef99fc5
TS
682 SAVE (env->fpul);
683 SAVE (env->fpscr);
684 for (i = 0; i < 16; i++)
685 SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
686 SAVE (env->ssr);
687 SAVE (env->spc);
688 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
689 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
fdf9b3e8
FB
690 return ((uint8_t *)ptr - mem_buf);
691}
692
693static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
694{
695 uint32_t *ptr = (uint32_t *)mem_buf;
696 int i;
697
698#define LOAD(x) (x)=*ptr++;
9c2a9ea1
PB
699 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
700 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
701 } else {
702 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
703 }
704 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
fdf9b3e8
FB
705 LOAD (env->pc);
706 LOAD (env->pr);
707 LOAD (env->gbr);
708 LOAD (env->vbr);
709 LOAD (env->mach);
710 LOAD (env->macl);
711 LOAD (env->sr);
6ef99fc5
TS
712 LOAD (env->fpul);
713 LOAD (env->fpscr);
714 for (i = 0; i < 16; i++)
715 LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
716 LOAD (env->ssr);
717 LOAD (env->spc);
718 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
719 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
fdf9b3e8 720}
1fddef4b 721#else
6da41eaf
FB
722static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
723{
724 return 0;
725}
726
727static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
728{
729}
730
731#endif
b4608c04 732
1fddef4b 733static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
b4608c04 734{
b4608c04 735 const char *p;
858693c6 736 int ch, reg_size, type;
b4608c04
FB
737 char buf[4096];
738 uint8_t mem_buf[2000];
739 uint32_t *registers;
9d9754a3 740 target_ulong addr, len;
b4608c04 741
858693c6
FB
742#ifdef DEBUG_GDB
743 printf("command='%s'\n", line_buf);
744#endif
745 p = line_buf;
746 ch = *p++;
747 switch(ch) {
748 case '?':
1fddef4b 749 /* TODO: Make this return the correct value for user-mode. */
858693c6
FB
750 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
751 put_packet(s, buf);
752 break;
753 case 'c':
754 if (*p != '\0') {
9d9754a3 755 addr = strtoull(p, (char **)&p, 16);
4c3a88a2 756#if defined(TARGET_I386)
858693c6 757 env->eip = addr;
5be1a8e0 758#elif defined (TARGET_PPC)
858693c6 759 env->nip = addr;
8d5f07fa
FB
760#elif defined (TARGET_SPARC)
761 env->pc = addr;
762 env->npc = addr + 4;
b5ff1b31
FB
763#elif defined (TARGET_ARM)
764 env->regs[15] = addr;
fdf9b3e8
FB
765#elif defined (TARGET_SH4)
766 env->pc = addr;
4c3a88a2 767#endif
858693c6 768 }
41625033
FB
769#ifdef CONFIG_USER_ONLY
770 s->running_state = 1;
771#else
772 vm_start();
773#endif
774 return RS_IDLE;
858693c6
FB
775 case 's':
776 if (*p != '\0') {
777 addr = strtoul(p, (char **)&p, 16);
c33a346e 778#if defined(TARGET_I386)
858693c6 779 env->eip = addr;
5be1a8e0 780#elif defined (TARGET_PPC)
858693c6 781 env->nip = addr;
8d5f07fa
FB
782#elif defined (TARGET_SPARC)
783 env->pc = addr;
784 env->npc = addr + 4;
b5ff1b31
FB
785#elif defined (TARGET_ARM)
786 env->regs[15] = addr;
fdf9b3e8
FB
787#elif defined (TARGET_SH4)
788 env->pc = addr;
c33a346e 789#endif
858693c6
FB
790 }
791 cpu_single_step(env, 1);
41625033
FB
792#ifdef CONFIG_USER_ONLY
793 s->running_state = 1;
794#else
795 vm_start();
796#endif
797 return RS_IDLE;
a2d1ebaf
PB
798 case 'F':
799 {
800 target_ulong ret;
801 target_ulong err;
802
803 ret = strtoull(p, (char **)&p, 16);
804 if (*p == ',') {
805 p++;
806 err = strtoull(p, (char **)&p, 16);
807 } else {
808 err = 0;
809 }
810 if (*p == ',')
811 p++;
812 type = *p;
813 if (gdb_current_syscall_cb)
814 gdb_current_syscall_cb(s->env, ret, err);
815 if (type == 'C') {
816 put_packet(s, "T02");
817 } else {
818#ifdef CONFIG_USER_ONLY
819 s->running_state = 1;
820#else
821 vm_start();
822#endif
823 }
824 }
825 break;
858693c6
FB
826 case 'g':
827 reg_size = cpu_gdb_read_registers(env, mem_buf);
828 memtohex(buf, mem_buf, reg_size);
829 put_packet(s, buf);
830 break;
831 case 'G':
832 registers = (void *)mem_buf;
833 len = strlen(p) / 2;
834 hextomem((uint8_t *)registers, p, len);
835 cpu_gdb_write_registers(env, mem_buf, len);
836 put_packet(s, "OK");
837 break;
838 case 'm':
9d9754a3 839 addr = strtoull(p, (char **)&p, 16);
858693c6
FB
840 if (*p == ',')
841 p++;
9d9754a3 842 len = strtoull(p, NULL, 16);
6f970bd9
FB
843 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
844 put_packet (s, "E14");
845 } else {
846 memtohex(buf, mem_buf, len);
847 put_packet(s, buf);
848 }
858693c6
FB
849 break;
850 case 'M':
9d9754a3 851 addr = strtoull(p, (char **)&p, 16);
858693c6
FB
852 if (*p == ',')
853 p++;
9d9754a3 854 len = strtoull(p, (char **)&p, 16);
b328f873 855 if (*p == ':')
858693c6
FB
856 p++;
857 hextomem(mem_buf, p, len);
858 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
905f20b1 859 put_packet(s, "E14");
858693c6
FB
860 else
861 put_packet(s, "OK");
862 break;
863 case 'Z':
864 type = strtoul(p, (char **)&p, 16);
865 if (*p == ',')
866 p++;
9d9754a3 867 addr = strtoull(p, (char **)&p, 16);
858693c6
FB
868 if (*p == ',')
869 p++;
9d9754a3 870 len = strtoull(p, (char **)&p, 16);
858693c6
FB
871 if (type == 0 || type == 1) {
872 if (cpu_breakpoint_insert(env, addr) < 0)
873 goto breakpoint_error;
874 put_packet(s, "OK");
6658ffb8
PB
875#ifndef CONFIG_USER_ONLY
876 } else if (type == 2) {
877 if (cpu_watchpoint_insert(env, addr) < 0)
878 goto breakpoint_error;
879 put_packet(s, "OK");
880#endif
858693c6
FB
881 } else {
882 breakpoint_error:
905f20b1 883 put_packet(s, "E22");
858693c6
FB
884 }
885 break;
886 case 'z':
887 type = strtoul(p, (char **)&p, 16);
888 if (*p == ',')
889 p++;
9d9754a3 890 addr = strtoull(p, (char **)&p, 16);
858693c6
FB
891 if (*p == ',')
892 p++;
9d9754a3 893 len = strtoull(p, (char **)&p, 16);
858693c6
FB
894 if (type == 0 || type == 1) {
895 cpu_breakpoint_remove(env, addr);
896 put_packet(s, "OK");
6658ffb8
PB
897#ifndef CONFIG_USER_ONLY
898 } else if (type == 2) {
899 cpu_watchpoint_remove(env, addr);
900 put_packet(s, "OK");
901#endif
858693c6
FB
902 } else {
903 goto breakpoint_error;
904 }
905 break;
831b7825 906#ifdef CONFIG_LINUX_USER
978efd6a
PB
907 case 'q':
908 if (strncmp(p, "Offsets", 7) == 0) {
909 TaskState *ts = env->opaque;
910
911 sprintf(buf, "Text=%x;Data=%x;Bss=%x", ts->info->code_offset,
912 ts->info->data_offset, ts->info->data_offset);
913 put_packet(s, buf);
914 break;
915 }
916 /* Fall through. */
917#endif
858693c6
FB
918 default:
919 // unknown_command:
920 /* put empty packet */
921 buf[0] = '\0';
922 put_packet(s, buf);
923 break;
924 }
925 return RS_IDLE;
926}
927
612458f5
FB
928extern void tb_flush(CPUState *env);
929
1fddef4b 930#ifndef CONFIG_USER_ONLY
858693c6
FB
931static void gdb_vm_stopped(void *opaque, int reason)
932{
933 GDBState *s = opaque;
934 char buf[256];
935 int ret;
936
a2d1ebaf
PB
937 if (s->state == RS_SYSCALL)
938 return;
939
858693c6 940 /* disable single step if it was enable */
6a00d601 941 cpu_single_step(s->env, 0);
858693c6 942
e80cfcfc 943 if (reason == EXCP_DEBUG) {
6658ffb8 944 if (s->env->watchpoint_hit) {
aa6290b7
PB
945 snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
946 SIGTRAP,
6658ffb8
PB
947 s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
948 put_packet(s, buf);
949 s->env->watchpoint_hit = 0;
950 return;
951 }
6a00d601 952 tb_flush(s->env);
858693c6 953 ret = SIGTRAP;
bbeb7b5c
FB
954 } else if (reason == EXCP_INTERRUPT) {
955 ret = SIGINT;
956 } else {
858693c6 957 ret = 0;
bbeb7b5c 958 }
858693c6
FB
959 snprintf(buf, sizeof(buf), "S%02x", ret);
960 put_packet(s, buf);
961}
1fddef4b 962#endif
858693c6 963
a2d1ebaf
PB
964/* Send a gdb syscall request.
965 This accepts limited printf-style format specifiers, specifically:
966 %x - target_ulong argument printed in hex.
967 %s - string pointer (target_ulong) and length (int) pair. */
968void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
969{
970 va_list va;
971 char buf[256];
972 char *p;
973 target_ulong addr;
974 GDBState *s;
975
976 s = gdb_syscall_state;
977 if (!s)
978 return;
979 gdb_current_syscall_cb = cb;
980 s->state = RS_SYSCALL;
981#ifndef CONFIG_USER_ONLY
982 vm_stop(EXCP_DEBUG);
983#endif
984 s->state = RS_IDLE;
985 va_start(va, fmt);
986 p = buf;
987 *(p++) = 'F';
988 while (*fmt) {
989 if (*fmt == '%') {
990 fmt++;
991 switch (*fmt++) {
992 case 'x':
993 addr = va_arg(va, target_ulong);
994 p += sprintf(p, TARGET_FMT_lx, addr);
995 break;
996 case 's':
997 addr = va_arg(va, target_ulong);
998 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
999 break;
1000 default:
1001 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1002 fmt - 1);
1003 break;
1004 }
1005 } else {
1006 *(p++) = *(fmt++);
1007 }
1008 }
1009 va_end(va);
1010 put_packet(s, buf);
1011#ifdef CONFIG_USER_ONLY
1012 gdb_handlesig(s->env, 0);
1013#else
1014 cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1015#endif
1016}
1017
6a00d601 1018static void gdb_read_byte(GDBState *s, int ch)
858693c6 1019{
6a00d601 1020 CPUState *env = s->env;
858693c6
FB
1021 int i, csum;
1022 char reply[1];
1023
1fddef4b 1024#ifndef CONFIG_USER_ONLY
4046d913
PB
1025 if (s->last_packet_len) {
1026 /* Waiting for a response to the last packet. If we see the start
1027 of a new command then abandon the previous response. */
1028 if (ch == '-') {
1029#ifdef DEBUG_GDB
1030 printf("Got NACK, retransmitting\n");
1031#endif
1032 put_buffer(s, s->last_packet, s->last_packet_len);
1033 }
1034#ifdef DEBUG_GDB
1035 else if (ch == '+')
1036 printf("Got ACK\n");
1037 else
1038 printf("Got '%c' when expecting ACK/NACK\n", ch);
1039#endif
1040 if (ch == '+' || ch == '$')
1041 s->last_packet_len = 0;
1042 if (ch != '$')
1043 return;
1044 }
858693c6
FB
1045 if (vm_running) {
1046 /* when the CPU is running, we cannot do anything except stop
1047 it when receiving a char */
1048 vm_stop(EXCP_INTERRUPT);
41625033 1049 } else
1fddef4b 1050#endif
41625033 1051 {
858693c6
FB
1052 switch(s->state) {
1053 case RS_IDLE:
1054 if (ch == '$') {
1055 s->line_buf_index = 0;
1056 s->state = RS_GETLINE;
c33a346e 1057 }
b4608c04 1058 break;
858693c6
FB
1059 case RS_GETLINE:
1060 if (ch == '#') {
1061 s->state = RS_CHKSUM1;
1062 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1063 s->state = RS_IDLE;
4c3a88a2 1064 } else {
858693c6 1065 s->line_buf[s->line_buf_index++] = ch;
4c3a88a2
FB
1066 }
1067 break;
858693c6
FB
1068 case RS_CHKSUM1:
1069 s->line_buf[s->line_buf_index] = '\0';
1070 s->line_csum = fromhex(ch) << 4;
1071 s->state = RS_CHKSUM2;
1072 break;
1073 case RS_CHKSUM2:
1074 s->line_csum |= fromhex(ch);
1075 csum = 0;
1076 for(i = 0; i < s->line_buf_index; i++) {
1077 csum += s->line_buf[i];
1078 }
1079 if (s->line_csum != (csum & 0xff)) {
1080 reply[0] = '-';
1081 put_buffer(s, reply, 1);
1082 s->state = RS_IDLE;
4c3a88a2 1083 } else {
858693c6
FB
1084 reply[0] = '+';
1085 put_buffer(s, reply, 1);
1fddef4b 1086 s->state = gdb_handle_packet(s, env, s->line_buf);
4c3a88a2
FB
1087 }
1088 break;
a2d1ebaf
PB
1089 default:
1090 abort();
858693c6
FB
1091 }
1092 }
1093}
1094
1fddef4b
FB
1095#ifdef CONFIG_USER_ONLY
1096int
1097gdb_handlesig (CPUState *env, int sig)
1098{
1099 GDBState *s;
1100 char buf[256];
1101 int n;
1102
1103 if (gdbserver_fd < 0)
1104 return sig;
1105
1106 s = &gdbserver_state;
1107
1108 /* disable single step if it was enabled */
1109 cpu_single_step(env, 0);
1110 tb_flush(env);
1111
1112 if (sig != 0)
1113 {
1114 snprintf(buf, sizeof(buf), "S%02x", sig);
1115 put_packet(s, buf);
1116 }
1117
1fddef4b
FB
1118 sig = 0;
1119 s->state = RS_IDLE;
41625033
FB
1120 s->running_state = 0;
1121 while (s->running_state == 0) {
1fddef4b
FB
1122 n = read (s->fd, buf, 256);
1123 if (n > 0)
1124 {
1125 int i;
1126
1127 for (i = 0; i < n; i++)
6a00d601 1128 gdb_read_byte (s, buf[i]);
1fddef4b
FB
1129 }
1130 else if (n == 0 || errno != EAGAIN)
1131 {
1132 /* XXX: Connection closed. Should probably wait for annother
1133 connection before continuing. */
1134 return sig;
1135 }
41625033 1136 }
1fddef4b
FB
1137 return sig;
1138}
e9009676
FB
1139
1140/* Tell the remote gdb that the process has exited. */
1141void gdb_exit(CPUState *env, int code)
1142{
1143 GDBState *s;
1144 char buf[4];
1145
1146 if (gdbserver_fd < 0)
1147 return;
1148
1149 s = &gdbserver_state;
1150
1151 snprintf(buf, sizeof(buf), "W%02x", code);
1152 put_packet(s, buf);
1153}
1154
1fddef4b 1155
7c9d8e07 1156static void gdb_accept(void *opaque)
858693c6
FB
1157{
1158 GDBState *s;
1159 struct sockaddr_in sockaddr;
1160 socklen_t len;
1161 int val, fd;
1162
1163 for(;;) {
1164 len = sizeof(sockaddr);
1165 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1166 if (fd < 0 && errno != EINTR) {
1167 perror("accept");
1168 return;
1169 } else if (fd >= 0) {
b4608c04
FB
1170 break;
1171 }
1172 }
858693c6
FB
1173
1174 /* set short latency */
1175 val = 1;
8f447cc7 1176 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
858693c6 1177
1fddef4b
FB
1178 s = &gdbserver_state;
1179 memset (s, 0, sizeof (GDBState));
6a00d601 1180 s->env = first_cpu; /* XXX: allow to change CPU */
858693c6
FB
1181 s->fd = fd;
1182
a2d1ebaf
PB
1183 gdb_syscall_state = s;
1184
858693c6 1185 fcntl(fd, F_SETFL, O_NONBLOCK);
858693c6
FB
1186}
1187
1188static int gdbserver_open(int port)
1189{
1190 struct sockaddr_in sockaddr;
1191 int fd, val, ret;
1192
1193 fd = socket(PF_INET, SOCK_STREAM, 0);
1194 if (fd < 0) {
1195 perror("socket");
1196 return -1;
1197 }
1198
1199 /* allow fast reuse */
1200 val = 1;
8f447cc7 1201 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
858693c6
FB
1202
1203 sockaddr.sin_family = AF_INET;
1204 sockaddr.sin_port = htons(port);
1205 sockaddr.sin_addr.s_addr = 0;
1206 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1207 if (ret < 0) {
1208 perror("bind");
1209 return -1;
1210 }
1211 ret = listen(fd, 0);
1212 if (ret < 0) {
1213 perror("listen");
1214 return -1;
1215 }
858693c6
FB
1216 return fd;
1217}
1218
1219int gdbserver_start(int port)
1220{
1221 gdbserver_fd = gdbserver_open(port);
1222 if (gdbserver_fd < 0)
1223 return -1;
1224 /* accept connections */
7c9d8e07 1225 gdb_accept (NULL);
4046d913
PB
1226 return 0;
1227}
1fddef4b 1228#else
4046d913
PB
1229static int gdb_chr_can_recieve(void *opaque)
1230{
1231 return 1;
1232}
1233
1234static void gdb_chr_recieve(void *opaque, const uint8_t *buf, int size)
1235{
1236 GDBState *s = opaque;
1237 int i;
1238
1239 for (i = 0; i < size; i++) {
1240 gdb_read_byte(s, buf[i]);
1241 }
1242}
1243
1244static void gdb_chr_event(void *opaque, int event)
1245{
1246 switch (event) {
1247 case CHR_EVENT_RESET:
1248 vm_stop(EXCP_INTERRUPT);
a2d1ebaf 1249 gdb_syscall_state = opaque;
4046d913
PB
1250 break;
1251 default:
1252 break;
1253 }
1254}
1255
cfc3475a 1256int gdbserver_start(const char *port)
4046d913
PB
1257{
1258 GDBState *s;
cfc3475a
PB
1259 char gdbstub_port_name[128];
1260 int port_num;
1261 char *p;
1262 CharDriverState *chr;
1263
1264 if (!port || !*port)
1265 return -1;
4046d913 1266
cfc3475a
PB
1267 port_num = strtol(port, &p, 10);
1268 if (*p == 0) {
1269 /* A numeric value is interpreted as a port number. */
1270 snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1271 "tcp::%d,nowait,nodelay,server", port_num);
1272 port = gdbstub_port_name;
1273 }
1274
1275 chr = qemu_chr_open(port);
4046d913
PB
1276 if (!chr)
1277 return -1;
1278
1279 s = qemu_mallocz(sizeof(GDBState));
1280 if (!s) {
1281 return -1;
1282 }
1283 s->env = first_cpu; /* XXX: allow to change CPU */
1284 s->chr = chr;
1285 qemu_chr_add_handlers(chr, gdb_chr_can_recieve, gdb_chr_recieve,
1286 gdb_chr_event, s);
1287 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
b4608c04
FB
1288 return 0;
1289}
4046d913 1290#endif