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b4608c04
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1/*
2 * gdb server stub
3 *
3475187d 4 * Copyright (c) 2003-2005 Fabrice Bellard
b4608c04
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5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
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20#ifdef CONFIG_USER_ONLY
21#include <stdlib.h>
22#include <stdio.h>
23#include <stdarg.h>
24#include <string.h>
25#include <errno.h>
26#include <unistd.h>
27
28#include "qemu.h"
29#else
67b915a5 30#include "vl.h"
1fddef4b 31#endif
67b915a5 32
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33#include <sys/socket.h>
34#include <netinet/in.h>
35#include <netinet/tcp.h>
36#include <signal.h>
b4608c04 37
4abe615b 38//#define DEBUG_GDB
b4608c04 39
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40enum RSState {
41 RS_IDLE,
42 RS_GETLINE,
43 RS_CHKSUM1,
44 RS_CHKSUM2,
45};
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46/* XXX: This is not thread safe. Do we care? */
47static int gdbserver_fd = -1;
b4608c04 48
858693c6 49typedef struct GDBState {
6a00d601 50 CPUState *env; /* current CPU */
41625033 51 enum RSState state; /* parsing state */
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52 int fd;
53 char line_buf[4096];
54 int line_buf_index;
55 int line_csum;
41625033
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56#ifdef CONFIG_USER_ONLY
57 int running_state;
58#endif
858693c6 59} GDBState;
b4608c04 60
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61#ifdef CONFIG_USER_ONLY
62/* XXX: remove this hack. */
63static GDBState gdbserver_state;
64#endif
65
858693c6 66static int get_char(GDBState *s)
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67{
68 uint8_t ch;
69 int ret;
70
71 for(;;) {
858693c6 72 ret = read(s->fd, &ch, 1);
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73 if (ret < 0) {
74 if (errno != EINTR && errno != EAGAIN)
75 return -1;
76 } else if (ret == 0) {
77 return -1;
78 } else {
79 break;
80 }
81 }
82 return ch;
83}
84
858693c6 85static void put_buffer(GDBState *s, const uint8_t *buf, int len)
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86{
87 int ret;
88
89 while (len > 0) {
858693c6 90 ret = write(s->fd, buf, len);
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91 if (ret < 0) {
92 if (errno != EINTR && errno != EAGAIN)
93 return;
94 } else {
95 buf += ret;
96 len -= ret;
97 }
98 }
99}
100
101static inline int fromhex(int v)
102{
103 if (v >= '0' && v <= '9')
104 return v - '0';
105 else if (v >= 'A' && v <= 'F')
106 return v - 'A' + 10;
107 else if (v >= 'a' && v <= 'f')
108 return v - 'a' + 10;
109 else
110 return 0;
111}
112
113static inline int tohex(int v)
114{
115 if (v < 10)
116 return v + '0';
117 else
118 return v - 10 + 'a';
119}
120
121static void memtohex(char *buf, const uint8_t *mem, int len)
122{
123 int i, c;
124 char *q;
125 q = buf;
126 for(i = 0; i < len; i++) {
127 c = mem[i];
128 *q++ = tohex(c >> 4);
129 *q++ = tohex(c & 0xf);
130 }
131 *q = '\0';
132}
133
134static void hextomem(uint8_t *mem, const char *buf, int len)
135{
136 int i;
137
138 for(i = 0; i < len; i++) {
139 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
140 buf += 2;
141 }
142}
143
b4608c04 144/* return -1 if error, 0 if OK */
858693c6 145static int put_packet(GDBState *s, char *buf)
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146{
147 char buf1[3];
148 int len, csum, ch, i;
149
150#ifdef DEBUG_GDB
151 printf("reply='%s'\n", buf);
152#endif
153
154 for(;;) {
155 buf1[0] = '$';
858693c6 156 put_buffer(s, buf1, 1);
b4608c04 157 len = strlen(buf);
858693c6 158 put_buffer(s, buf, len);
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159 csum = 0;
160 for(i = 0; i < len; i++) {
161 csum += buf[i];
162 }
163 buf1[0] = '#';
164 buf1[1] = tohex((csum >> 4) & 0xf);
165 buf1[2] = tohex((csum) & 0xf);
166
858693c6 167 put_buffer(s, buf1, 3);
b4608c04 168
858693c6 169 ch = get_char(s);
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170 if (ch < 0)
171 return -1;
172 if (ch == '+')
173 break;
174 }
175 return 0;
176}
177
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178#if defined(TARGET_I386)
179
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180static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
181{
e95c8d51 182 uint32_t *registers = (uint32_t *)mem_buf;
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183 int i, fpus;
184
185 for(i = 0; i < 8; i++) {
e95c8d51 186 registers[i] = env->regs[i];
6da41eaf 187 }
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188 registers[8] = env->eip;
189 registers[9] = env->eflags;
190 registers[10] = env->segs[R_CS].selector;
191 registers[11] = env->segs[R_SS].selector;
192 registers[12] = env->segs[R_DS].selector;
193 registers[13] = env->segs[R_ES].selector;
194 registers[14] = env->segs[R_FS].selector;
195 registers[15] = env->segs[R_GS].selector;
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196 /* XXX: convert floats */
197 for(i = 0; i < 8; i++) {
198 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
199 }
e95c8d51 200 registers[36] = env->fpuc;
6da41eaf 201 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
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202 registers[37] = fpus;
203 registers[38] = 0; /* XXX: convert tags */
204 registers[39] = 0; /* fiseg */
205 registers[40] = 0; /* fioff */
206 registers[41] = 0; /* foseg */
207 registers[42] = 0; /* fooff */
208 registers[43] = 0; /* fop */
209
210 for(i = 0; i < 16; i++)
211 tswapls(&registers[i]);
212 for(i = 36; i < 44; i++)
213 tswapls(&registers[i]);
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214 return 44 * 4;
215}
216
217static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
218{
219 uint32_t *registers = (uint32_t *)mem_buf;
220 int i;
221
222 for(i = 0; i < 8; i++) {
223 env->regs[i] = tswapl(registers[i]);
224 }
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225 env->eip = tswapl(registers[8]);
226 env->eflags = tswapl(registers[9]);
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227#if defined(CONFIG_USER_ONLY)
228#define LOAD_SEG(index, sreg)\
229 if (tswapl(registers[index]) != env->segs[sreg].selector)\
230 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
231 LOAD_SEG(10, R_CS);
232 LOAD_SEG(11, R_SS);
233 LOAD_SEG(12, R_DS);
234 LOAD_SEG(13, R_ES);
235 LOAD_SEG(14, R_FS);
236 LOAD_SEG(15, R_GS);
237#endif
238}
239
9e62fd7f 240#elif defined (TARGET_PPC)
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241static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
242{
a541f297 243 uint32_t *registers = (uint32_t *)mem_buf, tmp;
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244 int i;
245
246 /* fill in gprs */
a541f297 247 for(i = 0; i < 32; i++) {
e95c8d51 248 registers[i] = tswapl(env->gpr[i]);
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249 }
250 /* fill in fprs */
251 for (i = 0; i < 32; i++) {
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252 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
253 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
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254 }
255 /* nip, msr, ccr, lnk, ctr, xer, mq */
e95c8d51 256 registers[96] = tswapl(env->nip);
3fc6c082 257 registers[97] = tswapl(do_load_msr(env));
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258 tmp = 0;
259 for (i = 0; i < 8; i++)
a541f297 260 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
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261 registers[98] = tswapl(tmp);
262 registers[99] = tswapl(env->lr);
263 registers[100] = tswapl(env->ctr);
3fc6c082 264 registers[101] = tswapl(do_load_xer(env));
e95c8d51 265 registers[102] = 0;
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266
267 return 103 * 4;
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268}
269
270static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
271{
272 uint32_t *registers = (uint32_t *)mem_buf;
273 int i;
274
275 /* fill in gprs */
276 for (i = 0; i < 32; i++) {
e95c8d51 277 env->gpr[i] = tswapl(registers[i]);
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278 }
279 /* fill in fprs */
280 for (i = 0; i < 32; i++) {
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281 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
282 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
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283 }
284 /* nip, msr, ccr, lnk, ctr, xer, mq */
e95c8d51 285 env->nip = tswapl(registers[96]);
3fc6c082 286 do_store_msr(env, tswapl(registers[97]));
e95c8d51 287 registers[98] = tswapl(registers[98]);
9e62fd7f 288 for (i = 0; i < 8; i++)
a541f297 289 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
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290 env->lr = tswapl(registers[99]);
291 env->ctr = tswapl(registers[100]);
3fc6c082 292 do_store_xer(env, tswapl(registers[101]));
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293}
294#elif defined (TARGET_SPARC)
295static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
296{
3475187d 297 target_ulong *registers = (target_ulong *)mem_buf;
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298 int i;
299
300 /* fill in g0..g7 */
48b2c193 301 for(i = 0; i < 8; i++) {
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302 registers[i] = tswapl(env->gregs[i]);
303 }
304 /* fill in register window */
305 for(i = 0; i < 24; i++) {
306 registers[i + 8] = tswapl(env->regwptr[i]);
307 }
308 /* fill in fprs */
309 for (i = 0; i < 32; i++) {
310 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
311 }
3475187d 312#ifndef TARGET_SPARC64
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313 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
314 registers[64] = tswapl(env->y);
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315 {
316 target_ulong tmp;
317
318 tmp = GET_PSR(env);
319 registers[65] = tswapl(tmp);
320 }
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321 registers[66] = tswapl(env->wim);
322 registers[67] = tswapl(env->tbr);
323 registers[68] = tswapl(env->pc);
324 registers[69] = tswapl(env->npc);
325 registers[70] = tswapl(env->fsr);
326 registers[71] = 0; /* csr */
327 registers[72] = 0;
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328 return 73 * sizeof(target_ulong);
329#else
330 for (i = 0; i < 32; i += 2) {
331 registers[i/2 + 64] = tswapl(*((uint64_t *)&env->fpr[i]));
332 }
333 registers[81] = tswapl(env->pc);
334 registers[82] = tswapl(env->npc);
335 registers[83] = tswapl(env->tstate[env->tl]);
336 registers[84] = tswapl(env->fsr);
337 registers[85] = tswapl(env->fprs);
338 registers[86] = tswapl(env->y);
339 return 87 * sizeof(target_ulong);
340#endif
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341}
342
343static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
344{
3475187d 345 target_ulong *registers = (target_ulong *)mem_buf;
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346 int i;
347
348 /* fill in g0..g7 */
349 for(i = 0; i < 7; i++) {
350 env->gregs[i] = tswapl(registers[i]);
351 }
352 /* fill in register window */
353 for(i = 0; i < 24; i++) {
3475187d 354 env->regwptr[i] = tswapl(registers[i + 8]);
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355 }
356 /* fill in fprs */
357 for (i = 0; i < 32; i++) {
358 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
359 }
3475187d 360#ifndef TARGET_SPARC64
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361 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
362 env->y = tswapl(registers[64]);
e80cfcfc 363 PUT_PSR(env, tswapl(registers[65]));
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364 env->wim = tswapl(registers[66]);
365 env->tbr = tswapl(registers[67]);
366 env->pc = tswapl(registers[68]);
367 env->npc = tswapl(registers[69]);
368 env->fsr = tswapl(registers[70]);
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369#else
370 for (i = 0; i < 32; i += 2) {
371 uint64_t tmp;
372 tmp = tswapl(registers[i/2 + 64]) << 32;
373 tmp |= tswapl(registers[i/2 + 64 + 1]);
374 *((uint64_t *)&env->fpr[i]) = tmp;
375 }
376 env->pc = tswapl(registers[81]);
377 env->npc = tswapl(registers[82]);
378 env->tstate[env->tl] = tswapl(registers[83]);
379 env->fsr = tswapl(registers[84]);
380 env->fprs = tswapl(registers[85]);
381 env->y = tswapl(registers[86]);
382#endif
9e62fd7f 383}
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384#elif defined (TARGET_ARM)
385static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
386{
387 int i;
388 uint8_t *ptr;
389
390 ptr = mem_buf;
391 /* 16 core integer registers (4 bytes each). */
392 for (i = 0; i < 16; i++)
393 {
394 *(uint32_t *)ptr = tswapl(env->regs[i]);
395 ptr += 4;
396 }
397 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
398 Not yet implemented. */
399 memset (ptr, 0, 8 * 12 + 4);
400 ptr += 8 * 12 + 4;
401 /* CPSR (4 bytes). */
b5ff1b31 402 *(uint32_t *)ptr = tswapl (cpsr_read(env));
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403 ptr += 4;
404
405 return ptr - mem_buf;
406}
6da41eaf 407
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408static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
409{
410 int i;
411 uint8_t *ptr;
412
413 ptr = mem_buf;
414 /* Core integer registers. */
415 for (i = 0; i < 16; i++)
416 {
417 env->regs[i] = tswapl(*(uint32_t *)ptr);
418 ptr += 4;
419 }
420 /* Ignore FPA regs and scr. */
421 ptr += 8 * 12 + 4;
b5ff1b31 422 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
1fddef4b 423}
6f970bd9
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424#elif defined (TARGET_MIPS)
425static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
426{
427 int i;
428 uint8_t *ptr;
429
430 ptr = mem_buf;
431 for (i = 0; i < 32; i++)
432 {
433 *(uint32_t *)ptr = tswapl(env->gpr[i]);
434 ptr += 4;
435 }
436
437 *(uint32_t *)ptr = tswapl(env->CP0_Status);
438 ptr += 4;
439
440 *(uint32_t *)ptr = tswapl(env->LO);
441 ptr += 4;
442
443 *(uint32_t *)ptr = tswapl(env->HI);
444 ptr += 4;
445
446 *(uint32_t *)ptr = tswapl(env->CP0_BadVAddr);
447 ptr += 4;
448
449 *(uint32_t *)ptr = tswapl(env->CP0_Cause);
450 ptr += 4;
451
452 *(uint32_t *)ptr = tswapl(env->PC);
453 ptr += 4;
454
455 /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
456
457 return ptr - mem_buf;
458}
459
460static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
461{
462 int i;
463 uint8_t *ptr;
464
465 ptr = mem_buf;
466 for (i = 0; i < 32; i++)
467 {
468 env->gpr[i] = tswapl(*(uint32_t *)ptr);
469 ptr += 4;
470 }
471
472 env->CP0_Status = tswapl(*(uint32_t *)ptr);
473 ptr += 4;
474
475 env->LO = tswapl(*(uint32_t *)ptr);
476 ptr += 4;
477
478 env->HI = tswapl(*(uint32_t *)ptr);
479 ptr += 4;
480
481 env->CP0_BadVAddr = tswapl(*(uint32_t *)ptr);
482 ptr += 4;
483
484 env->CP0_Cause = tswapl(*(uint32_t *)ptr);
485 ptr += 4;
486
487 env->PC = tswapl(*(uint32_t *)ptr);
488 ptr += 4;
489}
fdf9b3e8
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490#elif defined (TARGET_SH4)
491static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
492{
493 uint32_t *ptr = (uint32_t *)mem_buf;
494 int i;
495
496#define SAVE(x) *ptr++=tswapl(x)
497 for (i = 0; i < 16; i++) SAVE(env->gregs[i]);
498 SAVE (env->pc);
499 SAVE (env->pr);
500 SAVE (env->gbr);
501 SAVE (env->vbr);
502 SAVE (env->mach);
503 SAVE (env->macl);
504 SAVE (env->sr);
505 SAVE (0); /* TICKS */
506 SAVE (0); /* STALLS */
507 SAVE (0); /* CYCLES */
508 SAVE (0); /* INSTS */
509 SAVE (0); /* PLR */
510
511 return ((uint8_t *)ptr - mem_buf);
512}
513
514static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
515{
516 uint32_t *ptr = (uint32_t *)mem_buf;
517 int i;
518
519#define LOAD(x) (x)=*ptr++;
520 for (i = 0; i < 16; i++) LOAD(env->gregs[i]);
521 LOAD (env->pc);
522 LOAD (env->pr);
523 LOAD (env->gbr);
524 LOAD (env->vbr);
525 LOAD (env->mach);
526 LOAD (env->macl);
527 LOAD (env->sr);
528}
1fddef4b 529#else
6da41eaf
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530static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
531{
532 return 0;
533}
534
535static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
536{
537}
538
539#endif
b4608c04 540
1fddef4b 541static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
b4608c04 542{
b4608c04 543 const char *p;
858693c6 544 int ch, reg_size, type;
b4608c04
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545 char buf[4096];
546 uint8_t mem_buf[2000];
547 uint32_t *registers;
548 uint32_t addr, len;
549
858693c6
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550#ifdef DEBUG_GDB
551 printf("command='%s'\n", line_buf);
552#endif
553 p = line_buf;
554 ch = *p++;
555 switch(ch) {
556 case '?':
1fddef4b 557 /* TODO: Make this return the correct value for user-mode. */
858693c6
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558 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
559 put_packet(s, buf);
560 break;
561 case 'c':
562 if (*p != '\0') {
563 addr = strtoul(p, (char **)&p, 16);
4c3a88a2 564#if defined(TARGET_I386)
858693c6 565 env->eip = addr;
5be1a8e0 566#elif defined (TARGET_PPC)
858693c6 567 env->nip = addr;
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568#elif defined (TARGET_SPARC)
569 env->pc = addr;
570 env->npc = addr + 4;
b5ff1b31
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571#elif defined (TARGET_ARM)
572 env->regs[15] = addr;
fdf9b3e8
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573#elif defined (TARGET_SH4)
574 env->pc = addr;
4c3a88a2 575#endif
858693c6 576 }
41625033
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577#ifdef CONFIG_USER_ONLY
578 s->running_state = 1;
579#else
580 vm_start();
581#endif
582 return RS_IDLE;
858693c6
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583 case 's':
584 if (*p != '\0') {
585 addr = strtoul(p, (char **)&p, 16);
c33a346e 586#if defined(TARGET_I386)
858693c6 587 env->eip = addr;
5be1a8e0 588#elif defined (TARGET_PPC)
858693c6 589 env->nip = addr;
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590#elif defined (TARGET_SPARC)
591 env->pc = addr;
592 env->npc = addr + 4;
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593#elif defined (TARGET_ARM)
594 env->regs[15] = addr;
fdf9b3e8
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595#elif defined (TARGET_SH4)
596 env->pc = addr;
c33a346e 597#endif
858693c6
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598 }
599 cpu_single_step(env, 1);
41625033
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600#ifdef CONFIG_USER_ONLY
601 s->running_state = 1;
602#else
603 vm_start();
604#endif
605 return RS_IDLE;
858693c6
FB
606 case 'g':
607 reg_size = cpu_gdb_read_registers(env, mem_buf);
608 memtohex(buf, mem_buf, reg_size);
609 put_packet(s, buf);
610 break;
611 case 'G':
612 registers = (void *)mem_buf;
613 len = strlen(p) / 2;
614 hextomem((uint8_t *)registers, p, len);
615 cpu_gdb_write_registers(env, mem_buf, len);
616 put_packet(s, "OK");
617 break;
618 case 'm':
619 addr = strtoul(p, (char **)&p, 16);
620 if (*p == ',')
621 p++;
622 len = strtoul(p, NULL, 16);
6f970bd9
FB
623 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
624 put_packet (s, "E14");
625 } else {
626 memtohex(buf, mem_buf, len);
627 put_packet(s, buf);
628 }
858693c6
FB
629 break;
630 case 'M':
631 addr = strtoul(p, (char **)&p, 16);
632 if (*p == ',')
633 p++;
634 len = strtoul(p, (char **)&p, 16);
b328f873 635 if (*p == ':')
858693c6
FB
636 p++;
637 hextomem(mem_buf, p, len);
638 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
905f20b1 639 put_packet(s, "E14");
858693c6
FB
640 else
641 put_packet(s, "OK");
642 break;
643 case 'Z':
644 type = strtoul(p, (char **)&p, 16);
645 if (*p == ',')
646 p++;
647 addr = strtoul(p, (char **)&p, 16);
648 if (*p == ',')
649 p++;
650 len = strtoul(p, (char **)&p, 16);
651 if (type == 0 || type == 1) {
652 if (cpu_breakpoint_insert(env, addr) < 0)
653 goto breakpoint_error;
654 put_packet(s, "OK");
655 } else {
656 breakpoint_error:
905f20b1 657 put_packet(s, "E22");
858693c6
FB
658 }
659 break;
660 case 'z':
661 type = strtoul(p, (char **)&p, 16);
662 if (*p == ',')
663 p++;
664 addr = strtoul(p, (char **)&p, 16);
665 if (*p == ',')
666 p++;
667 len = strtoul(p, (char **)&p, 16);
668 if (type == 0 || type == 1) {
669 cpu_breakpoint_remove(env, addr);
670 put_packet(s, "OK");
671 } else {
672 goto breakpoint_error;
673 }
674 break;
675 default:
676 // unknown_command:
677 /* put empty packet */
678 buf[0] = '\0';
679 put_packet(s, buf);
680 break;
681 }
682 return RS_IDLE;
683}
684
612458f5
FB
685extern void tb_flush(CPUState *env);
686
1fddef4b 687#ifndef CONFIG_USER_ONLY
858693c6
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688static void gdb_vm_stopped(void *opaque, int reason)
689{
690 GDBState *s = opaque;
691 char buf[256];
692 int ret;
693
694 /* disable single step if it was enable */
6a00d601 695 cpu_single_step(s->env, 0);
858693c6 696
e80cfcfc 697 if (reason == EXCP_DEBUG) {
6a00d601 698 tb_flush(s->env);
858693c6 699 ret = SIGTRAP;
bbeb7b5c
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700 } else if (reason == EXCP_INTERRUPT) {
701 ret = SIGINT;
702 } else {
858693c6 703 ret = 0;
bbeb7b5c 704 }
858693c6
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705 snprintf(buf, sizeof(buf), "S%02x", ret);
706 put_packet(s, buf);
707}
1fddef4b 708#endif
858693c6 709
6a00d601 710static void gdb_read_byte(GDBState *s, int ch)
858693c6 711{
6a00d601 712 CPUState *env = s->env;
858693c6
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713 int i, csum;
714 char reply[1];
715
1fddef4b 716#ifndef CONFIG_USER_ONLY
858693c6
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717 if (vm_running) {
718 /* when the CPU is running, we cannot do anything except stop
719 it when receiving a char */
720 vm_stop(EXCP_INTERRUPT);
41625033 721 } else
1fddef4b 722#endif
41625033 723 {
858693c6
FB
724 switch(s->state) {
725 case RS_IDLE:
726 if (ch == '$') {
727 s->line_buf_index = 0;
728 s->state = RS_GETLINE;
c33a346e 729 }
b4608c04 730 break;
858693c6
FB
731 case RS_GETLINE:
732 if (ch == '#') {
733 s->state = RS_CHKSUM1;
734 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
735 s->state = RS_IDLE;
4c3a88a2 736 } else {
858693c6 737 s->line_buf[s->line_buf_index++] = ch;
4c3a88a2
FB
738 }
739 break;
858693c6
FB
740 case RS_CHKSUM1:
741 s->line_buf[s->line_buf_index] = '\0';
742 s->line_csum = fromhex(ch) << 4;
743 s->state = RS_CHKSUM2;
744 break;
745 case RS_CHKSUM2:
746 s->line_csum |= fromhex(ch);
747 csum = 0;
748 for(i = 0; i < s->line_buf_index; i++) {
749 csum += s->line_buf[i];
750 }
751 if (s->line_csum != (csum & 0xff)) {
752 reply[0] = '-';
753 put_buffer(s, reply, 1);
754 s->state = RS_IDLE;
4c3a88a2 755 } else {
858693c6
FB
756 reply[0] = '+';
757 put_buffer(s, reply, 1);
1fddef4b 758 s->state = gdb_handle_packet(s, env, s->line_buf);
4c3a88a2
FB
759 }
760 break;
858693c6
FB
761 }
762 }
763}
764
1fddef4b
FB
765#ifdef CONFIG_USER_ONLY
766int
767gdb_handlesig (CPUState *env, int sig)
768{
769 GDBState *s;
770 char buf[256];
771 int n;
772
773 if (gdbserver_fd < 0)
774 return sig;
775
776 s = &gdbserver_state;
777
778 /* disable single step if it was enabled */
779 cpu_single_step(env, 0);
780 tb_flush(env);
781
782 if (sig != 0)
783 {
784 snprintf(buf, sizeof(buf), "S%02x", sig);
785 put_packet(s, buf);
786 }
787
1fddef4b
FB
788 sig = 0;
789 s->state = RS_IDLE;
41625033
FB
790 s->running_state = 0;
791 while (s->running_state == 0) {
1fddef4b
FB
792 n = read (s->fd, buf, 256);
793 if (n > 0)
794 {
795 int i;
796
797 for (i = 0; i < n; i++)
6a00d601 798 gdb_read_byte (s, buf[i]);
1fddef4b
FB
799 }
800 else if (n == 0 || errno != EAGAIN)
801 {
802 /* XXX: Connection closed. Should probably wait for annother
803 connection before continuing. */
804 return sig;
805 }
41625033 806 }
1fddef4b
FB
807 return sig;
808}
e9009676
FB
809
810/* Tell the remote gdb that the process has exited. */
811void gdb_exit(CPUState *env, int code)
812{
813 GDBState *s;
814 char buf[4];
815
816 if (gdbserver_fd < 0)
817 return;
818
819 s = &gdbserver_state;
820
821 snprintf(buf, sizeof(buf), "W%02x", code);
822 put_packet(s, buf);
823}
824
1fddef4b 825#else
7c9d8e07 826static void gdb_read(void *opaque)
858693c6
FB
827{
828 GDBState *s = opaque;
7c9d8e07
FB
829 int i, size;
830 uint8_t buf[4096];
831
832 size = read(s->fd, buf, sizeof(buf));
833 if (size < 0)
834 return;
858693c6
FB
835 if (size == 0) {
836 /* end of connection */
837 qemu_del_vm_stop_handler(gdb_vm_stopped, s);
7c9d8e07 838 qemu_set_fd_handler(s->fd, NULL, NULL, NULL);
858693c6
FB
839 qemu_free(s);
840 vm_start();
841 } else {
842 for(i = 0; i < size; i++)
6a00d601 843 gdb_read_byte(s, buf[i]);
858693c6
FB
844 }
845}
846
1fddef4b
FB
847#endif
848
7c9d8e07 849static void gdb_accept(void *opaque)
858693c6
FB
850{
851 GDBState *s;
852 struct sockaddr_in sockaddr;
853 socklen_t len;
854 int val, fd;
855
856 for(;;) {
857 len = sizeof(sockaddr);
858 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
859 if (fd < 0 && errno != EINTR) {
860 perror("accept");
861 return;
862 } else if (fd >= 0) {
b4608c04
FB
863 break;
864 }
865 }
858693c6
FB
866
867 /* set short latency */
868 val = 1;
7d3505c5 869 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, &val, sizeof(val));
858693c6 870
1fddef4b
FB
871#ifdef CONFIG_USER_ONLY
872 s = &gdbserver_state;
873 memset (s, 0, sizeof (GDBState));
874#else
858693c6
FB
875 s = qemu_mallocz(sizeof(GDBState));
876 if (!s) {
877 close(fd);
878 return;
879 }
1fddef4b 880#endif
6a00d601 881 s->env = first_cpu; /* XXX: allow to change CPU */
858693c6
FB
882 s->fd = fd;
883
884 fcntl(fd, F_SETFL, O_NONBLOCK);
885
1fddef4b 886#ifndef CONFIG_USER_ONLY
858693c6
FB
887 /* stop the VM */
888 vm_stop(EXCP_INTERRUPT);
889
890 /* start handling I/O */
7c9d8e07 891 qemu_set_fd_handler(s->fd, gdb_read, NULL, s);
858693c6
FB
892 /* when the VM is stopped, the following callback is called */
893 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1fddef4b 894#endif
858693c6
FB
895}
896
897static int gdbserver_open(int port)
898{
899 struct sockaddr_in sockaddr;
900 int fd, val, ret;
901
902 fd = socket(PF_INET, SOCK_STREAM, 0);
903 if (fd < 0) {
904 perror("socket");
905 return -1;
906 }
907
908 /* allow fast reuse */
909 val = 1;
910 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, &val, sizeof(val));
911
912 sockaddr.sin_family = AF_INET;
913 sockaddr.sin_port = htons(port);
914 sockaddr.sin_addr.s_addr = 0;
915 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
916 if (ret < 0) {
917 perror("bind");
918 return -1;
919 }
920 ret = listen(fd, 0);
921 if (ret < 0) {
922 perror("listen");
923 return -1;
924 }
1fddef4b 925#ifndef CONFIG_USER_ONLY
858693c6 926 fcntl(fd, F_SETFL, O_NONBLOCK);
1fddef4b 927#endif
858693c6
FB
928 return fd;
929}
930
931int gdbserver_start(int port)
932{
933 gdbserver_fd = gdbserver_open(port);
934 if (gdbserver_fd < 0)
935 return -1;
936 /* accept connections */
1fddef4b 937#ifdef CONFIG_USER_ONLY
7c9d8e07 938 gdb_accept (NULL);
1fddef4b 939#else
7c9d8e07 940 qemu_set_fd_handler(gdbserver_fd, gdb_accept, NULL, NULL);
1fddef4b 941#endif
b4608c04
FB
942 return 0;
943}