]> git.ipfire.org Git - thirdparty/qemu.git/blame - hw/core/numa.c
numa: Extend CLI to provide memory latency and bandwidth information
[thirdparty/qemu.git] / hw / core / numa.c
CommitLineData
96d0e26c
WG
1/*
2 * NUMA parameter parsing routines
3 *
4 * Copyright (c) 2014 Fujitsu Ltd.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
d38ea87a 25#include "qemu/osdep.h"
9b12dfa0 26#include "qemu/units.h"
b58c5c2d 27#include "sysemu/hostmem.h"
e35704ba 28#include "sysemu/numa.h"
46517dd4 29#include "sysemu/sysemu.h"
96d0e26c 30#include "exec/cpu-common.h"
0987d735 31#include "exec/ramlist.h"
96d0e26c 32#include "qemu/bitmap.h"
2b631ec2 33#include "qemu/error-report.h"
e688df6b 34#include "qapi/error.h"
0042109a 35#include "qapi/opts-visitor.h"
8ac25c84 36#include "qapi/qapi-visit-machine.h"
f8123f22 37#include "sysemu/qtest.h"
2e5b09fd 38#include "hw/core/cpu.h"
5b009e40 39#include "hw/mem/pc-dimm.h"
d6454270 40#include "migration/vmstate.h"
12e9493d 41#include "hw/boards.h"
2cc0e2e8 42#include "hw/mem/memory-device.h"
7dcd1d70
EH
43#include "qemu/option.h"
44#include "qemu/config-file.h"
cc001888 45#include "qemu/cutils.h"
0042109a
WG
46
47QemuOptsList qemu_numa_opts = {
48 .name = "numa",
49 .implied_opt_name = "type",
50 .head = QTAILQ_HEAD_INITIALIZER(qemu_numa_opts.head),
51 .desc = { { 0 } } /* validated with OptsVisitor */
52};
53
b69239e0
IM
54static int have_memdevs;
55static int have_mem;
25712ffe
EH
56static int max_numa_nodeid; /* Highest specified NUMA node ID, plus one.
57 * For all nodes, nodeid < max_numa_nodeid
58 */
e75e2a14 59
64c2a8f6 60static void parse_numa_node(MachineState *ms, NumaNodeOptions *node,
cc001888 61 Error **errp)
96d0e26c 62{
a22528b9 63 Error *err = NULL;
0042109a
WG
64 uint16_t nodenr;
65 uint16List *cpus = NULL;
64c2a8f6 66 MachineClass *mc = MACHINE_GET_CLASS(ms);
5cc8767d 67 unsigned int max_cpus = ms->smp.max_cpus;
7e721e7b 68 NodeInfo *numa_info = ms->numa_state->nodes;
96d0e26c 69
0042109a
WG
70 if (node->has_nodeid) {
71 nodenr = node->nodeid;
96d0e26c 72 } else {
aa570207 73 nodenr = ms->numa_state->num_nodes;
96d0e26c
WG
74 }
75
0042109a
WG
76 if (nodenr >= MAX_NODES) {
77 error_setg(errp, "Max number of NUMA nodes reached: %"
01bbbcf4 78 PRIu16 "", nodenr);
0042109a 79 return;
96d0e26c
WG
80 }
81
1945b9d8
EH
82 if (numa_info[nodenr].present) {
83 error_setg(errp, "Duplicate NUMA nodeid: %" PRIu16, nodenr);
84 return;
85 }
86
81ce6aa5 87 if (!mc->cpu_index_to_instance_props || !mc->get_default_cpu_node_id) {
a22528b9
MA
88 error_setg(errp, "NUMA is not supported by this machine-type");
89 return;
64c2a8f6 90 }
0042109a 91 for (cpus = node->cpus; cpus; cpus = cpus->next) {
7c88e65d 92 CpuInstanceProperties props;
8979c945
EH
93 if (cpus->value >= max_cpus) {
94 error_setg(errp,
95 "CPU index (%" PRIu16 ")"
96 " should be smaller than maxcpus (%d)",
97 cpus->value, max_cpus);
0042109a
WG
98 return;
99 }
7c88e65d
IM
100 props = mc->cpu_index_to_instance_props(ms, cpus->value);
101 props.node_id = nodenr;
102 props.has_node_id = true;
a22528b9
MA
103 machine_set_cpu_numa_node(ms, &props, &err);
104 if (err) {
105 error_propagate(errp, err);
106 return;
107 }
96d0e26c
WG
108 }
109
b69239e0
IM
110 have_memdevs = have_memdevs ? : node->has_memdev;
111 have_mem = have_mem ? : node->has_mem;
112 if ((node->has_mem && have_memdevs) || (node->has_memdev && have_mem)) {
113 error_setg(errp, "numa configuration should use either mem= or memdev=,"
114 "mixing both is not allowed");
7febe36f
PB
115 return;
116 }
117
0042109a 118 if (node->has_mem) {
cc001888 119 numa_info[nodenr].node_mem = node->mem;
f8123f22
EH
120 if (!qtest_enabled()) {
121 warn_report("Parameter -numa node,mem is deprecated,"
122 " use -numa node,memdev instead");
123 }
0042109a 124 }
7febe36f
PB
125 if (node->has_memdev) {
126 Object *o;
127 o = object_resolve_path_type(node->memdev, TYPE_MEMORY_BACKEND, NULL);
128 if (!o) {
129 error_setg(errp, "memdev=%s is ambiguous", node->memdev);
130 return;
131 }
132
133 object_ref(o);
61d7c144 134 numa_info[nodenr].node_mem = object_property_get_uint(o, "size", NULL);
7febe36f
PB
135 numa_info[nodenr].node_memdev = MEMORY_BACKEND(o);
136 }
244b3f44
TX
137
138 /*
139 * If not set the initiator, set it to MAX_NODES. And if
140 * HMAT is enabled and this node has no cpus, QEMU will raise error.
141 */
142 numa_info[nodenr].initiator = MAX_NODES;
143 if (node->has_initiator) {
144 if (!ms->numa_state->hmat_enabled) {
145 error_setg(errp, "ACPI Heterogeneous Memory Attribute Table "
146 "(HMAT) is disabled, enable it with -machine hmat=on "
147 "before using any of hmat specific options");
148 return;
149 }
150
151 if (node->initiator >= MAX_NODES) {
152 error_report("The initiator id %" PRIu16 " expects an integer "
153 "between 0 and %d", node->initiator,
154 MAX_NODES - 1);
155 return;
156 }
157
158 numa_info[nodenr].initiator = node->initiator;
159 }
1af878e0
EH
160 numa_info[nodenr].present = true;
161 max_numa_nodeid = MAX(max_numa_nodeid, nodenr + 1);
aa570207 162 ms->numa_state->num_nodes++;
96d0e26c
WG
163}
164
aa570207
TX
165static
166void parse_numa_distance(MachineState *ms, NumaDistOptions *dist, Error **errp)
0f203430
HC
167{
168 uint16_t src = dist->src;
169 uint16_t dst = dist->dst;
170 uint8_t val = dist->val;
7e721e7b 171 NodeInfo *numa_info = ms->numa_state->nodes;
0f203430
HC
172
173 if (src >= MAX_NODES || dst >= MAX_NODES) {
74f38e96
IM
174 error_setg(errp, "Parameter '%s' expects an integer between 0 and %d",
175 src >= MAX_NODES ? "src" : "dst", MAX_NODES - 1);
0f203430
HC
176 return;
177 }
178
179 if (!numa_info[src].present || !numa_info[dst].present) {
180 error_setg(errp, "Source/Destination NUMA node is missing. "
181 "Please use '-numa node' option to declare it first.");
182 return;
183 }
184
185 if (val < NUMA_DISTANCE_MIN) {
186 error_setg(errp, "NUMA distance (%" PRIu8 ") is invalid, "
187 "it shouldn't be less than %d.",
188 val, NUMA_DISTANCE_MIN);
189 return;
190 }
191
192 if (src == dst && val != NUMA_DISTANCE_MIN) {
193 error_setg(errp, "Local distance of node %d should be %d.",
194 src, NUMA_DISTANCE_MIN);
195 return;
196 }
197
198 numa_info[src].distance[dst] = val;
118154b7 199 ms->numa_state->have_numa_distance = true;
0f203430
HC
200}
201
9b12dfa0
LJ
202void parse_numa_hmat_lb(NumaState *numa_state, NumaHmatLBOptions *node,
203 Error **errp)
204{
205 int i, first_bit, last_bit;
206 uint64_t max_entry, temp_base, bitmap_copy;
207 NodeInfo *numa_info = numa_state->nodes;
208 HMAT_LB_Info *hmat_lb =
209 numa_state->hmat_lb[node->hierarchy][node->data_type];
210 HMAT_LB_Data lb_data = {};
211 HMAT_LB_Data *lb_temp;
212
213 /* Error checking */
214 if (node->initiator > numa_state->num_nodes) {
215 error_setg(errp, "Invalid initiator=%d, it should be less than %d",
216 node->initiator, numa_state->num_nodes);
217 return;
218 }
219 if (node->target > numa_state->num_nodes) {
220 error_setg(errp, "Invalid target=%d, it should be less than %d",
221 node->target, numa_state->num_nodes);
222 return;
223 }
224 if (!numa_info[node->initiator].has_cpu) {
225 error_setg(errp, "Invalid initiator=%d, it isn't an "
226 "initiator proximity domain", node->initiator);
227 return;
228 }
229 if (!numa_info[node->target].present) {
230 error_setg(errp, "The target=%d should point to an existing node",
231 node->target);
232 return;
233 }
234
235 if (!hmat_lb) {
236 hmat_lb = g_malloc0(sizeof(*hmat_lb));
237 numa_state->hmat_lb[node->hierarchy][node->data_type] = hmat_lb;
238 hmat_lb->list = g_array_new(false, true, sizeof(HMAT_LB_Data));
239 }
240 hmat_lb->hierarchy = node->hierarchy;
241 hmat_lb->data_type = node->data_type;
242 lb_data.initiator = node->initiator;
243 lb_data.target = node->target;
244
245 if (node->data_type <= HMATLB_DATA_TYPE_WRITE_LATENCY) {
246 /* Input latency data */
247
248 if (!node->has_latency) {
249 error_setg(errp, "Missing 'latency' option");
250 return;
251 }
252 if (node->has_bandwidth) {
253 error_setg(errp, "Invalid option 'bandwidth' since "
254 "the data type is latency");
255 return;
256 }
257
258 /* Detect duplicate configuration */
259 for (i = 0; i < hmat_lb->list->len; i++) {
260 lb_temp = &g_array_index(hmat_lb->list, HMAT_LB_Data, i);
261
262 if (node->initiator == lb_temp->initiator &&
263 node->target == lb_temp->target) {
264 error_setg(errp, "Duplicate configuration of the latency for "
265 "initiator=%d and target=%d", node->initiator,
266 node->target);
267 return;
268 }
269 }
270
271 hmat_lb->base = hmat_lb->base ? hmat_lb->base : UINT64_MAX;
272
273 if (node->latency) {
274 /* Calculate the temporary base and compressed latency */
275 max_entry = node->latency;
276 temp_base = 1;
277 while (QEMU_IS_ALIGNED(max_entry, 10)) {
278 max_entry /= 10;
279 temp_base *= 10;
280 }
281
282 /* Calculate the max compressed latency */
283 temp_base = MIN(hmat_lb->base, temp_base);
284 max_entry = node->latency / hmat_lb->base;
285 max_entry = MAX(hmat_lb->range_bitmap, max_entry);
286
287 /*
288 * For latency hmat_lb->range_bitmap record the max compressed
289 * latency which should be less than 0xFFFF (UINT16_MAX)
290 */
291 if (max_entry >= UINT16_MAX) {
292 error_setg(errp, "Latency %" PRIu64 " between initiator=%d and "
293 "target=%d should not differ from previously entered "
294 "min or max values on more than %d", node->latency,
295 node->initiator, node->target, UINT16_MAX - 1);
296 return;
297 } else {
298 hmat_lb->base = temp_base;
299 hmat_lb->range_bitmap = max_entry;
300 }
301
302 /*
303 * Set lb_info_provided bit 0 as 1,
304 * latency information is provided
305 */
306 numa_info[node->target].lb_info_provided |= BIT(0);
307 }
308 lb_data.data = node->latency;
309 } else if (node->data_type >= HMATLB_DATA_TYPE_ACCESS_BANDWIDTH) {
310 /* Input bandwidth data */
311 if (!node->has_bandwidth) {
312 error_setg(errp, "Missing 'bandwidth' option");
313 return;
314 }
315 if (node->has_latency) {
316 error_setg(errp, "Invalid option 'latency' since "
317 "the data type is bandwidth");
318 return;
319 }
320 if (!QEMU_IS_ALIGNED(node->bandwidth, MiB)) {
321 error_setg(errp, "Bandwidth %" PRIu64 " between initiator=%d and "
322 "target=%d should be 1MB aligned", node->bandwidth,
323 node->initiator, node->target);
324 return;
325 }
326
327 /* Detect duplicate configuration */
328 for (i = 0; i < hmat_lb->list->len; i++) {
329 lb_temp = &g_array_index(hmat_lb->list, HMAT_LB_Data, i);
330
331 if (node->initiator == lb_temp->initiator &&
332 node->target == lb_temp->target) {
333 error_setg(errp, "Duplicate configuration of the bandwidth for "
334 "initiator=%d and target=%d", node->initiator,
335 node->target);
336 return;
337 }
338 }
339
340 hmat_lb->base = hmat_lb->base ? hmat_lb->base : 1;
341
342 if (node->bandwidth) {
343 /* Keep bitmap unchanged when bandwidth out of range */
344 bitmap_copy = hmat_lb->range_bitmap;
345 bitmap_copy |= node->bandwidth;
346 first_bit = ctz64(bitmap_copy);
347 temp_base = UINT64_C(1) << first_bit;
348 max_entry = node->bandwidth / temp_base;
349 last_bit = 64 - clz64(bitmap_copy);
350
351 /*
352 * For bandwidth, first_bit record the base unit of bandwidth bits,
353 * last_bit record the last bit of the max bandwidth. The max
354 * compressed bandwidth should be less than 0xFFFF (UINT16_MAX)
355 */
356 if ((last_bit - first_bit) > UINT16_BITS ||
357 max_entry >= UINT16_MAX) {
358 error_setg(errp, "Bandwidth %" PRIu64 " between initiator=%d "
359 "and target=%d should not differ from previously "
360 "entered values on more than %d", node->bandwidth,
361 node->initiator, node->target, UINT16_MAX - 1);
362 return;
363 } else {
364 hmat_lb->base = temp_base;
365 hmat_lb->range_bitmap = bitmap_copy;
366 }
367
368 /*
369 * Set lb_info_provided bit 1 as 1,
370 * bandwidth information is provided
371 */
372 numa_info[node->target].lb_info_provided |= BIT(1);
373 }
374 lb_data.data = node->bandwidth;
375 } else {
376 assert(0);
377 }
378
379 g_array_append_val(hmat_lb->list, lb_data);
380}
381
3319b4ef 382void set_numa_options(MachineState *ms, NumaOptions *object, Error **errp)
96d0e26c 383{
0042109a 384 Error *err = NULL;
aa570207
TX
385 MachineClass *mc = MACHINE_GET_CLASS(ms);
386
387 if (!mc->numa_mem_supported) {
388 error_setg(errp, "NUMA is not supported by this machine-type");
389 goto end;
390 }
96d0e26c 391
1fd5d4fe 392 switch (object->type) {
d081a49a 393 case NUMA_OPTIONS_TYPE_NODE:
cc001888 394 parse_numa_node(ms, &object->u.node, &err);
0042109a 395 if (err) {
157e94e8 396 goto end;
96d0e26c 397 }
0042109a 398 break;
0f203430 399 case NUMA_OPTIONS_TYPE_DIST:
aa570207 400 parse_numa_distance(ms, &object->u.dist, &err);
0f203430
HC
401 if (err) {
402 goto end;
403 }
404 break;
419fcdec
IM
405 case NUMA_OPTIONS_TYPE_CPU:
406 if (!object->u.cpu.has_node_id) {
407 error_setg(&err, "Missing mandatory node-id property");
408 goto end;
409 }
7e721e7b 410 if (!ms->numa_state->nodes[object->u.cpu.node_id].present) {
419fcdec
IM
411 error_setg(&err, "Invalid node-id=%" PRId64 ", NUMA node must be "
412 "defined with -numa node,nodeid=ID before it's used with "
413 "-numa cpu,node-id=ID", object->u.cpu.node_id);
414 goto end;
415 }
416
417 machine_set_cpu_numa_node(ms, qapi_NumaCpuOptions_base(&object->u.cpu),
418 &err);
419 break;
9b12dfa0
LJ
420 case NUMA_OPTIONS_TYPE_HMAT_LB:
421 if (!ms->numa_state->hmat_enabled) {
422 error_setg(errp, "ACPI Heterogeneous Memory Attribute Table "
423 "(HMAT) is disabled, enable it with -machine hmat=on "
424 "before using any of hmat specific options");
425 return;
426 }
427
428 parse_numa_hmat_lb(ms->numa_state, &object->u.hmat_lb, &err);
429 if (err) {
430 goto end;
431 }
432 break;
0042109a
WG
433 default:
434 abort();
435 }
96d0e26c 436
3319b4ef
IM
437end:
438 error_propagate(errp, err);
439}
440
4f7ec696 441static int parse_numa(void *opaque, QemuOpts *opts, Error **errp)
3319b4ef
IM
442{
443 NumaOptions *object = NULL;
444 MachineState *ms = MACHINE(opaque);
445 Error *err = NULL;
446 Visitor *v = opts_visitor_new(opts);
447
448 visit_type_NumaOptions(v, NULL, &object, &err);
449 visit_free(v);
450 if (err) {
451 goto end;
452 }
453
454 /* Fix up legacy suffix-less format */
455 if ((object->type == NUMA_OPTIONS_TYPE_NODE) && object->u.node.has_mem) {
456 const char *mem_str = qemu_opt_get(opts, "mem");
457 qemu_strtosz_MiB(mem_str, NULL, &object->u.node.mem);
458 }
459
460 set_numa_options(ms, object, &err);
461
157e94e8 462end:
96a1616c 463 qapi_free_NumaOptions(object);
157e94e8 464 if (err) {
4f7ec696 465 error_propagate(errp, err);
157e94e8
MAL
466 return -1;
467 }
0042109a 468
157e94e8 469 return 0;
96d0e26c
WG
470}
471
0f203430
HC
472/* If all node pair distances are symmetric, then only distances
473 * in one direction are enough. If there is even one asymmetric
474 * pair, though, then all distances must be provided. The
475 * distance from a node to itself is always NUMA_DISTANCE_MIN,
476 * so providing it is never necessary.
477 */
aa570207 478static void validate_numa_distance(MachineState *ms)
3ef71975 479{
0f203430
HC
480 int src, dst;
481 bool is_asymmetrical = false;
aa570207 482 int nb_numa_nodes = ms->numa_state->num_nodes;
7e721e7b 483 NodeInfo *numa_info = ms->numa_state->nodes;
0f203430
HC
484
485 for (src = 0; src < nb_numa_nodes; src++) {
486 for (dst = src; dst < nb_numa_nodes; dst++) {
487 if (numa_info[src].distance[dst] == 0 &&
488 numa_info[dst].distance[src] == 0) {
489 if (src != dst) {
490 error_report("The distance between node %d and %d is "
491 "missing, at least one distance value "
492 "between each nodes should be provided.",
493 src, dst);
494 exit(EXIT_FAILURE);
495 }
496 }
3ef71975 497
0f203430
HC
498 if (numa_info[src].distance[dst] != 0 &&
499 numa_info[dst].distance[src] != 0 &&
500 numa_info[src].distance[dst] !=
501 numa_info[dst].distance[src]) {
502 is_asymmetrical = true;
503 }
504 }
505 }
506
507 if (is_asymmetrical) {
508 for (src = 0; src < nb_numa_nodes; src++) {
509 for (dst = 0; dst < nb_numa_nodes; dst++) {
510 if (src != dst && numa_info[src].distance[dst] == 0) {
511 error_report("At least one asymmetrical pair of "
512 "distances is given, please provide distances "
513 "for both directions of all node pairs.");
514 exit(EXIT_FAILURE);
515 }
516 }
517 }
3ef71975 518 }
3ef71975
EH
519}
520
aa570207 521static void complete_init_numa_distance(MachineState *ms)
3ef71975 522{
0f203430 523 int src, dst;
7e721e7b 524 NodeInfo *numa_info = ms->numa_state->nodes;
3ef71975 525
0f203430
HC
526 /* Fixup NUMA distance by symmetric policy because if it is an
527 * asymmetric distance table, it should be a complete table and
528 * there would not be any missing distance except local node, which
529 * is verified by validate_numa_distance above.
530 */
aa570207
TX
531 for (src = 0; src < ms->numa_state->num_nodes; src++) {
532 for (dst = 0; dst < ms->numa_state->num_nodes; dst++) {
0f203430
HC
533 if (numa_info[src].distance[dst] == 0) {
534 if (src == dst) {
535 numa_info[src].distance[dst] = NUMA_DISTANCE_MIN;
536 } else {
537 numa_info[src].distance[dst] = numa_info[dst].distance[src];
538 }
539 }
3ef71975 540 }
3ef71975 541 }
0f203430 542}
549fc54b 543
3bfe5716
LV
544void numa_legacy_auto_assign_ram(MachineClass *mc, NodeInfo *nodes,
545 int nb_nodes, ram_addr_t size)
546{
547 int i;
548 uint64_t usedmem = 0;
549
550 /* Align each node according to the alignment
551 * requirements of the machine class
552 */
553
554 for (i = 0; i < nb_nodes - 1; i++) {
555 nodes[i].node_mem = (size / nb_nodes) &
556 ~((1 << mc->numa_mem_align_shift) - 1);
557 usedmem += nodes[i].node_mem;
549fc54b 558 }
3bfe5716 559 nodes[i].node_mem = size - usedmem;
3ef71975
EH
560}
561
3bfe5716
LV
562void numa_default_auto_assign_ram(MachineClass *mc, NodeInfo *nodes,
563 int nb_nodes, ram_addr_t size)
96d0e26c 564{
12d6e464 565 int i;
3bfe5716
LV
566 uint64_t usedmem = 0, node_mem;
567 uint64_t granularity = size / nb_nodes;
568 uint64_t propagate = 0;
569
570 for (i = 0; i < nb_nodes - 1; i++) {
571 node_mem = (granularity + propagate) &
572 ~((1 << mc->numa_mem_align_shift) - 1);
573 propagate = granularity + propagate - node_mem;
574 nodes[i].node_mem = node_mem;
575 usedmem += node_mem;
576 }
577 nodes[i].node_mem = size - usedmem;
578}
12d6e464 579
7a3099fc 580void numa_complete_configuration(MachineState *ms)
96d0e26c 581{
12d6e464 582 int i;
ea089eeb 583 MachineClass *mc = MACHINE_GET_CLASS(ms);
7e721e7b 584 NodeInfo *numa_info = ms->numa_state->nodes;
cdda2018 585
7b8be49d
DL
586 /*
587 * If memory hotplug is enabled (slots > 0) but without '-numa'
588 * options explicitly on CLI, guestes will break.
589 *
590 * Windows: won't enable memory hotplug without SRAT table at all
591 *
592 * Linux: if QEMU is started with initial memory all below 4Gb
593 * and no SRAT table present, guest kernel will use nommu DMA ops,
594 * which breaks 32bit hw drivers when memory is hotplugged and
595 * guest tries to use it with that drivers.
596 *
597 * Enable NUMA implicitly by adding a new NUMA node automatically.
0533ef5f
TX
598 *
599 * Or if MachineClass::auto_enable_numa is true and no NUMA nodes,
600 * assume there is just one node with whole RAM.
7b8be49d 601 */
0533ef5f
TX
602 if (ms->numa_state->num_nodes == 0 &&
603 ((ms->ram_slots > 0 &&
604 mc->auto_enable_numa_with_memhp) ||
605 mc->auto_enable_numa)) {
7b8be49d 606 NumaNodeOptions node = { };
a22528b9 607 parse_numa_node(ms, &node, &error_abort);
0533ef5f 608 numa_info[0].node_mem = ram_size;
7b8be49d
DL
609 }
610
12d6e464
EH
611 assert(max_numa_nodeid <= MAX_NODES);
612
613 /* No support for sparse NUMA node IDs yet: */
614 for (i = max_numa_nodeid - 1; i >= 0; i--) {
615 /* Report large node IDs first, to make mistakes easier to spot */
616 if (!numa_info[i].present) {
617 error_report("numa: Node ID missing: %d", i);
618 exit(1);
619 }
620 }
621
622 /* This must be always true if all nodes are present: */
aa570207 623 assert(ms->numa_state->num_nodes == max_numa_nodeid);
12d6e464 624
aa570207 625 if (ms->numa_state->num_nodes > 0) {
2b631ec2 626 uint64_t numa_total;
96d0e26c 627
aa570207
TX
628 if (ms->numa_state->num_nodes > MAX_NODES) {
629 ms->numa_state->num_nodes = MAX_NODES;
96d0e26c
WG
630 }
631
9851d0fe 632 /* If no memory size is given for any node, assume the default case
96d0e26c
WG
633 * and distribute the available memory equally across all nodes
634 */
aa570207 635 for (i = 0; i < ms->numa_state->num_nodes; i++) {
8c85901e 636 if (numa_info[i].node_mem != 0) {
96d0e26c
WG
637 break;
638 }
639 }
aa570207 640 if (i == ms->numa_state->num_nodes) {
3bfe5716 641 assert(mc->numa_auto_assign_ram);
aa570207
TX
642 mc->numa_auto_assign_ram(mc, numa_info,
643 ms->numa_state->num_nodes, ram_size);
f8123f22
EH
644 if (!qtest_enabled()) {
645 warn_report("Default splitting of RAM between nodes is deprecated,"
646 " Use '-numa node,memdev' to explictly define RAM"
647 " allocation per node");
648 }
96d0e26c
WG
649 }
650
2b631ec2 651 numa_total = 0;
aa570207 652 for (i = 0; i < ms->numa_state->num_nodes; i++) {
8c85901e 653 numa_total += numa_info[i].node_mem;
2b631ec2
WG
654 }
655 if (numa_total != ram_size) {
c68233ae
HT
656 error_report("total memory for NUMA nodes (0x%" PRIx64 ")"
657 " should equal RAM size (0x" RAM_ADDR_FMT ")",
2b631ec2
WG
658 numa_total, ram_size);
659 exit(1);
660 }
661
0f203430
HC
662 /* QEMU needs at least all unique node pair distances to build
663 * the whole NUMA distance table. QEMU treats the distance table
664 * as symmetric by default, i.e. distance A->B == distance B->A.
665 * Thus, QEMU is able to complete the distance table
666 * initialization even though only distance A->B is provided and
667 * distance B->A is not. QEMU knows the distance of a node to
668 * itself is always 10, so A->A distances may be omitted. When
669 * the distances of two nodes of a pair differ, i.e. distance
670 * A->B != distance B->A, then that means the distance table is
671 * asymmetric. In this case, the distances for both directions
672 * of all node pairs are required.
673 */
118154b7 674 if (ms->numa_state->have_numa_distance) {
0f203430 675 /* Validate enough NUMA distance information was provided. */
aa570207 676 validate_numa_distance(ms);
96d0e26c 677
0f203430 678 /* Validation succeeded, now fill in any missing distances. */
aa570207 679 complete_init_numa_distance(ms);
96d0e26c
WG
680 }
681 }
682}
dfabb8b9 683
7a3099fc
IM
684void parse_numa_opts(MachineState *ms)
685{
4f7ec696 686 qemu_opts_foreach(qemu_find_opts("numa"), parse_numa, ms, &error_fatal);
7a3099fc
IM
687}
688
a0ceb640
IM
689void numa_cpu_pre_plug(const CPUArchId *slot, DeviceState *dev, Error **errp)
690{
a0ceb640
IM
691 int node_id = object_property_get_int(OBJECT(dev), "node-id", &error_abort);
692
a0ceb640
IM
693 if (node_id == CPU_UNSET_NUMA_NODE_ID) {
694 /* due to bug in libvirt, it doesn't pass node-id from props on
695 * device_add as expected, so we have to fix it up here */
d41f3e75
IM
696 if (slot->props.has_node_id) {
697 object_property_set_int(OBJECT(dev), slot->props.node_id,
698 "node-id", errp);
699 }
700 } else if (node_id != slot->props.node_id) {
a5bf9fbc
LV
701 error_setg(errp, "invalid node-id, must be %"PRId64,
702 slot->props.node_id);
a0ceb640
IM
703 }
704}
705
7febe36f
PB
706static void allocate_system_memory_nonnuma(MemoryRegion *mr, Object *owner,
707 const char *name,
708 uint64_t ram_size)
709{
0b183fc8
PB
710 if (mem_path) {
711#ifdef __linux__
7f56e740 712 Error *err = NULL;
cbfc0171 713 memory_region_init_ram_from_file(mr, owner, name, ram_size, 0, 0,
7f56e740 714 mem_path, &err);
c3ba3095 715 if (err) {
29b762f5 716 error_report_err(err);
fae947b0
LC
717 if (mem_prealloc) {
718 exit(1);
719 }
cb79224b
IM
720 warn_report("falling back to regular RAM allocation");
721 error_printf("This is deprecated. Make sure that -mem-path "
722 " specified path has sufficient resources to allocate"
88ed5db1 723 " -m specified RAM amount\n");
fae947b0
LC
724 /* Legacy behavior: if allocation failed, fall back to
725 * regular RAM allocation.
726 */
6233b679 727 mem_path = NULL;
1cfe48c1 728 memory_region_init_ram_nomigrate(mr, owner, name, ram_size, &error_fatal);
7f56e740 729 }
0b183fc8
PB
730#else
731 fprintf(stderr, "-mem-path not supported on this host\n");
732 exit(1);
733#endif
734 } else {
1cfe48c1 735 memory_region_init_ram_nomigrate(mr, owner, name, ram_size, &error_fatal);
0b183fc8 736 }
7febe36f
PB
737 vmstate_register_ram_global(mr);
738}
739
dfabb8b9
PB
740void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner,
741 const char *name,
742 uint64_t ram_size)
743{
7febe36f
PB
744 uint64_t addr = 0;
745 int i;
aa570207 746 MachineState *ms = MACHINE(qdev_get_machine());
7febe36f 747
aa570207
TX
748 if (ms->numa_state == NULL ||
749 ms->numa_state->num_nodes == 0 || !have_memdevs) {
7febe36f
PB
750 allocate_system_memory_nonnuma(mr, owner, name, ram_size);
751 return;
752 }
753
754 memory_region_init(mr, owner, name, ram_size);
aa570207 755 for (i = 0; i < ms->numa_state->num_nodes; i++) {
7e721e7b
TX
756 uint64_t size = ms->numa_state->nodes[i].node_mem;
757 HostMemoryBackend *backend = ms->numa_state->nodes[i].node_memdev;
7febe36f
PB
758 if (!backend) {
759 continue;
760 }
7943e97b 761 MemoryRegion *seg = host_memory_backend_get_memory(backend);
7febe36f 762
0462faee
HT
763 if (memory_region_is_mapped(seg)) {
764 char *path = object_get_canonical_path_component(OBJECT(backend));
765 error_report("memory backend %s is used multiple times. Each "
766 "-numa option must use a different memdev value.",
767 path);
2920bd64 768 g_free(path);
0462faee
HT
769 exit(1);
770 }
771
0b217571 772 host_memory_backend_set_mapped(backend, true);
7febe36f
PB
773 memory_region_add_subregion(mr, addr, seg);
774 vmstate_register_ram_global(seg);
775 addr += size;
776 }
dfabb8b9 777}
76b5d850 778
31959e82 779static void numa_stat_memory_devices(NumaNodeMem node_mem[])
5b009e40 780{
2cc0e2e8 781 MemoryDeviceInfoList *info_list = qmp_memory_device_list();
5b009e40 782 MemoryDeviceInfoList *info;
31959e82 783 PCDIMMDeviceInfo *pcdimm_info;
cae02c34 784 VirtioPMEMDeviceInfo *vpi;
5b009e40 785
5b009e40
HZ
786 for (info = info_list; info; info = info->next) {
787 MemoryDeviceInfo *value = info->value;
788
789 if (value) {
1fd5d4fe 790 switch (value->type) {
6388e18d 791 case MEMORY_DEVICE_INFO_KIND_DIMM:
6388e18d 792 case MEMORY_DEVICE_INFO_KIND_NVDIMM:
cae02c34
DH
793 pcdimm_info = value->type == MEMORY_DEVICE_INFO_KIND_DIMM ?
794 value->u.dimm.data : value->u.nvdimm.data;
31959e82 795 node_mem[pcdimm_info->node].node_mem += pcdimm_info->size;
178003ea
DH
796 node_mem[pcdimm_info->node].node_plugged_mem +=
797 pcdimm_info->size;
cae02c34
DH
798 break;
799 case MEMORY_DEVICE_INFO_KIND_VIRTIO_PMEM:
800 vpi = value->u.virtio_pmem.data;
801 /* TODO: once we support numa, assign to right node */
802 node_mem[0].node_mem += vpi->size;
803 node_mem[0].node_plugged_mem += vpi->size;
804 break;
805 default:
806 g_assert_not_reached();
5b009e40
HZ
807 }
808 }
809 }
810 qapi_free_MemoryDeviceInfoList(info_list);
811}
812
aa570207 813void query_numa_node_mem(NumaNodeMem node_mem[], MachineState *ms)
5b009e40
HZ
814{
815 int i;
816
aa570207 817 if (ms->numa_state == NULL || ms->numa_state->num_nodes <= 0) {
5b009e40
HZ
818 return;
819 }
820
821 numa_stat_memory_devices(node_mem);
aa570207 822 for (i = 0; i < ms->numa_state->num_nodes; i++) {
7e721e7b 823 node_mem[i].node_mem += ms->numa_state->nodes[i].node_mem;
5b009e40
HZ
824 }
825}
826
0987d735
PB
827void ram_block_notifier_add(RAMBlockNotifier *n)
828{
829 QLIST_INSERT_HEAD(&ram_list.ramblock_notifiers, n, next);
830}
831
832void ram_block_notifier_remove(RAMBlockNotifier *n)
833{
834 QLIST_REMOVE(n, next);
835}
836
837void ram_block_notify_add(void *host, size_t size)
838{
839 RAMBlockNotifier *notifier;
840
841 QLIST_FOREACH(notifier, &ram_list.ramblock_notifiers, next) {
842 notifier->ram_block_added(notifier, host, size);
843 }
844}
845
846void ram_block_notify_remove(void *host, size_t size)
847{
848 RAMBlockNotifier *notifier;
849
850 QLIST_FOREACH(notifier, &ram_list.ramblock_notifiers, next) {
851 notifier->ram_block_removed(notifier, host, size);
852 }
853}