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Commit | Line | Data |
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a171fe39 AZ |
1 | /* |
2 | * Intel XScale PXA255/270 PC Card and CompactFlash Interface. | |
3 | * | |
4 | * Copyright (c) 2006 Openedhand Ltd. | |
5 | * Written by Andrzej Zaborowski <balrog@zabor.org> | |
6 | * | |
7 | * This code is licensed under the GPLv2. | |
6b620ca3 PB |
8 | * |
9 | * Contributions after 2012-01-13 are licensed under the terms of the | |
10 | * GNU GPL, version 2 or (at your option) any later version. | |
a171fe39 AZ |
11 | */ |
12 | ||
8ef94f0b | 13 | #include "qemu/osdep.h" |
64552b6b | 14 | #include "hw/irq.h" |
80bbaee6 | 15 | #include "hw/sysbus.h" |
0b8fa32f | 16 | #include "qemu/module.h" |
83c9f4ca | 17 | #include "hw/pcmcia.h" |
0d09e41a | 18 | #include "hw/arm/pxa.h" |
a171fe39 | 19 | |
80bbaee6 AF |
20 | #define TYPE_PXA2XX_PCMCIA "pxa2xx-pcmcia" |
21 | #define PXA2XX_PCMCIA(obj) \ | |
22 | OBJECT_CHECK(PXA2xxPCMCIAState, obj, TYPE_PXA2XX_PCMCIA) | |
4beeaa71 | 23 | |
bc24a225 | 24 | struct PXA2xxPCMCIAState { |
80bbaee6 AF |
25 | SysBusDevice parent_obj; |
26 | ||
bc24a225 | 27 | PCMCIASocket slot; |
80bbaee6 | 28 | MemoryRegion container_mem; |
354a8c06 | 29 | MemoryRegion common_iomem; |
4beeaa71 | 30 | MemoryRegion attr_iomem; |
59aee13c | 31 | MemoryRegion iomem; |
a171fe39 AZ |
32 | |
33 | qemu_irq irq; | |
34 | qemu_irq cd_irq; | |
80bbaee6 AF |
35 | |
36 | PCMCIACardState *card; | |
a171fe39 AZ |
37 | }; |
38 | ||
354a8c06 | 39 | static uint64_t pxa2xx_pcmcia_common_read(void *opaque, |
a8170e5e | 40 | hwaddr offset, unsigned size) |
a171fe39 | 41 | { |
bc24a225 | 42 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a | 43 | PCMCIACardClass *pcc; |
a171fe39 AZ |
44 | |
45 | if (s->slot.attached) { | |
d1f2c96a AF |
46 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
47 | return pcc->common_read(s->card, offset); | |
a171fe39 AZ |
48 | } |
49 | ||
50 | return 0; | |
51 | } | |
52 | ||
a8170e5e | 53 | static void pxa2xx_pcmcia_common_write(void *opaque, hwaddr offset, |
354a8c06 | 54 | uint64_t value, unsigned size) |
a171fe39 | 55 | { |
bc24a225 | 56 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a | 57 | PCMCIACardClass *pcc; |
a171fe39 AZ |
58 | |
59 | if (s->slot.attached) { | |
d1f2c96a AF |
60 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
61 | pcc->common_write(s->card, offset, value); | |
a171fe39 AZ |
62 | } |
63 | } | |
64 | ||
4beeaa71 | 65 | static uint64_t pxa2xx_pcmcia_attr_read(void *opaque, |
a8170e5e | 66 | hwaddr offset, unsigned size) |
a171fe39 | 67 | { |
bc24a225 | 68 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a | 69 | PCMCIACardClass *pcc; |
a171fe39 AZ |
70 | |
71 | if (s->slot.attached) { | |
d1f2c96a AF |
72 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
73 | return pcc->attr_read(s->card, offset); | |
a171fe39 AZ |
74 | } |
75 | ||
76 | return 0; | |
77 | } | |
78 | ||
a8170e5e | 79 | static void pxa2xx_pcmcia_attr_write(void *opaque, hwaddr offset, |
4beeaa71 | 80 | uint64_t value, unsigned size) |
a171fe39 | 81 | { |
bc24a225 | 82 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a | 83 | PCMCIACardClass *pcc; |
a171fe39 AZ |
84 | |
85 | if (s->slot.attached) { | |
d1f2c96a AF |
86 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
87 | pcc->attr_write(s->card, offset, value); | |
a171fe39 AZ |
88 | } |
89 | } | |
90 | ||
59aee13c | 91 | static uint64_t pxa2xx_pcmcia_io_read(void *opaque, |
a8170e5e | 92 | hwaddr offset, unsigned size) |
a171fe39 | 93 | { |
bc24a225 | 94 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a | 95 | PCMCIACardClass *pcc; |
a171fe39 AZ |
96 | |
97 | if (s->slot.attached) { | |
d1f2c96a AF |
98 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
99 | return pcc->io_read(s->card, offset); | |
a171fe39 AZ |
100 | } |
101 | ||
102 | return 0; | |
103 | } | |
104 | ||
a8170e5e | 105 | static void pxa2xx_pcmcia_io_write(void *opaque, hwaddr offset, |
59aee13c | 106 | uint64_t value, unsigned size) |
a171fe39 | 107 | { |
bc24a225 | 108 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a | 109 | PCMCIACardClass *pcc; |
a171fe39 AZ |
110 | |
111 | if (s->slot.attached) { | |
d1f2c96a AF |
112 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
113 | pcc->io_write(s->card, offset, value); | |
a171fe39 AZ |
114 | } |
115 | } | |
116 | ||
354a8c06 BC |
117 | static const MemoryRegionOps pxa2xx_pcmcia_common_ops = { |
118 | .read = pxa2xx_pcmcia_common_read, | |
119 | .write = pxa2xx_pcmcia_common_write, | |
120 | .endianness = DEVICE_NATIVE_ENDIAN | |
a171fe39 AZ |
121 | }; |
122 | ||
4beeaa71 BC |
123 | static const MemoryRegionOps pxa2xx_pcmcia_attr_ops = { |
124 | .read = pxa2xx_pcmcia_attr_read, | |
125 | .write = pxa2xx_pcmcia_attr_write, | |
126 | .endianness = DEVICE_NATIVE_ENDIAN | |
a171fe39 AZ |
127 | }; |
128 | ||
59aee13c BC |
129 | static const MemoryRegionOps pxa2xx_pcmcia_io_ops = { |
130 | .read = pxa2xx_pcmcia_io_read, | |
131 | .write = pxa2xx_pcmcia_io_write, | |
132 | .endianness = DEVICE_NATIVE_ENDIAN | |
a171fe39 AZ |
133 | }; |
134 | ||
135 | static void pxa2xx_pcmcia_set_irq(void *opaque, int line, int level) | |
136 | { | |
bc24a225 | 137 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
a171fe39 AZ |
138 | if (!s->irq) |
139 | return; | |
140 | ||
141 | qemu_set_irq(s->irq, level); | |
142 | } | |
143 | ||
354a8c06 | 144 | PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem, |
a8170e5e | 145 | hwaddr base) |
a171fe39 | 146 | { |
80bbaee6 | 147 | DeviceState *dev; |
bc24a225 | 148 | PXA2xxPCMCIAState *s; |
a171fe39 | 149 | |
80bbaee6 AF |
150 | dev = qdev_create(NULL, TYPE_PXA2XX_PCMCIA); |
151 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); | |
152 | s = PXA2XX_PCMCIA(dev); | |
153 | ||
80bbaee6 AF |
154 | qdev_init_nofail(dev); |
155 | ||
156 | return s; | |
157 | } | |
158 | ||
80bbaee6 AF |
159 | static void pxa2xx_pcmcia_initfn(Object *obj) |
160 | { | |
161 | SysBusDevice *sbd = SYS_BUS_DEVICE(obj); | |
162 | PXA2xxPCMCIAState *s = PXA2XX_PCMCIA(obj); | |
163 | ||
164 | memory_region_init(&s->container_mem, obj, "container", 0x10000000); | |
165 | sysbus_init_mmio(sbd, &s->container_mem); | |
a171fe39 AZ |
166 | |
167 | /* Socket I/O Memory Space */ | |
81e0ab48 | 168 | memory_region_init_io(&s->iomem, obj, &pxa2xx_pcmcia_io_ops, s, |
59aee13c | 169 | "pxa2xx-pcmcia-io", 0x04000000); |
80bbaee6 | 170 | memory_region_add_subregion(&s->container_mem, 0x00000000, |
59aee13c | 171 | &s->iomem); |
a171fe39 AZ |
172 | |
173 | /* Then next 64 MB is reserved */ | |
174 | ||
175 | /* Socket Attribute Memory Space */ | |
81e0ab48 | 176 | memory_region_init_io(&s->attr_iomem, obj, &pxa2xx_pcmcia_attr_ops, s, |
4beeaa71 | 177 | "pxa2xx-pcmcia-attribute", 0x04000000); |
80bbaee6 | 178 | memory_region_add_subregion(&s->container_mem, 0x08000000, |
4beeaa71 | 179 | &s->attr_iomem); |
a171fe39 AZ |
180 | |
181 | /* Socket Common Memory Space */ | |
81e0ab48 | 182 | memory_region_init_io(&s->common_iomem, obj, &pxa2xx_pcmcia_common_ops, s, |
354a8c06 | 183 | "pxa2xx-pcmcia-common", 0x04000000); |
80bbaee6 | 184 | memory_region_add_subregion(&s->container_mem, 0x0c000000, |
354a8c06 | 185 | &s->common_iomem); |
a171fe39 | 186 | |
f3c7d038 | 187 | s->slot.irq = qemu_allocate_irq(pxa2xx_pcmcia_set_irq, s, 0); |
3f582262 | 188 | |
80bbaee6 | 189 | object_property_add_link(obj, "card", TYPE_PCMCIA_CARD, |
39f72ef9 SH |
190 | (Object **)&s->card, |
191 | NULL, /* read-only property */ | |
192 | 0, NULL); | |
a171fe39 AZ |
193 | } |
194 | ||
195 | /* Insert a new card into a slot */ | |
bc24a225 | 196 | int pxa2xx_pcmcia_attach(void *opaque, PCMCIACardState *card) |
a171fe39 | 197 | { |
bc24a225 | 198 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a AF |
199 | PCMCIACardClass *pcc; |
200 | ||
201 | if (s->slot.attached) { | |
a171fe39 | 202 | return -EEXIST; |
d1f2c96a | 203 | } |
a171fe39 AZ |
204 | |
205 | if (s->cd_irq) { | |
206 | qemu_irq_raise(s->cd_irq); | |
207 | } | |
208 | ||
209 | s->card = card; | |
d1f2c96a | 210 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
a171fe39 | 211 | |
d1f2c96a | 212 | s->slot.attached = true; |
a171fe39 | 213 | s->card->slot = &s->slot; |
d1f2c96a | 214 | pcc->attach(s->card); |
a171fe39 AZ |
215 | |
216 | return 0; | |
217 | } | |
218 | ||
219 | /* Eject card from the slot */ | |
853ca11d | 220 | int pxa2xx_pcmcia_detach(void *opaque) |
a171fe39 | 221 | { |
bc24a225 | 222 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a AF |
223 | PCMCIACardClass *pcc; |
224 | ||
225 | if (!s->slot.attached) { | |
a171fe39 | 226 | return -ENOENT; |
d1f2c96a | 227 | } |
a171fe39 | 228 | |
d1f2c96a AF |
229 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
230 | pcc->detach(s->card); | |
b9d38e95 BS |
231 | s->card->slot = NULL; |
232 | s->card = NULL; | |
a171fe39 | 233 | |
d1f2c96a | 234 | s->slot.attached = false; |
a171fe39 | 235 | |
d1f2c96a | 236 | if (s->irq) { |
a171fe39 | 237 | qemu_irq_lower(s->irq); |
d1f2c96a AF |
238 | } |
239 | if (s->cd_irq) { | |
a171fe39 | 240 | qemu_irq_lower(s->cd_irq); |
d1f2c96a | 241 | } |
a171fe39 AZ |
242 | |
243 | return 0; | |
244 | } | |
245 | ||
246 | /* Who to notify on card events */ | |
247 | void pxa2xx_pcmcia_set_irq_cb(void *opaque, qemu_irq irq, qemu_irq cd_irq) | |
248 | { | |
bc24a225 | 249 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
a171fe39 AZ |
250 | s->irq = irq; |
251 | s->cd_irq = cd_irq; | |
252 | } | |
80bbaee6 | 253 | |
80bbaee6 AF |
254 | static const TypeInfo pxa2xx_pcmcia_type_info = { |
255 | .name = TYPE_PXA2XX_PCMCIA, | |
256 | .parent = TYPE_SYS_BUS_DEVICE, | |
257 | .instance_size = sizeof(PXA2xxPCMCIAState), | |
258 | .instance_init = pxa2xx_pcmcia_initfn, | |
80bbaee6 AF |
259 | }; |
260 | ||
261 | static void pxa2xx_pcmcia_register_types(void) | |
262 | { | |
263 | type_register_static(&pxa2xx_pcmcia_type_info); | |
264 | } | |
265 | ||
266 | type_init(pxa2xx_pcmcia_register_types) |