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Commit | Line | Data |
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bbf5c878 MR |
1 | /* |
2 | * QEMU SPAPR Dynamic Reconfiguration Connector Implementation | |
3 | * | |
4 | * Copyright IBM Corp. 2014 | |
5 | * | |
6 | * Authors: | |
7 | * Michael Roth <mdroth@linux.vnet.ibm.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | */ | |
12 | ||
0d75590d | 13 | #include "qemu/osdep.h" |
da34e65c | 14 | #include "qapi/error.h" |
15280c36 | 15 | #include "qapi/qmp/qnull.h" |
4771d756 | 16 | #include "cpu.h" |
f348b6d1 | 17 | #include "qemu/cutils.h" |
bbf5c878 MR |
18 | #include "hw/ppc/spapr_drc.h" |
19 | #include "qom/object.h" | |
d6454270 | 20 | #include "migration/vmstate.h" |
bbf5c878 MR |
21 | #include "qapi/visitor.h" |
22 | #include "qemu/error-report.h" | |
0cb688d2 | 23 | #include "hw/ppc/spapr.h" /* for RTAS return codes */ |
31834723 | 24 | #include "hw/pci-host/spapr.h" /* spapr_phb_remove_pci_device_cb callback */ |
d9c95c71 | 25 | #include "sysemu/device_tree.h" |
71e8a915 | 26 | #include "sysemu/reset.h" |
24ac7755 | 27 | #include "trace.h" |
bbf5c878 MR |
28 | |
29 | #define DRC_CONTAINER_PATH "/dr-connector" | |
30 | #define DRC_INDEX_TYPE_SHIFT 28 | |
627c2ef7 | 31 | #define DRC_INDEX_ID_MASK ((1ULL << DRC_INDEX_TYPE_SHIFT) - 1) |
bbf5c878 | 32 | |
ce2918cb | 33 | SpaprDrcType spapr_drc_type(SpaprDrc *drc) |
2d335818 | 34 | { |
ce2918cb | 35 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
2d335818 DG |
36 | |
37 | return 1 << drck->typeshift; | |
38 | } | |
39 | ||
ce2918cb | 40 | uint32_t spapr_drc_index(SpaprDrc *drc) |
bbf5c878 | 41 | { |
ce2918cb | 42 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
2d335818 | 43 | |
bbf5c878 MR |
44 | /* no set format for a drc index: it only needs to be globally |
45 | * unique. this is how we encode the DRC type on bare-metal | |
46 | * however, so might as well do that here | |
47 | */ | |
2d335818 DG |
48 | return (drck->typeshift << DRC_INDEX_TYPE_SHIFT) |
49 | | (drc->id & DRC_INDEX_ID_MASK); | |
bbf5c878 MR |
50 | } |
51 | ||
ce2918cb | 52 | static uint32_t drc_isolate_physical(SpaprDrc *drc) |
bbf5c878 | 53 | { |
9d4c0f4f DG |
54 | switch (drc->state) { |
55 | case SPAPR_DRC_STATE_PHYSICAL_POWERON: | |
56 | return RTAS_OUT_SUCCESS; /* Nothing to do */ | |
57 | case SPAPR_DRC_STATE_PHYSICAL_CONFIGURED: | |
58 | break; /* see below */ | |
59 | case SPAPR_DRC_STATE_PHYSICAL_UNISOLATE: | |
60 | return RTAS_OUT_PARAM_ERROR; /* not allowed */ | |
61 | default: | |
62 | g_assert_not_reached(); | |
63 | } | |
64 | ||
9d4c0f4f | 65 | drc->state = SPAPR_DRC_STATE_PHYSICAL_POWERON; |
0dfabd39 | 66 | |
f1c52354 | 67 | if (drc->unplug_requested) { |
0dfabd39 | 68 | uint32_t drc_index = spapr_drc_index(drc); |
9d4c0f4f DG |
69 | trace_spapr_drc_set_isolation_state_finalizing(drc_index); |
70 | spapr_drc_detach(drc); | |
9d1852ce | 71 | } |
0dfabd39 DG |
72 | |
73 | return RTAS_OUT_SUCCESS; | |
74 | } | |
75 | ||
ce2918cb | 76 | static uint32_t drc_unisolate_physical(SpaprDrc *drc) |
0dfabd39 | 77 | { |
9d4c0f4f DG |
78 | switch (drc->state) { |
79 | case SPAPR_DRC_STATE_PHYSICAL_UNISOLATE: | |
80 | case SPAPR_DRC_STATE_PHYSICAL_CONFIGURED: | |
81 | return RTAS_OUT_SUCCESS; /* Nothing to do */ | |
82 | case SPAPR_DRC_STATE_PHYSICAL_POWERON: | |
83 | break; /* see below */ | |
84 | default: | |
85 | g_assert_not_reached(); | |
86 | } | |
87 | ||
0dfabd39 DG |
88 | /* cannot unisolate a non-existent resource, and, or resources |
89 | * which are in an 'UNUSABLE' allocation state. (PAPR 2.7, | |
90 | * 13.5.3.5) | |
91 | */ | |
92 | if (!drc->dev) { | |
93 | return RTAS_OUT_NO_SUCH_INDICATOR; | |
94 | } | |
95 | ||
9d4c0f4f | 96 | drc->state = SPAPR_DRC_STATE_PHYSICAL_UNISOLATE; |
4445b1d2 DG |
97 | drc->ccs_offset = drc->fdt_start_offset; |
98 | drc->ccs_depth = 0; | |
0dfabd39 DG |
99 | |
100 | return RTAS_OUT_SUCCESS; | |
101 | } | |
102 | ||
ce2918cb | 103 | static uint32_t drc_isolate_logical(SpaprDrc *drc) |
0dfabd39 | 104 | { |
9d4c0f4f DG |
105 | switch (drc->state) { |
106 | case SPAPR_DRC_STATE_LOGICAL_AVAILABLE: | |
107 | case SPAPR_DRC_STATE_LOGICAL_UNUSABLE: | |
108 | return RTAS_OUT_SUCCESS; /* Nothing to do */ | |
109 | case SPAPR_DRC_STATE_LOGICAL_CONFIGURED: | |
110 | break; /* see below */ | |
111 | case SPAPR_DRC_STATE_LOGICAL_UNISOLATE: | |
112 | return RTAS_OUT_PARAM_ERROR; /* not allowed */ | |
113 | default: | |
114 | g_assert_not_reached(); | |
115 | } | |
116 | ||
cf632463 BR |
117 | /* |
118 | * Fail any requests to ISOLATE the LMB DRC if this LMB doesn't | |
119 | * belong to a DIMM device that is marked for removal. | |
120 | * | |
121 | * Currently the guest userspace tool drmgr that drives the memory | |
122 | * hotplug/unplug will just try to remove a set of 'removable' LMBs | |
123 | * in response to a hot unplug request that is based on drc-count. | |
124 | * If the LMB being removed doesn't belong to a DIMM device that is | |
125 | * actually being unplugged, fail the isolation request here. | |
126 | */ | |
0dfabd39 | 127 | if (spapr_drc_type(drc) == SPAPR_DR_CONNECTOR_TYPE_LMB |
f1c52354 | 128 | && !drc->unplug_requested) { |
0dfabd39 | 129 | return RTAS_OUT_HW_ERROR; |
cf632463 BR |
130 | } |
131 | ||
9d4c0f4f | 132 | drc->state = SPAPR_DRC_STATE_LOGICAL_AVAILABLE; |
bbf5c878 | 133 | |
0dfabd39 DG |
134 | /* if we're awaiting release, but still in an unconfigured state, |
135 | * it's likely the guest is still in the process of configuring | |
136 | * the device and is transitioning the devices to an ISOLATED | |
137 | * state as a part of that process. so we only complete the | |
138 | * removal when this transition happens for a device in a | |
139 | * configured state, as suggested by the state diagram from PAPR+ | |
140 | * 2.7, 13.4 | |
141 | */ | |
f1c52354 | 142 | if (drc->unplug_requested) { |
0dfabd39 | 143 | uint32_t drc_index = spapr_drc_index(drc); |
9d4c0f4f DG |
144 | trace_spapr_drc_set_isolation_state_finalizing(drc_index); |
145 | spapr_drc_detach(drc); | |
bbf5c878 | 146 | } |
0dfabd39 DG |
147 | return RTAS_OUT_SUCCESS; |
148 | } | |
149 | ||
ce2918cb | 150 | static uint32_t drc_unisolate_logical(SpaprDrc *drc) |
0dfabd39 | 151 | { |
9d4c0f4f DG |
152 | switch (drc->state) { |
153 | case SPAPR_DRC_STATE_LOGICAL_UNISOLATE: | |
154 | case SPAPR_DRC_STATE_LOGICAL_CONFIGURED: | |
155 | return RTAS_OUT_SUCCESS; /* Nothing to do */ | |
156 | case SPAPR_DRC_STATE_LOGICAL_AVAILABLE: | |
157 | break; /* see below */ | |
158 | case SPAPR_DRC_STATE_LOGICAL_UNUSABLE: | |
159 | return RTAS_OUT_NO_SUCH_INDICATOR; /* not allowed */ | |
160 | default: | |
161 | g_assert_not_reached(); | |
0dfabd39 DG |
162 | } |
163 | ||
9d4c0f4f DG |
164 | /* Move to AVAILABLE state should have ensured device was present */ |
165 | g_assert(drc->dev); | |
bbf5c878 | 166 | |
9d4c0f4f | 167 | drc->state = SPAPR_DRC_STATE_LOGICAL_UNISOLATE; |
4445b1d2 DG |
168 | drc->ccs_offset = drc->fdt_start_offset; |
169 | drc->ccs_depth = 0; | |
170 | ||
0cb688d2 | 171 | return RTAS_OUT_SUCCESS; |
bbf5c878 MR |
172 | } |
173 | ||
ce2918cb | 174 | static uint32_t drc_set_usable(SpaprDrc *drc) |
bbf5c878 | 175 | { |
9d4c0f4f DG |
176 | switch (drc->state) { |
177 | case SPAPR_DRC_STATE_LOGICAL_AVAILABLE: | |
178 | case SPAPR_DRC_STATE_LOGICAL_UNISOLATE: | |
179 | case SPAPR_DRC_STATE_LOGICAL_CONFIGURED: | |
180 | return RTAS_OUT_SUCCESS; /* Nothing to do */ | |
181 | case SPAPR_DRC_STATE_LOGICAL_UNUSABLE: | |
182 | break; /* see below */ | |
183 | default: | |
184 | g_assert_not_reached(); | |
185 | } | |
186 | ||
61736732 DG |
187 | /* if there's no resource/device associated with the DRC, there's |
188 | * no way for us to put it in an allocation state consistent with | |
189 | * being 'USABLE'. PAPR 2.7, 13.5.3.4 documents that this should | |
190 | * result in an RTAS return code of -3 / "no such indicator" | |
191 | */ | |
192 | if (!drc->dev) { | |
193 | return RTAS_OUT_NO_SUCH_INDICATOR; | |
194 | } | |
f1c52354 | 195 | if (drc->unplug_requested) { |
82a93a1d DG |
196 | /* Don't allow the guest to move a device away from UNUSABLE |
197 | * state when we want to unplug it */ | |
61736732 | 198 | return RTAS_OUT_NO_SUCH_INDICATOR; |
9d1852ce MR |
199 | } |
200 | ||
9d4c0f4f | 201 | drc->state = SPAPR_DRC_STATE_LOGICAL_AVAILABLE; |
61736732 DG |
202 | |
203 | return RTAS_OUT_SUCCESS; | |
204 | } | |
205 | ||
ce2918cb | 206 | static uint32_t drc_set_unusable(SpaprDrc *drc) |
61736732 | 207 | { |
9d4c0f4f DG |
208 | switch (drc->state) { |
209 | case SPAPR_DRC_STATE_LOGICAL_UNUSABLE: | |
210 | return RTAS_OUT_SUCCESS; /* Nothing to do */ | |
211 | case SPAPR_DRC_STATE_LOGICAL_AVAILABLE: | |
212 | break; /* see below */ | |
213 | case SPAPR_DRC_STATE_LOGICAL_UNISOLATE: | |
214 | case SPAPR_DRC_STATE_LOGICAL_CONFIGURED: | |
215 | return RTAS_OUT_NO_SUCH_INDICATOR; /* not allowed */ | |
216 | default: | |
217 | g_assert_not_reached(); | |
218 | } | |
219 | ||
220 | drc->state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE; | |
f1c52354 | 221 | if (drc->unplug_requested) { |
61736732 DG |
222 | uint32_t drc_index = spapr_drc_index(drc); |
223 | trace_spapr_drc_set_allocation_state_finalizing(drc_index); | |
a8dc47fd | 224 | spapr_drc_detach(drc); |
bbf5c878 | 225 | } |
61736732 | 226 | |
0cb688d2 | 227 | return RTAS_OUT_SUCCESS; |
bbf5c878 MR |
228 | } |
229 | ||
dbd26f2f | 230 | static char *spapr_drc_name(SpaprDrc *drc) |
bbf5c878 | 231 | { |
ce2918cb | 232 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
79808336 DG |
233 | |
234 | /* human-readable name for a DRC to encode into the DT | |
235 | * description. this is mainly only used within a guest in place | |
236 | * of the unique DRC index. | |
237 | * | |
238 | * in the case of VIO/PCI devices, it corresponds to a "location | |
239 | * code" that maps a logical device/function (DRC index) to a | |
240 | * physical (or virtual in the case of VIO) location in the system | |
241 | * by chaining together the "location label" for each | |
242 | * encapsulating component. | |
243 | * | |
244 | * since this is more to do with diagnosing physical hardware | |
245 | * issues than guest compatibility, we choose location codes/DRC | |
246 | * names that adhere to the documented format, but avoid encoding | |
247 | * the entire topology information into the label/code, instead | |
248 | * just using the location codes based on the labels for the | |
249 | * endpoints (VIO/PCI adaptor connectors), which is basically just | |
250 | * "C" followed by an integer ID. | |
251 | * | |
252 | * DRC names as documented by PAPR+ v2.7, 13.5.2.4 | |
253 | * location codes as documented by PAPR+ v2.7, 12.3.1.5 | |
254 | */ | |
255 | return g_strdup_printf("%s%d", drck->drc_name_prefix, drc->id); | |
bbf5c878 MR |
256 | } |
257 | ||
bbf5c878 MR |
258 | /* |
259 | * dr-entity-sense sensor value | |
260 | * returned via get-sensor-state RTAS calls | |
261 | * as expected by state diagram in PAPR+ 2.7, 13.4 | |
262 | * based on the current allocation/indicator/power states | |
263 | * for the DR connector. | |
264 | */ | |
ce2918cb | 265 | static SpaprDREntitySense physical_entity_sense(SpaprDrc *drc) |
bbf5c878 | 266 | { |
f224d35b DG |
267 | /* this assumes all PCI devices are assigned to a 'live insertion' |
268 | * power domain, where QEMU manages power state automatically as | |
269 | * opposed to the guest. present, non-PCI resources are unaffected | |
270 | * by power state. | |
271 | */ | |
272 | return drc->dev ? SPAPR_DR_ENTITY_SENSE_PRESENT | |
273 | : SPAPR_DR_ENTITY_SENSE_EMPTY; | |
274 | } | |
275 | ||
ce2918cb | 276 | static SpaprDREntitySense logical_entity_sense(SpaprDrc *drc) |
f224d35b | 277 | { |
9d4c0f4f DG |
278 | switch (drc->state) { |
279 | case SPAPR_DRC_STATE_LOGICAL_UNUSABLE: | |
f224d35b | 280 | return SPAPR_DR_ENTITY_SENSE_UNUSABLE; |
9d4c0f4f DG |
281 | case SPAPR_DRC_STATE_LOGICAL_AVAILABLE: |
282 | case SPAPR_DRC_STATE_LOGICAL_UNISOLATE: | |
283 | case SPAPR_DRC_STATE_LOGICAL_CONFIGURED: | |
284 | g_assert(drc->dev); | |
285 | return SPAPR_DR_ENTITY_SENSE_PRESENT; | |
286 | default: | |
287 | g_assert_not_reached(); | |
bbf5c878 | 288 | } |
bbf5c878 MR |
289 | } |
290 | ||
d7bce999 EB |
291 | static void prop_get_index(Object *obj, Visitor *v, const char *name, |
292 | void *opaque, Error **errp) | |
bbf5c878 | 293 | { |
ce2918cb | 294 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj); |
0b55aa91 | 295 | uint32_t value = spapr_drc_index(drc); |
51e72bc1 | 296 | visit_type_uint32(v, name, &value, errp); |
bbf5c878 MR |
297 | } |
298 | ||
d7bce999 EB |
299 | static void prop_get_fdt(Object *obj, Visitor *v, const char *name, |
300 | void *opaque, Error **errp) | |
bbf5c878 | 301 | { |
ce2918cb | 302 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj); |
d2f95f4d | 303 | QNull *null = NULL; |
c75304a1 | 304 | Error *err = NULL; |
bbf5c878 MR |
305 | int fdt_offset_next, fdt_offset, fdt_depth; |
306 | void *fdt; | |
307 | ||
308 | if (!drc->fdt) { | |
d2f95f4d | 309 | visit_type_null(v, NULL, &null, errp); |
cb3e7f08 | 310 | qobject_unref(null); |
bbf5c878 MR |
311 | return; |
312 | } | |
313 | ||
314 | fdt = drc->fdt; | |
315 | fdt_offset = drc->fdt_start_offset; | |
316 | fdt_depth = 0; | |
317 | ||
318 | do { | |
319 | const char *name = NULL; | |
320 | const struct fdt_property *prop = NULL; | |
321 | int prop_len = 0, name_len = 0; | |
322 | uint32_t tag; | |
323 | ||
324 | tag = fdt_next_tag(fdt, fdt_offset, &fdt_offset_next); | |
325 | switch (tag) { | |
326 | case FDT_BEGIN_NODE: | |
327 | fdt_depth++; | |
328 | name = fdt_get_name(fdt, fdt_offset, &name_len); | |
337283df | 329 | visit_start_struct(v, name, NULL, 0, &err); |
c75304a1 MA |
330 | if (err) { |
331 | error_propagate(errp, err); | |
332 | return; | |
333 | } | |
bbf5c878 MR |
334 | break; |
335 | case FDT_END_NODE: | |
336 | /* shouldn't ever see an FDT_END_NODE before FDT_BEGIN_NODE */ | |
337 | g_assert(fdt_depth > 0); | |
15c2f669 | 338 | visit_check_struct(v, &err); |
1158bb2a | 339 | visit_end_struct(v, NULL); |
c75304a1 MA |
340 | if (err) { |
341 | error_propagate(errp, err); | |
342 | return; | |
343 | } | |
bbf5c878 MR |
344 | fdt_depth--; |
345 | break; | |
346 | case FDT_PROP: { | |
347 | int i; | |
348 | prop = fdt_get_property_by_offset(fdt, fdt_offset, &prop_len); | |
349 | name = fdt_string(fdt, fdt32_to_cpu(prop->nameoff)); | |
d9f62dde | 350 | visit_start_list(v, name, NULL, 0, &err); |
c75304a1 MA |
351 | if (err) { |
352 | error_propagate(errp, err); | |
353 | return; | |
354 | } | |
bbf5c878 | 355 | for (i = 0; i < prop_len; i++) { |
51e72bc1 | 356 | visit_type_uint8(v, NULL, (uint8_t *)&prop->data[i], &err); |
c75304a1 MA |
357 | if (err) { |
358 | error_propagate(errp, err); | |
359 | return; | |
360 | } | |
361 | } | |
a4a1c70d | 362 | visit_check_list(v, &err); |
1158bb2a | 363 | visit_end_list(v, NULL); |
a4a1c70d MA |
364 | if (err) { |
365 | error_propagate(errp, err); | |
366 | return; | |
367 | } | |
bbf5c878 MR |
368 | break; |
369 | } | |
370 | default: | |
e20c6314 PMD |
371 | error_report("device FDT in unexpected state: %d", tag); |
372 | abort(); | |
bbf5c878 MR |
373 | } |
374 | fdt_offset = fdt_offset_next; | |
375 | } while (fdt_depth != 0); | |
376 | } | |
377 | ||
ce2918cb | 378 | void spapr_drc_attach(SpaprDrc *drc, DeviceState *d, Error **errp) |
bbf5c878 | 379 | { |
0b55aa91 | 380 | trace_spapr_drc_attach(spapr_drc_index(drc)); |
bbf5c878 | 381 | |
9d4c0f4f | 382 | if (drc->dev) { |
bbf5c878 MR |
383 | error_setg(errp, "an attached device is still awaiting release"); |
384 | return; | |
385 | } | |
9d4c0f4f DG |
386 | g_assert((drc->state == SPAPR_DRC_STATE_LOGICAL_UNUSABLE) |
387 | || (drc->state == SPAPR_DRC_STATE_PHYSICAL_POWERON)); | |
bbf5c878 | 388 | |
bbf5c878 | 389 | drc->dev = d; |
d9c95c71 | 390 | |
bbf5c878 MR |
391 | object_property_add_link(OBJECT(drc), "device", |
392 | object_get_typename(OBJECT(drc->dev)), | |
393 | (Object **)(&drc->dev), | |
394 | NULL, 0, NULL); | |
395 | } | |
396 | ||
ce2918cb | 397 | static void spapr_drc_release(SpaprDrc *drc) |
bbf5c878 | 398 | { |
ce2918cb | 399 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
6b762f29 DG |
400 | |
401 | drck->release(drc->dev); | |
bbf5c878 | 402 | |
f1c52354 | 403 | drc->unplug_requested = false; |
bbf5c878 MR |
404 | g_free(drc->fdt); |
405 | drc->fdt = NULL; | |
406 | drc->fdt_start_offset = 0; | |
ba50822f | 407 | object_property_del(OBJECT(drc), "device", &error_abort); |
bbf5c878 | 408 | drc->dev = NULL; |
bbf5c878 MR |
409 | } |
410 | ||
ce2918cb | 411 | void spapr_drc_detach(SpaprDrc *drc) |
9c914e53 | 412 | { |
ce2918cb | 413 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
9d4c0f4f | 414 | |
9c914e53 DG |
415 | trace_spapr_drc_detach(spapr_drc_index(drc)); |
416 | ||
9d4c0f4f | 417 | g_assert(drc->dev); |
a8dc47fd | 418 | |
9d4c0f4f | 419 | drc->unplug_requested = true; |
9c914e53 | 420 | |
9d4c0f4f DG |
421 | if (drc->state != drck->empty_state) { |
422 | trace_spapr_drc_awaiting_quiesce(spapr_drc_index(drc)); | |
9c914e53 DG |
423 | return; |
424 | } | |
425 | ||
9c914e53 DG |
426 | spapr_drc_release(drc); |
427 | } | |
428 | ||
ce2918cb | 429 | void spapr_drc_reset(SpaprDrc *drc) |
bbf5c878 | 430 | { |
ce2918cb | 431 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
9d4c0f4f | 432 | |
0b55aa91 | 433 | trace_spapr_drc_reset(spapr_drc_index(drc)); |
b8fdd530 | 434 | |
bbf5c878 | 435 | /* immediately upon reset we can safely assume DRCs whose devices |
4f9242fc | 436 | * are pending removal can be safely removed. |
bbf5c878 | 437 | */ |
f1c52354 | 438 | if (drc->unplug_requested) { |
4f9242fc DG |
439 | spapr_drc_release(drc); |
440 | } | |
441 | ||
4f9242fc | 442 | if (drc->dev) { |
9d4c0f4f DG |
443 | /* A device present at reset is ready to go, same as coldplugged */ |
444 | drc->state = drck->ready_state; | |
188bfe1b BR |
445 | /* |
446 | * Ensure that we are able to send the FDT fragment again | |
447 | * via configure-connector call if the guest requests. | |
448 | */ | |
449 | drc->ccs_offset = drc->fdt_start_offset; | |
450 | drc->ccs_depth = 0; | |
4f9242fc | 451 | } else { |
9d4c0f4f | 452 | drc->state = drck->empty_state; |
188bfe1b BR |
453 | drc->ccs_offset = -1; |
454 | drc->ccs_depth = -1; | |
bbf5c878 MR |
455 | } |
456 | } | |
457 | ||
10f12e64 | 458 | bool spapr_drc_needed(void *opaque) |
a50919dd | 459 | { |
ce2918cb DG |
460 | SpaprDrc *drc = (SpaprDrc *)opaque; |
461 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); | |
a50919dd DHB |
462 | |
463 | /* If no dev is plugged in there is no need to migrate the DRC state */ | |
c618e300 | 464 | if (!drc->dev) { |
a50919dd DHB |
465 | return false; |
466 | } | |
467 | ||
468 | /* | |
9d4c0f4f DG |
469 | * We need to migrate the state if it's not equal to the expected |
470 | * long-term state, which is the same as the coldplugged initial | |
471 | * state */ | |
472 | return (drc->state != drck->ready_state); | |
a50919dd DHB |
473 | } |
474 | ||
475 | static const VMStateDescription vmstate_spapr_drc = { | |
476 | .name = "spapr_drc", | |
477 | .version_id = 1, | |
478 | .minimum_version_id = 1, | |
479 | .needed = spapr_drc_needed, | |
480 | .fields = (VMStateField []) { | |
ce2918cb | 481 | VMSTATE_UINT32(state, SpaprDrc), |
a50919dd DHB |
482 | VMSTATE_END_OF_LIST() |
483 | } | |
484 | }; | |
485 | ||
bbf5c878 MR |
486 | static void realize(DeviceState *d, Error **errp) |
487 | { | |
ce2918cb | 488 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(d); |
bbf5c878 | 489 | Object *root_container; |
f5babeac | 490 | gchar *link_name; |
bbf5c878 MR |
491 | gchar *child_name; |
492 | Error *err = NULL; | |
493 | ||
0b55aa91 | 494 | trace_spapr_drc_realize(spapr_drc_index(drc)); |
bbf5c878 MR |
495 | /* NOTE: we do this as part of realize/unrealize due to the fact |
496 | * that the guest will communicate with the DRC via RTAS calls | |
497 | * referencing the global DRC index. By unlinking the DRC | |
498 | * from DRC_CONTAINER_PATH/<drc_index> we effectively make it | |
499 | * inaccessible by the guest, since lookups rely on this path | |
500 | * existing in the composition tree | |
501 | */ | |
502 | root_container = container_get(object_get_root(), DRC_CONTAINER_PATH); | |
f5babeac | 503 | link_name = g_strdup_printf("%x", spapr_drc_index(drc)); |
bbf5c878 | 504 | child_name = object_get_canonical_path_component(OBJECT(drc)); |
0b55aa91 | 505 | trace_spapr_drc_realize_child(spapr_drc_index(drc), child_name); |
bbf5c878 MR |
506 | object_property_add_alias(root_container, link_name, |
507 | drc->owner, child_name, &err); | |
bf26ae32 | 508 | g_free(child_name); |
f5babeac | 509 | g_free(link_name); |
bbf5c878 | 510 | if (err) { |
bf26ae32 GK |
511 | error_propagate(errp, err); |
512 | return; | |
bbf5c878 | 513 | } |
3cad405b | 514 | vmstate_register(VMSTATE_IF(drc), spapr_drc_index(drc), &vmstate_spapr_drc, |
a50919dd | 515 | drc); |
0b55aa91 | 516 | trace_spapr_drc_realize_complete(spapr_drc_index(drc)); |
bbf5c878 MR |
517 | } |
518 | ||
519 | static void unrealize(DeviceState *d, Error **errp) | |
520 | { | |
ce2918cb | 521 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(d); |
bbf5c878 | 522 | Object *root_container; |
f5babeac | 523 | gchar *name; |
bbf5c878 | 524 | |
0b55aa91 | 525 | trace_spapr_drc_unrealize(spapr_drc_index(drc)); |
3cad405b | 526 | vmstate_unregister(VMSTATE_IF(drc), &vmstate_spapr_drc, drc); |
bbf5c878 | 527 | root_container = container_get(object_get_root(), DRC_CONTAINER_PATH); |
f5babeac | 528 | name = g_strdup_printf("%x", spapr_drc_index(drc)); |
bf26ae32 | 529 | object_property_del(root_container, name, errp); |
f5babeac | 530 | g_free(name); |
bbf5c878 MR |
531 | } |
532 | ||
ce2918cb | 533 | SpaprDrc *spapr_dr_connector_new(Object *owner, const char *type, |
bbf5c878 MR |
534 | uint32_t id) |
535 | { | |
ce2918cb | 536 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(object_new(type)); |
94649d42 | 537 | char *prop_name; |
bbf5c878 | 538 | |
bbf5c878 MR |
539 | drc->id = id; |
540 | drc->owner = owner; | |
0b55aa91 DG |
541 | prop_name = g_strdup_printf("dr-connector[%"PRIu32"]", |
542 | spapr_drc_index(drc)); | |
325837ca | 543 | object_property_add_child(owner, prop_name, OBJECT(drc), &error_abort); |
f3f41030 | 544 | object_unref(OBJECT(drc)); |
bbf5c878 | 545 | object_property_set_bool(OBJECT(drc), true, "realized", NULL); |
94649d42 | 546 | g_free(prop_name); |
bbf5c878 | 547 | |
bbf5c878 MR |
548 | return drc; |
549 | } | |
550 | ||
551 | static void spapr_dr_connector_instance_init(Object *obj) | |
552 | { | |
ce2918cb DG |
553 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj); |
554 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); | |
bbf5c878 | 555 | |
bbf5c878 MR |
556 | object_property_add_uint32_ptr(obj, "id", &drc->id, NULL); |
557 | object_property_add(obj, "index", "uint32", prop_get_index, | |
558 | NULL, NULL, NULL, NULL); | |
bbf5c878 MR |
559 | object_property_add(obj, "fdt", "struct", prop_get_fdt, |
560 | NULL, NULL, NULL, NULL); | |
9d4c0f4f | 561 | drc->state = drck->empty_state; |
bbf5c878 MR |
562 | } |
563 | ||
564 | static void spapr_dr_connector_class_init(ObjectClass *k, void *data) | |
565 | { | |
566 | DeviceClass *dk = DEVICE_CLASS(k); | |
bbf5c878 | 567 | |
bbf5c878 MR |
568 | dk->realize = realize; |
569 | dk->unrealize = unrealize; | |
c401ae8c MA |
570 | /* |
571 | * Reason: it crashes FIXME find and document the real reason | |
572 | */ | |
e90f2a8c | 573 | dk->user_creatable = false; |
bbf5c878 MR |
574 | } |
575 | ||
67fea71b DG |
576 | static bool drc_physical_needed(void *opaque) |
577 | { | |
ce2918cb DG |
578 | SpaprDrcPhysical *drcp = (SpaprDrcPhysical *)opaque; |
579 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(drcp); | |
67fea71b DG |
580 | |
581 | if ((drc->dev && (drcp->dr_indicator == SPAPR_DR_INDICATOR_ACTIVE)) | |
582 | || (!drc->dev && (drcp->dr_indicator == SPAPR_DR_INDICATOR_INACTIVE))) { | |
583 | return false; | |
584 | } | |
585 | return true; | |
586 | } | |
587 | ||
588 | static const VMStateDescription vmstate_spapr_drc_physical = { | |
589 | .name = "spapr_drc/physical", | |
590 | .version_id = 1, | |
591 | .minimum_version_id = 1, | |
592 | .needed = drc_physical_needed, | |
593 | .fields = (VMStateField []) { | |
ce2918cb | 594 | VMSTATE_UINT32(dr_indicator, SpaprDrcPhysical), |
67fea71b DG |
595 | VMSTATE_END_OF_LIST() |
596 | } | |
597 | }; | |
598 | ||
599 | static void drc_physical_reset(void *opaque) | |
600 | { | |
ce2918cb DG |
601 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(opaque); |
602 | SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(drc); | |
67fea71b DG |
603 | |
604 | if (drc->dev) { | |
605 | drcp->dr_indicator = SPAPR_DR_INDICATOR_ACTIVE; | |
606 | } else { | |
607 | drcp->dr_indicator = SPAPR_DR_INDICATOR_INACTIVE; | |
608 | } | |
609 | } | |
610 | ||
611 | static void realize_physical(DeviceState *d, Error **errp) | |
612 | { | |
ce2918cb | 613 | SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(d); |
67fea71b DG |
614 | Error *local_err = NULL; |
615 | ||
616 | realize(d, &local_err); | |
617 | if (local_err) { | |
618 | error_propagate(errp, local_err); | |
619 | return; | |
620 | } | |
621 | ||
3cad405b MAL |
622 | vmstate_register(VMSTATE_IF(drcp), |
623 | spapr_drc_index(SPAPR_DR_CONNECTOR(drcp)), | |
67fea71b DG |
624 | &vmstate_spapr_drc_physical, drcp); |
625 | qemu_register_reset(drc_physical_reset, drcp); | |
626 | } | |
627 | ||
379ae096 GK |
628 | static void unrealize_physical(DeviceState *d, Error **errp) |
629 | { | |
ce2918cb | 630 | SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(d); |
379ae096 GK |
631 | Error *local_err = NULL; |
632 | ||
633 | unrealize(d, &local_err); | |
634 | if (local_err) { | |
635 | error_propagate(errp, local_err); | |
636 | return; | |
637 | } | |
638 | ||
3cad405b | 639 | vmstate_unregister(VMSTATE_IF(drcp), &vmstate_spapr_drc_physical, drcp); |
379ae096 GK |
640 | qemu_unregister_reset(drc_physical_reset, drcp); |
641 | } | |
642 | ||
f224d35b DG |
643 | static void spapr_drc_physical_class_init(ObjectClass *k, void *data) |
644 | { | |
67fea71b | 645 | DeviceClass *dk = DEVICE_CLASS(k); |
ce2918cb | 646 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k); |
f224d35b | 647 | |
67fea71b | 648 | dk->realize = realize_physical; |
379ae096 | 649 | dk->unrealize = unrealize_physical; |
f224d35b | 650 | drck->dr_entity_sense = physical_entity_sense; |
0dfabd39 DG |
651 | drck->isolate = drc_isolate_physical; |
652 | drck->unisolate = drc_unisolate_physical; | |
9d4c0f4f DG |
653 | drck->ready_state = SPAPR_DRC_STATE_PHYSICAL_CONFIGURED; |
654 | drck->empty_state = SPAPR_DRC_STATE_PHYSICAL_POWERON; | |
f224d35b DG |
655 | } |
656 | ||
657 | static void spapr_drc_logical_class_init(ObjectClass *k, void *data) | |
658 | { | |
ce2918cb | 659 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k); |
f224d35b DG |
660 | |
661 | drck->dr_entity_sense = logical_entity_sense; | |
0dfabd39 DG |
662 | drck->isolate = drc_isolate_logical; |
663 | drck->unisolate = drc_unisolate_logical; | |
9d4c0f4f DG |
664 | drck->ready_state = SPAPR_DRC_STATE_LOGICAL_CONFIGURED; |
665 | drck->empty_state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE; | |
f224d35b DG |
666 | } |
667 | ||
2d335818 DG |
668 | static void spapr_drc_cpu_class_init(ObjectClass *k, void *data) |
669 | { | |
ce2918cb | 670 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k); |
2d335818 DG |
671 | |
672 | drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_CPU; | |
1693ea16 | 673 | drck->typename = "CPU"; |
79808336 | 674 | drck->drc_name_prefix = "CPU "; |
6b762f29 | 675 | drck->release = spapr_core_release; |
345b12b9 | 676 | drck->dt_populate = spapr_core_dt_populate; |
2d335818 DG |
677 | } |
678 | ||
679 | static void spapr_drc_pci_class_init(ObjectClass *k, void *data) | |
680 | { | |
ce2918cb | 681 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k); |
2d335818 DG |
682 | |
683 | drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PCI; | |
1693ea16 | 684 | drck->typename = "28"; |
79808336 | 685 | drck->drc_name_prefix = "C"; |
6b762f29 | 686 | drck->release = spapr_phb_remove_pci_device_cb; |
46fd0299 | 687 | drck->dt_populate = spapr_pci_dt_populate; |
2d335818 DG |
688 | } |
689 | ||
690 | static void spapr_drc_lmb_class_init(ObjectClass *k, void *data) | |
691 | { | |
ce2918cb | 692 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k); |
2d335818 DG |
693 | |
694 | drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_LMB; | |
1693ea16 | 695 | drck->typename = "MEM"; |
79808336 | 696 | drck->drc_name_prefix = "LMB "; |
6b762f29 | 697 | drck->release = spapr_lmb_release; |
62d38c9b | 698 | drck->dt_populate = spapr_lmb_dt_populate; |
2d335818 DG |
699 | } |
700 | ||
962b6c36 MR |
701 | static void spapr_drc_phb_class_init(ObjectClass *k, void *data) |
702 | { | |
ce2918cb | 703 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k); |
962b6c36 MR |
704 | |
705 | drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PHB; | |
706 | drck->typename = "PHB"; | |
707 | drck->drc_name_prefix = "PHB "; | |
bb2bdd81 GK |
708 | drck->release = spapr_phb_release; |
709 | drck->dt_populate = spapr_phb_dt_populate; | |
962b6c36 MR |
710 | } |
711 | ||
bbf5c878 MR |
712 | static const TypeInfo spapr_dr_connector_info = { |
713 | .name = TYPE_SPAPR_DR_CONNECTOR, | |
714 | .parent = TYPE_DEVICE, | |
ce2918cb | 715 | .instance_size = sizeof(SpaprDrc), |
bbf5c878 | 716 | .instance_init = spapr_dr_connector_instance_init, |
ce2918cb | 717 | .class_size = sizeof(SpaprDrcClass), |
bbf5c878 | 718 | .class_init = spapr_dr_connector_class_init, |
2d335818 DG |
719 | .abstract = true, |
720 | }; | |
721 | ||
722 | static const TypeInfo spapr_drc_physical_info = { | |
723 | .name = TYPE_SPAPR_DRC_PHYSICAL, | |
724 | .parent = TYPE_SPAPR_DR_CONNECTOR, | |
ce2918cb | 725 | .instance_size = sizeof(SpaprDrcPhysical), |
f224d35b | 726 | .class_init = spapr_drc_physical_class_init, |
2d335818 DG |
727 | .abstract = true, |
728 | }; | |
729 | ||
730 | static const TypeInfo spapr_drc_logical_info = { | |
731 | .name = TYPE_SPAPR_DRC_LOGICAL, | |
732 | .parent = TYPE_SPAPR_DR_CONNECTOR, | |
f224d35b | 733 | .class_init = spapr_drc_logical_class_init, |
2d335818 DG |
734 | .abstract = true, |
735 | }; | |
736 | ||
737 | static const TypeInfo spapr_drc_cpu_info = { | |
738 | .name = TYPE_SPAPR_DRC_CPU, | |
739 | .parent = TYPE_SPAPR_DRC_LOGICAL, | |
2d335818 DG |
740 | .class_init = spapr_drc_cpu_class_init, |
741 | }; | |
742 | ||
743 | static const TypeInfo spapr_drc_pci_info = { | |
744 | .name = TYPE_SPAPR_DRC_PCI, | |
745 | .parent = TYPE_SPAPR_DRC_PHYSICAL, | |
2d335818 DG |
746 | .class_init = spapr_drc_pci_class_init, |
747 | }; | |
748 | ||
749 | static const TypeInfo spapr_drc_lmb_info = { | |
750 | .name = TYPE_SPAPR_DRC_LMB, | |
751 | .parent = TYPE_SPAPR_DRC_LOGICAL, | |
2d335818 | 752 | .class_init = spapr_drc_lmb_class_init, |
bbf5c878 MR |
753 | }; |
754 | ||
962b6c36 MR |
755 | static const TypeInfo spapr_drc_phb_info = { |
756 | .name = TYPE_SPAPR_DRC_PHB, | |
757 | .parent = TYPE_SPAPR_DRC_LOGICAL, | |
ce2918cb | 758 | .instance_size = sizeof(SpaprDrc), |
962b6c36 MR |
759 | .class_init = spapr_drc_phb_class_init, |
760 | }; | |
761 | ||
bbf5c878 MR |
762 | /* helper functions for external users */ |
763 | ||
ce2918cb | 764 | SpaprDrc *spapr_drc_by_index(uint32_t index) |
bbf5c878 MR |
765 | { |
766 | Object *obj; | |
f5babeac | 767 | gchar *name; |
bbf5c878 | 768 | |
f5babeac | 769 | name = g_strdup_printf("%s/%x", DRC_CONTAINER_PATH, index); |
bbf5c878 | 770 | obj = object_resolve_path(name, NULL); |
f5babeac | 771 | g_free(name); |
bbf5c878 MR |
772 | |
773 | return !obj ? NULL : SPAPR_DR_CONNECTOR(obj); | |
774 | } | |
775 | ||
ce2918cb | 776 | SpaprDrc *spapr_drc_by_id(const char *type, uint32_t id) |
bbf5c878 | 777 | { |
ce2918cb | 778 | SpaprDrcClass *drck |
fbf55397 DG |
779 | = SPAPR_DR_CONNECTOR_CLASS(object_class_by_name(type)); |
780 | ||
781 | return spapr_drc_by_index(drck->typeshift << DRC_INDEX_TYPE_SHIFT | |
782 | | (id & DRC_INDEX_ID_MASK)); | |
bbf5c878 | 783 | } |
e4b798bb | 784 | |
e4b798bb | 785 | /** |
9e7d38e8 | 786 | * spapr_dt_drc |
e4b798bb MR |
787 | * |
788 | * @fdt: libfdt device tree | |
789 | * @path: path in the DT to generate properties | |
790 | * @owner: parent Object/DeviceState for which to generate DRC | |
791 | * descriptions for | |
ce2918cb | 792 | * @drc_type_mask: mask of SpaprDrcType values corresponding |
e4b798bb MR |
793 | * to the types of DRCs to generate entries for |
794 | * | |
795 | * generate OF properties to describe DRC topology/indices to guests | |
796 | * | |
797 | * as documented in PAPR+ v2.1, 13.5.2 | |
798 | */ | |
9e7d38e8 | 799 | int spapr_dt_drc(void *fdt, int offset, Object *owner, uint32_t drc_type_mask) |
e4b798bb MR |
800 | { |
801 | Object *root_container; | |
802 | ObjectProperty *prop; | |
7746abd8 | 803 | ObjectPropertyIterator iter; |
e4b798bb MR |
804 | uint32_t drc_count = 0; |
805 | GArray *drc_indexes, *drc_power_domains; | |
806 | GString *drc_names, *drc_types; | |
807 | int ret; | |
808 | ||
809 | /* the first entry of each properties is a 32-bit integer encoding | |
810 | * the number of elements in the array. we won't know this until | |
811 | * we complete the iteration through all the matching DRCs, but | |
812 | * reserve the space now and set the offsets accordingly so we | |
813 | * can fill them in later. | |
814 | */ | |
815 | drc_indexes = g_array_new(false, true, sizeof(uint32_t)); | |
816 | drc_indexes = g_array_set_size(drc_indexes, 1); | |
817 | drc_power_domains = g_array_new(false, true, sizeof(uint32_t)); | |
818 | drc_power_domains = g_array_set_size(drc_power_domains, 1); | |
819 | drc_names = g_string_set_size(g_string_new(NULL), sizeof(uint32_t)); | |
820 | drc_types = g_string_set_size(g_string_new(NULL), sizeof(uint32_t)); | |
821 | ||
822 | /* aliases for all DRConnector objects will be rooted in QOM | |
823 | * composition tree at DRC_CONTAINER_PATH | |
824 | */ | |
825 | root_container = container_get(object_get_root(), DRC_CONTAINER_PATH); | |
826 | ||
7746abd8 DB |
827 | object_property_iter_init(&iter, root_container); |
828 | while ((prop = object_property_iter_next(&iter))) { | |
e4b798bb | 829 | Object *obj; |
ce2918cb DG |
830 | SpaprDrc *drc; |
831 | SpaprDrcClass *drck; | |
dbd26f2f | 832 | char *drc_name = NULL; |
e4b798bb MR |
833 | uint32_t drc_index, drc_power_domain; |
834 | ||
835 | if (!strstart(prop->type, "link<", NULL)) { | |
836 | continue; | |
837 | } | |
838 | ||
839 | obj = object_property_get_link(root_container, prop->name, NULL); | |
840 | drc = SPAPR_DR_CONNECTOR(obj); | |
841 | drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); | |
842 | ||
843 | if (owner && (drc->owner != owner)) { | |
844 | continue; | |
845 | } | |
846 | ||
2d335818 | 847 | if ((spapr_drc_type(drc) & drc_type_mask) == 0) { |
e4b798bb MR |
848 | continue; |
849 | } | |
850 | ||
851 | drc_count++; | |
852 | ||
853 | /* ibm,drc-indexes */ | |
0b55aa91 | 854 | drc_index = cpu_to_be32(spapr_drc_index(drc)); |
e4b798bb MR |
855 | g_array_append_val(drc_indexes, drc_index); |
856 | ||
857 | /* ibm,drc-power-domains */ | |
858 | drc_power_domain = cpu_to_be32(-1); | |
859 | g_array_append_val(drc_power_domains, drc_power_domain); | |
860 | ||
861 | /* ibm,drc-names */ | |
dbd26f2f SB |
862 | drc_name = spapr_drc_name(drc); |
863 | drc_names = g_string_append(drc_names, drc_name); | |
e4b798bb | 864 | drc_names = g_string_insert_len(drc_names, -1, "\0", 1); |
dbd26f2f | 865 | g_free(drc_name); |
e4b798bb MR |
866 | |
867 | /* ibm,drc-types */ | |
1693ea16 | 868 | drc_types = g_string_append(drc_types, drck->typename); |
e4b798bb MR |
869 | drc_types = g_string_insert_len(drc_types, -1, "\0", 1); |
870 | } | |
871 | ||
872 | /* now write the drc count into the space we reserved at the | |
873 | * beginning of the arrays previously | |
874 | */ | |
875 | *(uint32_t *)drc_indexes->data = cpu_to_be32(drc_count); | |
876 | *(uint32_t *)drc_power_domains->data = cpu_to_be32(drc_count); | |
877 | *(uint32_t *)drc_names->str = cpu_to_be32(drc_count); | |
878 | *(uint32_t *)drc_types->str = cpu_to_be32(drc_count); | |
879 | ||
9e7d38e8 | 880 | ret = fdt_setprop(fdt, offset, "ibm,drc-indexes", |
e4b798bb MR |
881 | drc_indexes->data, |
882 | drc_indexes->len * sizeof(uint32_t)); | |
883 | if (ret) { | |
ce9863b7 | 884 | error_report("Couldn't create ibm,drc-indexes property"); |
e4b798bb MR |
885 | goto out; |
886 | } | |
887 | ||
9e7d38e8 | 888 | ret = fdt_setprop(fdt, offset, "ibm,drc-power-domains", |
e4b798bb MR |
889 | drc_power_domains->data, |
890 | drc_power_domains->len * sizeof(uint32_t)); | |
891 | if (ret) { | |
ce9863b7 | 892 | error_report("Couldn't finalize ibm,drc-power-domains property"); |
e4b798bb MR |
893 | goto out; |
894 | } | |
895 | ||
9e7d38e8 | 896 | ret = fdt_setprop(fdt, offset, "ibm,drc-names", |
e4b798bb MR |
897 | drc_names->str, drc_names->len); |
898 | if (ret) { | |
ce9863b7 | 899 | error_report("Couldn't finalize ibm,drc-names property"); |
e4b798bb MR |
900 | goto out; |
901 | } | |
902 | ||
9e7d38e8 | 903 | ret = fdt_setprop(fdt, offset, "ibm,drc-types", |
e4b798bb MR |
904 | drc_types->str, drc_types->len); |
905 | if (ret) { | |
ce9863b7 | 906 | error_report("Couldn't finalize ibm,drc-types property"); |
e4b798bb MR |
907 | goto out; |
908 | } | |
909 | ||
910 | out: | |
911 | g_array_free(drc_indexes, true); | |
912 | g_array_free(drc_power_domains, true); | |
913 | g_string_free(drc_names, true); | |
914 | g_string_free(drc_types, true); | |
915 | ||
916 | return ret; | |
917 | } | |
b89b3d39 DG |
918 | |
919 | /* | |
920 | * RTAS calls | |
921 | */ | |
922 | ||
7b7258f8 | 923 | static uint32_t rtas_set_isolation_state(uint32_t idx, uint32_t state) |
b89b3d39 | 924 | { |
ce2918cb DG |
925 | SpaprDrc *drc = spapr_drc_by_index(idx); |
926 | SpaprDrcClass *drck; | |
7b7258f8 DG |
927 | |
928 | if (!drc) { | |
0dfabd39 | 929 | return RTAS_OUT_NO_SUCH_INDICATOR; |
b89b3d39 DG |
930 | } |
931 | ||
0dfabd39 DG |
932 | trace_spapr_drc_set_isolation_state(spapr_drc_index(drc), state); |
933 | ||
7b7258f8 | 934 | drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
0dfabd39 DG |
935 | |
936 | switch (state) { | |
937 | case SPAPR_DR_ISOLATION_STATE_ISOLATED: | |
938 | return drck->isolate(drc); | |
939 | ||
940 | case SPAPR_DR_ISOLATION_STATE_UNISOLATED: | |
941 | return drck->unisolate(drc); | |
942 | ||
943 | default: | |
944 | return RTAS_OUT_PARAM_ERROR; | |
945 | } | |
b89b3d39 DG |
946 | } |
947 | ||
7b7258f8 | 948 | static uint32_t rtas_set_allocation_state(uint32_t idx, uint32_t state) |
b89b3d39 | 949 | { |
ce2918cb | 950 | SpaprDrc *drc = spapr_drc_by_index(idx); |
b89b3d39 | 951 | |
61736732 DG |
952 | if (!drc || !object_dynamic_cast(OBJECT(drc), TYPE_SPAPR_DRC_LOGICAL)) { |
953 | return RTAS_OUT_NO_SUCH_INDICATOR; | |
b89b3d39 DG |
954 | } |
955 | ||
61736732 DG |
956 | trace_spapr_drc_set_allocation_state(spapr_drc_index(drc), state); |
957 | ||
958 | switch (state) { | |
959 | case SPAPR_DR_ALLOCATION_STATE_USABLE: | |
960 | return drc_set_usable(drc); | |
961 | ||
962 | case SPAPR_DR_ALLOCATION_STATE_UNUSABLE: | |
963 | return drc_set_unusable(drc); | |
964 | ||
965 | default: | |
966 | return RTAS_OUT_PARAM_ERROR; | |
967 | } | |
7b7258f8 | 968 | } |
b89b3d39 | 969 | |
cd74d27e | 970 | static uint32_t rtas_set_dr_indicator(uint32_t idx, uint32_t state) |
7b7258f8 | 971 | { |
ce2918cb | 972 | SpaprDrc *drc = spapr_drc_by_index(idx); |
b89b3d39 | 973 | |
67fea71b DG |
974 | if (!drc || !object_dynamic_cast(OBJECT(drc), TYPE_SPAPR_DRC_PHYSICAL)) { |
975 | return RTAS_OUT_NO_SUCH_INDICATOR; | |
976 | } | |
977 | if ((state != SPAPR_DR_INDICATOR_INACTIVE) | |
978 | && (state != SPAPR_DR_INDICATOR_ACTIVE) | |
979 | && (state != SPAPR_DR_INDICATOR_IDENTIFY) | |
980 | && (state != SPAPR_DR_INDICATOR_ACTION)) { | |
981 | return RTAS_OUT_PARAM_ERROR; /* bad state parameter */ | |
7b7258f8 DG |
982 | } |
983 | ||
cd74d27e | 984 | trace_spapr_drc_set_dr_indicator(idx, state); |
67fea71b | 985 | SPAPR_DRC_PHYSICAL(drc)->dr_indicator = state; |
cd74d27e | 986 | return RTAS_OUT_SUCCESS; |
7b7258f8 DG |
987 | } |
988 | ||
ce2918cb | 989 | static void rtas_set_indicator(PowerPCCPU *cpu, SpaprMachineState *spapr, |
7b7258f8 DG |
990 | uint32_t token, |
991 | uint32_t nargs, target_ulong args, | |
992 | uint32_t nret, target_ulong rets) | |
993 | { | |
994 | uint32_t type, idx, state; | |
995 | uint32_t ret = RTAS_OUT_SUCCESS; | |
996 | ||
997 | if (nargs != 3 || nret != 1) { | |
b89b3d39 DG |
998 | ret = RTAS_OUT_PARAM_ERROR; |
999 | goto out; | |
1000 | } | |
b89b3d39 | 1001 | |
7b7258f8 DG |
1002 | type = rtas_ld(args, 0); |
1003 | idx = rtas_ld(args, 1); | |
1004 | state = rtas_ld(args, 2); | |
1005 | ||
1006 | switch (type) { | |
b89b3d39 | 1007 | case RTAS_SENSOR_TYPE_ISOLATION_STATE: |
7b7258f8 | 1008 | ret = rtas_set_isolation_state(idx, state); |
b89b3d39 DG |
1009 | break; |
1010 | case RTAS_SENSOR_TYPE_DR: | |
cd74d27e | 1011 | ret = rtas_set_dr_indicator(idx, state); |
b89b3d39 DG |
1012 | break; |
1013 | case RTAS_SENSOR_TYPE_ALLOCATION_STATE: | |
7b7258f8 | 1014 | ret = rtas_set_allocation_state(idx, state); |
b89b3d39 DG |
1015 | break; |
1016 | default: | |
7b7258f8 | 1017 | ret = RTAS_OUT_NOT_SUPPORTED; |
b89b3d39 DG |
1018 | } |
1019 | ||
1020 | out: | |
1021 | rtas_st(rets, 0, ret); | |
b89b3d39 DG |
1022 | } |
1023 | ||
ce2918cb | 1024 | static void rtas_get_sensor_state(PowerPCCPU *cpu, SpaprMachineState *spapr, |
b89b3d39 DG |
1025 | uint32_t token, uint32_t nargs, |
1026 | target_ulong args, uint32_t nret, | |
1027 | target_ulong rets) | |
1028 | { | |
1029 | uint32_t sensor_type; | |
1030 | uint32_t sensor_index; | |
1031 | uint32_t sensor_state = 0; | |
ce2918cb DG |
1032 | SpaprDrc *drc; |
1033 | SpaprDrcClass *drck; | |
b89b3d39 DG |
1034 | uint32_t ret = RTAS_OUT_SUCCESS; |
1035 | ||
1036 | if (nargs != 2 || nret != 2) { | |
1037 | ret = RTAS_OUT_PARAM_ERROR; | |
1038 | goto out; | |
1039 | } | |
1040 | ||
1041 | sensor_type = rtas_ld(args, 0); | |
1042 | sensor_index = rtas_ld(args, 1); | |
1043 | ||
1044 | if (sensor_type != RTAS_SENSOR_TYPE_ENTITY_SENSE) { | |
1045 | /* currently only DR-related sensors are implemented */ | |
1046 | trace_spapr_rtas_get_sensor_state_not_supported(sensor_index, | |
1047 | sensor_type); | |
1048 | ret = RTAS_OUT_NOT_SUPPORTED; | |
1049 | goto out; | |
1050 | } | |
1051 | ||
fbf55397 | 1052 | drc = spapr_drc_by_index(sensor_index); |
b89b3d39 DG |
1053 | if (!drc) { |
1054 | trace_spapr_rtas_get_sensor_state_invalid(sensor_index); | |
1055 | ret = RTAS_OUT_PARAM_ERROR; | |
1056 | goto out; | |
1057 | } | |
1058 | drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); | |
f224d35b | 1059 | sensor_state = drck->dr_entity_sense(drc); |
b89b3d39 DG |
1060 | |
1061 | out: | |
1062 | rtas_st(rets, 0, ret); | |
1063 | rtas_st(rets, 1, sensor_state); | |
1064 | } | |
1065 | ||
1066 | /* configure-connector work area offsets, int32_t units for field | |
1067 | * indexes, bytes for field offset/len values. | |
1068 | * | |
1069 | * as documented by PAPR+ v2.7, 13.5.3.5 | |
1070 | */ | |
1071 | #define CC_IDX_NODE_NAME_OFFSET 2 | |
1072 | #define CC_IDX_PROP_NAME_OFFSET 2 | |
1073 | #define CC_IDX_PROP_LEN 3 | |
1074 | #define CC_IDX_PROP_DATA_OFFSET 4 | |
1075 | #define CC_VAL_DATA_OFFSET ((CC_IDX_PROP_DATA_OFFSET + 1) * 4) | |
1076 | #define CC_WA_LEN 4096 | |
1077 | ||
1078 | static void configure_connector_st(target_ulong addr, target_ulong offset, | |
1079 | const void *buf, size_t len) | |
1080 | { | |
1081 | cpu_physical_memory_write(ppc64_phys_to_real(addr + offset), | |
1082 | buf, MIN(len, CC_WA_LEN - offset)); | |
1083 | } | |
1084 | ||
b89b3d39 | 1085 | static void rtas_ibm_configure_connector(PowerPCCPU *cpu, |
ce2918cb | 1086 | SpaprMachineState *spapr, |
b89b3d39 DG |
1087 | uint32_t token, uint32_t nargs, |
1088 | target_ulong args, uint32_t nret, | |
1089 | target_ulong rets) | |
1090 | { | |
1091 | uint64_t wa_addr; | |
1092 | uint64_t wa_offset; | |
1093 | uint32_t drc_index; | |
ce2918cb DG |
1094 | SpaprDrc *drc; |
1095 | SpaprDrcClass *drck; | |
1096 | SpaprDRCCResponse resp = SPAPR_DR_CC_RESPONSE_CONTINUE; | |
b89b3d39 | 1097 | int rc; |
b89b3d39 DG |
1098 | |
1099 | if (nargs != 2 || nret != 1) { | |
1100 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
1101 | return; | |
1102 | } | |
1103 | ||
1104 | wa_addr = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 0); | |
1105 | ||
1106 | drc_index = rtas_ld(wa_addr, 0); | |
fbf55397 | 1107 | drc = spapr_drc_by_index(drc_index); |
b89b3d39 DG |
1108 | if (!drc) { |
1109 | trace_spapr_rtas_ibm_configure_connector_invalid(drc_index); | |
1110 | rc = RTAS_OUT_PARAM_ERROR; | |
1111 | goto out; | |
1112 | } | |
1113 | ||
9d4c0f4f | 1114 | if ((drc->state != SPAPR_DRC_STATE_LOGICAL_UNISOLATE) |
188bfe1b BR |
1115 | && (drc->state != SPAPR_DRC_STATE_PHYSICAL_UNISOLATE) |
1116 | && (drc->state != SPAPR_DRC_STATE_LOGICAL_CONFIGURED) | |
1117 | && (drc->state != SPAPR_DRC_STATE_PHYSICAL_CONFIGURED)) { | |
1118 | /* | |
1119 | * Need to unisolate the device before configuring | |
1120 | * or it should already be in configured state to | |
1121 | * allow configure-connector be called repeatedly. | |
1122 | */ | |
b89b3d39 DG |
1123 | rc = SPAPR_DR_CC_RESPONSE_NOT_CONFIGURABLE; |
1124 | goto out; | |
1125 | } | |
1126 | ||
9d4c0f4f DG |
1127 | drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
1128 | ||
d9c95c71 GK |
1129 | if (!drc->fdt) { |
1130 | Error *local_err = NULL; | |
1131 | void *fdt; | |
1132 | int fdt_size; | |
1133 | ||
1134 | fdt = create_device_tree(&fdt_size); | |
1135 | ||
1136 | if (drck->dt_populate(drc, spapr, fdt, &drc->fdt_start_offset, | |
1137 | &local_err)) { | |
1138 | g_free(fdt); | |
1139 | error_free(local_err); | |
1140 | rc = SPAPR_DR_CC_RESPONSE_ERROR; | |
1141 | goto out; | |
1142 | } | |
1143 | ||
1144 | drc->fdt = fdt; | |
1145 | drc->ccs_offset = drc->fdt_start_offset; | |
1146 | drc->ccs_depth = 0; | |
1147 | } | |
1148 | ||
b89b3d39 DG |
1149 | do { |
1150 | uint32_t tag; | |
1151 | const char *name; | |
1152 | const struct fdt_property *prop; | |
1153 | int fdt_offset_next, prop_len; | |
1154 | ||
4445b1d2 | 1155 | tag = fdt_next_tag(drc->fdt, drc->ccs_offset, &fdt_offset_next); |
b89b3d39 DG |
1156 | |
1157 | switch (tag) { | |
1158 | case FDT_BEGIN_NODE: | |
4445b1d2 DG |
1159 | drc->ccs_depth++; |
1160 | name = fdt_get_name(drc->fdt, drc->ccs_offset, NULL); | |
b89b3d39 DG |
1161 | |
1162 | /* provide the name of the next OF node */ | |
1163 | wa_offset = CC_VAL_DATA_OFFSET; | |
1164 | rtas_st(wa_addr, CC_IDX_NODE_NAME_OFFSET, wa_offset); | |
1165 | configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1); | |
1166 | resp = SPAPR_DR_CC_RESPONSE_NEXT_CHILD; | |
1167 | break; | |
1168 | case FDT_END_NODE: | |
4445b1d2 DG |
1169 | drc->ccs_depth--; |
1170 | if (drc->ccs_depth == 0) { | |
0b55aa91 | 1171 | uint32_t drc_index = spapr_drc_index(drc); |
9d4c0f4f DG |
1172 | |
1173 | /* done sending the device tree, move to configured state */ | |
0b55aa91 | 1174 | trace_spapr_drc_set_configured(drc_index); |
9d4c0f4f | 1175 | drc->state = drck->ready_state; |
188bfe1b BR |
1176 | /* |
1177 | * Ensure that we are able to send the FDT fragment | |
1178 | * again via configure-connector call if the guest requests. | |
1179 | */ | |
1180 | drc->ccs_offset = drc->fdt_start_offset; | |
1181 | drc->ccs_depth = 0; | |
1182 | fdt_offset_next = drc->fdt_start_offset; | |
b89b3d39 DG |
1183 | resp = SPAPR_DR_CC_RESPONSE_SUCCESS; |
1184 | } else { | |
1185 | resp = SPAPR_DR_CC_RESPONSE_PREV_PARENT; | |
1186 | } | |
1187 | break; | |
1188 | case FDT_PROP: | |
4445b1d2 | 1189 | prop = fdt_get_property_by_offset(drc->fdt, drc->ccs_offset, |
b89b3d39 | 1190 | &prop_len); |
88af6ea5 | 1191 | name = fdt_string(drc->fdt, fdt32_to_cpu(prop->nameoff)); |
b89b3d39 DG |
1192 | |
1193 | /* provide the name of the next OF property */ | |
1194 | wa_offset = CC_VAL_DATA_OFFSET; | |
1195 | rtas_st(wa_addr, CC_IDX_PROP_NAME_OFFSET, wa_offset); | |
1196 | configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1); | |
1197 | ||
1198 | /* provide the length and value of the OF property. data gets | |
1199 | * placed immediately after NULL terminator of the OF property's | |
1200 | * name string | |
1201 | */ | |
1202 | wa_offset += strlen(name) + 1, | |
1203 | rtas_st(wa_addr, CC_IDX_PROP_LEN, prop_len); | |
1204 | rtas_st(wa_addr, CC_IDX_PROP_DATA_OFFSET, wa_offset); | |
1205 | configure_connector_st(wa_addr, wa_offset, prop->data, prop_len); | |
1206 | resp = SPAPR_DR_CC_RESPONSE_NEXT_PROPERTY; | |
1207 | break; | |
1208 | case FDT_END: | |
1209 | resp = SPAPR_DR_CC_RESPONSE_ERROR; | |
1210 | default: | |
1211 | /* keep seeking for an actionable tag */ | |
1212 | break; | |
1213 | } | |
4445b1d2 DG |
1214 | if (drc->ccs_offset >= 0) { |
1215 | drc->ccs_offset = fdt_offset_next; | |
b89b3d39 DG |
1216 | } |
1217 | } while (resp == SPAPR_DR_CC_RESPONSE_CONTINUE); | |
1218 | ||
1219 | rc = resp; | |
1220 | out: | |
1221 | rtas_st(rets, 0, rc); | |
1222 | } | |
1223 | ||
1224 | static void spapr_drc_register_types(void) | |
1225 | { | |
1226 | type_register_static(&spapr_dr_connector_info); | |
2d335818 DG |
1227 | type_register_static(&spapr_drc_physical_info); |
1228 | type_register_static(&spapr_drc_logical_info); | |
1229 | type_register_static(&spapr_drc_cpu_info); | |
1230 | type_register_static(&spapr_drc_pci_info); | |
1231 | type_register_static(&spapr_drc_lmb_info); | |
962b6c36 | 1232 | type_register_static(&spapr_drc_phb_info); |
b89b3d39 DG |
1233 | |
1234 | spapr_rtas_register(RTAS_SET_INDICATOR, "set-indicator", | |
1235 | rtas_set_indicator); | |
1236 | spapr_rtas_register(RTAS_GET_SENSOR_STATE, "get-sensor-state", | |
1237 | rtas_get_sensor_state); | |
1238 | spapr_rtas_register(RTAS_IBM_CONFIGURE_CONNECTOR, "ibm,configure-connector", | |
1239 | rtas_ibm_configure_connector); | |
1240 | } | |
1241 | type_init(spapr_drc_register_types) |