[thirdparty/qemu.git] / hw / usb / hcd-ehci-pci.c

/*
 * QEMU USB EHCI Emulation
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or(at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see <http://www.gnu.org/licenses/>.
 */

#include "hw/usb/hcd-ehci.h"
#include "hw/pci/pci.h"
#include "qemu/range.h"

typedef struct EHCIPCIState {
    PCIDevice pcidev;
    EHCIState ehci;
} EHCIPCIState;

typedef struct EHCIPCIInfo {
    const char *name;
    uint16_t vendor_id;
    uint16_t device_id;
    uint8_t  revision;
} EHCIPCIInfo;

static int usb_ehci_pci_initfn(PCIDevice *dev)
{
    EHCIPCIState *i = DO_UPCAST(EHCIPCIState, pcidev, dev);
    EHCIState *s = &i->ehci;
    uint8_t *pci_conf = dev->config;

    pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20);

    /* capabilities pointer */
    pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00);
    /* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */

    pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */
    pci_set_byte(&pci_conf[PCI_MIN_GNT], 0);
    pci_set_byte(&pci_conf[PCI_MAX_LAT], 0);

    /* pci_conf[0x50] = 0x01; *//* power management caps */

    pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */
    pci_set_byte(&pci_conf[0x61], 0x20);  /* frame length adjustment (2.1.5) */
    pci_set_word(&pci_conf[0x62], 0x00);  /* port wake up capability (2.1.6) */

    pci_conf[0x64] = 0x00;
    pci_conf[0x65] = 0x00;
    pci_conf[0x66] = 0x00;
    pci_conf[0x67] = 0x00;
    pci_conf[0x68] = 0x01;
    pci_conf[0x69] = 0x00;
    pci_conf[0x6a] = 0x00;
    pci_conf[0x6b] = 0x00;  /* USBLEGSUP */
    pci_conf[0x6c] = 0x00;
    pci_conf[0x6d] = 0x00;
    pci_conf[0x6e] = 0x00;
    pci_conf[0x6f] = 0xc0;  /* USBLEFCTLSTS */

    s->caps[0x09] = 0x68;        /* EECP */

    s->irq = dev->irq[3];
    s->dma = pci_dma_context(dev);

    s->capsbase = 0x00;
    s->opregbase = 0x20;

    usb_ehci_initfn(s, DEVICE(dev));
    pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);

    return 0;
}

static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr,
                                      uint32_t val, int l)
{
    EHCIPCIState *i = DO_UPCAST(EHCIPCIState, pcidev, dev);
    bool busmaster;

    pci_default_write_config(dev, addr, val, l);

    if (!range_covers_byte(addr, l, PCI_COMMAND)) {
        return;
    }
    busmaster = pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_MASTER;
    i->ehci.dma = busmaster ? pci_dma_context(dev) : NULL;
}

static Property ehci_pci_properties[] = {
    DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128),
    DEFINE_PROP_END_OF_LIST(),
};

static const VMStateDescription vmstate_ehci_pci = {
    .name        = "ehci",
    .version_id  = 2,
    .minimum_version_id  = 1,
    .fields      = (VMStateField[]) {
        VMSTATE_PCI_DEVICE(pcidev, EHCIPCIState),
        VMSTATE_STRUCT(ehci, EHCIPCIState, 2, vmstate_ehci, EHCIState),
        VMSTATE_END_OF_LIST()
    }
};

static void ehci_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);
    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
    EHCIPCIInfo *i = data;

    k->init = usb_ehci_pci_initfn;
    k->vendor_id = i->vendor_id;
    k->device_id = i->device_id;
    k->revision = i->revision;
    k->class_id = PCI_CLASS_SERIAL_USB;
    k->config_write = usb_ehci_pci_write_config;
    k->no_hotplug = 1;
    dc->vmsd = &vmstate_ehci_pci;
    dc->props = ehci_pci_properties;
}

static struct EHCIPCIInfo ehci_pci_info[] = {
    {
        .name      = "usb-ehci",
        .vendor_id = PCI_VENDOR_ID_INTEL,
        .device_id = PCI_DEVICE_ID_INTEL_82801D, /* ich4 */
        .revision  = 0x10,
    },{
        .name      = "ich9-usb-ehci1", /* 00:1d.7 */
        .vendor_id = PCI_VENDOR_ID_INTEL,
        .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1,
        .revision  = 0x03,
    },{
        .name      = "ich9-usb-ehci2", /* 00:1a.7 */
        .vendor_id = PCI_VENDOR_ID_INTEL,
        .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI2,
        .revision  = 0x03,
    }
};

static void ehci_pci_register_types(void)
{
    TypeInfo ehci_type_info = {
        .parent        = TYPE_PCI_DEVICE,
        .instance_size = sizeof(EHCIPCIState),
        .class_init    = ehci_class_init,
    };
    int i;

    for (i = 0; i < ARRAY_SIZE(ehci_pci_info); i++) {
        ehci_type_info.name = ehci_pci_info[i].name;
        ehci_type_info.class_data = ehci_pci_info + i;
        type_register(&ehci_type_info);
    }
}

type_init(ehci_pci_register_types)

struct ehci_companions {
    const char *name;
    int func;
    int port;
};

static const struct ehci_companions ich9_1d[] = {
    { .name = "ich9-usb-uhci1", .func = 0, .port = 0 },
    { .name = "ich9-usb-uhci2", .func = 1, .port = 2 },
    { .name = "ich9-usb-uhci3", .func = 2, .port = 4 },
};

static const struct ehci_companions ich9_1a[] = {
    { .name = "ich9-usb-uhci4", .func = 0, .port = 0 },
    { .name = "ich9-usb-uhci5", .func = 1, .port = 2 },
    { .name = "ich9-usb-uhci6", .func = 2, .port = 4 },
};

int ehci_create_ich9_with_companions(PCIBus *bus, int slot)
{
    const struct ehci_companions *comp;
    PCIDevice *ehci, *uhci;
    BusState *usbbus;
    const char *name;
    int i;

    switch (slot) {
    case 0x1d:
        name = "ich9-usb-ehci1";
        comp = ich9_1d;
        break;
    case 0x1a:
        name = "ich9-usb-ehci2";
        comp = ich9_1a;
        break;
    default:
        return -1;
    }

    ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name);
    qdev_init_nofail(&ehci->qdev);
    usbbus = QLIST_FIRST(&ehci->qdev.child_bus);

    for (i = 0; i < 3; i++) {
        uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func),
                                        true, comp[i].name);
        qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name);
        qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port);
        qdev_init_nofail(&uhci->qdev);
    }
    return 0;
}
Commit	Line	Data
0bf96f94 GH	1	/*
	2	* QEMU USB EHCI Emulation
	3	*
	4	* This library is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU Lesser General Public
	6	* License as published by the Free Software Foundation; either
	7	* version 2 of the License, or(at your option) any later version.
	8	*
	9	* This library is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	12	* Lesser General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, see <http://www.gnu.org/licenses/>.
	16	*/
	17
	18	#include "hw/usb/hcd-ehci.h"
a2cb15b0	19	#include "hw/pci/pci.h"
1de7afc9	20	#include "qemu/range.h"
0bf96f94 GH	21
	22	typedef struct EHCIPCIState {
	23	PCIDevice pcidev;
	24	EHCIState ehci;
	25	} EHCIPCIState;
	26
df013187 GH	27	typedef struct EHCIPCIInfo {
	28	const char *name;
	29	uint16_t vendor_id;
	30	uint16_t device_id;
	31	uint8_t revision;
	32	} EHCIPCIInfo;
	33
0bf96f94 GH	34	static int usb_ehci_pci_initfn(PCIDevice *dev)
	35	{
	36	EHCIPCIState *i = DO_UPCAST(EHCIPCIState, pcidev, dev);
	37	EHCIState *s = &i->ehci;
	38	uint8_t *pci_conf = dev->config;
	39
	40	pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20);
	41
	42	/* capabilities pointer */
	43	pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00);
	44	/* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */
	45
	46	pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */
	47	pci_set_byte(&pci_conf[PCI_MIN_GNT], 0);
	48	pci_set_byte(&pci_conf[PCI_MAX_LAT], 0);
	49
	50	/* pci_conf[0x50] = 0x01; // power management caps */
	51
	52	pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */
	53	pci_set_byte(&pci_conf[0x61], 0x20); /* frame length adjustment (2.1.5) */
	54	pci_set_word(&pci_conf[0x62], 0x00); /* port wake up capability (2.1.6) */
	55
	56	pci_conf[0x64] = 0x00;
	57	pci_conf[0x65] = 0x00;
	58	pci_conf[0x66] = 0x00;
	59	pci_conf[0x67] = 0x00;
	60	pci_conf[0x68] = 0x01;
	61	pci_conf[0x69] = 0x00;
	62	pci_conf[0x6a] = 0x00;
	63	pci_conf[0x6b] = 0x00; /* USBLEGSUP */
	64	pci_conf[0x6c] = 0x00;
	65	pci_conf[0x6d] = 0x00;
	66	pci_conf[0x6e] = 0x00;
	67	pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */
	68
	69	s->caps[0x09] = 0x68; /* EECP */
	70
	71	s->irq = dev->irq[3];
	72	s->dma = pci_dma_context(dev);
	73
	74	s->capsbase = 0x00;
	75	s->opregbase = 0x20;
	76
	77	usb_ehci_initfn(s, DEVICE(dev));
	78	pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
	79
	80	return 0;
	81	}
	82
55903f1d GH	83	static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr,
	84	uint32_t val, int l)
	85	{
	86	EHCIPCIState *i = DO_UPCAST(EHCIPCIState, pcidev, dev);
	87	bool busmaster;
	88
	89	pci_default_write_config(dev, addr, val, l);
	90
	91	if (!range_covers_byte(addr, l, PCI_COMMAND)) {
	92	return;
	93	}
	94	busmaster = pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_MASTER;
	95	i->ehci.dma = busmaster ? pci_dma_context(dev) : NULL;
	96	}
	97
0bf96f94 GH	98	static Property ehci_pci_properties[] = {
	99	DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128),
	100	DEFINE_PROP_END_OF_LIST(),
	101	};
	102
	103	static const VMStateDescription vmstate_ehci_pci = {
	104	.name = "ehci",
	105	.version_id = 2,
	106	.minimum_version_id = 1,
	107	.fields = (VMStateField[]) {
	108	VMSTATE_PCI_DEVICE(pcidev, EHCIPCIState),
	109	VMSTATE_STRUCT(ehci, EHCIPCIState, 2, vmstate_ehci, EHCIState),
9d153047	110	VMSTATE_END_OF_LIST()
0bf96f94 GH	111	}
	112	};
	113
	114	static void ehci_class_init(ObjectClass klass, void data)
	115	{
	116	DeviceClass *dc = DEVICE_CLASS(klass);
	117	PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
df013187	118	EHCIPCIInfo *i = data;
0bf96f94 GH	119
0bf96f94 GH	120	k->init = usb_ehci_pci_initfn;
df013187 GH	121	k->vendor_id = i->vendor_id;
	122	k->device_id = i->device_id;
	123	k->revision = i->revision;
0bf96f94	124	k->class_id = PCI_CLASS_SERIAL_USB;
55903f1d	125	k->config_write = usb_ehci_pci_write_config;
6c2d1c32	126	k->no_hotplug = 1;
9d153047	127	dc->vmsd = &vmstate_ehci_pci;
0bf96f94 GH	128	dc->props = ehci_pci_properties;
	129	}
	130
df013187 GH	131	static struct EHCIPCIInfo ehci_pci_info[] = {
	132	{
	133	.name = "usb-ehci",
	134	.vendor_id = PCI_VENDOR_ID_INTEL,
	135	.device_id = PCI_DEVICE_ID_INTEL_82801D, /* ich4 */
	136	.revision = 0x10,
	137	},{
ba07630c	138	.name = "ich9-usb-ehci1", /* 00:1d.7 */
df013187 GH	139	.vendor_id = PCI_VENDOR_ID_INTEL,
	140	.device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1,
	141	.revision = 0x03,
ba07630c GH	142	},{
	143	.name = "ich9-usb-ehci2", /* 00:1a.7 */
	144	.vendor_id = PCI_VENDOR_ID_INTEL,
	145	.device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI2,
	146	.revision = 0x03,
df013187	147	}
0bf96f94 GH	148	};
	149
	150	static void ehci_pci_register_types(void)
	151	{
df013187 GH	152	TypeInfo ehci_type_info = {
	153	.parent = TYPE_PCI_DEVICE,
	154	.instance_size = sizeof(EHCIPCIState),
	155	.class_init = ehci_class_init,
	156	};
	157	int i;
	158
	159	for (i = 0; i < ARRAY_SIZE(ehci_pci_info); i++) {
	160	ehci_type_info.name = ehci_pci_info[i].name;
	161	ehci_type_info.class_data = ehci_pci_info + i;
	162	type_register(&ehci_type_info);
	163	}
0bf96f94 GH	164	}
	165
	166	type_init(ehci_pci_register_types)
bb4d2b2f GH	167
	168	struct ehci_companions {
	169	const char *name;
	170	int func;
	171	int port;
	172	};
	173
	174	static const struct ehci_companions ich9_1d[] = {
	175	{ .name = "ich9-usb-uhci1", .func = 0, .port = 0 },
	176	{ .name = "ich9-usb-uhci2", .func = 1, .port = 2 },
	177	{ .name = "ich9-usb-uhci3", .func = 2, .port = 4 },
	178	};
	179
	180	static const struct ehci_companions ich9_1a[] = {
	181	{ .name = "ich9-usb-uhci4", .func = 0, .port = 0 },
	182	{ .name = "ich9-usb-uhci5", .func = 1, .port = 2 },
	183	{ .name = "ich9-usb-uhci6", .func = 2, .port = 4 },
	184	};
	185
	186	int ehci_create_ich9_with_companions(PCIBus *bus, int slot)
	187	{
	188	const struct ehci_companions *comp;
	189	PCIDevice ehci, uhci;
	190	BusState *usbbus;
	191	const char *name;
	192	int i;
	193
	194	switch (slot) {
	195	case 0x1d:
	196	name = "ich9-usb-ehci1";
	197	comp = ich9_1d;
	198	break;
	199	case 0x1a:
	200	name = "ich9-usb-ehci2";
	201	comp = ich9_1a;
	202	break;
	203	default:
	204	return -1;
	205	}
	206
	207	ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name);
	208	qdev_init_nofail(&ehci->qdev);
	209	usbbus = QLIST_FIRST(&ehci->qdev.child_bus);
	210
	211	for (i = 0; i < 3; i++) {
	212	uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func),
	213	true, comp[i].name);
	214	qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name);
	215	qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port);
	216	qdev_init_nofail(&uhci->qdev);
	217	}
	218	return 0;
	219	}