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1/*
2 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of the Open Source and Linux Lab nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
09aae23d 28#include "qemu/osdep.h"
da34e65c 29#include "qapi/error.h"
4771d756 30#include "cpu.h"
71e8a915 31#include "sysemu/reset.h"
9c17d615 32#include "sysemu/sysemu.h"
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33#include "hw/boards.h"
34#include "hw/loader.h"
47d05a86 35#include "elf.h"
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36#include "exec/memory.h"
37#include "exec/address-spaces.h"
8488ab02 38#include "qemu/error-report.h"
e53fa62c 39#include "xtensa_memory.h"
d9e8553b 40#include "xtensa_sim.h"
b68755c1 41
00b941e5 42static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
47d05a86 43{
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44 XtensaCPU *cpu = opaque;
45
46 return cpu_get_phys_page_debug(CPU(cpu), addr);
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47}
48
11e7bfd7 49static void sim_reset(void *opaque)
47d05a86 50{
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51 XtensaCPU *cpu = opaque;
52
53 cpu_reset(CPU(cpu));
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54}
55
d9e8553b 56XtensaCPU *xtensa_sim_common_init(MachineState *machine)
47d05a86 57{
06d26274 58 XtensaCPU *cpu = NULL;
5bfcb36e 59 CPUXtensaState *env = NULL;
3ef96221 60 ram_addr_t ram_size = machine->ram_size;
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61 int n;
62
33decbd2 63 for (n = 0; n < machine->smp.cpus; n++) {
d58eeae3 64 cpu = XTENSA_CPU(cpu_create(machine->cpu_type));
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65 env = &cpu->env;
66
47d05a86 67 env->sregs[PRID] = n;
11e7bfd7 68 qemu_register_reset(sim_reset, cpu);
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69 /* Need MMU initialized prior to ELF loading,
70 * so that ELF gets loaded into virtual addresses
71 */
11e7bfd7 72 sim_reset(cpu);
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73 }
74
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75 if (env) {
76 XtensaMemory sysram = env->config->sysram;
47d05a86 77
b68755c1 78 sysram.location[0].size = ram_size;
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79 xtensa_create_memory_regions(&env->config->instrom, "xtensa.instrom",
80 get_system_memory());
81 xtensa_create_memory_regions(&env->config->instram, "xtensa.instram",
82 get_system_memory());
83 xtensa_create_memory_regions(&env->config->datarom, "xtensa.datarom",
84 get_system_memory());
85 xtensa_create_memory_regions(&env->config->dataram, "xtensa.dataram",
86 get_system_memory());
87 xtensa_create_memory_regions(&env->config->sysrom, "xtensa.sysrom",
88 get_system_memory());
89 xtensa_create_memory_regions(&sysram, "xtensa.sysram",
90 get_system_memory());
b68755c1 91 }
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92 if (serial_hd(0)) {
93 xtensa_sim_open_console(serial_hd(0));
8128b3e0 94 }
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95 return cpu;
96}
97
98void xtensa_sim_load_kernel(XtensaCPU *cpu, MachineState *machine)
99{
100 const char *kernel_filename = machine->kernel_filename;
47d05a86 101#ifdef TARGET_WORDS_BIGENDIAN
d9e8553b 102 int big_endian = true;
47d05a86 103#else
d9e8553b 104 int big_endian = false;
47d05a86 105#endif
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106
107 if (kernel_filename) {
108 uint64_t elf_entry;
109 uint64_t elf_lowaddr;
110 int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu,
6cdda0ff 111 &elf_entry, &elf_lowaddr, NULL, NULL, big_endian,
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112 EM_XTENSA, 0, 0);
113
47d05a86 114 if (success > 0) {
d9e8553b 115 cpu->env.pc = elf_entry;
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116 }
117 }
118}
119
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120static void xtensa_sim_init(MachineState *machine)
121{
122 XtensaCPU *cpu = xtensa_sim_common_init(machine);
123
124 xtensa_sim_load_kernel(cpu, machine);
125}
126
e264d29d 127static void xtensa_sim_machine_init(MachineClass *mc)
47d05a86 128{
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129 mc->desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")";
130 mc->is_default = true;
131 mc->init = xtensa_sim_init;
132 mc->max_cpus = 4;
8128b3e0 133 mc->no_serial = 1;
d58eeae3 134 mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
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135}
136
e264d29d 137DEFINE_MACHINE("sim", xtensa_sim_machine_init)