]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/asm-blackfin/io.h
[Blackfin]PATCH-1/2]: Remove obsolete blackfin port and add bf533 platform support
[people/ms/u-boot.git] / include / asm-blackfin / io.h
CommitLineData
6cb142fa
WD
1/*
2 * U-boot - io.h IO routines
3 *
4 * Copyright (c) 2005 blackfin.uclinux.org
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef _BLACKFIN_IO_H
26#define _BLACKFIN_IO_H
27
28#ifdef __KERNEL__
29
30#include <linux/config.h>
31
32/* function prototypes for CF support */
33extern void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words);
34extern void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words);
35extern unsigned char cf_inb(volatile unsigned char *addr);
3f0606ad
AL
36extern void cf_outb(unsigned char val, volatile unsigned char *addr);
37
38static inline void sync(void)
39{
40}
6cb142fa
WD
41
42/*
43 * These are for ISA/PCI shared memory _only_ and should never be used
44 * on any other type of memory, including Zorro memory. They are meant to
45 * access the bus in the bus byte order which is little-endian!.
46 *
47 * readX/writeX() are used to access memory mapped devices. On some
48 * architectures the memory mapped IO stuff needs to be accessed
49 * differently. On the m68k architecture, we just read/write the
50 * memory location directly.
51 */
52
6cb142fa
WD
53#define readb(addr) ({ unsigned char __v = (*(volatile unsigned char *) (addr));asm("ssync;"); __v; })
54#define readw(addr) ({ unsigned short __v = (*(volatile unsigned short *) (addr)); asm("ssync;");__v; })
55#define readl(addr) ({ unsigned int __v = (*(volatile unsigned int *) (addr));asm("ssync;"); __v; })
56
57#define writeb(b,addr) {((*(volatile unsigned char *) (addr)) = (b)); asm("ssync;");}
58#define writew(b,addr) {((*(volatile unsigned short *) (addr)) = (b)); asm("ssync;");}
59#define writel(b,addr) {((*(volatile unsigned int *) (addr)) = (b)); asm("ssync;");}
60
61#define memset_io(a,b,c) memset((void *)(a),(b),(c))
62#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
63#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
64
65#define inb_p(addr) readb((addr) + BF533_PCIIO_BASE)
66#define inb(addr) cf_inb((volatile unsigned char*)(addr))
67
68#define outb(x,addr) cf_outb((unsigned char)(x), (volatile unsigned char*)(addr))
69#define outb_p(x,addr) outb(x, (addr) + BF533_PCIIO_BASE)
70
71#define inw(addr) readw((addr) + BF533_PCIIO_BASE)
72#define inl(addr) readl((addr) + BF533_PCIIO_BASE)
73
74#define outw(x,addr) writew(x, (addr) + BF533_PCIIO_BASE)
75#define outl(x,addr) writel(x, (addr) + BF533_PCIIO_BASE)
76
77#define insb(port, addr, count) memcpy((void*)addr, (void*)(BF533_PCIIO_BASE + port), count)
78#define insw(port, addr, count) cf_insw((unsigned short*)addr, (unsigned short*)(port), (count))
79#define insl(port, addr, count) memcpy((void*)addr, (void*)(BF533_PCIIO_BASE + port), (4*count))
80
81#define outsb(port,addr,count) memcpy((void*)(BF533_PCIIO_BASE + port), (void*)addr, count)
82#define outsw(port,addr,count) cf_outsw((unsigned short*)(port), (unsigned short*)addr, (count))
83#define outsl(port,addr,count) memcpy((void*)(BF533_PCIIO_BASE + port), (void*)addr, (4*count))
84
85#define IO_SPACE_LIMIT 0xffff
86
87/* Values for nocacheflag and cmode */
88#define IOMAP_FULL_CACHING 0
89#define IOMAP_NOCACHE_SER 1
90#define IOMAP_NOCACHE_NONSER 2
91#define IOMAP_WRITETHROUGH 3
92
93extern void *__ioremap(unsigned long physaddr, unsigned long size,
94 int cacheflag);
95extern void __iounmap(void *addr, unsigned long size);
96
97extern inline void *ioremap(unsigned long physaddr, unsigned long size)
98{
99 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
100}
3f0606ad 101extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
6cb142fa
WD
102{
103 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
104}
105extern inline void *ioremap_writethrough(unsigned long physaddr,
106 unsigned long size)
107{
108 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
109}
110extern inline void *ioremap_fullcache(unsigned long physaddr,
111 unsigned long size)
112{
113 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
114}
115
116extern void iounmap(void *addr);
117
118extern void blkfin_inv_cache_all(void);
119#define dma_cache_inv(_start,_size) do { blkfin_inv_cache_all();} while (0)
120#define dma_cache_wback(_start,_size) do { } while (0)
121#define dma_cache_wback_inv(_start,_size) do { blkfin_inv_cache_all();} while (0)
122
123#endif
124#endif