]>
Commit | Line | Data |
---|---|---|
5c952cf0 WD |
1 | /* |
2 | * (C) Copyright 2004, Psyent Corporation <www.psyent.com> | |
3 | * Scott McNutt <smcnutt@psyent.com> | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #ifndef __ASM_NIOS2_IO_H_ | |
25 | #define __ASM_NIOS2_IO_H_ | |
26 | ||
3a197b2f HW |
27 | static inline void sync(void) |
28 | { | |
29 | __asm__ __volatile__ ("sync" : : : "memory"); | |
30 | } | |
5c952cf0 WD |
31 | |
32 | extern unsigned char inb (unsigned char *port); | |
33 | extern unsigned short inw (unsigned short *port); | |
34 | extern unsigned inl (unsigned port); | |
0c1c117c WD |
35 | |
36 | #define readb(addr)\ | |
37 | ({unsigned char val;\ | |
38 | asm volatile( "ldbio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) | |
39 | #define readw(addr)\ | |
40 | ({unsigned short val;\ | |
41 | asm volatile( "ldhio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) | |
42 | #define readl(addr)\ | |
43 | ({unsigned long val;\ | |
44 | asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) | |
c2ced000 | 45 | |
0c1c117c | 46 | #define writeb(addr,val)\ |
c2ced000 | 47 | asm volatile ("stbio %1, 0(%0)" : : "r" (addr), "r" (val)) |
0c1c117c | 48 | #define writew(addr,val)\ |
c2ced000 | 49 | asm volatile ("sthio %1, 0(%0)" : : "r" (addr), "r" (val)) |
0c1c117c | 50 | #define writel(addr,val)\ |
c2ced000 | 51 | asm volatile ("stwio %1, 0(%0)" : : "r" (addr), "r" (val)) |
0c1c117c WD |
52 | |
53 | #define inb(addr) readb(addr) | |
54 | #define inw(addr) readw(addr) | |
55 | #define inl(addr) readl(addr) | |
56 | #define outb(addr,val) writeb(addr,val) | |
57 | #define outw(addr,val) writew(addr,val) | |
58 | #define outl(addr,val) writel(addr,val) | |
59 | ||
60 | static inline void insb (unsigned long port, void *dst, unsigned long count) | |
61 | { | |
62 | unsigned char *p = dst; | |
63 | while (count--) *p++ = inb (port); | |
64 | } | |
65 | static inline void insw (unsigned long port, void *dst, unsigned long count) | |
66 | { | |
67 | unsigned short *p = dst; | |
68 | while (count--) *p++ = inw (port); | |
69 | } | |
70 | static inline void insl (unsigned long port, void *dst, unsigned long count) | |
71 | { | |
72 | unsigned long *p = dst; | |
73 | while (count--) *p++ = inl (port); | |
74 | } | |
75 | ||
76 | static inline void outsb (unsigned long port, const void *src, unsigned long count) | |
77 | { | |
78 | const unsigned char *p = src; | |
79 | while (count--) outb (*p++, port); | |
80 | } | |
81 | ||
82 | static inline void outsw (unsigned long port, const void *src, unsigned long count) | |
83 | { | |
84 | const unsigned short *p = src; | |
85 | while (count--) outw (*p++, port); | |
86 | } | |
87 | static inline void outsl (unsigned long port, const void *src, unsigned long count) | |
88 | { | |
89 | const unsigned long *p = src; | |
90 | while (count--) outl (*p++, port); | |
91 | } | |
5c952cf0 WD |
92 | |
93 | #endif /* __ASM_NIOS2_IO_H_ */ |