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5c7f10fd OS |
1 | /* |
2 | * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> | |
3 | * | |
4 | * X-Powers AXP221 Power Management IC driver | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
f3fba566 | 9 | /* Page 0 addresses */ |
5c7f10fd OS |
10 | #define AXP221_CHIP_ID 0x03 |
11 | #define AXP221_OUTPUT_CTRL1 0x10 | |
50e0d5e6 HG |
12 | #define AXP221_OUTPUT_CTRL1_DCDC0_EN (1 << 0) |
13 | #define AXP221_OUTPUT_CTRL1_DCDC1_EN (1 << 1) | |
14 | #define AXP221_OUTPUT_CTRL1_DCDC2_EN (1 << 2) | |
15 | #define AXP221_OUTPUT_CTRL1_DCDC3_EN (1 << 3) | |
16 | #define AXP221_OUTPUT_CTRL1_DCDC4_EN (1 << 4) | |
17 | #define AXP221_OUTPUT_CTRL1_DCDC5_EN (1 << 5) | |
5c7f10fd OS |
18 | #define AXP221_OUTPUT_CTRL1_ALDO1_EN (1 << 6) |
19 | #define AXP221_OUTPUT_CTRL1_ALDO2_EN (1 << 7) | |
20 | #define AXP221_OUTPUT_CTRL2 0x12 | |
6906df1a SS |
21 | #define AXP221_OUTPUT_CTRL2_ELDO1_EN (1 << 0) |
22 | #define AXP221_OUTPUT_CTRL2_ELDO2_EN (1 << 1) | |
23 | #define AXP221_OUTPUT_CTRL2_ELDO3_EN (1 << 2) | |
5c7f10fd OS |
24 | #define AXP221_OUTPUT_CTRL2_DLDO1_EN (1 << 3) |
25 | #define AXP221_OUTPUT_CTRL2_DLDO2_EN (1 << 4) | |
26 | #define AXP221_OUTPUT_CTRL2_DLDO3_EN (1 << 5) | |
27 | #define AXP221_OUTPUT_CTRL2_DLDO4_EN (1 << 6) | |
50e0d5e6 | 28 | #define AXP221_OUTPUT_CTRL2_DCDC1SW_EN (1 << 7) |
5c7f10fd OS |
29 | #define AXP221_OUTPUT_CTRL3 0x13 |
30 | #define AXP221_OUTPUT_CTRL3_ALDO3_EN (1 << 7) | |
31 | #define AXP221_DLDO1_CTRL 0x15 | |
32 | #define AXP221_DLDO2_CTRL 0x16 | |
33 | #define AXP221_DLDO3_CTRL 0x17 | |
34 | #define AXP221_DLDO4_CTRL 0x18 | |
6906df1a SS |
35 | #define AXP221_ELDO1_CTRL 0x19 |
36 | #define AXP221_ELDO2_CTRL 0x1a | |
37 | #define AXP221_ELDO3_CTRL 0x1b | |
5c7f10fd OS |
38 | #define AXP221_DCDC1_CTRL 0x21 |
39 | #define AXP221_DCDC2_CTRL 0x22 | |
40 | #define AXP221_DCDC3_CTRL 0x23 | |
41 | #define AXP221_DCDC4_CTRL 0x24 | |
42 | #define AXP221_DCDC5_CTRL 0x25 | |
43 | #define AXP221_ALDO1_CTRL 0x28 | |
5ba47194 | 44 | #define AXP221_ALDO2_CTRL 0x29 |
5c7f10fd | 45 | #define AXP221_ALDO3_CTRL 0x2a |
fe4b71b2 HG |
46 | #define AXP221_SHUTDOWN 0x32 |
47 | #define AXP221_SHUTDOWN_POWEROFF (1 << 7) | |
f3fba566 HG |
48 | #define AXP221_PAGE 0xff |
49 | ||
50 | /* Page 1 addresses */ | |
51 | #define AXP221_SID 0x20 | |
5c7f10fd | 52 | |
2fcf033d HG |
53 | /* For axp_gpio.c */ |
54 | #define AXP_POWER_STATUS 0x00 | |
55 | #define AXP_POWER_STATUS_VBUS_PRESENT (1 << 5) | |
81a8aa3a CYT |
56 | #define AXP_VBUS_IPSOUT 0x30 |
57 | #define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2) | |
58 | #define AXP_MISC_CTRL 0x8f | |
59 | #define AXP_MISC_CTRL_N_VBUSEN_FUNC (1 << 4) | |
2fcf033d HG |
60 | #define AXP_GPIO0_CTRL 0x90 |
61 | #define AXP_GPIO1_CTRL 0x92 | |
62 | #define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ | |
63 | #define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ | |
64 | #define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ | |
65 | #define AXP_GPIO_STATE 0x94 | |
66 | #define AXP_GPIO_STATE_OFFSET 0 |