]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/ADNPESC1.h
projects / people / ms / u-boot.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Separate mtdparts command from jffs2
[people/ms/u-boot.git] / include / configs / ADNPESC1.h
CommitLineData
aaf224ab
WD		 1/*
2 * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
3 * Stephan Linz <linz@li-pro.net>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27/***********************************************************************
28 * Include the whole NIOS CPU configuration.
29 *
30 * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!!
31 *
32 ***********************************************************************/
33
34#if defined(CONFIG_NIOS_BASE_32)
35#include <configs/ADNPESC1_base_32.h>
36#else
6d0f6bcf 37#error *** CONFIG_SYS_ERROR: you have to setup right NIOS CPU configuration
aaf224ab
WD		 38#endif
39
40/*------------------------------------------------------------------------
41 * BOARD/CPU -- TOP-LEVEL
42 *----------------------------------------------------------------------*/
43#define CONFIG_NIOS 1 /* NIOS-32 core */
44#define CONFIG_ADNPESC1 1 /* SSV ADNP/ESC1 board */
6d0f6bcf
JCPV		 45#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */
46#define CONFIG_SYS_HZ 1000 /* 1 msec time tick */
47#undef CONFIG_SYS_CLKS_IN_HZ
aaf224ab
WD		 48#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
49
50/*------------------------------------------------------------------------
51 * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM)
52 *----------------------------------------------------------------------*/
6d0f6bcf 53#if (CONFIG_SYS_NIOS_CPU_SDRAM_SIZE != 0)
aaf224ab 54
6d0f6bcf
JCPV		 55#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_NIOS_CPU_SDRAM_BASE
56#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_NIOS_CPU_SDRAM_SIZE
aaf224ab
WD		 57
58#else
6d0f6bcf 59#error *** CONFIG_SYS_ERROR: you have to setup any SDRAM in NIOS CPU config
aaf224ab
WD		 60#endif
61
6d0f6bcf 62#if defined(CONFIG_SYS_NIOS_CPU_SRAM_BASE) && defined(CONFIG_SYS_NIOS_CPU_SRAM_SIZE)
aaf224ab 63
6d0f6bcf
JCPV		 64#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_NIOS_CPU_SRAM_BASE
65#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_NIOS_CPU_SRAM_SIZE
aaf224ab
WD		 66
67#else
68
6d0f6bcf
JCPV		 69#undef CONFIG_SYS_SRAM_BASE
70#undef CONFIG_SYS_SRAM_SIZE
aaf224ab
WD		 71
72#endif
73
6d0f6bcf 74#define CONFIG_SYS_VECT_BASE CONFIG_SYS_NIOS_CPU_VEC_BASE
aaf224ab
WD		 75
76/*------------------------------------------------------------------------
77 * MEMORY ORGANIZATION - For the most part, you can put things pretty
78 * much anywhere. This is pretty flexible for Nios. So here we make some
79 * arbitrary choices & assume that the monitor is placed at the end of
80 * a memory resource (so you must make sure TEXT_BASE is chosen
81 * appropriately -- this is very important if you plan to move your
82 * memory to another place as configured at this time !!!).
83 *
53677ef1
WD		 84 * -The heap is placed below the monitor.
85 * -Global data is placed below the heap.
86 * -The stack is placed below global data (&grows down).
aaf224ab 87 *----------------------------------------------------------------------*/
6d0f6bcf
JCPV		 88#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256k */
89#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/
90#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
aaf224ab 91
6d0f6bcf
JCPV		 92#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
93#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
94#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
95#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET
aaf224ab
WD		 96
97/*------------------------------------------------------------------------
98 * FLASH (AM29LV065D)
99 *----------------------------------------------------------------------*/
6d0f6bcf 100#if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
aaf224ab 101
6d0f6bcf
JCPV		 102#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_NIOS_CPU_FLASH_BASE
103#define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_NIOS_CPU_FLASH_SIZE
104#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */
105#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */
106#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
107#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
108#define CONFIG_SYS_FLASH_WORD_SIZE unsigned short /* flash word size */
aaf224ab
WD		 109
110#else
6d0f6bcf 111#error *** CONFIG_SYS_ERROR: you have to setup any Flash memory in NIOS CPU config
aaf224ab
WD		 112#endif
113
114/*------------------------------------------------------------------------
115 * ENVIRONMENT
116 *----------------------------------------------------------------------*/
6d0f6bcf 117#if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
aaf224ab 118
5a1aceb0 119#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */
aaf224ab
WD		 120
121/* Mem addr of environment */
122#if defined(CONFIG_NIOS_BASE_32)
6d0f6bcf 123#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
aaf224ab 124#else
6d0f6bcf 125#error *** CONFIG_SYS_ERROR: you have to setup the environment base address CONFIG_ENV_ADDR
aaf224ab
WD		 126#endif
127
0e8d1586 128#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
aaf224ab
WD		 129#define CONFIG_ENV_OVERWRITE /* Serial/eth change Ok */
130
131#else
93f6d725 132#define CONFIG_ENV_IS_NOWHERE 1 /* NO Environment */
aaf224ab
WD		 133#endif
134
135/*------------------------------------------------------------------------
136 * NIOS APPLICATION CODE BASE AREA
137 *----------------------------------------------------------------------*/
0e8d1586 138#if ((CONFIG_ENV_ADDR + CONFIG_ENV_SIZE) == 0x1050000)
6d0f6bcf
JCPV		 139#define CONFIG_SYS_ADNPESC1_UPDATE_LOAD_ADDR "0x2000100"
140#define CONFIG_SYS_ADNPESC1_NIOS_APPL_ENTRY "0x1050000"
141#define CONFIG_SYS_ADNPESC1_NIOS_APPL_IDENT "0x105000c"
142#define CONFIG_SYS_ADNPESC1_NIOS_APPL_END "0x11fffff"
143#define CONFIG_SYS_ADNPESC1_FILESYSTEM_BASE "0x1200000"
144#define CONFIG_SYS_ADNPESC1_FILESYSTEM_END "0x17fffff"
aaf224ab 145#else
6d0f6bcf 146#error *** CONFIG_SYS_ERROR: missing right appl.code base configuration, expand your config.h
aaf224ab 147#endif
6d0f6bcf 148#define CONFIG_SYS_ADNPESC1_NIOS_IDENTIFIER "Nios"
aaf224ab
WD		 149
150/*------------------------------------------------------------------------
151 * BOOT ENVIRONMENT
152 *----------------------------------------------------------------------*/
153#ifdef CONFIG_DNPEVA2 /* DNP/EVA2 base board */
6d0f6bcf
JCPV		 154#define CONFIG_SYS_ADNPESC1_SLED_BOOT_OFF "sled boot off; "
155#define CONFIG_SYS_ADNPESC1_SLED_RED_BLINK "sled red blink; "
aaf224ab 156#else
6d0f6bcf
JCPV		 157#define CONFIG_SYS_ADNPESC1_SLED_BOOT_OFF
158#define CONFIG_SYS_ADNPESC1_SLED_RED_BLINK
aaf224ab
WD		 159#endif
160
161#define CONFIG_BOOTDELAY 5
162#define CONFIG_BOOTCOMMAND \
163 "if itest.s *$appl_ident_addr == \"$appl_ident_str\"; " \
164 "then " \
165 "wd off; " \
6d0f6bcf 166 CONFIG_SYS_ADNPESC1_SLED_BOOT_OFF \
aaf224ab
WD		 167 "go $appl_entry_addr; " \
168 "else " \
6d0f6bcf 169 CONFIG_SYS_ADNPESC1_SLED_RED_BLINK \
aaf224ab
WD		 170 "echo *** missing \"$appl_ident_str\" at $appl_ident_addr; "\
171 "echo *** invalid application at $appl_entry_addr; " \
172 "echo *** stop bootup...; " \
173 "fi"
174
175/*------------------------------------------------------------------------
176 * EXTRA ENVIRONMENT
177 *----------------------------------------------------------------------*/
178#ifdef CONFIG_DNPEVA2 /* DNP/EVA2 base board */
6d0f6bcf
JCPV		 179#define CONFIG_SYS_ADNPESC1_SLED_YELLO_ON "sled yellow on; "
180#define CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF "sled yellow off; "
aaf224ab 181#else
6d0f6bcf
JCPV		 182#define CONFIG_SYS_ADNPESC1_SLED_YELLO_ON
183#define CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF
aaf224ab
WD		 184#endif
185
186#define CONFIG_EXTRA_ENV_SETTINGS \
187 "update_allowed=0\0" \
6d0f6bcf
JCPV		 188 "update_load_addr=" CONFIG_SYS_ADNPESC1_UPDATE_LOAD_ADDR "\0" \
189 "appl_entry_addr=" CONFIG_SYS_ADNPESC1_NIOS_APPL_ENTRY "\0" \
190 "appl_end_addr=" CONFIG_SYS_ADNPESC1_NIOS_APPL_END "\0" \
191 "appl_ident_addr=" CONFIG_SYS_ADNPESC1_NIOS_APPL_IDENT "\0" \
192 "appl_ident_str=" CONFIG_SYS_ADNPESC1_NIOS_IDENTIFIER "\0" \
aaf224ab
WD		 193 "appl_name=ADNPESC1/base32/linux.bin\0" \
194 "appl_update=" \
195 "if itest.b $update_allowed != 0; " \
196 "then " \
6d0f6bcf 197 CONFIG_SYS_ADNPESC1_SLED_YELLO_ON \
aaf224ab
WD		 198 "tftp $update_load_addr $appl_name; " \
199 "protect off $appl_entry_addr $appl_end_addr; " \
200 "era $appl_entry_addr $appl_end_addr; " \
201 "cp.b $update_load_addr $appl_entry_addr $filesize; "\
6d0f6bcf 202 CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF \
aaf224ab
WD		 203 "else " \
204 "echo *** update not allowed (update_allowed=$update_allowed); "\
205 "fi\0" \
6d0f6bcf
JCPV		 206 "fs_base_addr=" CONFIG_SYS_ADNPESC1_FILESYSTEM_BASE "\0" \
207 "fs_end_addr=" CONFIG_SYS_ADNPESC1_FILESYSTEM_END "\0" \
aaf224ab
WD		 208 "fs_name=ADNPESC1/base32/romfs.img\0" \
209 "fs_update=" \
210 "if itest.b $update_allowed != 0; " \
211 "then " \
6d0f6bcf 212 CONFIG_SYS_ADNPESC1_SLED_YELLO_ON \
aaf224ab
WD		 213 "tftp $update_load_addr $fs_name; " \
214 "protect off $fs_base_addr $fs_end_addr; " \
215 "era $fs_base_addr $fs_end_addr; " \
216 "cp.b $update_load_addr $fs_base_addr $filesize; "\
6d0f6bcf 217 CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF \
aaf224ab
WD		 218 "else " \
219 "echo *** update not allowed (update_allowed=$update_allowed); "\
220 "fi\0" \
221 "uboot_name=ADNPESC1/base32/u-boot.bin\0" \
222 "uboot_loadnrun=" \
223 "if ping $serverip; " \
224 "then " \
6d0f6bcf 225 CONFIG_SYS_ADNPESC1_SLED_YELLO_ON \
aaf224ab
WD		 226 "tftp $update_load_addr $uboot_name; " \
227 "wd off; " \
228 "go $update_load_addr; " \
229 "else " \
230 "echo *** missing connection to $serverip; " \
231 "echo *** check your network and try again...; "\
232 "fi\0"
233
234/*------------------------------------------------------------------------
235 * CONSOLE
236 *----------------------------------------------------------------------*/
6d0f6bcf 237#if (CONFIG_SYS_NIOS_CPU_UART_NUMS != 0)
aaf224ab 238
6d0f6bcf 239#define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_NIOS_CPU_UART0 /* 1st UART is Cons. */
aaf224ab 240
6d0f6bcf
JCPV		 241#if (CONFIG_SYS_NIOS_CPU_UART0_BR != 0)
242#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
243#define CONFIG_BAUDRATE CONFIG_SYS_NIOS_CPU_UART0_BR
aaf224ab 244#else
6d0f6bcf 245#undef CONFIG_SYS_NIOS_FIXEDBAUD
aaf224ab
WD		 246#define CONFIG_BAUDRATE 115200
247#endif
248
6d0f6bcf 249#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
aaf224ab
WD		 250
251#else
6d0f6bcf 252#error *** CONFIG_SYS_ERROR: you have to setup at least one UART in NIOS CPU config
aaf224ab
WD		 253#endif
254
255/*------------------------------------------------------------------------
256 * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc PIT,
257 * so an avalon bus timer is required.
258 *----------------------------------------------------------------------*/
6d0f6bcf 259#if (CONFIG_SYS_NIOS_CPU_TIMER_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_TICK_TIMER)
aaf224ab 260
6d0f6bcf 261#if (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 0)
aaf224ab 262
6d0f6bcf
JCPV		 263#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER0 /* TIMER0 as tick */
264#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER0_IRQ
aaf224ab 265
6d0f6bcf 266#if (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 1) /* fixed period */
aaf224ab 267
6d0f6bcf
JCPV		 268#if (CONFIG_SYS_NIOS_CPU_TIMER0_PER >= CONFIG_SYS_HZ)
269#define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER0_PER / CONFIG_SYS_HZ)
aaf224ab 270#else
6d0f6bcf 271#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
aaf224ab
WD		 272#endif
273
6d0f6bcf 274#undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */
aaf224ab 275
6d0f6bcf 276#elif (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 0) /* variable period */
aaf224ab 277
6d0f6bcf
JCPV		 278#if (CONFIG_SYS_HZ <= 1000)
279#define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ)
aaf224ab 280#else
6d0f6bcf 281#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
aaf224ab
WD		 282#endif
283
6d0f6bcf 284#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
aaf224ab
WD		 285
286#else
6d0f6bcf 287#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER0_FP correct
aaf224ab
WD		 288#endif
289
6d0f6bcf 290#elif (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 1)
aaf224ab 291
6d0f6bcf
JCPV		 292#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER1 /* TIMER1 as tick */
293#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER1_IRQ
aaf224ab 294
6d0f6bcf 295#if (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 1) /* fixed period */
aaf224ab 296
6d0f6bcf
JCPV		 297#if (CONFIG_SYS_NIOS_CPU_TIMER1_PER >= CONFIG_SYS_HZ)
298#define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER1_PER / CONFIG_SYS_HZ)
aaf224ab 299#else
6d0f6bcf 300#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
aaf224ab
WD		 301#endif
302
6d0f6bcf 303#undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */
aaf224ab 304
6d0f6bcf 305#elif (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 0) /* variable period */
aaf224ab 306
6d0f6bcf
JCPV		 307#if (CONFIG_SYS_HZ <= 1000)
308#define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ)
aaf224ab 309#else
6d0f6bcf 310#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
aaf224ab
WD		 311#endif
312
6d0f6bcf 313#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
aaf224ab
WD		 314
315#else
6d0f6bcf 316#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER1_FP correct
aaf224ab
WD		 317#endif
318
6d0f6bcf 319#endif /* CONFIG_SYS_NIOS_CPU_TICK_TIMER */
aaf224ab
WD		 320
321#else
6d0f6bcf 322#error *** CONFIG_SYS_ERROR: you have to setup at least one TIMER in NIOS CPU config
aaf224ab
WD		 323#endif
324
325/*------------------------------------------------------------------------
326 * WATCHDOG (or better MAX823 supervisory circuite access)
327 *----------------------------------------------------------------------*/
328#define CONFIG_HW_WATCHDOG 1 /* board specific WD */
329
330#ifdef CONFIG_HW_WATCHDOG
331
332/* MAX823 supervisor -- watchdog enable port at: */
6d0f6bcf
JCPV		 333#if (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 0)
334#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO0 /* PIO0 */
335#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 1)
336#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO1 /* PIO1 */
337#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 2)
338#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO2 /* PIO2 */
339#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 3)
340#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO3 /* PIO3 */
341#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 4)
342#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO4 /* PIO4 */
343#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 5)
344#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO5 /* PIO5 */
345#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 6)
346#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO6 /* PIO6 */
347#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 7)
348#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO7 /* PIO7 */
349#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 8)
350#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO8 /* PIO8 */
351#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 9)
352#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO9 /* PIO9 */
353#else
354#error *** CONFIG_SYS_ERROR: you have to setup at least one WDENA_PIO in NIOS CPU config
aaf224ab
WD		 355#endif
356
357/* MAX823 supervisor -- watchdog trigger port at: */
6d0f6bcf
JCPV		 358#if (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 0)
359#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO0 /* PIO0 */
360#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 1)
361#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO1 /* PIO1 */
362#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 2)
363#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO2 /* PIO2 */
364#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 3)
365#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO3 /* PIO3 */
366#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 4)
367#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO4 /* PIO4 */
368#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 5)
369#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO5 /* PIO5 */
370#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 6)
371#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO6 /* PIO6 */
372#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 7)
373#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO7 /* PIO7 */
374#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 8)
375#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO8 /* PIO8 */
376#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 9)
377#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO9 /* PIO9 */
378#else
379#error *** CONFIG_SYS_ERROR: you have to setup at least one WDTOG_PIO in NIOS CPU config
aaf224ab
WD		 380#endif
381
382#if defined(CONFIG_NIOS_BASE_32) /* NIOS CPU specifics */
383#define CONFIG_HW_WDENA_BIT 0 /* WD enable @ Bit 0 */
384#define CONFIG_HW_WDTOG_BIT 0 /* WD trigger @ Bit 0 */
385#define CONFIG_HW_WDPORT_WRONLY 1 /* each WD port wr/only*/
386#else
6d0f6bcf 387#error *** CONFIG_SYS_ERROR: missing watchdog bit configuration, expand your config.h
aaf224ab
WD		 388#endif
389
390#endif /* CONFIG_HW_WATCHDOG */
391
392/*------------------------------------------------------------------------
393 * SERIAL PERIPHAREL INTERFACE
394 *----------------------------------------------------------------------*/
6d0f6bcf 395#if (CONFIG_SYS_NIOS_CPU_SPI_NUMS == 1)
aaf224ab
WD		 396
397#define CONFIG_NIOS_SPI 1 /* SPI support active */
6d0f6bcf
JCPV		 398#define CONFIG_SYS_NIOS_SPIBASE CONFIG_SYS_NIOS_CPU_SPI0
399#define CONFIG_SYS_NIOS_SPIBITS CONFIG_SYS_NIOS_CPU_SPI0_BITS
aaf224ab
WD		 400
401#define CONFIG_RTC_DS1306 1 /* Dallas 1306 real time clock */
6d0f6bcf 402#define CONFIG_SYS_SPI_RTC_DEVID 0 /* as 1st SPI device */
aaf224ab 403
aaf224ab
WD		 404#else
405#undef CONFIG_NIOS_SPI /* NO SPI support */
aaf224ab
WD		 406#endif
407
408/*------------------------------------------------------------------------
409 * Ethernet -- needs work!
410 *----------------------------------------------------------------------*/
6d0f6bcf 411#if (CONFIG_SYS_NIOS_CPU_LAN_NUMS == 1)
aaf224ab 412
6d0f6bcf 413#if (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 0) /* LAN91C111 */
aaf224ab
WD		 414
415#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
416#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
6d0f6bcf 417#define CONFIG_SMC91111_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
aaf224ab 418
6d0f6bcf 419#if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
aaf224ab
WD		 420#define CONFIG_SMC_USE_32_BIT 1
421#else /* no */
422#undef CONFIG_SMC_USE_32_BIT
423#endif
424
6d0f6bcf 425#elif (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 1) /* CS8900A */
aaf224ab
WD		 426
427 /********************************************/
428 /* !!! CS8900 is __not__ tested on NIOS !!! */
429 /********************************************/
430#define CONFIG_DRIVER_CS8900 /* Using CS8900 */
6d0f6bcf 431#define CS8900_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
aaf224ab 432
6d0f6bcf 433#if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
aaf224ab
WD		 434#undef CS8900_BUS16
435#define CS8900_BUS32 1
436#else /* no */
437#define CS8900_BUS16 1
438#undef CS8900_BUS32
439#endif
440
441#else
6d0f6bcf 442#error *** CONFIG_SYS_ERROR: invalid LAN0 chip type, check your NIOS CPU config
aaf224ab
WD		 443#endif
444
445#define CONFIG_ETHADDR 02:80:ae:20:60:6f
446#define CONFIG_NETMASK 255.255.255.248
447#define CONFIG_IPADDR 192.168.161.84
448#define CONFIG_SERVERIP 192.168.161.85
449
450#else
6d0f6bcf 451#error *** CONFIG_SYS_ERROR: you have to setup just one LAN only or expand your config.h
aaf224ab
WD		 452#endif
453
454/*------------------------------------------------------------------------
455 * STATUS LEDs
456 *----------------------------------------------------------------------*/
6d0f6bcf 457#if (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_LED_PIO)
aaf224ab 458
6d0f6bcf 459#if (CONFIG_SYS_NIOS_CPU_LED_PIO == 0)
aaf224ab 460
6d0f6bcf
JCPV		 461#define STATUS_LED_BASE CONFIG_SYS_NIOS_CPU_PIO0
462#define STATUS_LED_BITS CONFIG_SYS_NIOS_CPU_PIO0_BITS
aaf224ab
WD		 463#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */
464
6d0f6bcf 465#if (CONFIG_SYS_NIOS_CPU_PIO0_TYPE == 1)
aaf224ab
WD		 466#define STATUS_LED_WRONLY 1
467#else
468#undef STATUS_LED_WRONLY
469#endif
470
6d0f6bcf 471#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 1)
aaf224ab 472
6d0f6bcf
JCPV		 473#define STATUS_LED_BASE CONFIG_SYS_NIOS_CPU_PIO1
474#define STATUS_LED_BITS CONFIG_SYS_NIOS_CPU_PIO1_BITS
aaf224ab
WD		 475#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */
476
6d0f6bcf 477#if (CONFIG_SYS_NIOS_CPU_PIO1_TYPE == 1)
aaf224ab
WD		 478#define STATUS_LED_WRONLY 1
479#else
480#undef STATUS_LED_WRONLY
481#endif
482
6d0f6bcf 483#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 2)
aaf224ab 484
6d0f6bcf
JCPV		 485#define STATUS_LED_BASE CONFIG_SYS_NIOS_CPU_PIO2
486#define STATUS_LED_BITS CONFIG_SYS_NIOS_CPU_PIO2_BITS
aaf224ab
WD		 487#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */
488
6d0f6bcf 489#if (CONFIG_SYS_NIOS_CPU_PIO2_TYPE == 1)
aaf224ab
WD		 490#define STATUS_LED_WRONLY 1
491#else
492#undef STATUS_LED_WRONLY
493#endif
494
6d0f6bcf 495#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 3)
aaf224ab 496
6d0f6bcf 497#error *** CONFIG_SYS_ERROR: status LEDs at PIO3 not supported, expand your config.h
aaf224ab 498
6d0f6bcf 499#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 4)
aaf224ab 500
6d0f6bcf 501#error *** CONFIG_SYS_ERROR: status LEDs at PIO4 not supported, expand your config.h
aaf224ab 502
6d0f6bcf 503#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 5)
aaf224ab 504
6d0f6bcf 505#error *** CONFIG_SYS_ERROR: status LEDs at PIO5 not supported, expand your config.h
aaf224ab 506
6d0f6bcf 507#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 6)
aaf224ab 508
6d0f6bcf 509#error *** CONFIG_SYS_ERROR: status LEDs at PIO6 not supported, expand your config.h
aaf224ab 510
6d0f6bcf 511#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 7)
aaf224ab 512
6d0f6bcf 513#error *** CONFIG_SYS_ERROR: status LEDs at PIO7 not supported, expand your config.h
aaf224ab 514
6d0f6bcf 515#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 8)
aaf224ab 516
6d0f6bcf 517#error *** CONFIG_SYS_ERROR: status LEDs at PIO8 not supported, expand your config.h
aaf224ab 518
6d0f6bcf 519#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 9)
aaf224ab 520
6d0f6bcf 521#error *** CONFIG_SYS_ERROR: status LEDs at PIO9 not supported, expand your config.h
aaf224ab
WD		 522
523#else
6d0f6bcf 524#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_LED_PIO in right case
aaf224ab
WD		 525#endif
526
527#define CONFIG_STATUS_LED 1 /* enable status led driver */
528
529#define STATUS_LED_BIT (1 << 0) /* LED[0] */
530#define STATUS_LED_STATE STATUS_LED_BLINKING
531#define STATUS_LED_BOOT_STATE STATUS_LED_OFF
6d0f6bcf 532#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) /* ca. 1 Hz */
aaf224ab
WD		 533#define STATUS_LED_BOOT 0 /* boot LED */
534
535#if (STATUS_LED_BITS > 1)
536#define STATUS_LED_BIT1 (1 << 1) /* LED[1] */
537#define STATUS_LED_STATE1 STATUS_LED_OFF
6d0f6bcf 538#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 10) /* ca. 5 Hz */
aaf224ab
WD		 539#define STATUS_LED_RED 1 /* fail LED */
540#endif
541
542#if (STATUS_LED_BITS > 2)
543#define STATUS_LED_BIT2 (1 << 2) /* LED[2] */
544#define STATUS_LED_STATE2 STATUS_LED_OFF
6d0f6bcf 545#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2) /* ca. 1 Hz */
aaf224ab
WD		 546#define STATUS_LED_YELLOW 2 /* info LED */
547#endif
548
549#if (STATUS_LED_BITS > 3)
550#define STATUS_LED_BIT3 (1 << 3) /* LED[3] */
551#define STATUS_LED_STATE3 STATUS_LED_OFF
6d0f6bcf 552#define STATUS_LED_PERIOD3 (CONFIG_SYS_HZ / 2) /* ca. 1 Hz */
aaf224ab
WD		 553#define STATUS_LED_GREEN 3 /* info LED */
554#endif
555
556#define STATUS_LED_PAR 1 /* makes status_led.h happy */
557
6d0f6bcf 558#endif /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
aaf224ab
WD		 559
560/*------------------------------------------------------------------------
561 * Diagnostics / Power On Self Tests
562 *----------------------------------------------------------------------*/
6d0f6bcf
JCPV		 563#define CONFIG_POST CONFIG_SYS_POST_RTC
564#define CONFIG_SYS_NIOS_POST_WORD_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
aaf224ab 565
11799434
JL		 566/*
567 * BOOTP options
568 */
569#define CONFIG_BOOTP_BOOTFILESIZE
570#define CONFIG_BOOTP_BOOTPATH
571#define CONFIG_BOOTP_GATEWAY
572#define CONFIG_BOOTP_HOSTNAME
573
498ff9a2
JL		 574/*
575 * Command line configuration.
576 */
4e620410
JCPV		 577#include <config_cmd_default.h>
578
579#define CONFIG_CMD_BSP
580#define CONFIG_CMD_CDP
581#define CONFIG_CMD_DHCP
582#define CONFIG_CMD_DIAG
583#define CONFIG_CMD_DISPLAY
584#define CONFIG_CMD_EXT2
585#define CONFIG_CMD_IMMAP
586#define CONFIG_CMD_IRQ
587#define CONFIG_CMD_PING
588#define CONFIG_CMD_PORTIO
589#define CONFIG_CMD_REGINFO
590#define CONFIG_CMD_REISER
591#define CONFIG_CMD_SAVES
592#define CONFIG_CMD_SDRAM
593#define CONFIG_CMD_SNTP
594
498ff9a2 595#undef CONFIG_CMD_NFS
498ff9a2
JL		 596#undef CONFIG_CMD_XIMG
597
6d0f6bcf 598#if (CONFIG_SYS_NIOS_CPU_SPI_NUMS == 1)
4e620410
JCPV		 599#define CONFIG_CMD_DATE
600#define CONFIG_CMD_SPI
498ff9a2
JL		 601#endif
602
aaf224ab
WD		 603/*------------------------------------------------------------------------
604 * KGDB
605 *----------------------------------------------------------------------*/
498ff9a2 606#if defined(CONFIG_CMD_KGDB)
aaf224ab
WD		 607#define CONFIG_KGDB_BAUDRATE 9600
608#endif
609
610/*------------------------------------------------------------------------
611 * MISC
612 *----------------------------------------------------------------------*/
6d0f6bcf
JCPV		 613#define CONFIG_SYS_LONGHELP /* undef to save memory */
614#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser
aaf224ab 615 undef to save memory */
6d0f6bcf
JCPV		 616#define CONFIG_SYS_PROMPT "ADNPESC1 > " /* Monitor Command Prompt */
617#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
618#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
619#define CONFIG_SYS_MAXARGS 64 /* max number of command args*/
620#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
aaf224ab 621
6d0f6bcf
JCPV		 622#ifdef CONFIG_SYS_HUSH_PARSER
623#define CONFIG_SYS_PROMPT_HUSH_PS2 "[]> "
aaf224ab
WD		 624#endif
625
626/* Default load address */
6d0f6bcf 627#if (CONFIG_SYS_SRAM_SIZE != 0)
aaf224ab
WD		 628
629/* default in SRAM */
6d0f6bcf 630#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SRAM_BASE
aaf224ab 631
6d0f6bcf 632#elif (CONFIG_SYS_SDRAM_SIZE != 0)
aaf224ab
WD		 633
634/* default in SDRAM */
6d0f6bcf 635#if (CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE)
aaf224ab 636#if 1
6d0f6bcf 637#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE)
aaf224ab 638#else
6d0f6bcf 639#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x400000)
aaf224ab
WD		 640#endif
641#else
6d0f6bcf 642#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
aaf224ab
WD		 643#endif
644
645#else
6d0f6bcf 646#undef CONFIG_SYS_LOAD_ADDR /* force error break */
aaf224ab
WD		 647#endif
648
aaf224ab 649/* MEM test area */
6d0f6bcf 650#if (CONFIG_SYS_SDRAM_SIZE != 0)
aaf224ab
WD		 651
652/* SDRAM begin to stack area (1MB stack) */
6d0f6bcf 653#if (CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE)
aaf224ab 654#if 0
6d0f6bcf 655#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE)
aaf224ab 656#else
6d0f6bcf 657#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x400000)
aaf224ab
WD		 658#endif
659#else
6d0f6bcf 660#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
aaf224ab
WD		 661#endif
662
6d0f6bcf
JCPV		 663#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - (1024 * 1024))
664#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - (1024 * 1024))
aaf224ab
WD		 665
666#else
6d0f6bcf
JCPV		 667#undef CONFIG_SYS_MEMTEST_START /* force error break */
668#undef CONFIG_SYS_MEMTEST_END
aaf224ab
WD		 669#endif
670
700a0c64
WD		 671/*
672 * JFFS2 partitions
673 *
674 */
675/* No command line, one static partition */
68d7d651 676#undef CONFIG_CMD_MTDPARTS
700a0c64
WD		 677#define CONFIG_JFFS2_DEV "nor"
678#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
679#define CONFIG_JFFS2_PART_OFFSET 0x00000000
680
681/* mtdparts command line support */
682/*
68d7d651 683#define CONFIG_CMD_MTDPARTS
700a0c64
WD		 684#define MTDIDS_DEFAULT ""
685#define MTDPARTS_DEFAULT ""
686*/
aaf224ab
WD		 687
688#endif /* __CONFIG_H */
"Das U-Boot" Source Tree