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rename CFG_ENV macros to CONFIG_ENV
[people/ms/u-boot.git] / include / configs / AP1000.h
CommitLineData
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1/*
2 * AMIRIX.h: AMIRIX specific config options
3 *
4 * Author : Frank Smith (smith at amirix dot com)
5 *
6 * Derived from : other configuration header files in this tree
7 *
8 * This software may be used and distributed according to the terms of
9 * the GNU General Public License (GPL) version 2, incorporated herein by
10 * reference. Drivers based on or derived from this code fall under the GPL
11 * and must retain the authorship, copyright and this license notice. This
12 * file is not a complete program and may only be used when the entire
13 * program is licensed under the GPL.
14 *
15 */
16
17#ifndef __CONFIG_H
18#define __CONFIG_H
19
20/*
21 * High Level Configuration Options
22 * (easy to change)
23 */
24
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25#define CONFIG_405 1 /* This is a PPC405 CPU */
26#define CONFIG_4xx 1 /* ...member of PPC4xx family */
7521af1c 27
f57f70aa 28#define CONFIG_AP1000 1 /* ...on an AP1000 board */
7521af1c 29
f57f70aa 30#define CONFIG_PCI 1
7521af1c 31
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32#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
33#define CFG_PROMPT "0> "
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34#define CFG_PROMPT_HUSH_PS2 "> "
35
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36#define CONFIG_COMMAND_EDIT 1
37#define CONFIG_COMMAND_HISTORY 1
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38#define CONFIG_COMPLETE_ADDRESSES 1
39
5a1aceb0 40#define CONFIG_ENV_IS_IN_FLASH 1
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41#define CFG_FLASH_USE_BUFFER_WRITE
42
9314cee6 43#ifdef CONFIG_ENV_IS_IN_NVRAM
5a1aceb0 44#undef CONFIG_ENV_IS_IN_FLASH
7521af1c 45#else
5a1aceb0 46#ifdef CONFIG_ENV_IS_IN_FLASH
9314cee6 47#undef CONFIG_ENV_IS_IN_NVRAM
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48#endif
49#endif
50
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51#define CONFIG_BAUDRATE 57600
52#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
7521af1c 53
f57f70aa 54#define CONFIG_BOOTCOMMAND "" /* autoboot command */
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55
56/* Size (bytes) of interrupt driven serial port buffer.
57 * Set to 0 to use polling instead of interrupts.
58 * Setting to 0 will also disable RTS/CTS handshaking.
59 */
3df5bea0 60#undef CONFIG_SERIAL_SOFTWARE_FIFO
7521af1c 61
f57f70aa 62#define CONFIG_BOOTARGS "console=ttyS0,57600"
7521af1c 63
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64#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
65#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
7521af1c 66
498ff9a2 67
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68/*
69 * BOOTP options
70 */
71#define CONFIG_BOOTP_BOOTFILESIZE
72#define CONFIG_BOOTP_BOOTPATH
73#define CONFIG_BOOTP_GATEWAY
74#define CONFIG_BOOTP_HOSTNAME
75
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76/*
77 * Command line configuration.
78 */
79#include <config_cmd_default.h>
80
81#define CONFIG_CMD_ASKENV
82#define CONFIG_CMD_DHCP
83#define CONFIG_CMD_ELF
84#define CONFIG_CMD_IRQ
85#define CONFIG_CMD_MVENV
86#define CONFIG_CMD_PCI
87#define CONFIG_CMD_PING
88
7521af1c 89
f57f70aa 90#undef CONFIG_WATCHDOG /* watchdog disabled */
7521af1c 91
f57f70aa 92#define CONFIG_SYS_CLK_FREQ 30000000
7521af1c 93
f57f70aa 94#define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
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95
96/*
97 * Miscellaneous configurable options
98 */
f57f70aa 99#define CFG_LONGHELP /* undef to save memory */
498ff9a2 100#if defined(CONFIG_CMD_KGDB)
f57f70aa 101#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
7521af1c 102#else
f57f70aa 103#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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104#endif
105/* usually: (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) */
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106#define CFG_PBSIZE (CFG_CBSIZE+4+16) /* Print Buffer Size */
107#define CFG_MAXARGS 16 /* max number of command args */
108#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
7521af1c 109
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110#define CFG_ALT_MEMTEST 1
111#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
112#define CFG_MEMTEST_END 0x01000000 /* 4 ... 16 MB in DRAM */
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113
114/*
115 * If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1.
116 * If CFG_405_UART_ERRATA_59, then UART divisor is 31.
117 * Otherwise, UART divisor is determined by CPU Clock and CFG_BASE_BAUD value.
118 * The Linux BASE_BAUD define should match this configuration.
119 * baseBaud = cpuClock/(uartDivisor*16)
120 * If CFG_405_UART_ERRATA_59 and 200MHz CPU clock,
121 * set Linux BASE_BAUD to 403200.
122 */
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123#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */
124#undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
125
126#define CFG_NS16550_CLK 40000000
127#define CFG_DUART_CHAN 0
128#define CFG_NS16550_COM1 (0x4C000000 + 0x1000)
129#define CFG_NS16550_COM2 (0x4C800000 + 0x1000)
130#define CFG_NS16550_REG_SIZE 4
131#define CFG_NS16550 1
132#define CFG_INIT_CHAN1 1
133#define CFG_INIT_CHAN2 0
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134
135/* The following table includes the supported baudrates */
136#define CFG_BAUDRATE_TABLE \
137 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
138
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139#define CFG_LOAD_ADDR 0x00200000 /* default load address */
140#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
7521af1c 141
f57f70aa 142#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
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143
144/*-----------------------------------------------------------------------
145 * Start addresses for the final memory configuration
146 * (Set up by the startup code)
147 * Please note that CFG_SDRAM_BASE _must_ start at 0
148 */
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149#define CFG_SDRAM_BASE 0x00000000
150#define CFG_FLASH_BASE 0x20000000
151#define CFG_MONITOR_BASE TEXT_BASE
152#define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
153#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
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154
155/*
156 * For booting Linux, the board info and command line data
157 * have to be in the first 8 MB of memory, since this is
158 * the maximum mapped by the Linux kernel during initialization.
159 */
f57f70aa 160#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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161/*-----------------------------------------------------------------------
162 * FLASH organization
163 */
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164#define CFG_FLASH_CFI 1
165#define CFG_PROGFLASH_BASE CFG_FLASH_BASE
166#define CFG_CONFFLASH_BASE 0x24000000
7521af1c 167
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168#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
169#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
7521af1c 170
3df5bea0 171#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
f57f70aa 172#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
7521af1c 173
f57f70aa 174#define CFG_FLASH_PROTECTION 1 /* use hardware protection */
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175
176/* BEG ENVIRONNEMENT FLASH */
5a1aceb0 177#ifdef CONFIG_ENV_IS_IN_FLASH
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178#define CONFIG_ENV_OFFSET 0x00040000 /* Offset of Environment Sector */
179#define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
180#define CONFIG_ENV_SECT_SIZE 0x20000 /* see README - env sector total size */
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181#endif
182/* END ENVIRONNEMENT FLASH */
183/*-----------------------------------------------------------------------
184 * NVRAM organization
185 */
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186#define CFG_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
187#define CFG_NVRAM_SIZE 0x1ff8 /* NVRAM size */
7521af1c 188
9314cee6 189#ifdef CONFIG_ENV_IS_IN_NVRAM
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190#define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */
191#define CONFIG_ENV_ADDR \
192 (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */
7521af1c 193#endif
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194
195/*
196 * Init Memory Controller:
197 *
198 * BR0/1 and OR0/1 (FLASH)
199 */
200
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201#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
202#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
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203
204/* Configuration Port location */
f57f70aa 205#define CONFIG_PORT_ADDR 0xF0000500
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206
207/*-----------------------------------------------------------------------
208 * Definitions for initial stack pointer and data area (in DPRAM)
209 */
210
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211#define CFG_INIT_RAM_ADDR 0x400000 /* inside of SDRAM */
212#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
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213#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
214#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
3df5bea0 215#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
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216
217/*-----------------------------------------------------------------------
218 * Definitions for Serial Presence Detect EEPROM address
219 * (to get SDRAM settings)
220 */
3df5bea0 221#define SPD_EEPROM_ADDRESS 0x50
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222
223/*
224 * Internal Definitions
225 *
226 * Boot Flags
227 */
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228#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
229#define BOOTFLAG_WARM 0x02 /* Software reboot */
7521af1c 230
498ff9a2 231#if defined(CONFIG_CMD_KGDB)
3df5bea0 232#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
f57f70aa 233#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
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234#endif
235
236/* JFFS2 stuff */
237
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238#define CFG_JFFS2_FIRST_BANK 0
239#define CFG_JFFS2_NUM_BANKS 1
240#define CFG_JFFS2_FIRST_SECTOR 1
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241
242#define CONFIG_NET_MULTI
243#define CONFIG_E1000
244
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245#define CFG_ETH_DEV_FN 0x0800
246#define CFG_ETH_IOBASE 0x31000000
247#define CFG_ETH_MEMBASE 0x32000000
7521af1c 248
3df5bea0 249#endif /* __CONFIG_H */