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0f8c9768 WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
c837dcb1 | 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
0f8c9768 WD |
16 | * GNU General Public License for more details. |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | /* | |
25 | * board/config.h - configuration options, board specific | |
26 | */ | |
27 | ||
28 | #ifndef __CONFIG_H | |
29 | #define __CONFIG_H | |
30 | ||
31 | /* | |
32 | * High Level Configuration Options | |
33 | * (easy to change) | |
34 | */ | |
35 | ||
36 | #define CONFIG_IOP480 1 /* This is a IOP480 CPU */ | |
c837dcb1 | 37 | #define CONFIG_DASA_SIM 1 /* ...on a DASA_SIM board */ |
0f8c9768 | 38 | |
2ae18241 | 39 | #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 |
2ced53e1 | 40 | #define CONFIG_SYS_LDSCRIPT "board/esd/dasa_sim/u-boot.lds" |
2ae18241 | 41 | |
c837dcb1 | 42 | #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ |
0f8c9768 | 43 | |
c837dcb1 | 44 | #define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ |
0f8c9768 | 45 | |
c837dcb1 WD |
46 | #define CONFIG_CPUCLOCK 66 |
47 | #define CONFIG_BUSCLOCK (CONFIG_CPUCLOCK) | |
0f8c9768 | 48 | |
c837dcb1 | 49 | #define CONFIG_BAUDRATE 9600 |
0f8c9768 WD |
50 | #define CONFIG_BOOTDELAY 3 /* autoboot after 5 seconds */ |
51 | #define CONFIG_BOOTCOMMAND "bootm ffe00000" /* autoboot command */ | |
52 | ||
c837dcb1 | 53 | #undef CONFIG_BOOTARGS |
0f8c9768 WD |
54 | |
55 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ | |
6d0f6bcf | 56 | #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
0f8c9768 WD |
57 | |
58 | #undef CONFIG_WATCHDOG /* watchdog disabled */ | |
59 | ||
60 | #define CONFIG_IPADDR 10.0.18.222 | |
61 | #define CONFIG_SERVERIP 10.0.18.190 | |
62 | ||
3c3227f3 | 63 | |
11799434 JL |
64 | /* |
65 | * BOOTP options | |
66 | */ | |
67 | #define CONFIG_BOOTP_BOOTFILESIZE | |
68 | #define CONFIG_BOOTP_BOOTPATH | |
69 | #define CONFIG_BOOTP_GATEWAY | |
70 | #define CONFIG_BOOTP_HOSTNAME | |
71 | ||
72 | ||
3c3227f3 JL |
73 | /* |
74 | * Command line configuration. | |
75 | */ | |
76 | #include <config_cmd_default.h> | |
77 | ||
78 | #define CONFIG_CMD_BSP | |
79 | ||
0f8c9768 WD |
80 | |
81 | #if 0 /* Does not appear to be used?! If it is used, needs to be fixed */ | |
82 | #define CONFIG_SOFT_I2C /* Software I2C support enabled */ | |
83 | #endif | |
6d0f6bcf | 84 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ |
0f8c9768 | 85 | |
0f8c9768 WD |
86 | /* |
87 | * Miscellaneous configurable options | |
88 | */ | |
6d0f6bcf JCPV |
89 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
90 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ | |
3c3227f3 | 91 | #if defined(CONFIG_CMD_KGDB) |
6d0f6bcf | 92 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
0f8c9768 | 93 | #else |
6d0f6bcf | 94 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
0f8c9768 | 95 | #endif |
6d0f6bcf JCPV |
96 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
97 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
98 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
0f8c9768 | 99 | |
6d0f6bcf | 100 | #define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* don't print console @ startup*/ |
0f8c9768 | 101 | |
6d0f6bcf JCPV |
102 | #define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ |
103 | #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ | |
0f8c9768 WD |
104 | |
105 | /* The following table includes the supported baudrates */ | |
6d0f6bcf | 106 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
8bde7f77 | 107 | { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 } |
0f8c9768 | 108 | |
6d0f6bcf | 109 | #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ |
0f8c9768 | 110 | |
6d0f6bcf | 111 | #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ |
0f8c9768 WD |
112 | |
113 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ | |
114 | ||
115 | /*----------------------------------------------------------------------- | |
116 | * Definitions for initial stack pointer and data area (in DPRAM) | |
117 | */ | |
6d0f6bcf | 118 | #define CONFIG_SYS_INIT_RAM_ADDR 0x00df0000 /* inside of SDRAM */ |
553f0982 | 119 | #define CONFIG_SYS_INIT_RAM_SIZE 0x0f00 /* Size of used area in RAM */ |
25ddd1fb | 120 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
6d0f6bcf | 121 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
0f8c9768 WD |
122 | |
123 | /*----------------------------------------------------------------------- | |
124 | * Start addresses for the final memory configuration | |
125 | * (Set up by the startup code) | |
6d0f6bcf | 126 | * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 |
0f8c9768 | 127 | */ |
6d0f6bcf | 128 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
2f103ee2 | 129 | #define CONFIG_SYS_FLASH_BASE 0xFFFC0000 |
6d0f6bcf | 130 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
2f103ee2 | 131 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 128 kB for Monitor */ |
6d0f6bcf | 132 | #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ |
0f8c9768 WD |
133 | |
134 | /* | |
135 | * For booting Linux, the board info and command line data | |
136 | * have to be in the first 8 MB of memory, since this is | |
137 | * the maximum mapped by the Linux kernel during initialization. | |
138 | */ | |
6d0f6bcf | 139 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
0f8c9768 WD |
140 | /*----------------------------------------------------------------------- |
141 | * FLASH organization | |
142 | */ | |
6d0f6bcf JCPV |
143 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
144 | #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ | |
0f8c9768 | 145 | |
6d0f6bcf JCPV |
146 | #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
147 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ | |
0f8c9768 | 148 | |
6d0f6bcf JCPV |
149 | #define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size (width) */ |
150 | #define CONFIG_SYS_FLASH_ADDR0 0x0AA9 /* 1st address for flash config cycles */ | |
151 | #define CONFIG_SYS_FLASH_ADDR1 0x0556 /* 2nd address for flash config cycles */ | |
0f8c9768 WD |
152 | /* |
153 | * The following defines are added for buggy IOP480 byte interface. | |
154 | * All other boards should use the standard values (CPCI405 etc.) | |
155 | */ | |
6d0f6bcf JCPV |
156 | #define CONFIG_SYS_FLASH_READ0 0x0002 /* 0 is standard */ |
157 | #define CONFIG_SYS_FLASH_READ1 0x0000 /* 1 is standard */ | |
158 | #define CONFIG_SYS_FLASH_READ2 0x0004 /* 2 is standard */ | |
0f8c9768 | 159 | |
6d0f6bcf | 160 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ |
0f8c9768 | 161 | |
5a1aceb0 | 162 | #define CONFIG_ENV_IS_IN_FLASH 1 |
0e8d1586 JCPV |
163 | #define CONFIG_ENV_OFFSET 0x00010000 /* Offset of Environment Sector */ |
164 | #define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ | |
0f8c9768 WD |
165 | |
166 | #if 0 | |
0e8d1586 | 167 | #define CONFIG_ENV_SECT_SIZE 0x8000 /* see README - env sector total size */ |
0f8c9768 | 168 | #else |
0e8d1586 | 169 | #define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */ |
0f8c9768 WD |
170 | #endif |
171 | ||
172 | /*----------------------------------------------------------------------- | |
173 | * PCI stuff | |
174 | */ | |
175 | #define CONFIG_PCI /* include pci support */ | |
176 | #undef CONFIG_PCI_PNP | |
177 | ||
c837dcb1 | 178 | #define CONFIG_NET_MULTI /* Multi ethernet cards support */ |
0f8c9768 WD |
179 | |
180 | #define CONFIG_TULIP | |
181 | ||
6d0f6bcf JCPV |
182 | #define CONFIG_SYS_ETH_DEV_FN 0x0000 |
183 | #define CONFIG_SYS_ETH_IOBASE 0x0fff0000 | |
184 | #define CONFIG_SYS_PCI9054_DEV_FN 0x0800 | |
185 | #define CONFIG_SYS_PCI9054_IOBASE 0x0eff0000 | |
0f8c9768 | 186 | |
0f8c9768 WD |
187 | /* |
188 | * Init Memory Controller: | |
189 | * | |
190 | * BR0/1 and OR0/1 (FLASH) | |
191 | */ | |
192 | ||
193 | #define FLASH_BASE0_PRELIM 0xFFE00000 /* FLASH bank #0 */ | |
194 | ||
0f8c9768 | 195 | #endif /* __CONFIG_H */ |