projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| c935d3bd WD |
1 | /* |
| 2 | * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net> | |
| 3 | * Stephan Linz <linz@li-pro.net> | |
| 4 | * | |
| 5 | * See file CREDITS for list of people who contributed to this | |
| 6 | * project. | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or | |
| 9 | * modify it under the terms of the GNU General Public License as | |
| 10 | * published by the Free Software Foundation; either version 2 of | |
| 11 | * the License, or (at your option) any later version. | |
| 12 | * | |
| 13 | * This program is distributed in the hope that it will be useful, | |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | * GNU General Public License for more details. | |
| 17 | * | |
| 18 | * You should have received a copy of the GNU General Public License | |
| 19 | * along with this program; if not, write to the Free Software | |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 21 | * MA 02111-1307 USA | |
| 22 | */ | |
| 23 | ||
| 24 | #ifndef __CONFIG_H | |
| 25 | #define __CONFIG_H | |
| 26 | ||
| ec4c544b WD |
27 | /*********************************************************************** |
| 28 | * Include the whole NIOS CPU configuration. | |
| c935d3bd | 29 | * |
| ec4c544b | 30 | * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!! |
| c935d3bd | 31 | * |
| ec4c544b | 32 | ***********************************************************************/ |
| c935d3bd WD |
33 | |
| 34 | #if defined(CONFIG_NIOS_SAFE_32) | |
| ec4c544b | 35 | #include <configs/DK1S10_safe_32.h> |
| c935d3bd | 36 | #elif defined(CONFIG_NIOS_STANDARD_32) |
| ec4c544b WD |
37 | #include <configs/DK1S10_standard_32.h> |
| 38 | #elif defined(CONFIG_NIOS_MTX_LDK_20) | |
| 39 | #include <configs/DK1S10_mtx_ldk_20.h> | |
| c935d3bd | 40 | #else |
| 6d0f6bcf | 41 | #error *** CONFIG_SYS_ERROR: you have to setup right NIOS CPU configuration |
| c935d3bd WD |
42 | #endif |
| 43 | ||
| 44 | /*------------------------------------------------------------------------ | |
| 45 | * BOARD/CPU -- TOP-LEVEL | |
| 46 | *----------------------------------------------------------------------*/ | |
| 47 | #define CONFIG_NIOS 1 /* NIOS-32 core */ | |
| 48 | #define CONFIG_DK1S10 1 /* Stratix DK-1S10 board*/ | |
| 6d0f6bcf JCPV |
49 | #define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */ |
| 50 | #define CONFIG_SYS_HZ 1000 /* 1 msec time tick */ | |
| c837dcb1 | 51 | #define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ |
| c935d3bd WD |
52 | |
| 53 | /*------------------------------------------------------------------------ | |
| 54 | * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM) | |
| 55 | *----------------------------------------------------------------------*/ | |
| 6d0f6bcf | 56 | #if (CONFIG_SYS_NIOS_CPU_SDRAM_SIZE != 0) |
| c935d3bd | 57 | |
| 6d0f6bcf JCPV |
58 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_NIOS_CPU_SDRAM_BASE |
| 59 | #define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_NIOS_CPU_SDRAM_SIZE | |
| c935d3bd WD |
60 | |
| 61 | #else | |
| 6d0f6bcf | 62 | #error *** CONFIG_SYS_ERROR: you have to setup any SDRAM in NIOS CPU config |
| c935d3bd WD |
63 | #endif |
| 64 | ||
| 6d0f6bcf | 65 | #if defined(CONFIG_SYS_NIOS_CPU_SRAM_BASE) && defined(CONFIG_SYS_NIOS_CPU_SRAM_SIZE) |
| ec4c544b | 66 | |
| 6d0f6bcf JCPV |
67 | #define CONFIG_SYS_SRAM_BASE CONFIG_SYS_NIOS_CPU_SRAM_BASE |
| 68 | #define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_NIOS_CPU_SRAM_SIZE | |
| ec4c544b WD |
69 | |
| 70 | #else | |
| 71 | ||
| 6d0f6bcf JCPV |
72 | #undef CONFIG_SYS_SRAM_BASE |
| 73 | #undef CONFIG_SYS_SRAM_SIZE | |
| ec4c544b WD |
74 | |
| 75 | #endif | |
| 76 | ||
| 6d0f6bcf | 77 | #define CONFIG_SYS_VECT_BASE CONFIG_SYS_NIOS_CPU_VEC_BASE |
| c935d3bd WD |
78 | |
| 79 | /*------------------------------------------------------------------------ | |
| 80 | * MEMORY ORGANIZATION - For the most part, you can put things pretty | |
| 81 | * much anywhere. This is pretty flexible for Nios. So here we make some | |
| 82 | * arbitrary choices & assume that the monitor is placed at the end of | |
| 83 | * a memory resource (so you must make sure TEXT_BASE is chosen | |
| 84 | * appropriately). | |
| 85 | * | |
| 53677ef1 WD |
86 | * -The heap is placed below the monitor. |
| 87 | * -Global data is placed below the heap. | |
| 88 | * -The stack is placed below global data (&grows down). | |
| c935d3bd | 89 | *----------------------------------------------------------------------*/ |
| 6d0f6bcf JCPV |
90 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256k */ |
| 91 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/ | |
| 92 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) | |
| c935d3bd | 93 | |
| 6d0f6bcf JCPV |
94 | #define CONFIG_SYS_MONITOR_BASE TEXT_BASE |
| 95 | #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) | |
| 96 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE) | |
| 97 | #define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET | |
| c935d3bd WD |
98 | |
| 99 | /*------------------------------------------------------------------------ | |
| 100 | * FLASH (AM29LV065D) | |
| 101 | *----------------------------------------------------------------------*/ | |
| 6d0f6bcf | 102 | #if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0) |
| c935d3bd | 103 | |
| 6d0f6bcf JCPV |
104 | #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_NIOS_CPU_FLASH_BASE |
| 105 | #define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_NIOS_CPU_FLASH_SIZE | |
| 106 | #define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */ | |
| 107 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */ | |
| 108 | #define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */ | |
| 109 | #define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */ | |
| 110 | #define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size */ | |
| c935d3bd WD |
111 | |
| 112 | #else | |
| 6d0f6bcf | 113 | #error *** CONFIG_SYS_ERROR: you have to setup any Flash memory in NIOS CPU config |
| c935d3bd WD |
114 | #endif |
| 115 | ||
| 116 | /*------------------------------------------------------------------------ | |
| 117 | * ENVIRONMENT | |
| 118 | *----------------------------------------------------------------------*/ | |
| 6d0f6bcf | 119 | #if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0) |
| c935d3bd | 120 | |
| 5a1aceb0 | 121 | #define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */ |
| ec4c544b WD |
122 | |
| 123 | #if defined(CONFIG_NIOS_STANDARD_32) | |
| 6d0f6bcf | 124 | #define CONFIG_ENV_ADDR CONFIG_SYS_FLASH_BASE /* Mem addr of env */ |
| ec4c544b | 125 | #elif defined(CONFIG_NIOS_MTX_LDK_20) |
| 6d0f6bcf | 126 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) |
| ec4c544b | 127 | #else |
| 6d0f6bcf | 128 | #error *** CONFIG_SYS_ERROR: you have to setup the environment base address CONFIG_ENV_ADDR |
| ec4c544b WD |
129 | #endif |
| 130 | ||
| 0e8d1586 | 131 | #define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */ |
| c935d3bd WD |
132 | #define CONFIG_ENV_OVERWRITE /* Serial/eth change Ok */ |
| 133 | ||
| 134 | #else | |
| 93f6d725 | 135 | #define CONFIG_ENV_IS_NOWHERE 1 /* NO Environment */ |
| c935d3bd WD |
136 | #endif |
| 137 | ||
| 138 | /*------------------------------------------------------------------------ | |
| 139 | * CONSOLE | |
| 140 | *----------------------------------------------------------------------*/ | |
| 6d0f6bcf | 141 | #if (CONFIG_SYS_NIOS_CPU_UART_NUMS != 0) |
| c935d3bd | 142 | |
| 6d0f6bcf | 143 | #define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_NIOS_CPU_UART0 /* 1st UART is Cons. */ |
| b54d32b4 | 144 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
| c935d3bd | 145 | |
| 6d0f6bcf JCPV |
146 | #if (CONFIG_SYS_NIOS_CPU_UART0_BR != 0) |
| 147 | #define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */ | |
| 148 | #define CONFIG_BAUDRATE CONFIG_SYS_NIOS_CPU_UART0_BR | |
| c935d3bd | 149 | #else |
| 6d0f6bcf | 150 | #undef CONFIG_SYS_NIOS_FIXEDBAUD |
| c935d3bd WD |
151 | #define CONFIG_BAUDRATE 115200 |
| 152 | #endif | |
| 153 | ||
| 6d0f6bcf | 154 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
| c935d3bd WD |
155 | |
| 156 | #else | |
| 6d0f6bcf | 157 | #error *** CONFIG_SYS_ERROR: you have to setup at least one UART in NIOS CPU config |
| c935d3bd WD |
158 | #endif |
| 159 | ||
| 160 | /*------------------------------------------------------------------------ | |
| 161 | * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc PIT, | |
| 162 | * so an avalon bus timer is required. | |
| 163 | *----------------------------------------------------------------------*/ | |
| 6d0f6bcf | 164 | #if (CONFIG_SYS_NIOS_CPU_TIMER_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_TICK_TIMER) |
| c935d3bd | 165 | |
| 6d0f6bcf | 166 | #if (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 0) |
| c935d3bd | 167 | |
| 6d0f6bcf JCPV |
168 | #define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER0 /* TIMER0 as tick */ |
| 169 | #define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER0_IRQ | |
| ec4c544b | 170 | |
| 6d0f6bcf | 171 | #if (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 1) /* fixed period */ |
| 63e73c9a | 172 | |
| 6d0f6bcf JCPV |
173 | #if (CONFIG_SYS_NIOS_CPU_TIMER0_PER >= CONFIG_SYS_HZ) |
| 174 | #define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER0_PER / CONFIG_SYS_HZ) | |
| ec4c544b | 175 | #else |
| 6d0f6bcf | 176 | #error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ |
| 63e73c9a WD |
177 | #endif |
| 178 | ||
| 6d0f6bcf | 179 | #undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */ |
| 63e73c9a | 180 | |
| 6d0f6bcf | 181 | #elif (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 0) /* variable period */ |
| 63e73c9a | 182 | |
| 6d0f6bcf JCPV |
183 | #if (CONFIG_SYS_HZ <= 1000) |
| 184 | #define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ) | |
| 63e73c9a | 185 | #else |
| 6d0f6bcf | 186 | #error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000 |
| 63e73c9a WD |
187 | #endif |
| 188 | ||
| 6d0f6bcf | 189 | #define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) |
| 63e73c9a WD |
190 | |
| 191 | #else | |
| 6d0f6bcf | 192 | #error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER0_FP correct |
| ec4c544b | 193 | #endif |
| c935d3bd | 194 | |
| 6d0f6bcf | 195 | #elif (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 1) |
| c935d3bd | 196 | |
| 6d0f6bcf JCPV |
197 | #define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER1 /* TIMER1 as tick */ |
| 198 | #define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER1_IRQ | |
| c935d3bd | 199 | |
| 6d0f6bcf | 200 | #if (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 1) /* fixed period */ |
| 63e73c9a | 201 | |
| 6d0f6bcf JCPV |
202 | #if (CONFIG_SYS_NIOS_CPU_TIMER1_PER >= CONFIG_SYS_HZ) |
| 203 | #define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER1_PER / CONFIG_SYS_HZ) | |
| c935d3bd | 204 | #else |
| 6d0f6bcf | 205 | #error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ |
| 63e73c9a WD |
206 | #endif |
| 207 | ||
| 6d0f6bcf | 208 | #undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */ |
| 63e73c9a | 209 | |
| 6d0f6bcf | 210 | #elif (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 0) /* variable period */ |
| 63e73c9a | 211 | |
| 6d0f6bcf JCPV |
212 | #if (CONFIG_SYS_HZ <= 1000) |
| 213 | #define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ) | |
| 63e73c9a | 214 | #else |
| 6d0f6bcf | 215 | #error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000 |
| 63e73c9a WD |
216 | #endif |
| 217 | ||
| 6d0f6bcf | 218 | #define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) |
| 63e73c9a WD |
219 | |
| 220 | #else | |
| 6d0f6bcf | 221 | #error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER1_FP correct |
| c935d3bd WD |
222 | #endif |
| 223 | ||
| 6d0f6bcf | 224 | #endif /* CONFIG_SYS_NIOS_CPU_TICK_TIMER */ |
| c935d3bd WD |
225 | |
| 226 | #else | |
| 6d0f6bcf | 227 | #error *** CONFIG_SYS_ERROR: you have to setup at least one TIMER in NIOS CPU config |
| c935d3bd WD |
228 | #endif |
| 229 | ||
| 230 | /*------------------------------------------------------------------------ | |
| 231 | * Ethernet -- needs work! | |
| 232 | *----------------------------------------------------------------------*/ | |
| 6d0f6bcf | 233 | #if (CONFIG_SYS_NIOS_CPU_LAN_NUMS == 1) |
| c935d3bd | 234 | |
| 6d0f6bcf | 235 | #if (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 0) /* LAN91C111 */ |
| c935d3bd | 236 | |
| c935d3bd WD |
237 | #define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ |
| 238 | #undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ | |
| 6d0f6bcf | 239 | #define CONFIG_SMC91111_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS) |
| c935d3bd | 240 | |
| 6d0f6bcf | 241 | #if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32) |
| c935d3bd WD |
242 | #define CONFIG_SMC_USE_32_BIT 1 |
| 243 | #else /* no */ | |
| 244 | #undef CONFIG_SMC_USE_32_BIT | |
| 245 | #endif | |
| 246 | ||
| 6d0f6bcf | 247 | #elif (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 1) /* CS8900A */ |
| c935d3bd WD |
248 | |
| 249 | /********************************************/ | |
| 250 | /* !!! CS8900 is __not__ tested on NIOS !!! */ | |
| 251 | /********************************************/ | |
| b1c0eaac BW |
252 | #define CONFIG_NET_MULTI |
| 253 | #define CONFIG_CS8900 /* Using CS8900 */ | |
| 254 | #define CONFIG_CS8900_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + \ | |
| 255 | CONFIG_SYS_NIOS_CPU_LAN0_OFFS) | |
| c935d3bd | 256 | |
| 6d0f6bcf | 257 | #if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32) |
| b1c0eaac BW |
258 | #undef CONFIG_CS8900_BUS16 |
| 259 | #define CONFIG_CS8900_BUS32 | |
| c935d3bd | 260 | #else /* no */ |
| b1c0eaac BW |
261 | #define CONFIG_CS8900_BUS16 |
| 262 | #undef CONFIG_CS8900_BUS32 | |
| c935d3bd WD |
263 | #endif |
| 264 | ||
| 265 | #else | |
| 6d0f6bcf | 266 | #error *** CONFIG_SYS_ERROR: invalid LAN0 chip type, check your NIOS CPU config |
| c935d3bd WD |
267 | #endif |
| 268 | ||
| 269 | #define CONFIG_ETHADDR 08:00:3e:26:0a:5b | |
| 270 | #define CONFIG_NETMASK 255.255.255.0 | |
| 271 | #define CONFIG_IPADDR 192.168.2.21 | |
| 272 | #define CONFIG_SERVERIP 192.168.2.16 | |
| 273 | ||
| 274 | #else | |
| 6d0f6bcf | 275 | #error *** CONFIG_SYS_ERROR: you have to setup just one LAN only or expand your config.h |
| c935d3bd WD |
276 | #endif |
| 277 | ||
| 278 | /*------------------------------------------------------------------------ | |
| 279 | * STATUS LEDs | |
| 280 | *----------------------------------------------------------------------*/ | |
| 6d0f6bcf | 281 | #if (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_LED_PIO) |
| c935d3bd | 282 | |
| 6d0f6bcf | 283 | #if (CONFIG_SYS_NIOS_CPU_LED_PIO == 0) |
| c935d3bd | 284 | |
| 6d0f6bcf | 285 | #error *** CONFIG_SYS_ERROR: status LEDs at PIO0 not supported, expand your config.h |
| c935d3bd | 286 | |
| 6d0f6bcf | 287 | #elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 1) |
| c935d3bd | 288 | |
| 6d0f6bcf | 289 | #error *** CONFIG_SYS_ERROR: status LEDs at PIO1 not supported, expand your config.h |
| c935d3bd | 290 | |
| 6d0f6bcf | 291 | #elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 2) |
| c935d3bd | 292 | |
| 6d0f6bcf JCPV |
293 | #define STATUS_LED_BASE CONFIG_SYS_NIOS_CPU_PIO2 |
| 294 | #define STATUS_LED_BITS CONFIG_SYS_NIOS_CPU_PIO2_BITS | |
| c935d3bd WD |
295 | #define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */ |
| 296 | ||
| 6d0f6bcf | 297 | #if (CONFIG_SYS_NIOS_CPU_PIO2_TYPE == 1) |
| c935d3bd WD |
298 | #define STATUS_LED_WRONLY 1 |
| 299 | #else | |
| 300 | #undef STATUS_LED_WRONLY | |
| 301 | #endif | |
| 302 | ||
| 6d0f6bcf | 303 | #elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 3) |
| c935d3bd | 304 | |
| 6d0f6bcf | 305 | #error *** CONFIG_SYS_ERROR: status LEDs at PIO3 not supported, expand your config.h |
| c935d3bd | 306 | |
| 6d0f6bcf | 307 | #elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 4) |
| c935d3bd | 308 | |
| 6d0f6bcf | 309 | #error *** CONFIG_SYS_ERROR: status LEDs at PIO4 not supported, expand your config.h |
| c935d3bd | 310 | |
| 6d0f6bcf | 311 | #elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 5) |
| c935d3bd | 312 | |
| 6d0f6bcf | 313 | #error *** CONFIG_SYS_ERROR: status LEDs at PIO5 not supported, expand your config.h |
| c935d3bd | 314 | |
| 6d0f6bcf | 315 | #elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 6) |
| c935d3bd | 316 | |
| 6d0f6bcf | 317 | #error *** CONFIG_SYS_ERROR: status LEDs at PIO6 not supported, expand your config.h |
| c935d3bd | 318 | |
| 6d0f6bcf | 319 | #elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 7) |
| c935d3bd | 320 | |
| 6d0f6bcf | 321 | #error *** CONFIG_SYS_ERROR: status LEDs at PIO7 not supported, expand your config.h |
| c935d3bd | 322 | |
| 6d0f6bcf | 323 | #elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 8) |
| c935d3bd | 324 | |
| 6d0f6bcf | 325 | #error *** CONFIG_SYS_ERROR: status LEDs at PIO8 not supported, expand your config.h |
| c935d3bd | 326 | |
| 6d0f6bcf | 327 | #elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 9) |
| c935d3bd | 328 | |
| 6d0f6bcf | 329 | #error *** CONFIG_SYS_ERROR: status LEDs at PIO9 not supported, expand your config.h |
| c935d3bd WD |
330 | |
| 331 | #else | |
| 6d0f6bcf | 332 | #error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_LED_PIO in right case |
| c935d3bd WD |
333 | #endif |
| 334 | ||
| 335 | #define CONFIG_STATUS_LED 1 /* enable status led driver */ | |
| 336 | ||
| 337 | #define STATUS_LED_BIT (1 << 0) /* LED[0] */ | |
| 338 | #define STATUS_LED_STATE STATUS_LED_BLINKING | |
| 339 | #define STATUS_LED_BOOT_STATE STATUS_LED_OFF | |
| 6d0f6bcf | 340 | #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */ |
| c935d3bd WD |
341 | #define STATUS_LED_BOOT 0 /* boot LED */ |
| 342 | ||
| 343 | #if (STATUS_LED_BITS > 1) | |
| 344 | #define STATUS_LED_BIT1 (1 << 1) /* LED[1] */ | |
| 345 | #define STATUS_LED_STATE1 STATUS_LED_OFF | |
| 6d0f6bcf | 346 | #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 50) /* ca. 5 Hz */ |
| c935d3bd WD |
347 | #define STATUS_LED_RED 1 /* fail LED */ |
| 348 | #endif | |
| 349 | ||
| 350 | #if (STATUS_LED_BITS > 2) | |
| 351 | #define STATUS_LED_BIT2 (1 << 2) /* LED[2] */ | |
| 352 | #define STATUS_LED_STATE2 STATUS_LED_OFF | |
| 6d0f6bcf | 353 | #define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */ |
| c935d3bd WD |
354 | #define STATUS_LED_YELLOW 2 /* info LED */ |
| 355 | #endif | |
| 356 | ||
| 357 | #if (STATUS_LED_BITS > 3) | |
| 358 | #define STATUS_LED_BIT3 (1 << 3) /* LED[3] */ | |
| 359 | #define STATUS_LED_STATE3 STATUS_LED_OFF | |
| 6d0f6bcf | 360 | #define STATUS_LED_PERIOD3 (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */ |
| c935d3bd WD |
361 | #define STATUS_LED_GREEN 3 /* info LED */ |
| 362 | #endif | |
| 363 | ||
| 364 | #define STATUS_LED_PAR 1 /* makes status_led.h happy */ | |
| 365 | ||
| 6d0f6bcf | 366 | #endif /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */ |
| c935d3bd WD |
367 | |
| 368 | /*------------------------------------------------------------------------ | |
| 369 | * SEVEN SEGMENT LED DISPLAY | |
| 370 | *----------------------------------------------------------------------*/ | |
| 6d0f6bcf | 371 | #if (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO) |
| c935d3bd | 372 | |
| 6d0f6bcf | 373 | #if (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 0) |
| c935d3bd | 374 | |
| 6d0f6bcf | 375 | #error *** CONFIG_SYS_ERROR: seven segment display at PIO0 not supported, expand your config.h |
| c935d3bd | 376 | |
| 6d0f6bcf | 377 | #elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 1) |
| c935d3bd | 378 | |
| 6d0f6bcf | 379 | #error *** CONFIG_SYS_ERROR: seven segment display at PIO1 not supported, expand your config.h |
| c935d3bd | 380 | |
| 6d0f6bcf | 381 | #elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 2) |
| c935d3bd | 382 | |
| 6d0f6bcf | 383 | #error *** CONFIG_SYS_ERROR: seven segment display at PIO2 not supported, expand your config.h |
| c935d3bd | 384 | |
| 6d0f6bcf | 385 | #elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 3) |
| c935d3bd | 386 | |
| 6d0f6bcf JCPV |
387 | #define SEVENSEG_BASE CONFIG_SYS_NIOS_CPU_PIO3 |
| 388 | #define SEVENSEG_BITS CONFIG_SYS_NIOS_CPU_PIO3_BITS | |
| c935d3bd WD |
389 | #define SEVENSEG_ACTIVE 0 /* LED on for bit == 1 */ |
| 390 | ||
| 6d0f6bcf | 391 | #if (CONFIG_SYS_NIOS_CPU_PIO3_TYPE == 1) |
| c935d3bd WD |
392 | #define SEVENSEG_WRONLY 1 |
| 393 | #else | |
| 394 | #undef SEVENSEG_WRONLY | |
| 395 | #endif | |
| 396 | ||
| 6d0f6bcf | 397 | #elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 4) |
| c935d3bd | 398 | |
| 6d0f6bcf | 399 | #error *** CONFIG_SYS_ERROR: seven segment display at PIO4 not supported, expand your config.h |
| c935d3bd | 400 | |
| 6d0f6bcf | 401 | #elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 5) |
| c935d3bd | 402 | |
| 6d0f6bcf | 403 | #error *** CONFIG_SYS_ERROR: seven segment display at PIO5 not supported, expand your config.h |
| c935d3bd | 404 | |
| 6d0f6bcf | 405 | #elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 6) |
| c935d3bd | 406 | |
| 6d0f6bcf | 407 | #error *** CONFIG_SYS_ERROR: seven segment display at PIO6 not supported, expand your config.h |
| c935d3bd | 408 | |
| 6d0f6bcf | 409 | #elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 7) |
| c935d3bd | 410 | |
| 6d0f6bcf | 411 | #error *** CONFIG_SYS_ERROR: seven segment display at PIO7 not supported, expand your config.h |
| c935d3bd | 412 | |
| 6d0f6bcf | 413 | #elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 8) |
| c935d3bd | 414 | |
| 6d0f6bcf | 415 | #error *** CONFIG_SYS_ERROR: seven segment display at PIO8 not supported, expand your config.h |
| c935d3bd | 416 | |
| 6d0f6bcf | 417 | #elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 9) |
| c935d3bd | 418 | |
| 6d0f6bcf | 419 | #error *** CONFIG_SYS_ERROR: seven segment display at PIO9 not supported, expand your config.h |
| c935d3bd WD |
420 | |
| 421 | #else | |
| 6d0f6bcf | 422 | #error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO in right case |
| c935d3bd WD |
423 | #endif |
| 424 | ||
| 425 | #define CONFIG_SEVENSEG 1 /* enable seven segment led driver */ | |
| 426 | ||
| 427 | /* | |
| 428 | * Dual 7-Segment Display pin assignment -- read more in your | |
| 429 | * "Nios Development Board Reference Manual" | |
| 430 | * | |
| 431 | * | |
| 432 | * (U8) HI:D[15..8] (U9) LO:D[7..0] | |
| 433 | * ______ ______ | |
| 434 | * | D14 | | D6 | | |
| 435 | * | | | | | |
| 436 | * D9| |D13 D1| |D5 | |
| 437 | * |______| |______| ___ | |
| 438 | * | D8 | | D0 | | A | | |
| 439 | * | | | | F|___|B | |
| 440 | * D10| |D12 D2| |D4 | G | | |
| 441 | * |______| |______| E|___|C | |
| 442 | * D11 * D3 * D * | |
| 443 | * D15 D7 DP | |
| 444 | * | |
| 445 | */ | |
| 446 | #define SEVENSEG_DIGIT_HI_LO_EQUAL 1 /* high nibble equal low nibble */ | |
| 447 | #define SEVENSEG_DIGIT_A (1 << 6) /* bit 6 is segment A */ | |
| 448 | #define SEVENSEG_DIGIT_B (1 << 5) /* bit 5 is segment B */ | |
| 449 | #define SEVENSEG_DIGIT_C (1 << 4) /* bit 4 is segment C */ | |
| 450 | #define SEVENSEG_DIGIT_D (1 << 3) /* bit 3 is segment D */ | |
| 451 | #define SEVENSEG_DIGIT_E (1 << 2) /* bit 2 is segment E */ | |
| 452 | #define SEVENSEG_DIGIT_F (1 << 1) /* bit 1 is segment F */ | |
| 453 | #define SEVENSEG_DIGIT_G (1 << 0) /* bit 0 is segment G */ | |
| 454 | #define SEVENSEG_DIGIT_DP (1 << 7) /* bit 7 is decimal point */ | |
| 455 | ||
| 6d0f6bcf | 456 | #endif /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */ |
| c935d3bd | 457 | |
| 11799434 JL |
458 | /* |
| 459 | * BOOTP options | |
| 460 | */ | |
| 461 | #define CONFIG_BOOTP_BOOTFILESIZE | |
| 462 | #define CONFIG_BOOTP_BOOTPATH | |
| 463 | #define CONFIG_BOOTP_GATEWAY | |
| 464 | #define CONFIG_BOOTP_HOSTNAME | |
| 465 | ||
| 466 | ||
| 3c3227f3 JL |
467 | /* |
| 468 | * Command line configuration. | |
| 469 | */ | |
| 4e620410 JCPV |
470 | #include <config_cmd_default.h> |
| 471 | ||
| 472 | #define CONFIG_CMD_CDP | |
| 473 | #define CONFIG_CMD_DHCP | |
| 474 | #define CONFIG_CMD_DIAG | |
| 475 | #define CONFIG_CMD_DISPLAY | |
| 476 | #define CONFIG_CMD_EXT2 | |
| 477 | #define CONFIG_CMD_IMMAP | |
| 478 | #define CONFIG_CMD_IRQ | |
| 479 | #define CONFIG_CMD_PING | |
| 480 | #define CONFIG_CMD_PORTIO | |
| 481 | #define CONFIG_CMD_REGINFO | |
| 482 | #define CONFIG_CMD_REISER | |
| 483 | #define CONFIG_CMD_SAVES | |
| 484 | #define CONFIG_CMD_SDRAM | |
| 485 | #define CONFIG_CMD_SNTP | |
| 486 | ||
| 487 | #undef CONFIG_CMD_NFS | |
| 488 | #undef CONFIG_CMD_XIMG | |
| c935d3bd WD |
489 | |
| 490 | /*------------------------------------------------------------------------ | |
| 491 | * KGDB | |
| 492 | *----------------------------------------------------------------------*/ | |
| 3c3227f3 | 493 | #if defined(CONFIG_CMD_KGDB) |
| c935d3bd WD |
494 | #define CONFIG_KGDB_BAUDRATE 9600 |
| 495 | #endif | |
| 496 | ||
| 497 | /*------------------------------------------------------------------------ | |
| 498 | * MISC | |
| 499 | *----------------------------------------------------------------------*/ | |
| 6d0f6bcf JCPV |
500 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 501 | #define CONFIG_SYS_PROMPT "DK1S10 > " /* Monitor Command Prompt */ | |
| 502 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | |
| 503 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ | |
| 504 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args*/ | |
| 505 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
| c935d3bd | 506 | |
| ec4c544b | 507 | /* Default load address */ |
| 6d0f6bcf | 508 | #if (CONFIG_SYS_SRAM_SIZE != 0) |
| ec4c544b WD |
509 | |
| 510 | /* default in SRAM */ | |
| 6d0f6bcf | 511 | #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SRAM_BASE |
| ec4c544b | 512 | |
| 6d0f6bcf | 513 | #elif (CONFIG_SYS_SDRAM_SIZE != 0) |
| ec4c544b WD |
514 | |
| 515 | /* default in SDRAM */ | |
| 6d0f6bcf JCPV |
516 | #if (CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE) |
| 517 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE) | |
| ec4c544b | 518 | #else |
| 6d0f6bcf | 519 | #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE |
| ec4c544b WD |
520 | #endif |
| 521 | ||
| c935d3bd | 522 | #else |
| 6d0f6bcf | 523 | #undef CONFIG_SYS_LOAD_ADDR /* force error break */ |
| c935d3bd WD |
524 | #endif |
| 525 | ||
| ec4c544b WD |
526 | |
| 527 | /* MEM test area */ | |
| 6d0f6bcf | 528 | #if (CONFIG_SYS_SDRAM_SIZE != 0) |
| ec4c544b WD |
529 | |
| 530 | /* SDRAM begin to stack area (1MB stack) */ | |
| 6d0f6bcf JCPV |
531 | #if (CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE) |
| 532 | #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE) | |
| 533 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - (1024 * 1024)) | |
| ec4c544b | 534 | #else |
| 6d0f6bcf JCPV |
535 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 536 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - (1024 * 1024)) | |
| ec4c544b WD |
537 | #endif |
| 538 | ||
| c935d3bd | 539 | #else |
| 6d0f6bcf JCPV |
540 | #undef CONFIG_SYS_MEMTEST_START /* force error break */ |
| 541 | #undef CONFIG_SYS_MEMTEST_END | |
| c935d3bd WD |
542 | #endif |
| 543 | ||
| 700a0c64 WD |
544 | /* |
| 545 | * JFFS2 partitions | |
| 546 | * | |
| 547 | */ | |
| 548 | /* No command line, one static partition, whole device */ | |
| 68d7d651 | 549 | #undef CONFIG_CMD_MTDPARTS |
| 700a0c64 WD |
550 | #define CONFIG_JFFS2_DEV "nor0" |
| 551 | #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF | |
| 552 | #define CONFIG_JFFS2_PART_OFFSET 0x00000000 | |
| 553 | ||
| 554 | /* mtdparts command line support */ | |
| 555 | /* | |
| 68d7d651 | 556 | #define CONFIG_CMD_MTDPARTS |
| 700a0c64 WD |
557 | #define MTDIDS_DEFAULT "" |
| 558 | #define MTDPARTS_DEFAULT "" | |
| 559 | */ | |
| c935d3bd WD |
560 | |
| 561 | #endif /* __CONFIG_H */ |