]>
Commit | Line | Data |
---|---|---|
545c8e0a MF |
1 | /* |
2 | * Configuation settings for the Motorola MC5275EVB board. | |
3 | * | |
4 | * By Arthur Shipkowski <art@videon-central.com> | |
5 | * Copyright (C) 2005 Videon Central, Inc. | |
6 | * | |
7 | * Based off of M5272C3 board code by Josef Baumgartner | |
8 | * <josef.baumgartner@telex.de> | |
9 | * | |
10 | * See file CREDITS for list of people who contributed to this | |
11 | * project. | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or | |
14 | * modify it under the terms of the GNU General Public License as | |
15 | * published by the Free Software Foundation; either version 2 of | |
16 | * the License, or (at your option) any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; if not, write to the Free Software | |
25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
26 | * MA 02111-1307 USA | |
27 | */ | |
28 | ||
29 | /* | |
30 | * board/config.h - configuration options, board specific | |
31 | */ | |
32 | ||
33 | #ifndef _M5275EVB_H | |
34 | #define _M5275EVB_H | |
35 | ||
36 | /* | |
37 | * High Level Configuration Options | |
38 | * (easy to change) | |
39 | */ | |
40 | #define CONFIG_MCF52x2 /* define processor family */ | |
41 | #define CONFIG_M5275 /* define processor type */ | |
42 | #define CONFIG_M5275EVB /* define board type */ | |
43 | ||
44 | #define CONFIG_MCFTMR | |
45 | ||
46 | #define CONFIG_MCFUART | |
47 | #define CFG_UART_PORT (0) | |
79e0799c | 48 | #define CONFIG_BAUDRATE 115200 |
545c8e0a MF |
49 | #define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } |
50 | ||
51 | /* Configuration for environment | |
52 | * Environment is embedded in u-boot in the second sector of the flash | |
53 | */ | |
54 | #ifndef CONFIG_MONITOR_IS_IN_RAM | |
0e8d1586 JCPV |
55 | #define CONFIG_ENV_OFFSET 0x4000 |
56 | #define CONFIG_ENV_SECT_SIZE 0x2000 | |
5a1aceb0 | 57 | #define CONFIG_ENV_IS_IN_FLASH 1 |
0e8d1586 | 58 | #define CONFIG_ENV_IS_EMBEDDED 1 |
545c8e0a | 59 | #else |
0e8d1586 JCPV |
60 | #define CONFIG_ENV_ADDR 0xffe04000 |
61 | #define CONFIG_ENV_SECT_SIZE 0x2000 | |
5a1aceb0 | 62 | #define CONFIG_ENV_IS_IN_FLASH 1 |
545c8e0a MF |
63 | #endif |
64 | ||
65 | /* | |
66 | * BOOTP options | |
67 | */ | |
68 | #define CONFIG_BOOTP_BOOTFILESIZE | |
69 | #define CONFIG_BOOTP_BOOTPATH | |
70 | #define CONFIG_BOOTP_GATEWAY | |
71 | #define CONFIG_BOOTP_HOSTNAME | |
72 | ||
73 | /* Available command configuration */ | |
74 | #include <config_cmd_default.h> | |
75 | ||
76 | #define CONFIG_CMD_PING | |
77 | #define CONFIG_CMD_MII | |
78 | #define CONFIG_CMD_NET | |
79 | #define CONFIG_CMD_ELF | |
80 | #define CONFIG_CMD_FLASH | |
81 | #define CONFIG_CMD_I2C | |
82 | #define CONFIG_CMD_MEMORY | |
83 | #define CONFIG_CMD_DHCP | |
84 | ||
85 | #undef CONFIG_CMD_LOADS | |
86 | #undef CONFIG_CMD_LOADB | |
87 | ||
88 | #define CONFIG_MCFFEC | |
89 | #ifdef CONFIG_MCFFEC | |
90 | #define CONFIG_NET_MULTI 1 | |
91 | #define CONFIG_MII 1 | |
0f3ba7e9 | 92 | #define CONFIG_MII_INIT 1 |
545c8e0a MF |
93 | #define CFG_DISCOVER_PHY |
94 | #define CFG_RX_ETH_BUFFER 8 | |
95 | #define CFG_FAULT_ECHO_LINK_DOWN | |
96 | #define CFG_FEC0_PINMUX 0 | |
97 | #define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE | |
98 | #define CFG_FEC1_PINMUX 0 | |
99 | #define CFG_FEC1_MIIBASE CFG_FEC1_IOBASE | |
100 | #define MCFFEC_TOUT_LOOP 50000 | |
101 | #define CONFIG_HAS_ETH1 | |
102 | /* If CFG_DISCOVER_PHY is not defined - hardcoded */ | |
103 | #ifndef CFG_DISCOVER_PHY | |
104 | #define FECDUPLEX FULL | |
105 | #define FECSPEED _100BASET | |
106 | #else | |
107 | #ifndef CFG_FAULT_ECHO_LINK_DOWN | |
108 | #define CFG_FAULT_ECHO_LINK_DOWN | |
109 | #endif | |
110 | #endif | |
111 | #endif | |
112 | ||
113 | /* I2C */ | |
114 | #define CONFIG_FSL_I2C | |
115 | #define CONFIG_HARD_I2C /* I2C with hw support */ | |
116 | #undef CONFIG_SOFT_I2C | |
117 | #define CFG_I2C_SPEED 80000 | |
118 | #define CFG_I2C_SLAVE 0x7F | |
119 | #define CFG_I2C_OFFSET 0x00000300 | |
120 | #define CFG_IMMR CFG_MBAR | |
eec567a6 TL |
121 | #define CFG_I2C_PINMUX_REG (gpio_reg->par_feci2c) |
122 | #define CFG_I2C_PINMUX_CLR (0xFFF0) | |
123 | #define CFG_I2C_PINMUX_SET (0x000F) | |
545c8e0a MF |
124 | |
125 | #ifdef CONFIG_MCFFEC | |
126 | #define CONFIG_ETHADDR 00:06:3b:01:41:55 | |
127 | #define CONFIG_ETH1ADDR 00:0e:0c:bc:e5:60 | |
128 | #endif | |
129 | ||
130 | #define CFG_PROMPT "-> " | |
131 | #define CFG_LONGHELP /* undef to save memory */ | |
132 | ||
133 | #if (CONFIG_CMD_KGDB) | |
134 | # define CFG_CBSIZE 1024 | |
135 | #else | |
136 | # define CFG_CBSIZE 256 | |
137 | #endif | |
138 | #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) | |
139 | #define CFG_MAXARGS 16 | |
140 | #define CFG_BARGSIZE CFG_CBSIZE | |
141 | ||
142 | #define CFG_LOAD_ADDR 0x800000 | |
143 | ||
144 | #define CONFIG_BOOTDELAY 5 | |
145 | #define CONFIG_BOOTCOMMAND "bootm ffe40000" | |
146 | #define CFG_MEMTEST_START 0x400 | |
147 | #define CFG_MEMTEST_END 0x380000 | |
148 | ||
149 | #define CFG_HZ 1000 | |
150 | #define CFG_CLK 150000000 | |
151 | ||
152 | /* | |
153 | * Low Level Configuration Settings | |
154 | * (address mappings, register initial values, etc.) | |
155 | * You should know what you are doing if you make changes here. | |
156 | */ | |
157 | ||
158 | #define CFG_MBAR 0x40000000 | |
159 | ||
160 | /*----------------------------------------------------------------------- | |
161 | * Definitions for initial stack pointer and data area (in DPRAM) | |
162 | */ | |
163 | #define CFG_INIT_RAM_ADDR 0x20000000 | |
164 | #define CFG_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */ | |
165 | #define CFG_GBL_DATA_SIZE 1000 /* bytes reserved for initial data */ | |
166 | #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) | |
167 | #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET | |
168 | ||
169 | /*----------------------------------------------------------------------- | |
170 | * Start addresses for the final memory configuration | |
171 | * (Set up by the startup code) | |
172 | * Please note that CFG_SDRAM_BASE _must_ start at 0 | |
173 | */ | |
174 | #define CFG_SDRAM_BASE 0x00000000 | |
175 | #define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ | |
176 | #define CFG_FLASH_BASE 0xffe00000 | |
177 | ||
178 | #ifdef CONFIG_MONITOR_IS_IN_RAM | |
179 | #define CFG_MONITOR_BASE 0x20000 | |
180 | #else | |
181 | #define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) | |
182 | #endif | |
183 | ||
184 | #define CFG_MONITOR_LEN 0x20000 | |
185 | #define CFG_MALLOC_LEN (256 << 10) | |
186 | #define CFG_BOOTPARAMS_LEN 64*1024 | |
187 | ||
188 | /* | |
189 | * For booting Linux, the board info and command line data | |
190 | * have to be in the first 8 MB of memory, since this is | |
191 | * the maximum mapped by the Linux kernel during initialization ?? | |
192 | */ | |
193 | #define CFG_BOOTMAPSZ (8 << 20) /* Initial mmap for Linux */ | |
194 | ||
195 | /*----------------------------------------------------------------------- | |
196 | * FLASH organization | |
197 | */ | |
198 | #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ | |
199 | #define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ | |
200 | #define CFG_FLASH_ERASE_TOUT 1000 | |
201 | ||
202 | #define CFG_FLASH_CFI 1 | |
00b1883a | 203 | #define CONFIG_FLASH_CFI_DRIVER 1 |
545c8e0a MF |
204 | #define CFG_FLASH_SIZE 0x200000 |
205 | ||
206 | /*----------------------------------------------------------------------- | |
207 | * Cache Configuration | |
208 | */ | |
209 | #define CFG_CACHELINE_SIZE 16 | |
210 | ||
211 | /*----------------------------------------------------------------------- | |
212 | * Memory bank definitions | |
213 | */ | |
214 | #define CFG_AR0_PRELIM (CFG_FLASH_BASE >> 16) | |
215 | #define CFG_CR0_PRELIM 0x1980 | |
216 | #define CFG_MR0_PRELIM 0x001F0001 | |
217 | ||
218 | #define CFG_AR1_PRELIM 0x3000 | |
219 | #define CFG_CR1_PRELIM 0x1900 | |
220 | #define CFG_MR1_PRELIM 0x00070001 | |
221 | ||
222 | /*----------------------------------------------------------------------- | |
223 | * Port configuration | |
224 | */ | |
225 | #define CFG_FECI2C 0x0FA0 | |
226 | ||
227 | #endif /* _M5275EVB_H */ |