[people/ms/u-boot.git] / include / configs / METROBOX.h

/*
 * (C) Copyright 2004 Sandburst Corporation
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/************************************************************************
 * METROBOX.h - configuration Sandburst MetroBox
 ***********************************************************************/

/*
 * $Id: METROBOX.h,v 1.21 2005/06/03 15:05:25 tsawyer Exp $
 *
 *
 * $Log: METROBOX.h,v $
 * Revision 1.21  2005/06/03 15:05:25  tsawyer
 * MB rev 2.0.3 KA rev 0.0.7.  Add CONFIG_VERSION_VARIABLE, Add fakeled to MB
 *
 * Revision 1.20  2005/04/11 20:51:11  tsawyer
 * fix ethernet
 *
 * Revision 1.19  2005/04/06 15:13:36  tsawyer
 * Update appropriate files to coincide with u-boot 1.1.3
 *
 * Revision 1.18  2005/03/10 14:16:02  tsawyer
 * add def'n for cis8201 short etch option.
 *
 * Revision 1.17  2005/03/09 19:49:51  tsawyer
 * Remove KGDB to allow use of 2nd serial port
 *
 * Revision 1.16  2004/12/02 19:00:23  tsawyer
 * Add misc_init_f to turn on i2c-1 and all four fans before sdram init
 *
 * Revision 1.15  2004/09/15 18:04:12  tsawyer
 * add multiple serial port support
 *
 * Revision 1.14  2004/09/03 15:27:51  tsawyer
 * All metrobox boards are at 66.66 sys clock
 *
 * Revision 1.13  2004/08/05 20:27:46  tsawyer
 * Remove system ace definitions, add net console support
 *
 * Revision 1.12  2004/07/29 20:00:13  tsawyer
 * Add i2c bus 1
 *
 * Revision 1.11  2004/07/21 13:44:18  tsawyer
 * SystemACE is out, CF direct to local bus is in
 *
 * Revision 1.10  2004/06/29 19:08:55  tsawyer
 * Add CONFIG_MISC_INIT_R
 *
 * Revision 1.9  2004/06/28 21:30:53  tsawyer
 * Fix default BOOTARGS
 *
 * Revision 1.8  2004/06/17 15:51:08  tsawyer
 * auto complete
 *
 * Revision 1.7  2004/06/17 15:08:49  tsawyer
 * Add autocomplete
 *
 * Revision 1.6  2004/06/15 12:33:57  tsawyer
 * debugging checkpoint
 *
 * Revision 1.5  2004/06/12 19:48:28  tsawyer
 * Debugging checkpoint
 *
 * Revision 1.4  2004/06/02 13:03:06  tsawyer
 * Fix eth addrs
 *
 * Revision 1.3  2004/05/18 19:56:10  tsawyer
 * Change default bootcommand to pImage.metrobox
 *
 * Revision 1.2  2004/05/18 14:13:44  tsawyer
 * Add bringup values for bootargs and bootcommand.
 * Remove definition of ipaddress and serverip addresses.
 *
 * Revision 1.1  2004/04/16 15:08:54  tsawyer
 * Initial Revision
 *
 *
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*-----------------------------------------------------------------------
 * High Level Configuration Options
 *----------------------------------------------------------------------*/
#define CONFIG_METROBOX		  1          /* Board is Metrobox       */
#define CONFIG_440GX		  1          /* Specifc GX support      */
#define CONFIG_4xx		  1          /* ... PPC4xx family       */
#define CONFIG_BOARD_EARLY_INIT_F 1	     /* Call board_pre_init	*/
#define CONFIG_MISC_INIT_F        1          /* Call board misc_init_f  */
#define CONFIG_MISC_INIT_R        1          /* Call board misc_init_r  */
#undef	CFG_DRAM_TEST			     /* Disable-takes long time!*/
#define CONFIG_SYS_CLK_FREQ	  66666666   /* external freq to pll    */

#define CONFIG_VERY_BIG_RAM 1
#define CONFIG_VERSION_VARIABLE

#define CONFIG_IDENT_STRING " Sandburst Metrobox"

/*-----------------------------------------------------------------------
 * Base addresses -- Note these are effective addresses where the
 * actual resources get mapped (not physical addresses)
 *----------------------------------------------------------------------*/
#define CFG_SDRAM_BASE	       0x00000000    /* _must_ be 0             */
#define CFG_FLASH_BASE	       0xfff80000    /* start of FLASH          */
#define CFG_MONITOR_BASE       0xfff80000    /* start of monitor        */
#define CFG_PCI_MEMBASE	       0x80000000    /* mapped pci memory       */
#define CFG_PERIPHERAL_BASE    0xe0000000    /* internal peripherals    */
#define CFG_ISRAM_BASE	       0xc0000000    /* internal SRAM           */
#define CFG_PCI_BASE	       0xd0000000    /* internal PCI regs       */

#define CFG_NVRAM_BASE_ADDR   (CFG_PERIPHERAL_BASE + 0x08000000)
#define CFG_FPGA_BASE	      (CFG_PERIPHERAL_BASE + 0x08200000)
#define CFG_BME32_BASE	      (CFG_PERIPHERAL_BASE + 0x08500000)
#define CFG_GPIO_BASE	      (CFG_PERIPHERAL_BASE + 0x00000700)

/*-----------------------------------------------------------------------
 * Initial RAM & stack pointer (placed in internal SRAM)
 *----------------------------------------------------------------------*/
#define CFG_TEMP_STACK_OCM    1
#define CFG_OCM_DATA_ADDR     CFG_ISRAM_BASE
#define CFG_INIT_RAM_ADDR     CFG_ISRAM_BASE /* Initial RAM address     */
#define CFG_INIT_RAM_END      0x2000         /* End of used area in RAM */
#define CFG_GBL_DATA_SIZE     128            /* num bytes initial data  */

#define CFG_GBL_DATA_OFFSET   (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_POST_WORD_ADDR    (CFG_GBL_DATA_OFFSET - 0x4)
#define CFG_INIT_SP_OFFSET    CFG_POST_WORD_ADDR

#define CFG_MONITOR_LEN	      (256 * 1024)   /* Rsrv 256kB for Mon      */
#define CFG_MALLOC_LEN	      (128 * 1024)   /* Rsrv 128kB for malloc   */

/*-----------------------------------------------------------------------
 * Serial Port
 *----------------------------------------------------------------------*/
#undef	CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SERIAL_MULTI   1
#define CONFIG_BAUDRATE	      9600

#define CFG_BAUDRATE_TABLE  \
    {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}

/*-----------------------------------------------------------------------
 * NVRAM/RTC
 *
 * NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located.
 * The DS1743 code assumes this condition (i.e. -- it assumes the base
 * address for the RTC registers is:
 *
 *	CFG_NVRAM_BASE_ADDR + CFG_NVRAM_SIZE
 *
 *----------------------------------------------------------------------*/
#define CFG_NVRAM_SIZE	      (0x2000 - 8)   /* NVRAM size(8k)- RTC regs*/
#define CONFIG_RTC_DS174x     1              /* DS1743 RTC              */

/*-----------------------------------------------------------------------
 * FLASH related
 *----------------------------------------------------------------------*/
#define CFG_MAX_FLASH_BANKS   1		     /* number of banks         */
#define CFG_MAX_FLASH_SECT    8		     /* sectors per device      */

#undef	CFG_FLASH_CHECKSUM
#define CFG_FLASH_ERASE_TOUT  120000	     /* Flash Erase TO (in ms)   */
#define CFG_FLASH_WRITE_TOUT  500	     /* Flash Write TO(in ms)    */

/*-----------------------------------------------------------------------
 * DDR SDRAM
 *----------------------------------------------------------------------*/
#define CONFIG_SPD_EEPROM     1	             /* Use SPD EEPROM for setup*/
#define SPD_EEPROM_ADDRESS    {0x53}         /* SPD i2c spd addresses   */

/*-----------------------------------------------------------------------
 * I2C
 *----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C       1              /* I2C hardware support    */
#undef	CONFIG_SOFT_I2C                      /* I2C !bit-banged         */
#define CFG_I2C_SPEED         400000         /* I2C speed 400kHz        */
#define CFG_I2C_SLAVE         0x7F           /* I2C slave address       */
#define CFG_I2C_NOPROBES      {0x69}         /* Don't probe these addrs */
#define CONFIG_I2C_BUS1       1              /* Include i2c bus 1 supp  */


/*-----------------------------------------------------------------------
 * Environment
 *----------------------------------------------------------------------*/
#define CFG_ENV_IS_IN_NVRAM   1	             /* Environment uses NVRAM  */
#undef	CFG_ENV_IS_IN_FLASH		     /* ... not in flash        */
#undef	CFG_ENV_IS_IN_EEPROM		     /* ... not in EEPROM       */
#define CONFIG_ENV_OVERWRITE  1              /* allow env overwrite     */

#define CFG_ENV_SIZE          0x1000         /* Size of Env vars        */
#define CFG_ENV_ADDR          (CFG_NVRAM_BASE_ADDR)

#define CONFIG_BOOTARGS	      "console=ttyS0,9600 root=/dev/nfs rw nfsroot=$serverip:/home/metrobox0 nfsaddrs=$ipaddr:::::eth0:none "
#define CONFIG_BOOTCOMMAND    "tftp 8000000 pImage.metrobox;bootm 8000000"
#define CONFIG_BOOTDELAY      5             /* disable autoboot */

#define CONFIG_LOADS_ECHO     1              /* echo on for serial dnld */
#define CFG_LOADS_BAUD_CHANGE 1	             /* allow baudrate change   */

/*-----------------------------------------------------------------------
 * Networking
 *----------------------------------------------------------------------*/
#define CONFIG_MII	      1              /* MII PHY management      */
#define CONFIG_NET_MULTI      1
#define CONFIG_PHY_ADDR	      0xff           /* no phy on EMAC0         */
#define CONFIG_PHY1_ADDR      0xff           /* no phy on EMAC1         */
#define CONFIG_PHY2_ADDR      0x08           /* PHY addr, MGMT, EMAC2   */
#define CONFIG_PHY3_ADDR      0x18           /* PHY addr, LCL, EMAC3    */
#define CONFIG_HAS_ETH0
#define CONFIG_HAS_ETH1
#define CONFIG_HAS_ETH2
#define CONFIG_HAS_ETH3
#define CONFIG_CIS8201_PHY    1	             /* RGMII mode for Cicada   */
#define CONFIG_CIS8201_SHORT_ETCH 1          /* Use short etch mode     */
#define CONFIG_PHY_GIGE       1	             /* GbE speed/duplex detect */
#define CONFIG_PHY_RESET_DELAY 1000
#define CONFIG_NETMASK        255.255.0.0
#define CONFIG_ETHADDR        00:00:00:00:00:00 /* No EMAC 0 support    */
#define CONFIG_ETH1ADDR       00:00:00:00:00:00 /* No EMAC 1 support    */
#define CFG_RX_ETH_BUFFER     32             /* #eth rx buff & descrs   */


/*-----------------------------------------------------------------------
 * Console/Commands/Parser
 *----------------------------------------------------------------------*/
#define CONFIG_COMMANDS	       (CONFIG_CMD_DFL  | \
                                CFG_CMD_PCI     | \
                                CFG_CMD_IRQ     | \
                                CFG_CMD_I2C     | \
                                CFG_CMD_DHCP    | \
                                CFG_CMD_DATE    | \
                                CFG_CMD_BEDBUG  | \
                                CFG_CMD_PING    | \
                                CFG_CMD_DIAG    | \
                                CFG_CMD_MII     | \
                                CFG_CMD_NET     | \
                                CFG_CMD_ELF     | \
                                CFG_CMD_IDE     | \
                                CFG_CMD_FAT)

/* tbs 09-March-2005 Removed to be able to use 2nd serial */
/*                                CFG_CMD_KGDB    | \ */


/* Include NetConsole support */
#define CONFIG_NETCONSOLE

/* Include auto complete with tabs */
#define CONFIG_AUTO_COMPLETE 1
#define CFG_AUTO_COMPLETE    1
#define CFG_ALT_MEMTEST      1       /* use real memory test     */


/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>

#define CFG_LONGHELP                         /* undef to save memory    */
#define CFG_PROMPT	      "MetroBox=> "  /* Monitor Command Prompt  */

#define CFG_HUSH_PARSER        1             /* HUSH for ext'd cli      */
#define CFG_PROMPT_HUSH_PS2    "> "


/*-----------------------------------------------------------------------
 * Console Buffer
 *----------------------------------------------------------------------*/
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CBSIZE	      1024           /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE	      256            /* Console I/O Buffer Size */
#endif
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
                                             /* Print Buffer Size       */
#define CFG_MAXARGS	      16             /* max number of cmd args  */
#define CFG_BARGSIZE	      CFG_CBSIZE     /* Boot Arg Buffer Size    */

/*-----------------------------------------------------------------------
 * Memory Test
 *----------------------------------------------------------------------*/
#define CFG_MEMTEST_START     0x0400000      /* memtest works on        */
#define CFG_MEMTEST_END       0x0C00000	     /* 4 ... 12 MB in DRAM     */

/*-----------------------------------------------------------------------
 * Compact Flash (in true IDE mode)
 *----------------------------------------------------------------------*/
#undef	CONFIG_IDE_8xx_DIRECT		/* no pcmcia interface required */
#undef	CONFIG_IDE_LED			/* no led for ide supported	*/

#define	CONFIG_IDE_RESET		/* reset for ide supported	*/
#define CFG_IDE_MAXBUS		1	/* max. 1 IDE busses	*/
#define CFG_IDE_MAXDEVICE	(CFG_IDE_MAXBUS*1) /* max. 1 drives per IDE bus */

#define CFG_ATA_BASE_ADDR	0xF0000000
#define CFG_ATA_IDE0_OFFSET	0x0000
#define CFG_ATA_DATA_OFFSET	0x0000	 /* Offset for data I/O */
#define CFG_ATA_REG_OFFSET	0x0000	 /* Offset for normal register accesses*/
#define CFG_ATA_ALT_OFFSET	0x100000 /* Offset for alternate registers */

#define CFG_ATA_STRIDE          2        /* Directly connected CF, needs a stride
                                            to get to the correct offset */
#define CONFIG_DOS_PARTITION  1              /* Include dos partition   */

/*-----------------------------------------------------------------------
 * PCI
 *----------------------------------------------------------------------*/
/* General PCI */
#define CONFIG_PCI                           /* include pci support     */
#define CONFIG_PCI_PNP                       /* do pci plug-and-play    */
#define CONFIG_PCI_SCAN_SHOW                 /* show pci devices        */
#define CFG_PCI_TARGBASE      (CFG_PCI_MEMBASE)

/* Board-specific PCI */
#define CFG_PCI_PRE_INIT                     /* enable board pci_pre_init*/
#define CFG_PCI_TARGET_INIT                  /* let board init pci target*/

#define CFG_PCI_SUBSYS_VENDORID 0x17BA       /* Sandburst */
#define CFG_PCI_SUBSYS_DEVICEID 0xcafe       /* Whatever */

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CFG_BOOTMAPSZ		(8 << 20) /* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
 * Cache Configuration
 */
#define CFG_DCACHE_SIZE       8192           /* For IBM 405 CPUs        */
#define CFG_CACHELINE_SIZE    32
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT   5              /* log base 2 of the above */
#endif

/*
 * Internal Definitions
 *
 * Boot Flags
 */
#define BOOTFLAG_COLD         0x01           /* Normal PowerOn: Boot from FLASH */
#define BOOTFLAG_WARM         0x02           /* Software reboot */

#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE  230400	     /* kgdb serial port baud   */
#define CONFIG_KGDB_SER_INDEX 2              /* kgdb serial port        */
#endif

/*-----------------------------------------------------------------------
 * Miscellaneous configurable options
 *----------------------------------------------------------------------*/
#undef CONFIG_WATCHDOG			     /* watchdog disabled       */
#define CFG_LOAD_ADDR         0x8000000      /* default load address    */
#define CFG_EXTBDINFO         1	             /* use extended board_info */

#define CFG_HZ                100            /* decr freq: 1 ms ticks   */


#endif	/* __CONFIG_H */
Commit	Line	Data
b79316f2 SR	1	/*
	2	* (C) Copyright 2004 Sandburst Corporation
	3	*
	4	* See file CREDITS for list of people who contributed to this
	5	* project.
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License as
	9	* published by the Free Software Foundation; either version 2 of
	10	* the License, or (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	20	* MA 02111-1307 USA
	21	*/
	22
	23	/************************************************************************
	24	* METROBOX.h - configuration Sandburst MetroBox
	25	***********************************************************************/
	26
	27	/*
	28	* $Id: METROBOX.h,v 1.21 2005/06/03 15:05:25 tsawyer Exp $
	29	*
	30	*
	31	* $Log: METROBOX.h,v $
	32	* Revision 1.21 2005/06/03 15:05:25 tsawyer
	33	* MB rev 2.0.3 KA rev 0.0.7. Add CONFIG_VERSION_VARIABLE, Add fakeled to MB
	34	*
	35	* Revision 1.20 2005/04/11 20:51:11 tsawyer
	36	* fix ethernet
	37	*
	38	* Revision 1.19 2005/04/06 15:13:36 tsawyer
	39	* Update appropriate files to coincide with u-boot 1.1.3
	40	*
	41	* Revision 1.18 2005/03/10 14:16:02 tsawyer
	42	* add def'n for cis8201 short etch option.
	43	*
	44	* Revision 1.17 2005/03/09 19:49:51 tsawyer
	45	* Remove KGDB to allow use of 2nd serial port
	46	*
	47	* Revision 1.16 2004/12/02 19:00:23 tsawyer
	48	* Add misc_init_f to turn on i2c-1 and all four fans before sdram init
	49	*
	50	* Revision 1.15 2004/09/15 18:04:12 tsawyer
	51	* add multiple serial port support
	52	*
	53	* Revision 1.14 2004/09/03 15:27:51 tsawyer
	54	* All metrobox boards are at 66.66 sys clock
	55	*
	56	* Revision 1.13 2004/08/05 20:27:46 tsawyer
	57	* Remove system ace definitions, add net console support
	58	*
	59	* Revision 1.12 2004/07/29 20:00:13 tsawyer
	60	* Add i2c bus 1
	61	*
	62	* Revision 1.11 2004/07/21 13:44:18 tsawyer
	63	* SystemACE is out, CF direct to local bus is in
	64	*
65	* Revision 1.10 2004/06/29 19:08:55 tsawyer
66	* Add CONFIG_MISC_INIT_R
67	*
68	* Revision 1.9 2004/06/28 21:30:53 tsawyer
69	* Fix default BOOTARGS
70	*
71	* Revision 1.8 2004/06/17 15:51:08 tsawyer
72	* auto complete
73	*
74	* Revision 1.7 2004/06/17 15:08:49 tsawyer
75	* Add autocomplete
76	*
77	* Revision 1.6 2004/06/15 12:33:57 tsawyer
78	* debugging checkpoint
79	*
80	* Revision 1.5 2004/06/12 19:48:28 tsawyer
81	* Debugging checkpoint
82	*
83	* Revision 1.4 2004/06/02 13:03:06 tsawyer
84	* Fix eth addrs
85	*
86	* Revision 1.3 2004/05/18 19:56:10 tsawyer
87	* Change default bootcommand to pImage.metrobox
88	*
89	* Revision 1.2 2004/05/18 14:13:44 tsawyer
90	* Add bringup values for bootargs and bootcommand.
91	* Remove definition of ipaddress and serverip addresses.
92	*
93	* Revision 1.1 2004/04/16 15:08:54 tsawyer
94	* Initial Revision
95	*
96	*
97	*/
98
99	#ifndef __CONFIG_H
100	#define __CONFIG_H
101
102	/*-----------------------------------------------------------------------
103	* High Level Configuration Options
104	----------------------------------------------------------------------/
105	#define CONFIG_METROBOX 1 /* Board is Metrobox */
106	#define CONFIG_440GX 1 /* Specifc GX support */
107	#define CONFIG_4xx 1 /* ... PPC4xx family */
108	#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
109	#define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */
110	#define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */
111	#undef CFG_DRAM_TEST /* Disable-takes long time!*/
112	#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
113
114	#define CONFIG_VERY_BIG_RAM 1
115	#define CONFIG_VERSION_VARIABLE
116
117	#define CONFIG_IDENT_STRING " Sandburst Metrobox"
118
119	/*-----------------------------------------------------------------------
120	* Base addresses -- Note these are effective addresses where the
121	* actual resources get mapped (not physical addresses)
122	----------------------------------------------------------------------/
123	#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
124	#define CFG_FLASH_BASE 0xfff80000 /* start of FLASH */
125	#define CFG_MONITOR_BASE 0xfff80000 /* start of monitor */
126	#define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */
127	#define CFG_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
128	#define CFG_ISRAM_BASE 0xc0000000 /* internal SRAM */
129	#define CFG_PCI_BASE 0xd0000000 /* internal PCI regs */
130
131	#define CFG_NVRAM_BASE_ADDR (CFG_PERIPHERAL_BASE + 0x08000000)
132	#define CFG_FPGA_BASE (CFG_PERIPHERAL_BASE + 0x08200000)
133	#define CFG_BME32_BASE (CFG_PERIPHERAL_BASE + 0x08500000)
134	#define CFG_GPIO_BASE (CFG_PERIPHERAL_BASE + 0x00000700)
135
136	/*-----------------------------------------------------------------------
137	* Initial RAM & stack pointer (placed in internal SRAM)
138	----------------------------------------------------------------------/
139	#define CFG_TEMP_STACK_OCM 1
140	#define CFG_OCM_DATA_ADDR CFG_ISRAM_BASE
141	#define CFG_INIT_RAM_ADDR CFG_ISRAM_BASE /* Initial RAM address */
142	#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
143	#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
144
145	#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
146	#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4)
147	#define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR
148
149	#define CFG_MONITOR_LEN (256 * 1024) /* Rsrv 256kB for Mon */
150	#define CFG_MALLOC_LEN (128 * 1024) /* Rsrv 128kB for malloc */
151
152	/*-----------------------------------------------------------------------
153	* Serial Port
154	----------------------------------------------------------------------/
155	#undef CONFIG_SERIAL_SOFTWARE_FIFO
156	#define CONFIG_SERIAL_MULTI 1
157	#define CONFIG_BAUDRATE 9600
158
159	#define CFG_BAUDRATE_TABLE \
160	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
161
162	/*-----------------------------------------------------------------------
163	* NVRAM/RTC
164	*
165	* NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located.
166	* The DS1743 code assumes this condition (i.e. -- it assumes the base
167	* address for the RTC registers is:
168	*
169	* CFG_NVRAM_BASE_ADDR + CFG_NVRAM_SIZE
170	*
171	----------------------------------------------------------------------/
172	#define CFG_NVRAM_SIZE (0x2000 - 8) /* NVRAM size(8k)- RTC regs*/
173	#define CONFIG_RTC_DS174x 1 /* DS1743 RTC */
174
175	/*-----------------------------------------------------------------------
176	* FLASH related
177	----------------------------------------------------------------------/
178	#define CFG_MAX_FLASH_BANKS 1 /* number of banks */
179	#define CFG_MAX_FLASH_SECT 8 /* sectors per device */
180
181	#undef CFG_FLASH_CHECKSUM
182	#define CFG_FLASH_ERASE_TOUT 120000 /* Flash Erase TO (in ms) */
183	#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write TO(in ms) */
184
185	/*-----------------------------------------------------------------------
186	* DDR SDRAM
187	----------------------------------------------------------------------/
188	#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup*/
189	#define SPD_EEPROM_ADDRESS {0x53} /* SPD i2c spd addresses */
190
191	/*-----------------------------------------------------------------------
192	* I2C
193	----------------------------------------------------------------------/
194	#define CONFIG_HARD_I2C 1 /* I2C hardware support */
195	#undef CONFIG_SOFT_I2C /* I2C !bit-banged */
196	#define CFG_I2C_SPEED 400000 /* I2C speed 400kHz */
197	#define CFG_I2C_SLAVE 0x7F /* I2C slave address */
198	#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
199	#define CONFIG_I2C_BUS1 1 /* Include i2c bus 1 supp */
200
201
202	/*-----------------------------------------------------------------------
203	* Environment
204	----------------------------------------------------------------------/
205	#define CFG_ENV_IS_IN_NVRAM 1 /* Environment uses NVRAM */
206	#undef CFG_ENV_IS_IN_FLASH /* ... not in flash */
207	#undef CFG_ENV_IS_IN_EEPROM /* ... not in EEPROM */
208	#define CONFIG_ENV_OVERWRITE 1 /* allow env overwrite */
209
210	#define CFG_ENV_SIZE 0x1000 /* Size of Env vars */
211	#define CFG_ENV_ADDR (CFG_NVRAM_BASE_ADDR)
212
213	#define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/nfs rw nfsroot=$serverip:/home/metrobox0 nfsaddrs=$ipaddr:::::eth0:none "
214	#define CONFIG_BOOTCOMMAND "tftp 8000000 pImage.metrobox;bootm 8000000"
215	#define CONFIG_BOOTDELAY 5 /* disable autoboot */
216
217	#define CONFIG_LOADS_ECHO 1 /* echo on for serial dnld */
218	#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
219
220	/*-----------------------------------------------------------------------
221	* Networking
222	----------------------------------------------------------------------/
223	#define CONFIG_MII 1 /* MII PHY management */
224	#define CONFIG_NET_MULTI 1
225	#define CONFIG_PHY_ADDR 0xff /* no phy on EMAC0 */
226	#define CONFIG_PHY1_ADDR 0xff /* no phy on EMAC1 */
227	#define CONFIG_PHY2_ADDR 0x08 /* PHY addr, MGMT, EMAC2 */
228	#define CONFIG_PHY3_ADDR 0x18 /* PHY addr, LCL, EMAC3 */
229	#define CONFIG_HAS_ETH0
230	#define CONFIG_HAS_ETH1
231	#define CONFIG_HAS_ETH2
232	#define CONFIG_HAS_ETH3
233	#define CONFIG_CIS8201_PHY 1 /* RGMII mode for Cicada */
234	#define CONFIG_CIS8201_SHORT_ETCH 1 /* Use short etch mode */
235	#define CONFIG_PHY_GIGE 1 /* GbE speed/duplex detect */
236	#define CONFIG_PHY_RESET_DELAY 1000
237	#define CONFIG_NETMASK 255.255.0.0
238	#define CONFIG_ETHADDR 00:00:00:00:00:00 /* No EMAC 0 support */
239	#define CONFIG_ETH1ADDR 00:00:00:00:00:00 /* No EMAC 1 support */
240	#define CFG_RX_ETH_BUFFER 32 /* #eth rx buff & descrs */
241
242
243	/*-----------------------------------------------------------------------
244	* Console/Commands/Parser
245	----------------------------------------------------------------------/
246	#define CONFIG_COMMANDS (CONFIG_CMD_DFL \| \
247	CFG_CMD_PCI \| \
248	CFG_CMD_IRQ \| \
249	CFG_CMD_I2C \| \
250	CFG_CMD_DHCP \| \
251	CFG_CMD_DATE \| \
252	CFG_CMD_BEDBUG \| \
253	CFG_CMD_PING \| \
254	CFG_CMD_DIAG \| \
255	CFG_CMD_MII \| \
256	CFG_CMD_NET \| \
257	CFG_CMD_ELF \| \
258	CFG_CMD_IDE \| \
259	CFG_CMD_FAT)
260
261	/* tbs 09-March-2005 Removed to be able to use 2nd serial */
262	/* CFG_CMD_KGDB \| \ */
263
264
265	/* Include NetConsole support */
266	#define CONFIG_NETCONSOLE
267
268	/* Include auto complete with tabs */
269	#define CONFIG_AUTO_COMPLETE 1
270	#define CFG_AUTO_COMPLETE 1
271	#define CFG_ALT_MEMTEST 1 /* use real memory test */
272
273
274	/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
275	#include <cmd_confdefs.h>
276
277	#define CFG_LONGHELP /* undef to save memory */
278	#define CFG_PROMPT "MetroBox=> " /* Monitor Command Prompt */
279
280	#define CFG_HUSH_PARSER 1 /* HUSH for ext'd cli */
281	#define CFG_PROMPT_HUSH_PS2 "> "
282
283
284	/*-----------------------------------------------------------------------
285	* Console Buffer
286	----------------------------------------------------------------------/
287	#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
288	#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
289	#else
290	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
291	#endif
292	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
293	/* Print Buffer Size */
294	#define CFG_MAXARGS 16 /* max number of cmd args */
295	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Arg Buffer Size */
296
297	/*-----------------------------------------------------------------------
298	* Memory Test
299	----------------------------------------------------------------------/
300	#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
301	#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
302
303	/*-----------------------------------------------------------------------
304	* Compact Flash (in true IDE mode)
305	----------------------------------------------------------------------/
306	#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
307	#undef CONFIG_IDE_LED /* no led for ide supported */
308
309	#define CONFIG_IDE_RESET /* reset for ide supported */
310	#define CFG_IDE_MAXBUS 1 /* max. 1 IDE busses */
311	#define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS1) / max. 1 drives per IDE bus */
312
313	#define CFG_ATA_BASE_ADDR 0xF0000000
314	#define CFG_ATA_IDE0_OFFSET 0x0000
315	#define CFG_ATA_DATA_OFFSET 0x0000 /* Offset for data I/O */
316	#define CFG_ATA_REG_OFFSET 0x0000 /* Offset for normal register accesses*/
317	#define CFG_ATA_ALT_OFFSET 0x100000 /* Offset for alternate registers */
318
319	#define CFG_ATA_STRIDE 2 /* Directly connected CF, needs a stride
320	to get to the correct offset */
321	#define CONFIG_DOS_PARTITION 1 /* Include dos partition */
322
323	/*-----------------------------------------------------------------------
324	* PCI
325	----------------------------------------------------------------------/
326	/* General PCI */
327	#define CONFIG_PCI /* include pci support */
328	#define CONFIG_PCI_PNP /* do pci plug-and-play */
329	#define CONFIG_PCI_SCAN_SHOW /* show pci devices */
330	#define CFG_PCI_TARGBASE (CFG_PCI_MEMBASE)
331
332	/* Board-specific PCI */
333	#define CFG_PCI_PRE_INIT /* enable board pci_pre_init*/
334	#define CFG_PCI_TARGET_INIT /* let board init pci target*/
335
336	#define CFG_PCI_SUBSYS_VENDORID 0x17BA /* Sandburst */
337	#define CFG_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
338
339	/*
340	* For booting Linux, the board info and command line data
341	* have to be in the first 8 MB of memory, since this is
342	* the maximum mapped by the Linux kernel during initialization.
343	*/
344	#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
345	/*-----------------------------------------------------------------------
346	* Cache Configuration
347	*/
348	#define CFG_DCACHE_SIZE 8192 /* For IBM 405 CPUs */
349	#define CFG_CACHELINE_SIZE 32
350	#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
351	#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above */
352	#endif
353
354	/*
355	* Internal Definitions
356	*
357	* Boot Flags
358	*/
359	#define BOOTFLAG_COLD 0x01 /* Normal PowerOn: Boot from FLASH */
360	#define BOOTFLAG_WARM 0x02 /* Software reboot */
361
362	#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
363	#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */
364	#define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */
365	#endif
366
367	/*-----------------------------------------------------------------------
368	* Miscellaneous configurable options
369	----------------------------------------------------------------------/
370	#undef CONFIG_WATCHDOG /* watchdog disabled */
371	#define CFG_LOAD_ADDR 0x8000000 /* default load address */
372	#define CFG_EXTBDINFO 1 /* use extended board_info */
373
374	#define CFG_HZ 100 /* decr freq: 1 ms ticks */
375
376
377	#endif /* __CONFIG_H */