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fe8c2806 WD |
1 | /* |
2 | * ML2.h: ML2 specific config options | |
3 | * | |
4 | * Copyright 2002 Mind NV | |
5 | * | |
6 | * http://www.mind.be/ | |
7 | * | |
8 | * Author : Peter De Schrijver (p2@mind.be) | |
9 | * | |
10 | * Derived from : other configuration header files in this tree | |
11 | * | |
12 | * This software may be used and distributed according to the terms of | |
13 | * the GNU General Public License (GPL) version 2, incorporated herein by | |
14 | * reference. Drivers based on or derived from this code fall under the GPL | |
15 | * and must retain the authorship, copyright and this license notice. This | |
16 | * file is not a complete program and may only be used when the entire | |
17 | * program is licensed under the GPL. | |
18 | * | |
19 | */ | |
20 | ||
21 | #ifndef __CONFIG_H | |
22 | #define __CONFIG_H | |
23 | ||
24 | /* | |
25 | * High Level Configuration Options | |
26 | * (easy to change) | |
27 | */ | |
28 | ||
29 | #define CONFIG_405 1 /* This is a PPC405 CPU */ | |
30 | #define CONFIG_4xx 1 /* ...member of PPC4xx family */ | |
31 | #define CONFIG_ML2 1 /* ...on a ML2 board */ | |
32 | ||
2ae18241 | 33 | #define CONFIG_SYS_TEXT_BASE 0x18000000 |
2ced53e1 | 34 | #define CONFIG_SYS_LDSCRIPT "board/ml2/u-boot.lds" |
fe8c2806 | 35 | |
5a1aceb0 | 36 | #define CONFIG_ENV_IS_IN_FLASH 1 |
fe8c2806 | 37 | |
9314cee6 | 38 | #ifdef CONFIG_ENV_IS_IN_NVRAM |
5a1aceb0 | 39 | #undef CONFIG_ENV_IS_IN_FLASH |
fe8c2806 | 40 | #else |
5a1aceb0 | 41 | #ifdef CONFIG_ENV_IS_IN_FLASH |
9314cee6 | 42 | #undef CONFIG_ENV_IS_IN_NVRAM |
fe8c2806 WD |
43 | #endif |
44 | #endif | |
45 | ||
46 | #define CONFIG_BAUDRATE 9600 | |
47 | #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ | |
48 | ||
49 | #if 1 | |
50 | #define CONFIG_BOOTCOMMAND "bootm" /* autoboot command */ | |
51 | #else | |
52 | #define CONFIG_BOOTCOMMAND "bootp" /* autoboot command */ | |
53 | #endif | |
54 | ||
55 | #define CONFIG_PREBOOT "fsload 0x00100000 /boot/image" | |
56 | ||
fe8c2806 WD |
57 | #if 0 |
58 | #define CONFIG_BOOTARGS "root=/dev/nfs " \ | |
59 | "ip=192.168.2.176:192.168.2.190:192.168.2.79:255.255.255.0 " \ | |
60 | "nfsroot=192.168.2.190:/home/stefan/cpci405/target_ftest4" | |
61 | #else | |
62 | #define CONFIG_BOOTARGS "root=/dev/mtdblock2 " \ | |
63 | "console=ttyS0 console=tty" | |
64 | ||
65 | #endif | |
66 | ||
67 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ | |
6d0f6bcf | 68 | #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
fe8c2806 WD |
69 | |
70 | ||
659e2f67 JL |
71 | /* |
72 | * BOOTP options | |
73 | */ | |
74 | #define CONFIG_BOOTP_BOOTFILESIZE | |
75 | #define CONFIG_BOOTP_BOOTPATH | |
76 | #define CONFIG_BOOTP_GATEWAY | |
77 | #define CONFIG_BOOTP_HOSTNAME | |
78 | ||
79 | ||
8353e139 JL |
80 | /* |
81 | * Command line configuration. | |
82 | */ | |
83 | #include <config_cmd_default.h> | |
84 | ||
85 | #define CONFIG_CMD_IRQ | |
86 | #define CONFIG_CMD_KGDB | |
87 | #define CONFIG_CMD_BEDBUG | |
88 | #define CONFIG_CMD_ELF | |
89 | #define CONFIG_CMD_JFFS2 | |
90 | ||
91 | #undef CONFIG_CMD_NET | |
ee8028b7 | 92 | #undef CONFIG_CMD_NFS |
8353e139 JL |
93 | #undef CONFIG_CMD_RTC |
94 | #undef CONFIG_CMD_PCI | |
95 | #undef CONFIG_CMD_I2C | |
96 | ||
fe8c2806 WD |
97 | |
98 | #undef CONFIG_WATCHDOG /* watchdog disabled */ | |
99 | ||
100 | #define CONFIG_SYS_CLK_FREQ 50000000 | |
101 | ||
102 | #define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */ | |
103 | ||
ee8028b7 WD |
104 | /* |
105 | * I2C | |
106 | */ | |
107 | #define CONFIG_HARD_I2C /* I2C with hardware support */ | |
108 | #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ | |
109 | #define CONFIG_SYS_I2C_SLAVE 0x7F | |
110 | #define CONFIG_SYS_I2C_SPEED 400000 | |
111 | ||
fe8c2806 WD |
112 | /* |
113 | * Miscellaneous configurable options | |
114 | */ | |
6d0f6bcf JCPV |
115 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
116 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ | |
8353e139 | 117 | #if defined(CONFIG_CMD_KGDB) |
6d0f6bcf | 118 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
fe8c2806 | 119 | #else |
6d0f6bcf | 120 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
fe8c2806 | 121 | #endif |
6d0f6bcf JCPV |
122 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
123 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
124 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
fe8c2806 | 125 | |
6d0f6bcf JCPV |
126 | #define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ |
127 | #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ | |
fe8c2806 WD |
128 | |
129 | /* | |
6d0f6bcf JCPV |
130 | * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1. |
131 | * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31. | |
132 | * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value. | |
fe8c2806 WD |
133 | * The Linux BASE_BAUD define should match this configuration. |
134 | * baseBaud = cpuClock/(uartDivisor*16) | |
6d0f6bcf | 135 | * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock, |
fe8c2806 WD |
136 | * set Linux BASE_BAUD to 403200. |
137 | */ | |
6d0f6bcf JCPV |
138 | #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */ |
139 | #undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */ | |
140 | ||
141 | #define CONFIG_SYS_BASE_BAUD (3125000*16) | |
142 | #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_BASE_BAUD | |
143 | #define CONFIG_SYS_DUART_CHAN 0 | |
144 | #define CONFIG_SYS_NS16550_COM1 0xa0001003 | |
145 | #define CONFIG_SYS_NS16550_COM2 0xa0011003 | |
146 | #define CONFIG_SYS_NS16550_REG_SIZE -4 | |
147 | #define CONFIG_SYS_NS16550 1 | |
148 | #define CONFIG_SYS_INIT_CHAN1 1 | |
149 | #define CONFIG_SYS_INIT_CHAN2 1 | |
fe8c2806 WD |
150 | |
151 | /* The following table includes the supported baudrates */ | |
6d0f6bcf | 152 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
fe8c2806 WD |
153 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} |
154 | ||
6d0f6bcf JCPV |
155 | #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ |
156 | #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ | |
fe8c2806 | 157 | |
6d0f6bcf | 158 | #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ |
fe8c2806 WD |
159 | |
160 | ||
fe8c2806 WD |
161 | /*----------------------------------------------------------------------- |
162 | * Start addresses for the final memory configuration | |
163 | * (Set up by the startup code) | |
6d0f6bcf | 164 | * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 |
fe8c2806 | 165 | */ |
6d0f6bcf JCPV |
166 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
167 | #define CONFIG_SYS_FLASH_BASE 0x18000000 | |
168 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
169 | #define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */ | |
170 | #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ | |
fe8c2806 WD |
171 | |
172 | /* | |
173 | * For booting Linux, the board info and command line data | |
174 | * have to be in the first 8 MB of memory, since this is | |
175 | * the maximum mapped by the Linux kernel during initialization. | |
176 | */ | |
6d0f6bcf | 177 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
fe8c2806 WD |
178 | /*----------------------------------------------------------------------- |
179 | * FLASH organization | |
180 | */ | |
6d0f6bcf JCPV |
181 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
182 | #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ | |
fe8c2806 | 183 | |
6d0f6bcf JCPV |
184 | #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
185 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ | |
fe8c2806 WD |
186 | |
187 | /* BEG ENVIRONNEMENT FLASH */ | |
5a1aceb0 | 188 | #ifdef CONFIG_ENV_IS_IN_FLASH |
0e8d1586 JCPV |
189 | #define CONFIG_ENV_OFFSET 0x00050000 /* Offset of Environment Sector */ |
190 | #define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ | |
191 | #define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */ | |
fe8c2806 WD |
192 | #endif |
193 | /* END ENVIRONNEMENT FLASH */ | |
194 | /*----------------------------------------------------------------------- | |
195 | * NVRAM organization | |
196 | */ | |
6d0f6bcf JCPV |
197 | #define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */ |
198 | #define CONFIG_SYS_NVRAM_SIZE 0x1ff8 /* NVRAM size */ | |
fe8c2806 | 199 | |
9314cee6 | 200 | #ifdef CONFIG_ENV_IS_IN_NVRAM |
0e8d1586 JCPV |
201 | #define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */ |
202 | #define CONFIG_ENV_ADDR \ | |
6d0f6bcf | 203 | (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */ |
fe8c2806 | 204 | #endif |
fe8c2806 WD |
205 | |
206 | /* | |
207 | * Init Memory Controller: | |
208 | * | |
209 | * BR0/1 and OR0/1 (FLASH) | |
210 | */ | |
211 | ||
6d0f6bcf | 212 | #define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */ |
fe8c2806 WD |
213 | #define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */ |
214 | ||
215 | ||
216 | /* Configuration Port location */ | |
217 | #define CONFIG_PORT_ADDR 0xF0000500 | |
218 | ||
219 | /*----------------------------------------------------------------------- | |
220 | * Definitions for initial stack pointer and data area (in DPRAM) | |
221 | */ | |
222 | ||
6d0f6bcf | 223 | #define CONFIG_SYS_INIT_RAM_ADDR 0x800000 /* inside of SDRAM */ |
553f0982 | 224 | #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */ |
25ddd1fb | 225 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
6d0f6bcf | 226 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
fe8c2806 WD |
227 | |
228 | /*----------------------------------------------------------------------- | |
229 | * Definitions for Serial Presence Detect EEPROM address | |
230 | * (to get SDRAM settings) | |
231 | */ | |
232 | #define SPD_EEPROM_ADDRESS 0x50 | |
233 | ||
8353e139 | 234 | #if defined(CONFIG_CMD_KGDB) |
fe8c2806 WD |
235 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |
236 | #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ | |
237 | #endif | |
238 | ||
700a0c64 WD |
239 | /* |
240 | * JFFS2 partitions | |
241 | * | |
242 | */ | |
243 | /* No command line, one static partition, whole device */ | |
68d7d651 | 244 | #undef CONFIG_CMD_MTDPARTS |
700a0c64 WD |
245 | #define CONFIG_JFFS2_DEV "nor0" |
246 | #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF | |
247 | #define CONFIG_JFFS2_PART_OFFSET 0x00080000 | |
248 | ||
249 | /* mtdparts command line support */ | |
250 | /* Note: fake mtd_id used, no linux mtd map file */ | |
251 | /* | |
68d7d651 | 252 | #define CONFIG_CMD_MTDPARTS |
700a0c64 WD |
253 | #define MTDIDS_DEFAULT "nor0=ml2-0" |
254 | #define MTDPARTS_DEFAULT "mtdparts=ml2-0:-@512k(jffs2)" | |
255 | */ | |
fe8c2806 | 256 | |
fe8c2806 | 257 | #endif /* __CONFIG_H */ |