[people/ms/u-boot.git] / include / configs / MVSMR.h

/*
 * (C) Copyright 2003-2004
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * (C) Copyright 2004-2010
 * Matrix-Vision GmbH, andre.schwarz@matrix-vision.de
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <version.h>

#define CONFIG_MPC5xxx	1
#define CONFIG_MPC5200 	1

#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE	0xFF800000
#endif
#define CONFIG_SYS_LDSCRIPT	"board/matrix_vision/mvsmr/u-boot.lds"

#define CONFIG_SYS_MPC5XXX_CLKIN	33000000

#define CONFIG_MISC_INIT_R	1

#define CONFIG_SYS_CACHELINE_SIZE	32
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CACHELINE_SHIFT	5
#endif

#define CONFIG_PSC_CONSOLE	1
#define CONFIG_BAUDRATE		115200
#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200,\
						230400}

#define CONFIG_PCI		1
#define CONFIG_PCI_PNP		1
#undef	CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	1

#define CONFIG_PCI_MEM_BUS	0x40000000
#define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
#define CONFIG_PCI_MEM_SIZE	0x10000000

#define CONFIG_PCI_IO_BUS	0x50000000
#define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE	0x01000000

#define CONFIG_SYS_XLB_PIPELINING	1
#define CONFIG_HIGH_BATS	1

#define MV_CI			mvSMR
#define MV_VCI			mvSMR
#define MV_FPGA_DATA		0xff840000
#define MV_FPGA_SIZE		0x1ff88
#define MV_KERNEL_ADDR		0xfff00000
#define MV_SCRIPT_ADDR		0xff806000
#define MV_INITRD_ADDR		0xff880000
#define MV_INITRD_LENGTH	0x00240000
#define MV_SCRATCH_ADDR		0xffcc0000
#define MV_SCRATCH_LENGTH	MV_INITRD_LENGTH

#define CONFIG_SHOW_BOOT_PROGRESS 1

#define MV_KERNEL_ADDR_RAM	0x00100000
#define MV_INITRD_ADDR_RAM	0x00400000

/*
 * Supported commands
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_FPGA
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
#define CONFIG_CMD_SDRAM

#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_NTPSERVER
#define CONFIG_BOOTP_RANDOM_DELAY
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_VENDOREX

/*
 * Autoboot
 */
#define CONFIG_BOOTDELAY		1
#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_STOP_STR 	"abcdefg"
#define CONFIG_ZERO_BOOTDELAY_CHECK

#define CONFIG_BOOTCOMMAND      "source ${script_addr}"
#define CONFIG_BOOTARGS		"root=/dev/ram ro rootfstype=squashfs" \
					" allocate=6M"

#define CONFIG_EXTRA_ENV_SETTINGS				\
	"console_nr=0\0"					\
	"console=no\0"						\
	"stdin=serial\0"					\
	"stdout=serial\0"					\
	"stderr=serial\0"					\
	"fpga=0\0"						\
	"fpgadata=" __stringify(MV_FPGA_DATA) "\0"			\
	"fpgadatasize=" __stringify(MV_FPGA_SIZE) "\0"		\
	"mv_kernel_addr=" __stringify(MV_KERNEL_ADDR) "\0"		\
	"mv_kernel_addr_ram=" __stringify(MV_KERNEL_ADDR_RAM) "\0"	\
	"script_addr=" __stringify(MV_SCRIPT_ADDR) "\0"		\
	"mv_initrd_addr=" __stringify(MV_INITRD_ADDR) "\0"		\
	"mv_initrd_addr_ram=" __stringify(MV_INITRD_ADDR_RAM) "\0"	\
	"mv_initrd_length=" __stringify(MV_INITRD_LENGTH) "\0"	\
	"mv_scratch_addr=" __stringify(MV_SCRATCH_ADDR) "\0"		\
	"mv_scratch_length=" __stringify(MV_SCRATCH_LENGTH) "\0"	\
	"mv_version=" U_BOOT_VERSION "\0"			\
	"dhcp_client_id=" __stringify(MV_CI) "\0"			\
	"dhcp_vendor-class-identifier=" __stringify(MV_VCI) "\0"	\
	"netretry=no\0"						\
	"use_static_ipaddr=no\0"				\
	"static_ipaddr=192.168.0.101\0"				\
	"static_netmask=255.255.255.0\0"			\
	"static_gateway=0.0.0.0\0"				\
	"initrd_name=uInitrd.mvsmr-rfs\0"			\
	"zcip=yes\0"						\
	"netboot=no\0"						\
	""

/*
 * IPB Bus clocking configuration.
 */
#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK

/*
 * Flash configuration
 */
#undef 	CONFIG_FLASH_16BIT
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1
#define CONFIG_SYS_FLASH_EMPTY_INFO

#define CONFIG_SYS_FLASH_ERASE_TOUT	50000
#define CONFIG_SYS_FLASH_WRITE_TOUT	1000

#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_MAX_FLASH_SECT	256

#define CONFIG_SYS_LOWBOOT
#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_FLASH_SIZE		0x00800000

/*
 * Environment settings
 */
#define CONFIG_ENV_IS_IN_FLASH
#undef	CONFIG_SYS_FLASH_PROTECTION
#define	CONFIG_OVERWRITE_ETHADDR_ONCE

#define CONFIG_ENV_OFFSET	0x8000
#define CONFIG_ENV_SIZE		0x2000
#define CONFIG_ENV_SECT_SIZE	0x2000

/* used by linker script to wrap code around */
#define CONFIG_SCRIPT_OFFSET	0x6000
#define CONFIG_SCRIPT_SECT_SIZE	0x2000

/*
 * Memory map
 */
#define CONFIG_SYS_MBAR		0xF0000000
#define CONFIG_SYS_SDRAM_BASE	0x00000000
#define CONFIG_SYS_DEFAULT_MBAR	0x80000000

#define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
#define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_SIZE

#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
						GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET

#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT		1
#endif

/* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
#define CONFIG_SYS_MONITOR_LEN		(512 << 10)
#define CONFIG_SYS_MALLOC_LEN		(512 << 10)
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)

/*
 * I2C configuration
 */
#define CONFIG_HARD_I2C		1
#define CONFIG_SYS_I2C_MODULE	1
#define CONFIG_SYS_I2C_SPEED	86000
#define CONFIG_SYS_I2C_SLAVE	0x7F

/*
 * Ethernet configuration
 */
#define CONFIG_NET_RETRY_COUNT 5

#define CONFIG_MPC5xxx_FEC
#define CONFIG_MPC5xxx_FEC_MII100
#define CONFIG_PHY_ADDR		0x00
#define CONFIG_NETDEV		eth0

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_CMDLINE_EDITING
#undef 	CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT		"=> "
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CBSIZE		1024
#else
#define CONFIG_SYS_CBSIZE		256
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

#define CONFIG_SYS_MEMTEST_START	0x00800000
#define CONFIG_SYS_MEMTEST_END		0x02f00000

#define CONFIG_SYS_HZ			1000

/* default load address */
#define CONFIG_SYS_LOAD_ADDR		0x02000000
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 		0x00200000

/*
 * Various low-level settings
 */
#define CONFIG_SYS_GPS_PORT_CONFIG	0x00050044

#define CONFIG_SYS_HID0_INIT		(HID0_ICE | HID0_ICFI)
#define CONFIG_SYS_HID0_FINAL		HID0_ICE

#define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
#define CONFIG_SYS_BOOTCS_CFG		0x00047800
#define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE

#define CONFIG_SYS_CS_BURST		0x000000f0
#define CONFIG_SYS_CS_DEADCYCLE		0x33333303

#define CONFIG_SYS_RESET_ADDRESS	0x00000100

#undef FPGA_DEBUG
#undef CONFIG_SYS_FPGA_PROG_FEEDBACK
#define CONFIG_FPGA
#define CONFIG_FPGA_XILINX	1
#define CONFIG_FPGA_SPARTAN2	1
#define CONFIG_FPGA_COUNT	1

#endif
Commit	Line	Data
1f2463d7 AS	1	/*
	2	* (C) Copyright 2003-2004
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
	5	* (C) Copyright 2004-2010
	6	* Matrix-Vision GmbH, andre.schwarz@matrix-vision.de
	7	*
	8	* See file CREDITS for list of people who contributed to this
	9	* project.
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of
	14	* the License, or (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	* MA 02111-1307 USA
	25	*/
	26
	27	#ifndef __CONFIG_H
	28	#define __CONFIG_H
	29
	30	#include <version.h>
	31
	32	#define CONFIG_MPC5xxx 1
	33	#define CONFIG_MPC5200 1
	34
2ae18241 WD	35	#ifndef CONFIG_SYS_TEXT_BASE
	36	#define CONFIG_SYS_TEXT_BASE 0xFF800000
	37	#endif
2ced53e1	38	#define CONFIG_SYS_LDSCRIPT "board/matrix_vision/mvsmr/u-boot.lds"
2ae18241	39
1f2463d7 AS	40	#define CONFIG_SYS_MPC5XXX_CLKIN 33000000
1f2463d7 AS	41
1f2463d7 AS	42	#define CONFIG_MISC_INIT_R 1
	43
	44	#define CONFIG_SYS_CACHELINE_SIZE 32
	45	#ifdef CONFIG_CMD_KGDB
	46	#define CONFIG_SYS_CACHELINE_SHIFT 5
	47	#endif
	48
	49	#define CONFIG_PSC_CONSOLE 1
	50	#define CONFIG_BAUDRATE 115200
	51	#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200,\
	52	230400}
	53
	54	#define CONFIG_PCI 1
	55	#define CONFIG_PCI_PNP 1
	56	#undef CONFIG_PCI_SCAN_SHOW
	57	#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
	58
	59	#define CONFIG_PCI_MEM_BUS 0x40000000
	60	#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
	61	#define CONFIG_PCI_MEM_SIZE 0x10000000
	62
	63	#define CONFIG_PCI_IO_BUS 0x50000000
	64	#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
	65	#define CONFIG_PCI_IO_SIZE 0x01000000
	66
	67	#define CONFIG_SYS_XLB_PIPELINING 1
	68	#define CONFIG_HIGH_BATS 1
	69
	70	#define MV_CI mvSMR
	71	#define MV_VCI mvSMR
	72	#define MV_FPGA_DATA 0xff840000
	73	#define MV_FPGA_SIZE 0x1ff88
	74	#define MV_KERNEL_ADDR 0xfff00000
	75	#define MV_SCRIPT_ADDR 0xff806000
	76	#define MV_INITRD_ADDR 0xff880000
	77	#define MV_INITRD_LENGTH 0x00240000
	78	#define MV_SCRATCH_ADDR 0xffcc0000
	79	#define MV_SCRATCH_LENGTH MV_INITRD_LENGTH
	80
	81	#define CONFIG_SHOW_BOOT_PROGRESS 1
	82
	83	#define MV_KERNEL_ADDR_RAM 0x00100000
	84	#define MV_INITRD_ADDR_RAM 0x00400000
	85
	86	/*
	87	* Supported commands
	88	*/
	89	#include <config_cmd_default.h>
	90
	91	#define CONFIG_CMD_CACHE
	92	#define CONFIG_CMD_DHCP
	93	#define CONFIG_CMD_FPGA
	94	#define CONFIG_CMD_I2C
	95	#define CONFIG_CMD_MII
	96	#define CONFIG_CMD_NET
	97	#define CONFIG_CMD_PCI
	98	#define CONFIG_CMD_PING
	99	#define CONFIG_CMD_SDRAM
	100
	101	#define CONFIG_BOOTP_BOOTFILESIZE
	102	#define CONFIG_BOOTP_BOOTPATH
	103	#define CONFIG_BOOTP_DNS
	104	#define CONFIG_BOOTP_DNS2
	105	#define CONFIG_BOOTP_GATEWAY
106	#define CONFIG_BOOTP_HOSTNAME
107	#define CONFIG_BOOTP_NTPSERVER
108	#define CONFIG_BOOTP_RANDOM_DELAY
109	#define CONFIG_BOOTP_SEND_HOSTNAME
110	#define CONFIG_BOOTP_SUBNETMASK
111	#define CONFIG_BOOTP_VENDOREX
112
113	/*
114	* Autoboot
115	*/
116	#define CONFIG_BOOTDELAY 1
117	#define CONFIG_AUTOBOOT_KEYED
118	#define CONFIG_AUTOBOOT_STOP_STR "abcdefg"
119	#define CONFIG_ZERO_BOOTDELAY_CHECK
120
121	#define CONFIG_BOOTCOMMAND "source ${script_addr}"
122	#define CONFIG_BOOTARGS "root=/dev/ram ro rootfstype=squashfs" \
123	" allocate=6M"
124
1f2463d7 AS	125	#define CONFIG_EXTRA_ENV_SETTINGS \
	126	"console_nr=0\0" \
	127	"console=no\0" \
	128	"stdin=serial\0" \
	129	"stdout=serial\0" \
	130	"stderr=serial\0" \
	131	"fpga=0\0" \
5368c55d MV	132	"fpgadata=" __stringify(MV_FPGA_DATA) "\0" \
	133	"fpgadatasize=" __stringify(MV_FPGA_SIZE) "\0" \
	134	"mv_kernel_addr=" __stringify(MV_KERNEL_ADDR) "\0" \
	135	"mv_kernel_addr_ram=" __stringify(MV_KERNEL_ADDR_RAM) "\0" \
	136	"script_addr=" __stringify(MV_SCRIPT_ADDR) "\0" \
	137	"mv_initrd_addr=" __stringify(MV_INITRD_ADDR) "\0" \
	138	"mv_initrd_addr_ram=" __stringify(MV_INITRD_ADDR_RAM) "\0" \
	139	"mv_initrd_length=" __stringify(MV_INITRD_LENGTH) "\0" \
	140	"mv_scratch_addr=" __stringify(MV_SCRATCH_ADDR) "\0" \
	141	"mv_scratch_length=" __stringify(MV_SCRATCH_LENGTH) "\0" \
1f2463d7	142	"mv_version=" U_BOOT_VERSION "\0" \
5368c55d MV	143	"dhcp_client_id=" __stringify(MV_CI) "\0" \
5368c55d MV	144	"dhcp_vendor-class-identifier=" __stringify(MV_VCI) "\0" \
1f2463d7 AS	145	"netretry=no\0" \
	146	"use_static_ipaddr=no\0" \
	147	"static_ipaddr=192.168.0.101\0" \
	148	"static_netmask=255.255.255.0\0" \
	149	"static_gateway=0.0.0.0\0" \
	150	"initrd_name=uInitrd.mvsmr-rfs\0" \
	151	"zcip=yes\0" \
	152	"netboot=no\0" \
	153	""
	154
1f2463d7 AS	155	/*
	156	* IPB Bus clocking configuration.
	157	*/
	158	#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK
	159
	160	/*
	161	* Flash configuration
	162	*/
	163	#undef CONFIG_FLASH_16BIT
	164	#define CONFIG_SYS_FLASH_CFI
	165	#define CONFIG_FLASH_CFI_DRIVER
	166	#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1
	167	#define CONFIG_SYS_FLASH_EMPTY_INFO
	168
	169	#define CONFIG_SYS_FLASH_ERASE_TOUT 50000
	170	#define CONFIG_SYS_FLASH_WRITE_TOUT 1000
	171
	172	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	173	#define CONFIG_SYS_MAX_FLASH_SECT 256
	174
	175	#define CONFIG_SYS_LOWBOOT
14d0a02a	176	#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
1f2463d7 AS	177	#define CONFIG_SYS_FLASH_SIZE 0x00800000
	178
	179	/*
	180	* Environment settings
	181	*/
	182	#define CONFIG_ENV_IS_IN_FLASH
	183	#undef CONFIG_SYS_FLASH_PROTECTION
1f2463d7 AS	184	#define CONFIG_OVERWRITE_ETHADDR_ONCE
	185
	186	#define CONFIG_ENV_OFFSET 0x8000
	187	#define CONFIG_ENV_SIZE 0x2000
	188	#define CONFIG_ENV_SECT_SIZE 0x2000
	189
	190	/* used by linker script to wrap code around */
	191	#define CONFIG_SCRIPT_OFFSET 0x6000
	192	#define CONFIG_SCRIPT_SECT_SIZE 0x2000
	193
	194	/*
	195	* Memory map
	196	*/
	197	#define CONFIG_SYS_MBAR 0xF0000000
	198	#define CONFIG_SYS_SDRAM_BASE 0x00000000
	199	#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
	200
	201	#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
553f0982	202	#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
1f2463d7	203
553f0982	204	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
25ddd1fb	205	GENERATED_GBL_DATA_SIZE)
1f2463d7 AS	206	#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
1f2463d7 AS	207
14d0a02a	208	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
1f2463d7 AS	209	#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
	210	#define CONFIG_SYS_RAMBOOT 1
	211	#endif
	212
	213	/* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
	214	#define CONFIG_SYS_MONITOR_LEN (512 << 10)
	215	#define CONFIG_SYS_MALLOC_LEN (512 << 10)
	216	#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
	217
	218	/*
	219	* I2C configuration
	220	*/
	221	#define CONFIG_HARD_I2C 1
	222	#define CONFIG_SYS_I2C_MODULE 1
	223	#define CONFIG_SYS_I2C_SPEED 86000
	224	#define CONFIG_SYS_I2C_SLAVE 0x7F
	225
	226	/*
	227	* Ethernet configuration
	228	*/
	229	#define CONFIG_NET_RETRY_COUNT 5
	230
	231	#define CONFIG_MPC5xxx_FEC
	232	#define CONFIG_MPC5xxx_FEC_MII100
	233	#define CONFIG_PHY_ADDR 0x00
	234	#define CONFIG_NETDEV eth0
	235
	236	/*
	237	* Miscellaneous configurable options
	238	*/
	239	#define CONFIG_SYS_HUSH_PARSER
	240	#define CONFIG_CMDLINE_EDITING
1f2463d7 AS	241	#undef CONFIG_SYS_LONGHELP
	242	#define CONFIG_SYS_PROMPT "=> "
	243	#ifdef CONFIG_CMD_KGDB
	244	#define CONFIG_SYS_CBSIZE 1024
	245	#else
	246	#define CONFIG_SYS_CBSIZE 256
	247	#endif
	248	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
	249	#define CONFIG_SYS_MAXARGS 16
	250	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	251
	252	#define CONFIG_SYS_MEMTEST_START 0x00800000
	253	#define CONFIG_SYS_MEMTEST_END 0x02f00000
	254
	255	#define CONFIG_SYS_HZ 1000
	256
	257	/* default load address */
	258	#define CONFIG_SYS_LOAD_ADDR 0x02000000
	259	/* default location for tftp and bootm */
	260	#define CONFIG_LOADADDR 0x00200000
	261
	262	/*
	263	* Various low-level settings
	264	*/
	265	#define CONFIG_SYS_GPS_PORT_CONFIG 0x00050044
	266
	267	#define CONFIG_SYS_HID0_INIT (HID0_ICE \| HID0_ICFI)
	268	#define CONFIG_SYS_HID0_FINAL HID0_ICE
	269
	270	#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
	271	#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
	272	#define CONFIG_SYS_BOOTCS_CFG 0x00047800
	273	#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
	274	#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
	275
	276	#define CONFIG_SYS_CS_BURST 0x000000f0
	277	#define CONFIG_SYS_CS_DEADCYCLE 0x33333303
	278
	279	#define CONFIG_SYS_RESET_ADDRESS 0x00000100
	280
	281	#undef FPGA_DEBUG
	282	#undef CONFIG_SYS_FPGA_PROG_FEEDBACK
b03b25ca	283	#define CONFIG_FPGA
1f2463d7 AS	284	#define CONFIG_FPGA_XILINX 1
	285	#define CONFIG_FPGA_SPARTAN2 1
	286	#define CONFIG_FPGA_COUNT 1
	287
	288	#endif